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net/macb: add pinctrl consumer support
[linux-2.6.git] / drivers / net / ethernet / cadence / macb.c
blobc3748753512578577d155dd866ca2f6cc08e822f
1 /*
2 * Cadence MACB/GEM Ethernet Controller driver
3 *
4 * Copyright (C) 2004-2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12 #include <linux/clk.h>
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/slab.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/netdevice.h>
21 #include <linux/etherdevice.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/platform_data/macb.h>
24 #include <linux/platform_device.h>
25 #include <linux/phy.h>
26 #include <linux/of.h>
27 #include <linux/of_device.h>
28 #include <linux/of_net.h>
29 #include <linux/pinctrl/consumer.h>
30
31 #include "macb.h"
32
33 #define RX_BUFFER_SIZE 128
34 #define RX_RING_SIZE 512 /* must be power of 2 */
35 #define RX_RING_BYTES (sizeof(struct macb_dma_desc) * RX_RING_SIZE)
36
37 #define TX_RING_SIZE 128 /* must be power of 2 */
38 #define TX_RING_BYTES (sizeof(struct macb_dma_desc) * TX_RING_SIZE)
39
40 /* minimum number of free TX descriptors before waking up TX process */
41 #define MACB_TX_WAKEUP_THRESH (TX_RING_SIZE / 4)
42
43 #define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \
44 | MACB_BIT(ISR_ROVR))
45 #define MACB_TX_ERR_FLAGS (MACB_BIT(ISR_TUND) \
46 | MACB_BIT(ISR_RLE) \
47 | MACB_BIT(TXERR))
48 #define MACB_TX_INT_FLAGS (MACB_TX_ERR_FLAGS | MACB_BIT(TCOMP))
49
50 /*
51 * Graceful stop timeouts in us. We should allow up to
52 * 1 frame time (10 Mbits/s, full-duplex, ignoring collisions)
53 */
54 #define MACB_HALT_TIMEOUT 1230
55
56 /* Ring buffer accessors */
57 static unsigned int macb_tx_ring_wrap(unsigned int index)
58 {
59 return index & (TX_RING_SIZE - 1);
60 }
61
62 static unsigned int macb_tx_ring_avail(struct macb *bp)
63 {
64 return (bp->tx_tail - bp->tx_head) & (TX_RING_SIZE - 1);
65 }
66
67 static struct macb_dma_desc *macb_tx_desc(struct macb *bp, unsigned int index)
68 {
69 return &bp->tx_ring[macb_tx_ring_wrap(index)];
70 }
71
72 static struct macb_tx_skb *macb_tx_skb(struct macb *bp, unsigned int index)
73 {
74 return &bp->tx_skb[macb_tx_ring_wrap(index)];
75 }
76
77 static dma_addr_t macb_tx_dma(struct macb *bp, unsigned int index)
78 {
79 dma_addr_t offset;
80
81 offset = macb_tx_ring_wrap(index) * sizeof(struct macb_dma_desc);
82
83 return bp->tx_ring_dma + offset;
84 }
85
86 static unsigned int macb_rx_ring_wrap(unsigned int index)
87 {
88 return index & (RX_RING_SIZE - 1);
89 }
90
91 static struct macb_dma_desc *macb_rx_desc(struct macb *bp, unsigned int index)
92 {
93 return &bp->rx_ring[macb_rx_ring_wrap(index)];
94 }
95
96 static void *macb_rx_buffer(struct macb *bp, unsigned int index)
97 {
98 return bp->rx_buffers + RX_BUFFER_SIZE * macb_rx_ring_wrap(index);
99 }
100
101 static void __macb_set_hwaddr(struct macb *bp)
102 {
103 u32 bottom;
104 u16 top;
105
106 bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr));
107 macb_or_gem_writel(bp, SA1B, bottom);
108 top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4)));
109 macb_or_gem_writel(bp, SA1T, top);
110 }
111
112 static void __init macb_get_hwaddr(struct macb *bp)
113 {
114 u32 bottom;
115 u16 top;
116 u8 addr[6];
117
118 bottom = macb_or_gem_readl(bp, SA1B);
119 top = macb_or_gem_readl(bp, SA1T);
120
121 addr[0] = bottom & 0xff;
122 addr[1] = (bottom >> 8) & 0xff;
123 addr[2] = (bottom >> 16) & 0xff;
124 addr[3] = (bottom >> 24) & 0xff;
125 addr[4] = top & 0xff;
126 addr[5] = (top >> 8) & 0xff;
127
128 if (is_valid_ether_addr(addr)) {
129 memcpy(bp->dev->dev_addr, addr, sizeof(addr));
130 } else {
131 netdev_info(bp->dev, "invalid hw address, using random\n");
132 eth_hw_addr_random(bp->dev);
133 }
134 }
135
136 static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
137 {
138 struct macb *bp = bus->priv;
139 int value;
140
141 macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
142 | MACB_BF(RW, MACB_MAN_READ)
143 | MACB_BF(PHYA, mii_id)
144 | MACB_BF(REGA, regnum)
145 | MACB_BF(CODE, MACB_MAN_CODE)));
146
147 /* wait for end of transfer */
148 while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
149 cpu_relax();
150
151 value = MACB_BFEXT(DATA, macb_readl(bp, MAN));
152
153 return value;
154 }
155
156 static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
157 u16 value)
158 {
159 struct macb *bp = bus->priv;
160
161 macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
162 | MACB_BF(RW, MACB_MAN_WRITE)
163 | MACB_BF(PHYA, mii_id)
164 | MACB_BF(REGA, regnum)
165 | MACB_BF(CODE, MACB_MAN_CODE)
166 | MACB_BF(DATA, value)));
167
168 /* wait for end of transfer */
169 while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
170 cpu_relax();
171
172 return 0;
173 }
174
175 static int macb_mdio_reset(struct mii_bus *bus)
176 {
177 return 0;
178 }
179
180 static void macb_handle_link_change(struct net_device *dev)
181 {
182 struct macb *bp = netdev_priv(dev);
183 struct phy_device *phydev = bp->phy_dev;
184 unsigned long flags;
185
186 int status_change = 0;
187
188 spin_lock_irqsave(&bp->lock, flags);
189
190 if (phydev->link) {
191 if ((bp->speed != phydev->speed) ||
192 (bp->duplex != phydev->duplex)) {
193 u32 reg;
194
195 reg = macb_readl(bp, NCFGR);
196 reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
197 if (macb_is_gem(bp))
198 reg &= ~GEM_BIT(GBE);
199
200 if (phydev->duplex)
201 reg |= MACB_BIT(FD);
202 if (phydev->speed == SPEED_100)
203 reg |= MACB_BIT(SPD);
204 if (phydev->speed == SPEED_1000)
205 reg |= GEM_BIT(GBE);
206
207 macb_or_gem_writel(bp, NCFGR, reg);
208
209 bp->speed = phydev->speed;
210 bp->duplex = phydev->duplex;
211 status_change = 1;
212 }
213 }
214
215 if (phydev->link != bp->link) {
216 if (!phydev->link) {
217 bp->speed = 0;
218 bp->duplex = -1;
219 }
220 bp->link = phydev->link;
221
222 status_change = 1;
223 }
224
225 spin_unlock_irqrestore(&bp->lock, flags);
226
227 if (status_change) {
228 if (phydev->link) {
229 netif_carrier_on(dev);
230 netdev_info(dev, "link up (%d/%s)\n",
231 phydev->speed,
232 phydev->duplex == DUPLEX_FULL ?
233 "Full" : "Half");
234 } else {
235 netif_carrier_off(dev);
236 netdev_info(dev, "link down\n");
237 }
238 }
239 }
240
241 /* based on au1000_eth. c*/
242 static int macb_mii_probe(struct net_device *dev)
243 {
244 struct macb *bp = netdev_priv(dev);
245 struct phy_device *phydev;
246 int ret;
247
248 phydev = phy_find_first(bp->mii_bus);
249 if (!phydev) {
250 netdev_err(dev, "no PHY found\n");
251 return -1;
252 }
253
254 /* TODO : add pin_irq */
255
256 /* attach the mac to the phy */
257 ret = phy_connect_direct(dev, phydev, &macb_handle_link_change, 0,
258 bp->phy_interface);
259 if (ret) {
260 netdev_err(dev, "Could not attach to PHY\n");
261 return ret;
262 }
263
264 /* mask with MAC supported features */
265 if (macb_is_gem(bp))
266 phydev->supported &= PHY_GBIT_FEATURES;
267 else
268 phydev->supported &= PHY_BASIC_FEATURES;
269
270 phydev->advertising = phydev->supported;
271
272 bp->link = 0;
273 bp->speed = 0;
274 bp->duplex = -1;
275 bp->phy_dev = phydev;
276
277 return 0;
278 }
279
280 int macb_mii_init(struct macb *bp)
281 {
282 struct macb_platform_data *pdata;
283 int err = -ENXIO, i;
284
285 /* Enable management port */
286 macb_writel(bp, NCR, MACB_BIT(MPE));
287
288 bp->mii_bus = mdiobus_alloc();
289 if (bp->mii_bus == NULL) {
290 err = -ENOMEM;
291 goto err_out;
292 }
293
294 bp->mii_bus->name = "MACB_mii_bus";
295 bp->mii_bus->read = &macb_mdio_read;
296 bp->mii_bus->write = &macb_mdio_write;
297 bp->mii_bus->reset = &macb_mdio_reset;
298 snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
299 bp->pdev->name, bp->pdev->id);
300 bp->mii_bus->priv = bp;
301 bp->mii_bus->parent = &bp->dev->dev;
302 pdata = bp->pdev->dev.platform_data;
303
304 if (pdata)
305 bp->mii_bus->phy_mask = pdata->phy_mask;
306
307 bp->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
308 if (!bp->mii_bus->irq) {
309 err = -ENOMEM;
310 goto err_out_free_mdiobus;
311 }
312
313 for (i = 0; i < PHY_MAX_ADDR; i++)
314 bp->mii_bus->irq[i] = PHY_POLL;
315
316 dev_set_drvdata(&bp->dev->dev, bp->mii_bus);
317
318 if (mdiobus_register(bp->mii_bus))
319 goto err_out_free_mdio_irq;
320
321 if (macb_mii_probe(bp->dev) != 0) {
322 goto err_out_unregister_bus;
323 }
324
325 return 0;
326
327 err_out_unregister_bus:
328 mdiobus_unregister(bp->mii_bus);
329 err_out_free_mdio_irq:
330 kfree(bp->mii_bus->irq);
331 err_out_free_mdiobus:
332 mdiobus_free(bp->mii_bus);
333 err_out:
334 return err;
335 }
336 EXPORT_SYMBOL_GPL(macb_mii_init);
337
338 static void macb_update_stats(struct macb *bp)
339 {
340 u32 __iomem *reg = bp->regs + MACB_PFR;
341 u32 *p = &bp->hw_stats.macb.rx_pause_frames;
342 u32 *end = &bp->hw_stats.macb.tx_pause_frames + 1;
343
344 WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4);
345
346 for(; p < end; p++, reg++)
347 *p += __raw_readl(reg);
348 }
349
350 static int macb_halt_tx(struct macb *bp)
351 {
352 unsigned long halt_time, timeout;
353 u32 status;
354
355 macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(THALT));
356
357 timeout = jiffies + usecs_to_jiffies(MACB_HALT_TIMEOUT);
358 do {
359 halt_time = jiffies;
360 status = macb_readl(bp, TSR);
361 if (!(status & MACB_BIT(TGO)))
362 return 0;
363
364 usleep_range(10, 250);
365 } while (time_before(halt_time, timeout));
366
367 return -ETIMEDOUT;
368 }
369
370 static void macb_tx_error_task(struct work_struct *work)
371 {
372 struct macb *bp = container_of(work, struct macb, tx_error_task);
373 struct macb_tx_skb *tx_skb;
374 struct sk_buff *skb;
375 unsigned int tail;
376
377 netdev_vdbg(bp->dev, "macb_tx_error_task: t = %u, h = %u\n",
378 bp->tx_tail, bp->tx_head);
379
380 /* Make sure nobody is trying to queue up new packets */
381 netif_stop_queue(bp->dev);
382
383 /*
384 * Stop transmission now
385 * (in case we have just queued new packets)
386 */
387 if (macb_halt_tx(bp))
388 /* Just complain for now, reinitializing TX path can be good */
389 netdev_err(bp->dev, "BUG: halt tx timed out\n");
390
391 /* No need for the lock here as nobody will interrupt us anymore */
392
393 /*
394 * Treat frames in TX queue including the ones that caused the error.
395 * Free transmit buffers in upper layer.
396 */
397 for (tail = bp->tx_tail; tail != bp->tx_head; tail++) {
398 struct macb_dma_desc *desc;
399 u32 ctrl;
400
401 desc = macb_tx_desc(bp, tail);
402 ctrl = desc->ctrl;
403 tx_skb = macb_tx_skb(bp, tail);
404 skb = tx_skb->skb;
405
406 if (ctrl & MACB_BIT(TX_USED)) {
407 netdev_vdbg(bp->dev, "txerr skb %u (data %p) TX complete\n",
408 macb_tx_ring_wrap(tail), skb->data);
409 bp->stats.tx_packets++;
410 bp->stats.tx_bytes += skb->len;
411 } else {
412 /*
413 * "Buffers exhausted mid-frame" errors may only happen
414 * if the driver is buggy, so complain loudly about those.
415 * Statistics are updated by hardware.
416 */
417 if (ctrl & MACB_BIT(TX_BUF_EXHAUSTED))
418 netdev_err(bp->dev,
419 "BUG: TX buffers exhausted mid-frame\n");
420
421 desc->ctrl = ctrl | MACB_BIT(TX_USED);
422 }
423
424 dma_unmap_single(&bp->pdev->dev, tx_skb->mapping, skb->len,
425 DMA_TO_DEVICE);
426 tx_skb->skb = NULL;
427 dev_kfree_skb(skb);
428 }
429
430 /* Make descriptor updates visible to hardware */
431 wmb();
432
433 /* Reinitialize the TX desc queue */
434 macb_writel(bp, TBQP, bp->tx_ring_dma);
435 /* Make TX ring reflect state of hardware */
436 bp->tx_head = bp->tx_tail = 0;
437
438 /* Now we are ready to start transmission again */
439 netif_wake_queue(bp->dev);
440
441 /* Housework before enabling TX IRQ */
442 macb_writel(bp, TSR, macb_readl(bp, TSR));
443 macb_writel(bp, IER, MACB_TX_INT_FLAGS);
444 }
445
446 static void macb_tx_interrupt(struct macb *bp)
447 {
448 unsigned int tail;
449 unsigned int head;
450 u32 status;
451
452 status = macb_readl(bp, TSR);
453 macb_writel(bp, TSR, status);
454
455 netdev_vdbg(bp->dev, "macb_tx_interrupt status = 0x%03lx\n",
456 (unsigned long)status);
457
458 head = bp->tx_head;
459 for (tail = bp->tx_tail; tail != head; tail++) {
460 struct macb_tx_skb *tx_skb;
461 struct sk_buff *skb;
462 struct macb_dma_desc *desc;
463 u32 ctrl;
464
465 desc = macb_tx_desc(bp, tail);
466
467 /* Make hw descriptor updates visible to CPU */
468 rmb();
469
470 ctrl = desc->ctrl;
471
472 if (!(ctrl & MACB_BIT(TX_USED)))
473 break;
474
475 tx_skb = macb_tx_skb(bp, tail);
476 skb = tx_skb->skb;
477
478 netdev_vdbg(bp->dev, "skb %u (data %p) TX complete\n",
479 macb_tx_ring_wrap(tail), skb->data);
480 dma_unmap_single(&bp->pdev->dev, tx_skb->mapping, skb->len,
481 DMA_TO_DEVICE);
482 bp->stats.tx_packets++;
483 bp->stats.tx_bytes += skb->len;
484 tx_skb->skb = NULL;
485 dev_kfree_skb_irq(skb);
486 }
487
488 bp->tx_tail = tail;
489 if (netif_queue_stopped(bp->dev)
490 && macb_tx_ring_avail(bp) > MACB_TX_WAKEUP_THRESH)
491 netif_wake_queue(bp->dev);
492 }
493
494 static int macb_rx_frame(struct macb *bp, unsigned int first_frag,
495 unsigned int last_frag)
496 {
497 unsigned int len;
498 unsigned int frag;
499 unsigned int offset;
500 struct sk_buff *skb;
501 struct macb_dma_desc *desc;
502
503 desc = macb_rx_desc(bp, last_frag);
504 len = MACB_BFEXT(RX_FRMLEN, desc->ctrl);
505
506 netdev_vdbg(bp->dev, "macb_rx_frame frags %u - %u (len %u)\n",
507 macb_rx_ring_wrap(first_frag),
508 macb_rx_ring_wrap(last_frag), len);
509
510 /*
511 * The ethernet header starts NET_IP_ALIGN bytes into the
512 * first buffer. Since the header is 14 bytes, this makes the
513 * payload word-aligned.
514 *
515 * Instead of calling skb_reserve(NET_IP_ALIGN), we just copy
516 * the two padding bytes into the skb so that we avoid hitting
517 * the slowpath in memcpy(), and pull them off afterwards.
518 */
519 skb = netdev_alloc_skb(bp->dev, len + NET_IP_ALIGN);
520 if (!skb) {
521 bp->stats.rx_dropped++;
522 for (frag = first_frag; ; frag++) {
523 desc = macb_rx_desc(bp, frag);
524 desc->addr &= ~MACB_BIT(RX_USED);
525 if (frag == last_frag)
526 break;
527 }
528
529 /* Make descriptor updates visible to hardware */
530 wmb();
531
532 return 1;
533 }
534
535 offset = 0;
536 len += NET_IP_ALIGN;
537 skb_checksum_none_assert(skb);
538 skb_put(skb, len);
539
540 for (frag = first_frag; ; frag++) {
541 unsigned int frag_len = RX_BUFFER_SIZE;
542
543 if (offset + frag_len > len) {
544 BUG_ON(frag != last_frag);
545 frag_len = len - offset;
546 }
547 skb_copy_to_linear_data_offset(skb, offset,
548 macb_rx_buffer(bp, frag), frag_len);
549 offset += RX_BUFFER_SIZE;
550 desc = macb_rx_desc(bp, frag);
551 desc->addr &= ~MACB_BIT(RX_USED);
552
553 if (frag == last_frag)
554 break;
555 }
556
557 /* Make descriptor updates visible to hardware */
558 wmb();
559
560 __skb_pull(skb, NET_IP_ALIGN);
561 skb->protocol = eth_type_trans(skb, bp->dev);
562
563 bp->stats.rx_packets++;
564 bp->stats.rx_bytes += skb->len;
565 netdev_vdbg(bp->dev, "received skb of length %u, csum: %08x\n",
566 skb->len, skb->csum);
567 netif_receive_skb(skb);
568
569 return 0;
570 }
571
572 /* Mark DMA descriptors from begin up to and not including end as unused */
573 static void discard_partial_frame(struct macb *bp, unsigned int begin,
574 unsigned int end)
575 {
576 unsigned int frag;
577
578 for (frag = begin; frag != end; frag++) {
579 struct macb_dma_desc *desc = macb_rx_desc(bp, frag);
580 desc->addr &= ~MACB_BIT(RX_USED);
581 }
582
583 /* Make descriptor updates visible to hardware */
584 wmb();
585
586 /*
587 * When this happens, the hardware stats registers for
588 * whatever caused this is updated, so we don't have to record
589 * anything.
590 */
591 }
592
593 static int macb_rx(struct macb *bp, int budget)
594 {
595 int received = 0;
596 unsigned int tail;
597 int first_frag = -1;
598
599 for (tail = bp->rx_tail; budget > 0; tail++) {
600 struct macb_dma_desc *desc = macb_rx_desc(bp, tail);
601 u32 addr, ctrl;
602
603 /* Make hw descriptor updates visible to CPU */
604 rmb();
605
606 addr = desc->addr;
607 ctrl = desc->ctrl;
608
609 if (!(addr & MACB_BIT(RX_USED)))
610 break;
611
612 if (ctrl & MACB_BIT(RX_SOF)) {
613 if (first_frag != -1)
614 discard_partial_frame(bp, first_frag, tail);
615 first_frag = tail;
616 }
617
618 if (ctrl & MACB_BIT(RX_EOF)) {
619 int dropped;
620 BUG_ON(first_frag == -1);
621
622 dropped = macb_rx_frame(bp, first_frag, tail);
623 first_frag = -1;
624 if (!dropped) {
625 received++;
626 budget--;
627 }
628 }
629 }
630
631 if (first_frag != -1)
632 bp->rx_tail = first_frag;
633 else
634 bp->rx_tail = tail;
635
636 return received;
637 }
638
639 static int macb_poll(struct napi_struct *napi, int budget)
640 {
641 struct macb *bp = container_of(napi, struct macb, napi);
642 int work_done;
643 u32 status;
644
645 status = macb_readl(bp, RSR);
646 macb_writel(bp, RSR, status);
647
648 work_done = 0;
649
650 netdev_vdbg(bp->dev, "poll: status = %08lx, budget = %d\n",
651 (unsigned long)status, budget);
652
653 work_done = macb_rx(bp, budget);
654 if (work_done < budget) {
655 napi_complete(napi);
656
657 /*
658 * We've done what we can to clean the buffers. Make sure we
659 * get notified when new packets arrive.
660 */
661 macb_writel(bp, IER, MACB_RX_INT_FLAGS);
662 }
663
664 /* TODO: Handle errors */
665
666 return work_done;
667 }
668
669 static irqreturn_t macb_interrupt(int irq, void *dev_id)
670 {
671 struct net_device *dev = dev_id;
672 struct macb *bp = netdev_priv(dev);
673 u32 status;
674
675 status = macb_readl(bp, ISR);
676
677 if (unlikely(!status))
678 return IRQ_NONE;
679
680 spin_lock(&bp->lock);
681
682 while (status) {
683 /* close possible race with dev_close */
684 if (unlikely(!netif_running(dev))) {
685 macb_writel(bp, IDR, -1);
686 break;
687 }
688
689 netdev_vdbg(bp->dev, "isr = 0x%08lx\n", (unsigned long)status);
690
691 if (status & MACB_RX_INT_FLAGS) {
692 /*
693 * There's no point taking any more interrupts
694 * until we have processed the buffers. The
695 * scheduling call may fail if the poll routine
696 * is already scheduled, so disable interrupts
697 * now.
698 */
699 macb_writel(bp, IDR, MACB_RX_INT_FLAGS);
700
701 if (napi_schedule_prep(&bp->napi)) {
702 netdev_vdbg(bp->dev, "scheduling RX softirq\n");
703 __napi_schedule(&bp->napi);
704 }
705 }
706
707 if (unlikely(status & (MACB_TX_ERR_FLAGS))) {
708 macb_writel(bp, IDR, MACB_TX_INT_FLAGS);
709 schedule_work(&bp->tx_error_task);
710 break;
711 }
712
713 if (status & MACB_BIT(TCOMP))
714 macb_tx_interrupt(bp);
715
716 /*
717 * Link change detection isn't possible with RMII, so we'll
718 * add that if/when we get our hands on a full-blown MII PHY.
719 */
720
721 if (status & MACB_BIT(ISR_ROVR)) {
722 /* We missed at least one packet */
723 if (macb_is_gem(bp))
724 bp->hw_stats.gem.rx_overruns++;
725 else
726 bp->hw_stats.macb.rx_overruns++;
727 }
728
729 if (status & MACB_BIT(HRESP)) {
730 /*
731 * TODO: Reset the hardware, and maybe move the
732 * netdev_err to a lower-priority context as well
733 * (work queue?)
734 */
735 netdev_err(dev, "DMA bus error: HRESP not OK\n");
736 }
737
738 status = macb_readl(bp, ISR);
739 }
740
741 spin_unlock(&bp->lock);
742
743 return IRQ_HANDLED;
744 }
745
746 #ifdef CONFIG_NET_POLL_CONTROLLER
747 /*
748 * Polling receive - used by netconsole and other diagnostic tools
749 * to allow network i/o with interrupts disabled.
750 */
751 static void macb_poll_controller(struct net_device *dev)
752 {
753 unsigned long flags;
754
755 local_irq_save(flags);
756 macb_interrupt(dev->irq, dev);
757 local_irq_restore(flags);
758 }
759 #endif
760
761 static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev)
762 {
763 struct macb *bp = netdev_priv(dev);
764 dma_addr_t mapping;
765 unsigned int len, entry;
766 struct macb_dma_desc *desc;
767 struct macb_tx_skb *tx_skb;
768 u32 ctrl;
769 unsigned long flags;
770
771 #if defined(DEBUG) && defined(VERBOSE_DEBUG)
772 netdev_vdbg(bp->dev,
773 "start_xmit: len %u head %p data %p tail %p end %p\n",
774 skb->len, skb->head, skb->data,
775 skb_tail_pointer(skb), skb_end_pointer(skb));
776 print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_OFFSET, 16, 1,
777 skb->data, 16, true);
778 #endif
779
780 len = skb->len;
781 spin_lock_irqsave(&bp->lock, flags);
782
783 /* This is a hard error, log it. */
784 if (macb_tx_ring_avail(bp) < 1) {
785 netif_stop_queue(dev);
786 spin_unlock_irqrestore(&bp->lock, flags);
787 netdev_err(bp->dev, "BUG! Tx Ring full when queue awake!\n");
788 netdev_dbg(bp->dev, "tx_head = %u, tx_tail = %u\n",
789 bp->tx_head, bp->tx_tail);
790 return NETDEV_TX_BUSY;
791 }
792
793 entry = macb_tx_ring_wrap(bp->tx_head);
794 bp->tx_head++;
795 netdev_vdbg(bp->dev, "Allocated ring entry %u\n", entry);
796 mapping = dma_map_single(&bp->pdev->dev, skb->data,
797 len, DMA_TO_DEVICE);
798
799 tx_skb = &bp->tx_skb[entry];
800 tx_skb->skb = skb;
801 tx_skb->mapping = mapping;
802 netdev_vdbg(bp->dev, "Mapped skb data %p to DMA addr %08lx\n",
803 skb->data, (unsigned long)mapping);
804
805 ctrl = MACB_BF(TX_FRMLEN, len);
806 ctrl |= MACB_BIT(TX_LAST);
807 if (entry == (TX_RING_SIZE - 1))
808 ctrl |= MACB_BIT(TX_WRAP);
809
810 desc = &bp->tx_ring[entry];
811 desc->addr = mapping;
812 desc->ctrl = ctrl;
813
814 /* Make newly initialized descriptor visible to hardware */
815 wmb();
816
817 skb_tx_timestamp(skb);
818
819 macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));
820
821 if (macb_tx_ring_avail(bp) < 1)
822 netif_stop_queue(dev);
823
824 spin_unlock_irqrestore(&bp->lock, flags);
825
826 return NETDEV_TX_OK;
827 }
828
829 static void macb_free_consistent(struct macb *bp)
830 {
831 if (bp->tx_skb) {
832 kfree(bp->tx_skb);
833 bp->tx_skb = NULL;
834 }
835 if (bp->rx_ring) {
836 dma_free_coherent(&bp->pdev->dev, RX_RING_BYTES,
837 bp->rx_ring, bp->rx_ring_dma);
838 bp->rx_ring = NULL;
839 }
840 if (bp->tx_ring) {
841 dma_free_coherent(&bp->pdev->dev, TX_RING_BYTES,
842 bp->tx_ring, bp->tx_ring_dma);
843 bp->tx_ring = NULL;
844 }
845 if (bp->rx_buffers) {
846 dma_free_coherent(&bp->pdev->dev,
847 RX_RING_SIZE * RX_BUFFER_SIZE,
848 bp->rx_buffers, bp->rx_buffers_dma);
849 bp->rx_buffers = NULL;
850 }
851 }
852
853 static int macb_alloc_consistent(struct macb *bp)
854 {
855 int size;
856
857 size = TX_RING_SIZE * sizeof(struct macb_tx_skb);
858 bp->tx_skb = kmalloc(size, GFP_KERNEL);
859 if (!bp->tx_skb)
860 goto out_err;
861
862 size = RX_RING_BYTES;
863 bp->rx_ring = dma_alloc_coherent(&bp->pdev->dev, size,
864 &bp->rx_ring_dma, GFP_KERNEL);
865 if (!bp->rx_ring)
866 goto out_err;
867 netdev_dbg(bp->dev,
868 "Allocated RX ring of %d bytes at %08lx (mapped %p)\n",
869 size, (unsigned long)bp->rx_ring_dma, bp->rx_ring);
870
871 size = TX_RING_BYTES;
872 bp->tx_ring = dma_alloc_coherent(&bp->pdev->dev, size,
873 &bp->tx_ring_dma, GFP_KERNEL);
874 if (!bp->tx_ring)
875 goto out_err;
876 netdev_dbg(bp->dev,
877 "Allocated TX ring of %d bytes at %08lx (mapped %p)\n",
878 size, (unsigned long)bp->tx_ring_dma, bp->tx_ring);
879
880 size = RX_RING_SIZE * RX_BUFFER_SIZE;
881 bp->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size,
882 &bp->rx_buffers_dma, GFP_KERNEL);
883 if (!bp->rx_buffers)
884 goto out_err;
885 netdev_dbg(bp->dev,
886 "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n",
887 size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers);
888
889 return 0;
890
891 out_err:
892 macb_free_consistent(bp);
893 return -ENOMEM;
894 }
895
896 static void macb_init_rings(struct macb *bp)
897 {
898 int i;
899 dma_addr_t addr;
900
901 addr = bp->rx_buffers_dma;
902 for (i = 0; i < RX_RING_SIZE; i++) {
903 bp->rx_ring[i].addr = addr;
904 bp->rx_ring[i].ctrl = 0;
905 addr += RX_BUFFER_SIZE;
906 }
907 bp->rx_ring[RX_RING_SIZE - 1].addr |= MACB_BIT(RX_WRAP);
908
909 for (i = 0; i < TX_RING_SIZE; i++) {
910 bp->tx_ring[i].addr = 0;
911 bp->tx_ring[i].ctrl = MACB_BIT(TX_USED);
912 }
913 bp->tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP);
914
915 bp->rx_tail = bp->tx_head = bp->tx_tail = 0;
916 }
917
918 static void macb_reset_hw(struct macb *bp)
919 {
920 /*
921 * Disable RX and TX (XXX: Should we halt the transmission
922 * more gracefully?)
923 */
924 macb_writel(bp, NCR, 0);
925
926 /* Clear the stats registers (XXX: Update stats first?) */
927 macb_writel(bp, NCR, MACB_BIT(CLRSTAT));
928
929 /* Clear all status flags */
930 macb_writel(bp, TSR, -1);
931 macb_writel(bp, RSR, -1);
932
933 /* Disable all interrupts */
934 macb_writel(bp, IDR, -1);
935 macb_readl(bp, ISR);
936 }
937
938 static u32 gem_mdc_clk_div(struct macb *bp)
939 {
940 u32 config;
941 unsigned long pclk_hz = clk_get_rate(bp->pclk);
942
943 if (pclk_hz <= 20000000)
944 config = GEM_BF(CLK, GEM_CLK_DIV8);
945 else if (pclk_hz <= 40000000)
946 config = GEM_BF(CLK, GEM_CLK_DIV16);
947 else if (pclk_hz <= 80000000)
948 config = GEM_BF(CLK, GEM_CLK_DIV32);
949 else if (pclk_hz <= 120000000)
950 config = GEM_BF(CLK, GEM_CLK_DIV48);
951 else if (pclk_hz <= 160000000)
952 config = GEM_BF(CLK, GEM_CLK_DIV64);
953 else
954 config = GEM_BF(CLK, GEM_CLK_DIV96);
955
956 return config;
957 }
958
959 static u32 macb_mdc_clk_div(struct macb *bp)
960 {
961 u32 config;
962 unsigned long pclk_hz;
963
964 if (macb_is_gem(bp))
965 return gem_mdc_clk_div(bp);
966
967 pclk_hz = clk_get_rate(bp->pclk);
968 if (pclk_hz <= 20000000)
969 config = MACB_BF(CLK, MACB_CLK_DIV8);
970 else if (pclk_hz <= 40000000)
971 config = MACB_BF(CLK, MACB_CLK_DIV16);
972 else if (pclk_hz <= 80000000)
973 config = MACB_BF(CLK, MACB_CLK_DIV32);
974 else
975 config = MACB_BF(CLK, MACB_CLK_DIV64);
976
977 return config;
978 }
979
980 /*
981 * Get the DMA bus width field of the network configuration register that we
982 * should program. We find the width from decoding the design configuration
983 * register to find the maximum supported data bus width.
984 */
985 static u32 macb_dbw(struct macb *bp)
986 {
987 if (!macb_is_gem(bp))
988 return 0;
989
990 switch (GEM_BFEXT(DBWDEF, gem_readl(bp, DCFG1))) {
991 case 4:
992 return GEM_BF(DBW, GEM_DBW128);
993 case 2:
994 return GEM_BF(DBW, GEM_DBW64);
995 case 1:
996 default:
997 return GEM_BF(DBW, GEM_DBW32);
998 }
999 }
1000
1001 /*
1002 * Configure the receive DMA engine to use the correct receive buffer size.
1003 * This is a configurable parameter for GEM.
1004 */
1005 static void macb_configure_dma(struct macb *bp)
1006 {
1007 u32 dmacfg;
1008
1009 if (macb_is_gem(bp)) {
1010 dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L);
1011 dmacfg |= GEM_BF(RXBS, RX_BUFFER_SIZE / 64);
1012 gem_writel(bp, DMACFG, dmacfg);
1013 }
1014 }
1015
1016 static void macb_init_hw(struct macb *bp)
1017 {
1018 u32 config;
1019
1020 macb_reset_hw(bp);
1021 __macb_set_hwaddr(bp);
1022
1023 config = macb_mdc_clk_div(bp);
1024 config |= MACB_BF(RBOF, NET_IP_ALIGN); /* Make eth data aligned */
1025 config |= MACB_BIT(PAE); /* PAuse Enable */
1026 config |= MACB_BIT(DRFCS); /* Discard Rx FCS */
1027 config |= MACB_BIT(BIG); /* Receive oversized frames */
1028 if (bp->dev->flags & IFF_PROMISC)
1029 config |= MACB_BIT(CAF); /* Copy All Frames */
1030 if (!(bp->dev->flags & IFF_BROADCAST))
1031 config |= MACB_BIT(NBC); /* No BroadCast */
1032 config |= macb_dbw(bp);
1033 macb_writel(bp, NCFGR, config);
1034
1035 macb_configure_dma(bp);
1036
1037 /* Initialize TX and RX buffers */
1038 macb_writel(bp, RBQP, bp->rx_ring_dma);
1039 macb_writel(bp, TBQP, bp->tx_ring_dma);
1040
1041 /* Enable TX and RX */
1042 macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE) | MACB_BIT(MPE));
1043
1044 /* Enable interrupts */
1045 macb_writel(bp, IER, (MACB_RX_INT_FLAGS
1046 | MACB_TX_INT_FLAGS
1047 | MACB_BIT(HRESP)));
1048
1049 }
1050
1051 /*
1052 * The hash address register is 64 bits long and takes up two
1053 * locations in the memory map. The least significant bits are stored
1054 * in EMAC_HSL and the most significant bits in EMAC_HSH.
1055 *
1056 * The unicast hash enable and the multicast hash enable bits in the
1057 * network configuration register enable the reception of hash matched
1058 * frames. The destination address is reduced to a 6 bit index into
1059 * the 64 bit hash register using the following hash function. The
1060 * hash function is an exclusive or of every sixth bit of the
1061 * destination address.
1062 *
1063 * hi[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47]
1064 * hi[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46]
1065 * hi[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45]
1066 * hi[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44]
1067 * hi[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43]
1068 * hi[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42]
1069 *
1070 * da[0] represents the least significant bit of the first byte
1071 * received, that is, the multicast/unicast indicator, and da[47]
1072 * represents the most significant bit of the last byte received. If
1073 * the hash index, hi[n], points to a bit that is set in the hash
1074 * register then the frame will be matched according to whether the
1075 * frame is multicast or unicast. A multicast match will be signalled
1076 * if the multicast hash enable bit is set, da[0] is 1 and the hash
1077 * index points to a bit set in the hash register. A unicast match
1078 * will be signalled if the unicast hash enable bit is set, da[0] is 0
1079 * and the hash index points to a bit set in the hash register. To
1080 * receive all multicast frames, the hash register should be set with
1081 * all ones and the multicast hash enable bit should be set in the
1082 * network configuration register.
1083 */
1084
1085 static inline int hash_bit_value(int bitnr, __u8 *addr)
1086 {
1087 if (addr[bitnr / 8] & (1 << (bitnr % 8)))
1088 return 1;
1089 return 0;
1090 }
1091
1092 /*
1093 * Return the hash index value for the specified address.
1094 */
1095 static int hash_get_index(__u8 *addr)
1096 {
1097 int i, j, bitval;
1098 int hash_index = 0;
1099
1100 for (j = 0; j < 6; j++) {
1101 for (i = 0, bitval = 0; i < 8; i++)
1102 bitval ^= hash_bit_value(i*6 + j, addr);
1103
1104 hash_index |= (bitval << j);
1105 }
1106
1107 return hash_index;
1108 }
1109
1110 /*
1111 * Add multicast addresses to the internal multicast-hash table.
1112 */
1113 static void macb_sethashtable(struct net_device *dev)
1114 {
1115 struct netdev_hw_addr *ha;
1116 unsigned long mc_filter[2];
1117 unsigned int bitnr;
1118 struct macb *bp = netdev_priv(dev);
1119
1120 mc_filter[0] = mc_filter[1] = 0;
1121
1122 netdev_for_each_mc_addr(ha, dev) {
1123 bitnr = hash_get_index(ha->addr);
1124 mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
1125 }
1126
1127 macb_or_gem_writel(bp, HRB, mc_filter[0]);
1128 macb_or_gem_writel(bp, HRT, mc_filter[1]);
1129 }
1130
1131 /*
1132 * Enable/Disable promiscuous and multicast modes.
1133 */
1134 void macb_set_rx_mode(struct net_device *dev)
1135 {
1136 unsigned long cfg;
1137 struct macb *bp = netdev_priv(dev);
1138
1139 cfg = macb_readl(bp, NCFGR);
1140
1141 if (dev->flags & IFF_PROMISC)
1142 /* Enable promiscuous mode */
1143 cfg |= MACB_BIT(CAF);
1144 else if (dev->flags & (~IFF_PROMISC))
1145 /* Disable promiscuous mode */
1146 cfg &= ~MACB_BIT(CAF);
1147
1148 if (dev->flags & IFF_ALLMULTI) {
1149 /* Enable all multicast mode */
1150 macb_or_gem_writel(bp, HRB, -1);
1151 macb_or_gem_writel(bp, HRT, -1);
1152 cfg |= MACB_BIT(NCFGR_MTI);
1153 } else if (!netdev_mc_empty(dev)) {
1154 /* Enable specific multicasts */
1155 macb_sethashtable(dev);
1156 cfg |= MACB_BIT(NCFGR_MTI);
1157 } else if (dev->flags & (~IFF_ALLMULTI)) {
1158 /* Disable all multicast mode */
1159 macb_or_gem_writel(bp, HRB, 0);
1160 macb_or_gem_writel(bp, HRT, 0);
1161 cfg &= ~MACB_BIT(NCFGR_MTI);
1162 }
1163
1164 macb_writel(bp, NCFGR, cfg);
1165 }
1166 EXPORT_SYMBOL_GPL(macb_set_rx_mode);
1167
1168 static int macb_open(struct net_device *dev)
1169 {
1170 struct macb *bp = netdev_priv(dev);
1171 int err;
1172
1173 netdev_dbg(bp->dev, "open\n");
1174
1175 /* carrier starts down */
1176 netif_carrier_off(dev);
1177
1178 /* if the phy is not yet register, retry later*/
1179 if (!bp->phy_dev)
1180 return -EAGAIN;
1181
1182 if (!is_valid_ether_addr(dev->dev_addr))
1183 return -EADDRNOTAVAIL;
1184
1185 err = macb_alloc_consistent(bp);
1186 if (err) {
1187 netdev_err(dev, "Unable to allocate DMA memory (error %d)\n",
1188 err);
1189 return err;
1190 }
1191
1192 napi_enable(&bp->napi);
1193
1194 macb_init_rings(bp);
1195 macb_init_hw(bp);
1196
1197 /* schedule a link state check */
1198 phy_start(bp->phy_dev);
1199
1200 netif_start_queue(dev);
1201
1202 return 0;
1203 }
1204
1205 static int macb_close(struct net_device *dev)
1206 {
1207 struct macb *bp = netdev_priv(dev);
1208 unsigned long flags;
1209
1210 netif_stop_queue(dev);
1211 napi_disable(&bp->napi);
1212
1213 if (bp->phy_dev)
1214 phy_stop(bp->phy_dev);
1215
1216 spin_lock_irqsave(&bp->lock, flags);
1217 macb_reset_hw(bp);
1218 netif_carrier_off(dev);
1219 spin_unlock_irqrestore(&bp->lock, flags);
1220
1221 macb_free_consistent(bp);
1222
1223 return 0;
1224 }
1225
1226 static void gem_update_stats(struct macb *bp)
1227 {
1228 u32 __iomem *reg = bp->regs + GEM_OTX;
1229 u32 *p = &bp->hw_stats.gem.tx_octets_31_0;
1230 u32 *end = &bp->hw_stats.gem.rx_udp_checksum_errors + 1;
1231
1232 for (; p < end; p++, reg++)
1233 *p += __raw_readl(reg);
1234 }
1235
1236 static struct net_device_stats *gem_get_stats(struct macb *bp)
1237 {
1238 struct gem_stats *hwstat = &bp->hw_stats.gem;
1239 struct net_device_stats *nstat = &bp->stats;
1240
1241 gem_update_stats(bp);
1242
1243 nstat->rx_errors = (hwstat->rx_frame_check_sequence_errors +
1244 hwstat->rx_alignment_errors +
1245 hwstat->rx_resource_errors +
1246 hwstat->rx_overruns +
1247 hwstat->rx_oversize_frames +
1248 hwstat->rx_jabbers +
1249 hwstat->rx_undersized_frames +
1250 hwstat->rx_length_field_frame_errors);
1251 nstat->tx_errors = (hwstat->tx_late_collisions +
1252 hwstat->tx_excessive_collisions +
1253 hwstat->tx_underrun +
1254 hwstat->tx_carrier_sense_errors);
1255 nstat->multicast = hwstat->rx_multicast_frames;
1256 nstat->collisions = (hwstat->tx_single_collision_frames +
1257 hwstat->tx_multiple_collision_frames +
1258 hwstat->tx_excessive_collisions);
1259 nstat->rx_length_errors = (hwstat->rx_oversize_frames +
1260 hwstat->rx_jabbers +
1261 hwstat->rx_undersized_frames +
1262 hwstat->rx_length_field_frame_errors);
1263 nstat->rx_over_errors = hwstat->rx_resource_errors;
1264 nstat->rx_crc_errors = hwstat->rx_frame_check_sequence_errors;
1265 nstat->rx_frame_errors = hwstat->rx_alignment_errors;
1266 nstat->rx_fifo_errors = hwstat->rx_overruns;
1267 nstat->tx_aborted_errors = hwstat->tx_excessive_collisions;
1268 nstat->tx_carrier_errors = hwstat->tx_carrier_sense_errors;
1269 nstat->tx_fifo_errors = hwstat->tx_underrun;
1270
1271 return nstat;
1272 }
1273
1274 static struct net_device_stats *macb_get_stats(struct net_device *dev)
1275 {
1276 struct macb *bp = netdev_priv(dev);
1277 struct net_device_stats *nstat = &bp->stats;
1278 struct macb_stats *hwstat = &bp->hw_stats.macb;
1279
1280 if (macb_is_gem(bp))
1281 return gem_get_stats(bp);
1282
1283 /* read stats from hardware */
1284 macb_update_stats(bp);
1285
1286 /* Convert HW stats into netdevice stats */
1287 nstat->rx_errors = (hwstat->rx_fcs_errors +
1288 hwstat->rx_align_errors +
1289 hwstat->rx_resource_errors +
1290 hwstat->rx_overruns +
1291 hwstat->rx_oversize_pkts +
1292 hwstat->rx_jabbers +
1293 hwstat->rx_undersize_pkts +
1294 hwstat->sqe_test_errors +
1295 hwstat->rx_length_mismatch);
1296 nstat->tx_errors = (hwstat->tx_late_cols +
1297 hwstat->tx_excessive_cols +
1298 hwstat->tx_underruns +
1299 hwstat->tx_carrier_errors);
1300 nstat->collisions = (hwstat->tx_single_cols +
1301 hwstat->tx_multiple_cols +
1302 hwstat->tx_excessive_cols);
1303 nstat->rx_length_errors = (hwstat->rx_oversize_pkts +
1304 hwstat->rx_jabbers +
1305 hwstat->rx_undersize_pkts +
1306 hwstat->rx_length_mismatch);
1307 nstat->rx_over_errors = hwstat->rx_resource_errors +
1308 hwstat->rx_overruns;
1309 nstat->rx_crc_errors = hwstat->rx_fcs_errors;
1310 nstat->rx_frame_errors = hwstat->rx_align_errors;
1311 nstat->rx_fifo_errors = hwstat->rx_overruns;
1312 /* XXX: What does "missed" mean? */
1313 nstat->tx_aborted_errors = hwstat->tx_excessive_cols;
1314 nstat->tx_carrier_errors = hwstat->tx_carrier_errors;
1315 nstat->tx_fifo_errors = hwstat->tx_underruns;
1316 /* Don't know about heartbeat or window errors... */
1317
1318 return nstat;
1319 }
1320
1321 static int macb_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1322 {
1323 struct macb *bp = netdev_priv(dev);
1324 struct phy_device *phydev = bp->phy_dev;
1325
1326 if (!phydev)
1327 return -ENODEV;
1328
1329 return phy_ethtool_gset(phydev, cmd);
1330 }
1331
1332 static int macb_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1333 {
1334 struct macb *bp = netdev_priv(dev);
1335 struct phy_device *phydev = bp->phy_dev;
1336
1337 if (!phydev)
1338 return -ENODEV;
1339
1340 return phy_ethtool_sset(phydev, cmd);
1341 }
1342
1343 static int macb_get_regs_len(struct net_device *netdev)
1344 {
1345 return MACB_GREGS_NBR * sizeof(u32);
1346 }
1347
1348 static void macb_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1349 void *p)
1350 {
1351 struct macb *bp = netdev_priv(dev);
1352 unsigned int tail, head;
1353 u32 *regs_buff = p;
1354
1355 regs->version = (macb_readl(bp, MID) & ((1 << MACB_REV_SIZE) - 1))
1356 | MACB_GREGS_VERSION;
1357
1358 tail = macb_tx_ring_wrap(bp->tx_tail);
1359 head = macb_tx_ring_wrap(bp->tx_head);
1360
1361 regs_buff[0] = macb_readl(bp, NCR);
1362 regs_buff[1] = macb_or_gem_readl(bp, NCFGR);
1363 regs_buff[2] = macb_readl(bp, NSR);
1364 regs_buff[3] = macb_readl(bp, TSR);
1365 regs_buff[4] = macb_readl(bp, RBQP);
1366 regs_buff[5] = macb_readl(bp, TBQP);
1367 regs_buff[6] = macb_readl(bp, RSR);
1368 regs_buff[7] = macb_readl(bp, IMR);
1369
1370 regs_buff[8] = tail;
1371 regs_buff[9] = head;
1372 regs_buff[10] = macb_tx_dma(bp, tail);
1373 regs_buff[11] = macb_tx_dma(bp, head);
1374
1375 if (macb_is_gem(bp)) {
1376 regs_buff[12] = gem_readl(bp, USRIO);
1377 regs_buff[13] = gem_readl(bp, DMACFG);
1378 }
1379 }
1380
1381 const struct ethtool_ops macb_ethtool_ops = {
1382 .get_settings = macb_get_settings,
1383 .set_settings = macb_set_settings,
1384 .get_regs_len = macb_get_regs_len,
1385 .get_regs = macb_get_regs,
1386 .get_link = ethtool_op_get_link,
1387 .get_ts_info = ethtool_op_get_ts_info,
1388 };
1389 EXPORT_SYMBOL_GPL(macb_ethtool_ops);
1390
1391 int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1392 {
1393 struct macb *bp = netdev_priv(dev);
1394 struct phy_device *phydev = bp->phy_dev;
1395
1396 if (!netif_running(dev))
1397 return -EINVAL;
1398
1399 if (!phydev)
1400 return -ENODEV;
1401
1402 return phy_mii_ioctl(phydev, rq, cmd);
1403 }
1404 EXPORT_SYMBOL_GPL(macb_ioctl);
1405
1406 static const struct net_device_ops macb_netdev_ops = {
1407 .ndo_open = macb_open,
1408 .ndo_stop = macb_close,
1409 .ndo_start_xmit = macb_start_xmit,
1410 .ndo_set_rx_mode = macb_set_rx_mode,
1411 .ndo_get_stats = macb_get_stats,
1412 .ndo_do_ioctl = macb_ioctl,
1413 .ndo_validate_addr = eth_validate_addr,
1414 .ndo_change_mtu = eth_change_mtu,
1415 .ndo_set_mac_address = eth_mac_addr,
1416 #ifdef CONFIG_NET_POLL_CONTROLLER
1417 .ndo_poll_controller = macb_poll_controller,
1418 #endif
1419 };
1420
1421 #if defined(CONFIG_OF)
1422 static const struct of_device_id macb_dt_ids[] = {
1423 { .compatible = "cdns,at32ap7000-macb" },
1424 { .compatible = "cdns,at91sam9260-macb" },
1425 { .compatible = "cdns,macb" },
1426 { .compatible = "cdns,pc302-gem" },
1427 { .compatible = "cdns,gem" },
1428 { /* sentinel */ }
1429 };
1430
1431 MODULE_DEVICE_TABLE(of, macb_dt_ids);
1432
1433 static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev)
1434 {
1435 struct device_node *np = pdev->dev.of_node;
1436
1437 if (np)
1438 return of_get_phy_mode(np);
1439
1440 return -ENODEV;
1441 }
1442
1443 static int __devinit macb_get_hwaddr_dt(struct macb *bp)
1444 {
1445 struct device_node *np = bp->pdev->dev.of_node;
1446 if (np) {
1447 const char *mac = of_get_mac_address(np);
1448 if (mac) {
1449 memcpy(bp->dev->dev_addr, mac, ETH_ALEN);
1450 return 0;
1451 }
1452 }
1453
1454 return -ENODEV;
1455 }
1456 #else
1457 static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev)
1458 {
1459 return -ENODEV;
1460 }
1461 static int __devinit macb_get_hwaddr_dt(struct macb *bp)
1462 {
1463 return -ENODEV;
1464 }
1465 #endif
1466
1467 static int __init macb_probe(struct platform_device *pdev)
1468 {
1469 struct macb_platform_data *pdata;
1470 struct resource *regs;
1471 struct net_device *dev;
1472 struct macb *bp;
1473 struct phy_device *phydev;
1474 u32 config;
1475 int err = -ENXIO;
1476 struct pinctrl *pinctrl;
1477
1478 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1479 if (!regs) {
1480 dev_err(&pdev->dev, "no mmio resource defined\n");
1481 goto err_out;
1482 }
1483
1484 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
1485 if (IS_ERR(pinctrl)) {
1486 err = PTR_ERR(pinctrl);
1487 if (err == -EPROBE_DEFER)
1488 goto err_out;
1489
1490 dev_warn(&pdev->dev, "No pinctrl provided\n");
1491 }
1492
1493 err = -ENOMEM;
1494 dev = alloc_etherdev(sizeof(*bp));
1495 if (!dev)
1496 goto err_out;
1497
1498 SET_NETDEV_DEV(dev, &pdev->dev);
1499
1500 /* TODO: Actually, we have some interesting features... */
1501 dev->features |= 0;
1502
1503 bp = netdev_priv(dev);
1504 bp->pdev = pdev;
1505 bp->dev = dev;
1506
1507 spin_lock_init(&bp->lock);
1508 INIT_WORK(&bp->tx_error_task, macb_tx_error_task);
1509
1510 bp->pclk = clk_get(&pdev->dev, "pclk");
1511 if (IS_ERR(bp->pclk)) {
1512 dev_err(&pdev->dev, "failed to get macb_clk\n");
1513 goto err_out_free_dev;
1514 }
1515 clk_enable(bp->pclk);
1516
1517 bp->hclk = clk_get(&pdev->dev, "hclk");
1518 if (IS_ERR(bp->hclk)) {
1519 dev_err(&pdev->dev, "failed to get hclk\n");
1520 goto err_out_put_pclk;
1521 }
1522 clk_enable(bp->hclk);
1523
1524 bp->regs = ioremap(regs->start, resource_size(regs));
1525 if (!bp->regs) {
1526 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
1527 err = -ENOMEM;
1528 goto err_out_disable_clocks;
1529 }
1530
1531 dev->irq = platform_get_irq(pdev, 0);
1532 err = request_irq(dev->irq, macb_interrupt, 0, dev->name, dev);
1533 if (err) {
1534 dev_err(&pdev->dev, "Unable to request IRQ %d (error %d)\n",
1535 dev->irq, err);
1536 goto err_out_iounmap;
1537 }
1538
1539 dev->netdev_ops = &macb_netdev_ops;
1540 netif_napi_add(dev, &bp->napi, macb_poll, 64);
1541 dev->ethtool_ops = &macb_ethtool_ops;
1542
1543 dev->base_addr = regs->start;
1544
1545 /* Set MII management clock divider */
1546 config = macb_mdc_clk_div(bp);
1547 config |= macb_dbw(bp);
1548 macb_writel(bp, NCFGR, config);
1549
1550 err = macb_get_hwaddr_dt(bp);
1551 if (err < 0)
1552 macb_get_hwaddr(bp);
1553
1554 err = macb_get_phy_mode_dt(pdev);
1555 if (err < 0) {
1556 pdata = pdev->dev.platform_data;
1557 if (pdata && pdata->is_rmii)
1558 bp->phy_interface = PHY_INTERFACE_MODE_RMII;
1559 else
1560 bp->phy_interface = PHY_INTERFACE_MODE_MII;
1561 } else {
1562 bp->phy_interface = err;
1563 }
1564
1565 if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
1566 macb_or_gem_writel(bp, USRIO, GEM_BIT(RGMII));
1567 else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII)
1568 #if defined(CONFIG_ARCH_AT91)
1569 macb_or_gem_writel(bp, USRIO, (MACB_BIT(RMII) |
1570 MACB_BIT(CLKEN)));
1571 #else
1572 macb_or_gem_writel(bp, USRIO, 0);
1573 #endif
1574 else
1575 #if defined(CONFIG_ARCH_AT91)
1576 macb_or_gem_writel(bp, USRIO, MACB_BIT(CLKEN));
1577 #else
1578 macb_or_gem_writel(bp, USRIO, MACB_BIT(MII));
1579 #endif
1580
1581 err = register_netdev(dev);
1582 if (err) {
1583 dev_err(&pdev->dev, "Cannot register net device, aborting.\n");
1584 goto err_out_free_irq;
1585 }
1586
1587 if (macb_mii_init(bp) != 0) {
1588 goto err_out_unregister_netdev;
1589 }
1590
1591 platform_set_drvdata(pdev, dev);
1592
1593 netif_carrier_off(dev);
1594
1595 netdev_info(dev, "Cadence %s at 0x%08lx irq %d (%pM)\n",
1596 macb_is_gem(bp) ? "GEM" : "MACB", dev->base_addr,
1597 dev->irq, dev->dev_addr);
1598
1599 phydev = bp->phy_dev;
1600 netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1601 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
1602
1603 return 0;
1604
1605 err_out_unregister_netdev:
1606 unregister_netdev(dev);
1607 err_out_free_irq:
1608 free_irq(dev->irq, dev);
1609 err_out_iounmap:
1610 iounmap(bp->regs);
1611 err_out_disable_clocks:
1612 clk_disable(bp->hclk);
1613 clk_put(bp->hclk);
1614 clk_disable(bp->pclk);
1615 err_out_put_pclk:
1616 clk_put(bp->pclk);
1617 err_out_free_dev:
1618 free_netdev(dev);
1619 err_out:
1620 platform_set_drvdata(pdev, NULL);
1621 return err;
1622 }
1623
1624 static int __exit macb_remove(struct platform_device *pdev)
1625 {
1626 struct net_device *dev;
1627 struct macb *bp;
1628
1629 dev = platform_get_drvdata(pdev);
1630
1631 if (dev) {
1632 bp = netdev_priv(dev);
1633 if (bp->phy_dev)
1634 phy_disconnect(bp->phy_dev);
1635 mdiobus_unregister(bp->mii_bus);
1636 kfree(bp->mii_bus->irq);
1637 mdiobus_free(bp->mii_bus);
1638 unregister_netdev(dev);
1639 free_irq(dev->irq, dev);
1640 iounmap(bp->regs);
1641 clk_disable(bp->hclk);
1642 clk_put(bp->hclk);
1643 clk_disable(bp->pclk);
1644 clk_put(bp->pclk);
1645 free_netdev(dev);
1646 platform_set_drvdata(pdev, NULL);
1647 }
1648
1649 return 0;
1650 }
1651
1652 #ifdef CONFIG_PM
1653 static int macb_suspend(struct platform_device *pdev, pm_message_t state)
1654 {
1655 struct net_device *netdev = platform_get_drvdata(pdev);
1656 struct macb *bp = netdev_priv(netdev);
1657
1658 netif_carrier_off(netdev);
1659 netif_device_detach(netdev);
1660
1661 clk_disable(bp->hclk);
1662 clk_disable(bp->pclk);
1663
1664 return 0;
1665 }
1666
1667 static int macb_resume(struct platform_device *pdev)
1668 {
1669 struct net_device *netdev = platform_get_drvdata(pdev);
1670 struct macb *bp = netdev_priv(netdev);
1671
1672 clk_enable(bp->pclk);
1673 clk_enable(bp->hclk);
1674
1675 netif_device_attach(netdev);
1676
1677 return 0;
1678 }
1679 #else
1680 #define macb_suspend NULL
1681 #define macb_resume NULL
1682 #endif
1683
1684 static struct platform_driver macb_driver = {
1685 .remove = __exit_p(macb_remove),
1686 .suspend = macb_suspend,
1687 .resume = macb_resume,
1688 .driver = {
1689 .name = "macb",
1690 .owner = THIS_MODULE,
1691 .of_match_table = of_match_ptr(macb_dt_ids),
1692 },
1693 };
1694
1695 static int __init macb_init(void)
1696 {
1697 return platform_driver_probe(&macb_driver, macb_probe);
1698 }
1699
1700 static void __exit macb_exit(void)
1701 {
1702 platform_driver_unregister(&macb_driver);
1703 }
1704
1705 module_init(macb_init);
1706 module_exit(macb_exit);
1707
1708 MODULE_LICENSE("GPL");
1709 MODULE_DESCRIPTION("Cadence MACB/GEM Ethernet driver");
1710 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1711 MODULE_ALIAS("platform:macb");
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