1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 /* Common definitions for all Efx net driver code */
13 #ifndef EFX_NET_DRIVER_H
14 #define EFX_NET_DRIVER_H
16 #include <linux/version.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/ethtool.h>
20 #include <linux/if_vlan.h>
21 #include <linux/timer.h>
22 #include <linux/mdio.h>
23 #include <linux/list.h>
24 #include <linux/pci.h>
25 #include <linux/device.h>
26 #include <linux/highmem.h>
27 #include <linux/workqueue.h>
28 #include <linux/i2c.h>
33 /**************************************************************************
37 **************************************************************************/
38 #ifndef EFX_DRIVER_NAME
39 #define EFX_DRIVER_NAME "sfc"
41 #define EFX_DRIVER_VERSION "2.3"
43 #ifdef EFX_ENABLE_DEBUG
44 #define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
45 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
47 #define EFX_BUG_ON_PARANOID(x) do {} while (0)
48 #define EFX_WARN_ON_PARANOID(x) do {} while (0)
51 /* Un-rate-limited logging */
52 #define EFX_ERR(efx, fmt, args...) \
53 dev_err(&((efx)->pci_dev->dev), "ERR: %s " fmt, efx_dev_name(efx), ##args)
55 #define EFX_INFO(efx, fmt, args...) \
56 dev_info(&((efx)->pci_dev->dev), "INFO: %s " fmt, efx_dev_name(efx), ##args)
58 #ifdef EFX_ENABLE_DEBUG
59 #define EFX_LOG(efx, fmt, args...) \
60 dev_info(&((efx)->pci_dev->dev), "DBG: %s " fmt, efx_dev_name(efx), ##args)
62 #define EFX_LOG(efx, fmt, args...) \
63 dev_dbg(&((efx)->pci_dev->dev), "DBG: %s " fmt, efx_dev_name(efx), ##args)
66 #define EFX_TRACE(efx, fmt, args...) do {} while (0)
68 #define EFX_REGDUMP(efx, fmt, args...) do {} while (0)
70 /* Rate-limited logging */
71 #define EFX_ERR_RL(efx, fmt, args...) \
72 do {if (net_ratelimit()) EFX_ERR(efx, fmt, ##args); } while (0)
74 #define EFX_INFO_RL(efx, fmt, args...) \
75 do {if (net_ratelimit()) EFX_INFO(efx, fmt, ##args); } while (0)
77 #define EFX_LOG_RL(efx, fmt, args...) \
78 do {if (net_ratelimit()) EFX_LOG(efx, fmt, ##args); } while (0)
80 /**************************************************************************
84 **************************************************************************/
86 #define EFX_MAX_CHANNELS 32
87 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
89 #define EFX_TX_QUEUE_OFFLOAD_CSUM 0
90 #define EFX_TX_QUEUE_NO_CSUM 1
91 #define EFX_TX_QUEUE_COUNT 2
94 * struct efx_special_buffer - An Efx special buffer
95 * @addr: CPU base address of the buffer
96 * @dma_addr: DMA base address of the buffer
97 * @len: Buffer length, in bytes
98 * @index: Buffer index within controller;s buffer table
99 * @entries: Number of buffer table entries
101 * Special buffers are used for the event queues and the TX and RX
102 * descriptor queues for each channel. They are *not* used for the
103 * actual transmit and receive buffers.
105 * Note that for Falcon, TX and RX descriptor queues live in host memory.
106 * Allocation and freeing procedures must take this into account.
108 struct efx_special_buffer
{
116 enum efx_flush_state
{
124 * struct efx_tx_buffer - An Efx TX buffer
125 * @skb: The associated socket buffer.
126 * Set only on the final fragment of a packet; %NULL for all other
127 * fragments. When this fragment completes, then we can free this
129 * @tsoh: The associated TSO header structure, or %NULL if this
130 * buffer is not a TSO header.
131 * @dma_addr: DMA address of the fragment.
132 * @len: Length of this fragment.
133 * This field is zero when the queue slot is empty.
134 * @continuation: True if this fragment is not the end of a packet.
135 * @unmap_single: True if pci_unmap_single should be used.
136 * @unmap_len: Length of this fragment to unmap
138 struct efx_tx_buffer
{
139 const struct sk_buff
*skb
;
140 struct efx_tso_header
*tsoh
;
145 unsigned short unmap_len
;
149 * struct efx_tx_queue - An Efx TX queue
151 * This is a ring buffer of TX fragments.
152 * Since the TX completion path always executes on the same
153 * CPU and the xmit path can operate on different CPUs,
154 * performance is increased by ensuring that the completion
155 * path and the xmit path operate on different cache lines.
156 * This is particularly important if the xmit path is always
157 * executing on one CPU which is different from the completion
158 * path. There is also a cache line for members which are
159 * read but not written on the fast path.
161 * @efx: The associated Efx NIC
162 * @queue: DMA queue number
163 * @channel: The associated channel
164 * @buffer: The software buffer ring
165 * @txd: The hardware descriptor ring
166 * @flushed: Used when handling queue flushing
167 * @read_count: Current read pointer.
168 * This is the number of buffers that have been removed from both rings.
169 * @stopped: Stopped count.
170 * Set if this TX queue is currently stopping its port.
171 * @insert_count: Current insert pointer
172 * This is the number of buffers that have been added to the
174 * @write_count: Current write pointer
175 * This is the number of buffers that have been added to the
177 * @old_read_count: The value of read_count when last checked.
178 * This is here for performance reasons. The xmit path will
179 * only get the up-to-date value of read_count if this
180 * variable indicates that the queue is full. This is to
181 * avoid cache-line ping-pong between the xmit path and the
183 * @tso_headers_free: A list of TSO headers allocated for this TX queue
184 * that are not in use, and so available for new TSO sends. The list
185 * is protected by the TX queue lock.
186 * @tso_bursts: Number of times TSO xmit invoked by kernel
187 * @tso_long_headers: Number of packets with headers too long for standard
189 * @tso_packets: Number of packets via the TSO xmit path
191 struct efx_tx_queue
{
192 /* Members which don't change on the fast path */
193 struct efx_nic
*efx ____cacheline_aligned_in_smp
;
195 struct efx_channel
*channel
;
197 struct efx_tx_buffer
*buffer
;
198 struct efx_special_buffer txd
;
199 enum efx_flush_state flushed
;
201 /* Members used mainly on the completion path */
202 unsigned int read_count ____cacheline_aligned_in_smp
;
205 /* Members used only on the xmit path */
206 unsigned int insert_count ____cacheline_aligned_in_smp
;
207 unsigned int write_count
;
208 unsigned int old_read_count
;
209 struct efx_tso_header
*tso_headers_free
;
210 unsigned int tso_bursts
;
211 unsigned int tso_long_headers
;
212 unsigned int tso_packets
;
216 * struct efx_rx_buffer - An Efx RX data buffer
217 * @dma_addr: DMA base address of the buffer
218 * @skb: The associated socket buffer, if any.
219 * If both this and page are %NULL, the buffer slot is currently free.
220 * @page: The associated page buffer, if any.
221 * If both this and skb are %NULL, the buffer slot is currently free.
222 * @data: Pointer to ethernet header
223 * @len: Buffer length, in bytes.
224 * @unmap_addr: DMA address to unmap
226 struct efx_rx_buffer
{
232 dma_addr_t unmap_addr
;
236 * struct efx_rx_queue - An Efx RX queue
237 * @efx: The associated Efx NIC
238 * @queue: DMA queue number
239 * @channel: The associated channel
240 * @buffer: The software buffer ring
241 * @rxd: The hardware descriptor ring
242 * @added_count: Number of buffers added to the receive queue.
243 * @notified_count: Number of buffers given to NIC (<= @added_count).
244 * @removed_count: Number of buffers removed from the receive queue.
245 * @add_lock: Receive queue descriptor add spin lock.
246 * This lock must be held in order to add buffers to the RX
247 * descriptor ring (rxd and buffer) and to update added_count (but
248 * not removed_count).
249 * @max_fill: RX descriptor maximum fill level (<= ring size)
250 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
252 * @fast_fill_limit: The level to which a fast fill will fill
253 * (@fast_fill_trigger <= @fast_fill_limit <= @max_fill)
254 * @min_fill: RX descriptor minimum non-zero fill level.
255 * This records the minimum fill level observed when a ring
256 * refill was triggered.
257 * @min_overfill: RX descriptor minimum overflow fill level.
258 * This records the minimum fill level at which RX queue
259 * overflow was observed. It should never be set.
260 * @alloc_page_count: RX allocation strategy counter.
261 * @alloc_skb_count: RX allocation strategy counter.
262 * @work: Descriptor push work thread
263 * @buf_page: Page for next RX buffer.
264 * We can use a single page for multiple RX buffers. This tracks
265 * the remaining space in the allocation.
266 * @buf_dma_addr: Page's DMA address.
267 * @buf_data: Page's host address.
268 * @flushed: Use when handling queue flushing
270 struct efx_rx_queue
{
273 struct efx_channel
*channel
;
274 struct efx_rx_buffer
*buffer
;
275 struct efx_special_buffer rxd
;
281 unsigned int max_fill
;
282 unsigned int fast_fill_trigger
;
283 unsigned int fast_fill_limit
;
284 unsigned int min_fill
;
285 unsigned int min_overfill
;
286 unsigned int alloc_page_count
;
287 unsigned int alloc_skb_count
;
288 struct delayed_work work
;
289 unsigned int slow_fill_count
;
291 struct page
*buf_page
;
292 dma_addr_t buf_dma_addr
;
294 enum efx_flush_state flushed
;
298 * struct efx_buffer - An Efx general-purpose buffer
299 * @addr: host base address of the buffer
300 * @dma_addr: DMA base address of the buffer
301 * @len: Buffer length, in bytes
303 * Falcon uses these buffers for its interrupt status registers and
313 /* Flags for channel->used_flags */
314 #define EFX_USED_BY_RX 1
315 #define EFX_USED_BY_TX 2
316 #define EFX_USED_BY_RX_TX (EFX_USED_BY_RX | EFX_USED_BY_TX)
318 enum efx_rx_alloc_method
{
319 RX_ALLOC_METHOD_AUTO
= 0,
320 RX_ALLOC_METHOD_SKB
= 1,
321 RX_ALLOC_METHOD_PAGE
= 2,
325 * struct efx_channel - An Efx channel
327 * A channel comprises an event queue, at least one TX queue, at least
328 * one RX queue, and an associated tasklet for processing the event
331 * @efx: Associated Efx NIC
332 * @channel: Channel instance number
333 * @name: Name for channel and IRQ
334 * @used_flags: Channel is used by net driver
335 * @enabled: Channel enabled indicator
336 * @irq: IRQ number (MSI and MSI-X only)
337 * @irq_moderation: IRQ moderation value (in hardware ticks)
338 * @napi_dev: Net device used with NAPI
339 * @napi_str: NAPI control structure
340 * @reset_work: Scheduled reset work thread
341 * @work_pending: Is work pending via NAPI?
342 * @eventq: Event queue buffer
343 * @eventq_read_ptr: Event queue read pointer
344 * @last_eventq_read_ptr: Last event queue read pointer value.
345 * @eventq_magic: Event queue magic value for driver-generated test events
346 * @irq_count: Number of IRQs since last adaptive moderation decision
347 * @irq_mod_score: IRQ moderation score
348 * @rx_alloc_level: Watermark based heuristic counter for pushing descriptors
349 * and diagnostic counters
350 * @rx_alloc_push_pages: RX allocation method currently in use for pushing
352 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
353 * @n_rx_ip_frag_err: Count of RX IP fragment errors
354 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
355 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
356 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
357 * @n_rx_overlength: Count of RX_OVERLENGTH errors
358 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
363 char name
[IFNAMSIZ
+ 6];
367 unsigned int irq_moderation
;
368 struct net_device
*napi_dev
;
369 struct napi_struct napi_str
;
371 struct efx_special_buffer eventq
;
372 unsigned int eventq_read_ptr
;
373 unsigned int last_eventq_read_ptr
;
374 unsigned int eventq_magic
;
376 unsigned int irq_count
;
377 unsigned int irq_mod_score
;
380 int rx_alloc_push_pages
;
382 unsigned n_rx_tobe_disc
;
383 unsigned n_rx_ip_frag_err
;
384 unsigned n_rx_ip_hdr_chksum_err
;
385 unsigned n_rx_tcp_udp_chksum_err
;
386 unsigned n_rx_frm_trunc
;
387 unsigned n_rx_overlength
;
388 unsigned n_skbuff_leaks
;
390 /* Used to pipeline received packets in order to optimise memory
391 * access with prefetches.
393 struct efx_rx_buffer
*rx_pkt
;
404 #define STRING_TABLE_LOOKUP(val, member) \
405 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
407 extern const char *efx_loopback_mode_names
[];
408 extern const unsigned int efx_loopback_mode_max
;
409 #define LOOPBACK_MODE(efx) \
410 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
412 extern const char *efx_interrupt_mode_names
[];
413 extern const unsigned int efx_interrupt_mode_max
;
414 #define INT_MODE(efx) \
415 STRING_TABLE_LOOKUP(efx->interrupt_mode, efx_interrupt_mode)
417 extern const char *efx_reset_type_names
[];
418 extern const unsigned int efx_reset_type_max
;
419 #define RESET_TYPE(type) \
420 STRING_TABLE_LOOKUP(type, efx_reset_type)
423 /* Be careful if altering to correct macro below */
424 EFX_INT_MODE_MSIX
= 0,
425 EFX_INT_MODE_MSI
= 1,
426 EFX_INT_MODE_LEGACY
= 2,
427 EFX_INT_MODE_MAX
/* Insert any new items before this */
429 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
433 PHY_TYPE_TXC43128
= 1,
434 PHY_TYPE_88E1111
= 2,
435 PHY_TYPE_SFX7101
= 3,
436 PHY_TYPE_QT2022C2
= 4,
438 PHY_TYPE_SFT9001A
= 8,
439 PHY_TYPE_QT2025C
= 9,
440 PHY_TYPE_SFT9001B
= 10,
441 PHY_TYPE_MAX
/* Insert any new items before this */
444 #define EFX_IS10G(efx) ((efx)->link_state.speed == 10000)
455 * Alignment of page-allocated RX buffers
457 * Controls the number of bytes inserted at the start of an RX buffer.
458 * This is the equivalent of NET_IP_ALIGN [which controls the alignment
459 * of the skb->head for hardware DMA].
461 #ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
462 #define EFX_PAGE_IP_ALIGN 0
464 #define EFX_PAGE_IP_ALIGN NET_IP_ALIGN
468 * Alignment of the skb->head which wraps a page-allocated RX buffer
470 * The skb allocated to wrap an rx_buffer can have this alignment. Since
471 * the data is memcpy'd from the rx_buf, it does not need to be equal to
474 #define EFX_PAGE_SKB_ALIGN 2
476 /* Forward declaration */
479 /* Pseudo bit-mask flow control field */
481 EFX_FC_RX
= FLOW_CTRL_RX
,
482 EFX_FC_TX
= FLOW_CTRL_TX
,
486 /* Supported MAC bit-mask */
493 * struct efx_link_state - Current state of the link
495 * @fd: Link is full-duplex
496 * @fc: Actual flow control flags
497 * @speed: Link speed (Mbps)
499 struct efx_link_state
{
507 * struct efx_mac_operations - Efx MAC operations table
508 * @reconfigure: Reconfigure MAC. Serialised by the mac_lock
509 * @update_stats: Update statistics
510 * @check_fault: Check fault state. True if fault present.
512 struct efx_mac_operations
{
513 void (*reconfigure
) (struct efx_nic
*efx
);
514 void (*update_stats
) (struct efx_nic
*efx
);
515 bool (*check_fault
)(struct efx_nic
*efx
);
519 * struct efx_phy_operations - Efx PHY operations table
520 * @init: Initialise PHY
521 * @fini: Shut down PHY
522 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
523 * @clear_interrupt: Clear down interrupt
524 * @poll: Poll for hardware state. Serialised by the mac_lock.
525 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
526 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
527 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
528 * (only needed where AN bit is set in mmds)
529 * @num_tests: Number of PHY-specific tests/results
530 * @test_names: Names of the tests/results
531 * @run_tests: Run tests and record results as appropriate.
532 * Flags are the ethtool tests flags.
533 * @mmds: MMD presence mask
534 * @loopbacks: Supported loopback modes mask
536 struct efx_phy_operations
{
537 enum efx_mac_type macs
;
538 int (*init
) (struct efx_nic
*efx
);
539 void (*fini
) (struct efx_nic
*efx
);
540 void (*reconfigure
) (struct efx_nic
*efx
);
541 void (*clear_interrupt
) (struct efx_nic
*efx
);
542 void (*poll
) (struct efx_nic
*efx
);
543 void (*get_settings
) (struct efx_nic
*efx
,
544 struct ethtool_cmd
*ecmd
);
545 int (*set_settings
) (struct efx_nic
*efx
,
546 struct ethtool_cmd
*ecmd
);
547 void (*set_npage_adv
) (struct efx_nic
*efx
, u32
);
549 const char *const *test_names
;
550 int (*run_tests
) (struct efx_nic
*efx
, int *results
, unsigned flags
);
556 * @enum efx_phy_mode - PHY operating mode flags
557 * @PHY_MODE_NORMAL: on and should pass traffic
558 * @PHY_MODE_TX_DISABLED: on with TX disabled
559 * @PHY_MODE_LOW_POWER: set to low power through MDIO
560 * @PHY_MODE_OFF: switched off through external control
561 * @PHY_MODE_SPECIAL: on but will not pass traffic
565 PHY_MODE_TX_DISABLED
= 1,
566 PHY_MODE_LOW_POWER
= 2,
568 PHY_MODE_SPECIAL
= 8,
571 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode
)
573 return !!(mode
& ~PHY_MODE_TX_DISABLED
);
577 * Efx extended statistics
579 * Not all statistics are provided by all supported MACs. The purpose
580 * is this structure is to contain the raw statistics provided by each
583 struct efx_mac_stats
{
587 unsigned long tx_packets
;
588 unsigned long tx_bad
;
589 unsigned long tx_pause
;
590 unsigned long tx_control
;
591 unsigned long tx_unicast
;
592 unsigned long tx_multicast
;
593 unsigned long tx_broadcast
;
594 unsigned long tx_lt64
;
596 unsigned long tx_65_to_127
;
597 unsigned long tx_128_to_255
;
598 unsigned long tx_256_to_511
;
599 unsigned long tx_512_to_1023
;
600 unsigned long tx_1024_to_15xx
;
601 unsigned long tx_15xx_to_jumbo
;
602 unsigned long tx_gtjumbo
;
603 unsigned long tx_collision
;
604 unsigned long tx_single_collision
;
605 unsigned long tx_multiple_collision
;
606 unsigned long tx_excessive_collision
;
607 unsigned long tx_deferred
;
608 unsigned long tx_late_collision
;
609 unsigned long tx_excessive_deferred
;
610 unsigned long tx_non_tcpudp
;
611 unsigned long tx_mac_src_error
;
612 unsigned long tx_ip_src_error
;
616 unsigned long rx_packets
;
617 unsigned long rx_good
;
618 unsigned long rx_bad
;
619 unsigned long rx_pause
;
620 unsigned long rx_control
;
621 unsigned long rx_unicast
;
622 unsigned long rx_multicast
;
623 unsigned long rx_broadcast
;
624 unsigned long rx_lt64
;
626 unsigned long rx_65_to_127
;
627 unsigned long rx_128_to_255
;
628 unsigned long rx_256_to_511
;
629 unsigned long rx_512_to_1023
;
630 unsigned long rx_1024_to_15xx
;
631 unsigned long rx_15xx_to_jumbo
;
632 unsigned long rx_gtjumbo
;
633 unsigned long rx_bad_lt64
;
634 unsigned long rx_bad_64_to_15xx
;
635 unsigned long rx_bad_15xx_to_jumbo
;
636 unsigned long rx_bad_gtjumbo
;
637 unsigned long rx_overflow
;
638 unsigned long rx_missed
;
639 unsigned long rx_false_carrier
;
640 unsigned long rx_symbol_error
;
641 unsigned long rx_align_error
;
642 unsigned long rx_length_error
;
643 unsigned long rx_internal_error
;
644 unsigned long rx_good_lt64
;
647 /* Number of bits used in a multicast filter hash address */
648 #define EFX_MCAST_HASH_BITS 8
650 /* Number of (single-bit) entries in a multicast filter hash */
651 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
653 /* An Efx multicast filter hash */
654 union efx_multicast_hash
{
655 u8 byte
[EFX_MCAST_HASH_ENTRIES
/ 8];
656 efx_oword_t oword
[EFX_MCAST_HASH_ENTRIES
/ sizeof(efx_oword_t
) / 8];
660 * struct efx_nic - an Efx NIC
661 * @name: Device name (net device name or bus id before net device registered)
662 * @pci_dev: The PCI device
663 * @type: Controller type attributes
664 * @legacy_irq: IRQ number
665 * @workqueue: Workqueue for port reconfigures and the HW monitor.
666 * Work items do not hold and must not acquire RTNL.
667 * @workqueue_name: Name of workqueue
668 * @reset_work: Scheduled reset workitem
669 * @monitor_work: Hardware monitor workitem
670 * @membase_phys: Memory BAR value as physical address
671 * @membase: Memory BAR value
672 * @biu_lock: BIU (bus interface unit) lock
673 * @interrupt_mode: Interrupt mode
674 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
675 * @irq_rx_moderation: IRQ moderation time for RX event queues
676 * @state: Device state flag. Serialised by the rtnl_lock.
677 * @reset_pending: Pending reset method (normally RESET_TYPE_NONE)
678 * @tx_queue: TX DMA queues
679 * @rx_queue: RX DMA queues
681 * @next_buffer_table: First available buffer table id
682 * @n_rx_queues: Number of RX queues
683 * @n_channels: Number of channels in use
684 * @rx_buffer_len: RX buffer length
685 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
686 * @int_error_count: Number of internal errors seen recently
687 * @int_error_expire: Time at which error count will be expired
688 * @irq_status: Interrupt status buffer
689 * @last_irq_cpu: Last CPU to handle interrupt.
690 * This register is written with the SMP processor ID whenever an
691 * interrupt is handled. It is used by falcon_test_interrupt()
692 * to verify that an interrupt has occurred.
693 * @spi_flash: SPI flash device
694 * This field will be %NULL if no flash device is present.
695 * @spi_eeprom: SPI EEPROM device
696 * This field will be %NULL if no EEPROM device is present.
697 * @spi_lock: SPI bus lock
698 * @n_rx_nodesc_drop_cnt: RX no descriptor drop count
699 * @nic_data: Hardware dependant state
700 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
701 * @port_inhibited, efx_monitor() and efx_reconfigure_port()
702 * @port_enabled: Port enabled indicator.
703 * Serialises efx_stop_all(), efx_start_all(), efx_monitor(),
704 * efx_phy_work(), and efx_mac_work() with kernel interfaces. Safe to read
705 * under any one of the rtnl_lock, mac_lock, or netif_tx_lock, but all
706 * three must be held to modify it.
707 * @port_inhibited: If set, the netif_carrier is always off. Hold the mac_lock
708 * @port_initialized: Port initialized?
709 * @net_dev: Operating system network device. Consider holding the rtnl lock
710 * @rx_checksum_enabled: RX checksumming enabled
711 * @netif_stop_count: Port stop count
712 * @netif_stop_lock: Port stop lock
713 * @mac_stats: MAC statistics. These include all statistics the MACs
714 * can provide. Generic code converts these into a standard
715 * &struct net_device_stats.
716 * @stats_buffer: DMA buffer for statistics
717 * @stats_lock: Statistics update lock. Serialises statistics fetches
718 * @mac_op: MAC interface
719 * @mac_address: Permanent MAC address
720 * @phy_type: PHY type
721 * @phy_lock: PHY access lock
722 * @phy_op: PHY interface
723 * @phy_data: PHY private data (including PHY-specific stats)
724 * @mdio: PHY MDIO interface
725 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
726 * @xmac_poll_required: XMAC link state needs polling
727 * @link_state: Current state of the link
728 * @n_link_state_changes: Number of times the link has changed state
729 * @promiscuous: Promiscuous flag. Protected by netif_tx_lock.
730 * @multicast_hash: Multicast hash table
731 * @wanted_fc: Wanted flow control flags
732 * @phy_work: work item for dealing with PHY events
733 * @mac_work: Work item for changing MAC promiscuity and multicast hash
734 * @loopback_mode: Loopback status
735 * @loopback_modes: Supported loopback mode bitmask
736 * @loopback_selftest: Offline self-test private state
738 * The @priv field of the corresponding &struct net_device points to
743 struct pci_dev
*pci_dev
;
744 const struct efx_nic_type
*type
;
746 struct workqueue_struct
*workqueue
;
747 char workqueue_name
[16];
748 struct work_struct reset_work
;
749 struct delayed_work monitor_work
;
750 resource_size_t membase_phys
;
751 void __iomem
*membase
;
753 enum efx_int_mode interrupt_mode
;
754 bool irq_rx_adaptive
;
755 unsigned int irq_rx_moderation
;
757 enum nic_state state
;
758 enum reset_type reset_pending
;
760 struct efx_tx_queue tx_queue
[EFX_TX_QUEUE_COUNT
];
761 struct efx_rx_queue rx_queue
[EFX_MAX_RX_QUEUES
];
762 struct efx_channel channel
[EFX_MAX_CHANNELS
];
764 unsigned next_buffer_table
;
767 unsigned int rx_buffer_len
;
768 unsigned int rx_buffer_order
;
770 unsigned int_error_count
;
771 unsigned long int_error_expire
;
773 struct efx_buffer irq_status
;
774 volatile signed int last_irq_cpu
;
776 struct efx_spi_device
*spi_flash
;
777 struct efx_spi_device
*spi_eeprom
;
778 struct mutex spi_lock
;
780 unsigned n_rx_nodesc_drop_cnt
;
782 struct falcon_nic_data
*nic_data
;
784 struct mutex mac_lock
;
785 struct work_struct mac_work
;
789 bool port_initialized
;
790 struct net_device
*net_dev
;
791 bool rx_checksum_enabled
;
793 atomic_t netif_stop_count
;
794 spinlock_t netif_stop_lock
;
796 struct efx_mac_stats mac_stats
;
797 struct efx_buffer stats_buffer
;
798 spinlock_t stats_lock
;
800 struct efx_mac_operations
*mac_op
;
801 unsigned char mac_address
[ETH_ALEN
];
803 enum phy_type phy_type
;
805 struct work_struct phy_work
;
806 struct efx_phy_operations
*phy_op
;
808 struct mdio_if_info mdio
;
809 enum efx_phy_mode phy_mode
;
811 bool xmac_poll_required
;
812 struct efx_link_state link_state
;
813 unsigned int n_link_state_changes
;
816 union efx_multicast_hash multicast_hash
;
817 enum efx_fc_type wanted_fc
;
820 enum efx_loopback_mode loopback_mode
;
821 unsigned int loopback_modes
;
823 void *loopback_selftest
;
826 static inline int efx_dev_registered(struct efx_nic
*efx
)
828 return efx
->net_dev
->reg_state
== NETREG_REGISTERED
;
831 /* Net device name, for inclusion in log messages if it has been registered.
832 * Use efx->name not efx->net_dev->name so that races with (un)registration
835 static inline const char *efx_dev_name(struct efx_nic
*efx
)
837 return efx_dev_registered(efx
) ? efx
->name
: "";
841 * struct efx_nic_type - Efx device type definition
842 * @mem_map_size: Memory BAR mapped size
843 * @txd_ptr_tbl_base: TX descriptor ring base address
844 * @rxd_ptr_tbl_base: RX descriptor ring base address
845 * @buf_tbl_base: Buffer table base address
846 * @evq_ptr_tbl_base: Event queue pointer table base address
847 * @evq_rptr_tbl_base: Event queue read-pointer table base address
848 * @max_dma_mask: Maximum possible DMA mask
849 * @rx_buffer_padding: Padding added to each RX buffer
850 * @max_interrupt_mode: Highest capability interrupt mode supported
851 * from &enum efx_init_mode.
852 * @phys_addr_channels: Number of channels with physically addressed
855 struct efx_nic_type
{
856 unsigned int mem_map_size
;
857 unsigned int txd_ptr_tbl_base
;
858 unsigned int rxd_ptr_tbl_base
;
859 unsigned int buf_tbl_base
;
860 unsigned int evq_ptr_tbl_base
;
861 unsigned int evq_rptr_tbl_base
;
865 unsigned int rx_buffer_padding
;
866 unsigned int max_interrupt_mode
;
867 unsigned int phys_addr_channels
;
870 /**************************************************************************
872 * Prototypes and inline functions
874 *************************************************************************/
876 /* Iterate over all used channels */
877 #define efx_for_each_channel(_channel, _efx) \
878 for (_channel = &_efx->channel[0]; \
879 _channel < &_efx->channel[EFX_MAX_CHANNELS]; \
881 if (!_channel->used_flags) \
885 /* Iterate over all used TX queues */
886 #define efx_for_each_tx_queue(_tx_queue, _efx) \
887 for (_tx_queue = &_efx->tx_queue[0]; \
888 _tx_queue < &_efx->tx_queue[EFX_TX_QUEUE_COUNT]; \
891 /* Iterate over all TX queues belonging to a channel */
892 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
893 for (_tx_queue = &_channel->efx->tx_queue[0]; \
894 _tx_queue < &_channel->efx->tx_queue[EFX_TX_QUEUE_COUNT]; \
896 if (_tx_queue->channel != _channel) \
900 /* Iterate over all used RX queues */
901 #define efx_for_each_rx_queue(_rx_queue, _efx) \
902 for (_rx_queue = &_efx->rx_queue[0]; \
903 _rx_queue < &_efx->rx_queue[_efx->n_rx_queues]; \
906 /* Iterate over all RX queues belonging to a channel */
907 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
908 for (_rx_queue = &_channel->efx->rx_queue[_channel->channel]; \
911 if (_rx_queue->channel != _channel) \
915 /* Returns a pointer to the specified receive buffer in the RX
918 static inline struct efx_rx_buffer
*efx_rx_buffer(struct efx_rx_queue
*rx_queue
,
921 return (&rx_queue
->buffer
[index
]);
924 /* Set bit in a little-endian bitfield */
925 static inline void set_bit_le(unsigned nr
, unsigned char *addr
)
927 addr
[nr
/ 8] |= (1 << (nr
% 8));
930 /* Clear bit in a little-endian bitfield */
931 static inline void clear_bit_le(unsigned nr
, unsigned char *addr
)
933 addr
[nr
/ 8] &= ~(1 << (nr
% 8));
938 * EFX_MAX_FRAME_LEN - calculate maximum frame length
940 * This calculates the maximum frame length that will be used for a
941 * given MTU. The frame length will be equal to the MTU plus a
942 * constant amount of header space and padding. This is the quantity
943 * that the net driver will program into the MAC as the maximum frame
946 * The 10G MAC used in Falcon requires 8-byte alignment on the frame
947 * length, so we round up to the nearest 8.
949 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
950 * XGMII cycle). If the frame length reaches the maximum value in the
951 * same cycle, the XMAC can miss the IPG altogether. We work around
952 * this by adding a further 16 bytes.
954 #define EFX_MAX_FRAME_LEN(mtu) \
955 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
958 #endif /* EFX_NET_DRIVER_H */