3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/proc_fs.h>
25 #include <linux/rbtree.h>
26 #include <linux/seq_file.h>
27 #include <linux/spinlock.h>
28 #include <asm/atomic.h>
30 #include <asm/eeh_event.h>
32 #include <asm/machdep.h>
33 #include <asm/ppc-pci.h>
35 #include <asm/systemcfg.h>
40 * EEH, or "Extended Error Handling" is a PCI bridge technology for
41 * dealing with PCI bus errors that can't be dealt with within the
42 * usual PCI framework, except by check-stopping the CPU. Systems
43 * that are designed for high-availability/reliability cannot afford
44 * to crash due to a "mere" PCI error, thus the need for EEH.
45 * An EEH-capable bridge operates by converting a detected error
46 * into a "slot freeze", taking the PCI adapter off-line, making
47 * the slot behave, from the OS'es point of view, as if the slot
48 * were "empty": all reads return 0xff's and all writes are silently
49 * ignored. EEH slot isolation events can be triggered by parity
50 * errors on the address or data busses (e.g. during posted writes),
51 * which in turn might be caused by low voltage on the bus, dust,
52 * vibration, humidity, radioactivity or plain-old failed hardware.
54 * Note, however, that one of the leading causes of EEH slot
55 * freeze events are buggy device drivers, buggy device microcode,
56 * or buggy device hardware. This is because any attempt by the
57 * device to bus-master data to a memory address that is not
58 * assigned to the device will trigger a slot freeze. (The idea
59 * is to prevent devices-gone-wild from corrupting system memory).
60 * Buggy hardware/drivers will have a miserable time co-existing
63 * Ideally, a PCI device driver, when suspecting that an isolation
64 * event has occured (e.g. by reading 0xff's), will then ask EEH
65 * whether this is the case, and then take appropriate steps to
66 * reset the PCI slot, the PCI device, and then resume operations.
67 * However, until that day, the checking is done here, with the
68 * eeh_check_failure() routine embedded in the MMIO macros. If
69 * the slot is found to be isolated, an "EEH Event" is synthesized
70 * and sent out for processing.
73 /* If a device driver keeps reading an MMIO register in an interrupt
74 * handler after a slot isolation event has occurred, we assume it
75 * is broken and panic. This sets the threshold for how many read
76 * attempts we allow before panicking.
78 #define EEH_MAX_FAILS 100000
80 /* Misc forward declaraions */
81 static void eeh_save_bars(struct pci_dev
* pdev
, struct pci_dn
*pdn
);
84 static int ibm_set_eeh_option
;
85 static int ibm_set_slot_reset
;
86 static int ibm_read_slot_reset_state
;
87 static int ibm_read_slot_reset_state2
;
88 static int ibm_slot_error_detail
;
90 static int eeh_subsystem_enabled
;
92 /* Lock to avoid races due to multiple reports of an error */
93 static DEFINE_SPINLOCK(confirm_error_lock
);
95 /* Buffer for reporting slot-error-detail rtas calls */
96 static unsigned char slot_errbuf
[RTAS_ERROR_LOG_MAX
];
97 static DEFINE_SPINLOCK(slot_errbuf_lock
);
98 static int eeh_error_buf_size
;
100 /* System monitoring statistics */
101 static DEFINE_PER_CPU(unsigned long, no_device
);
102 static DEFINE_PER_CPU(unsigned long, no_dn
);
103 static DEFINE_PER_CPU(unsigned long, no_cfg_addr
);
104 static DEFINE_PER_CPU(unsigned long, ignored_check
);
105 static DEFINE_PER_CPU(unsigned long, total_mmio_ffs
);
106 static DEFINE_PER_CPU(unsigned long, false_positives
);
107 static DEFINE_PER_CPU(unsigned long, ignored_failures
);
108 static DEFINE_PER_CPU(unsigned long, slot_resets
);
111 * The pci address cache subsystem. This subsystem places
112 * PCI device address resources into a red-black tree, sorted
113 * according to the address range, so that given only an i/o
114 * address, the corresponding PCI device can be **quickly**
115 * found. It is safe to perform an address lookup in an interrupt
116 * context; this ability is an important feature.
118 * Currently, the only customer of this code is the EEH subsystem;
119 * thus, this code has been somewhat tailored to suit EEH better.
120 * In particular, the cache does *not* hold the addresses of devices
121 * for which EEH is not enabled.
123 * (Implementation Note: The RB tree seems to be better/faster
124 * than any hash algo I could think of for this problem, even
125 * with the penalty of slow pointer chases for d-cache misses).
127 struct pci_io_addr_range
129 struct rb_node rb_node
;
130 unsigned long addr_lo
;
131 unsigned long addr_hi
;
132 struct pci_dev
*pcidev
;
136 static struct pci_io_addr_cache
138 struct rb_root rb_root
;
139 spinlock_t piar_lock
;
140 } pci_io_addr_cache_root
;
142 static inline struct pci_dev
*__pci_get_device_by_addr(unsigned long addr
)
144 struct rb_node
*n
= pci_io_addr_cache_root
.rb_root
.rb_node
;
147 struct pci_io_addr_range
*piar
;
148 piar
= rb_entry(n
, struct pci_io_addr_range
, rb_node
);
150 if (addr
< piar
->addr_lo
) {
153 if (addr
> piar
->addr_hi
) {
156 pci_dev_get(piar
->pcidev
);
166 * pci_get_device_by_addr - Get device, given only address
167 * @addr: mmio (PIO) phys address or i/o port number
169 * Given an mmio phys address, or a port number, find a pci device
170 * that implements this address. Be sure to pci_dev_put the device
171 * when finished. I/O port numbers are assumed to be offset
172 * from zero (that is, they do *not* have pci_io_addr added in).
173 * It is safe to call this function within an interrupt.
175 static struct pci_dev
*pci_get_device_by_addr(unsigned long addr
)
180 spin_lock_irqsave(&pci_io_addr_cache_root
.piar_lock
, flags
);
181 dev
= __pci_get_device_by_addr(addr
);
182 spin_unlock_irqrestore(&pci_io_addr_cache_root
.piar_lock
, flags
);
188 * Handy-dandy debug print routine, does nothing more
189 * than print out the contents of our addr cache.
191 static void pci_addr_cache_print(struct pci_io_addr_cache
*cache
)
196 n
= rb_first(&cache
->rb_root
);
198 struct pci_io_addr_range
*piar
;
199 piar
= rb_entry(n
, struct pci_io_addr_range
, rb_node
);
200 printk(KERN_DEBUG
"PCI: %s addr range %d [%lx-%lx]: %s\n",
201 (piar
->flags
& IORESOURCE_IO
) ? "i/o" : "mem", cnt
,
202 piar
->addr_lo
, piar
->addr_hi
, pci_name(piar
->pcidev
));
209 /* Insert address range into the rb tree. */
210 static struct pci_io_addr_range
*
211 pci_addr_cache_insert(struct pci_dev
*dev
, unsigned long alo
,
212 unsigned long ahi
, unsigned int flags
)
214 struct rb_node
**p
= &pci_io_addr_cache_root
.rb_root
.rb_node
;
215 struct rb_node
*parent
= NULL
;
216 struct pci_io_addr_range
*piar
;
218 /* Walk tree, find a place to insert into tree */
221 piar
= rb_entry(parent
, struct pci_io_addr_range
, rb_node
);
222 if (ahi
< piar
->addr_lo
) {
223 p
= &parent
->rb_left
;
224 } else if (alo
> piar
->addr_hi
) {
225 p
= &parent
->rb_right
;
227 if (dev
!= piar
->pcidev
||
228 alo
!= piar
->addr_lo
|| ahi
!= piar
->addr_hi
) {
229 printk(KERN_WARNING
"PIAR: overlapping address range\n");
234 piar
= (struct pci_io_addr_range
*)kmalloc(sizeof(struct pci_io_addr_range
), GFP_ATOMIC
);
244 printk(KERN_DEBUG
"PIAR: insert range=[%lx:%lx] dev=%s\n",
245 alo
, ahi
, pci_name (dev
));
248 rb_link_node(&piar
->rb_node
, parent
, p
);
249 rb_insert_color(&piar
->rb_node
, &pci_io_addr_cache_root
.rb_root
);
254 static void __pci_addr_cache_insert_device(struct pci_dev
*dev
)
256 struct device_node
*dn
;
261 dn
= pci_device_to_OF_node(dev
);
263 printk(KERN_WARNING
"PCI: no pci dn found for dev=%s\n", pci_name(dev
));
267 /* Skip any devices for which EEH is not enabled. */
269 if (!(pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) ||
270 pdn
->eeh_mode
& EEH_MODE_NOCHECK
) {
272 printk(KERN_INFO
"PCI: skip building address cache for=%s - %s\n",
273 pci_name(dev
), pdn
->node
->full_name
);
278 /* The cache holds a reference to the device... */
281 /* Walk resources on this device, poke them into the tree */
282 for (i
= 0; i
< DEVICE_COUNT_RESOURCE
; i
++) {
283 unsigned long start
= pci_resource_start(dev
,i
);
284 unsigned long end
= pci_resource_end(dev
,i
);
285 unsigned int flags
= pci_resource_flags(dev
,i
);
287 /* We are interested only bus addresses, not dma or other stuff */
288 if (0 == (flags
& (IORESOURCE_IO
| IORESOURCE_MEM
)))
290 if (start
== 0 || ~start
== 0 || end
== 0 || ~end
== 0)
292 pci_addr_cache_insert(dev
, start
, end
, flags
);
296 /* If there was nothing to add, the cache has no reference... */
302 * pci_addr_cache_insert_device - Add a device to the address cache
303 * @dev: PCI device whose I/O addresses we are interested in.
305 * In order to support the fast lookup of devices based on addresses,
306 * we maintain a cache of devices that can be quickly searched.
307 * This routine adds a device to that cache.
309 static void pci_addr_cache_insert_device(struct pci_dev
*dev
)
313 spin_lock_irqsave(&pci_io_addr_cache_root
.piar_lock
, flags
);
314 __pci_addr_cache_insert_device(dev
);
315 spin_unlock_irqrestore(&pci_io_addr_cache_root
.piar_lock
, flags
);
318 static inline void __pci_addr_cache_remove_device(struct pci_dev
*dev
)
324 n
= rb_first(&pci_io_addr_cache_root
.rb_root
);
326 struct pci_io_addr_range
*piar
;
327 piar
= rb_entry(n
, struct pci_io_addr_range
, rb_node
);
329 if (piar
->pcidev
== dev
) {
330 rb_erase(n
, &pci_io_addr_cache_root
.rb_root
);
338 /* The cache no longer holds its reference to this device... */
344 * pci_addr_cache_remove_device - remove pci device from addr cache
345 * @dev: device to remove
347 * Remove a device from the addr-cache tree.
348 * This is potentially expensive, since it will walk
349 * the tree multiple times (once per resource).
350 * But so what; device removal doesn't need to be that fast.
352 static void pci_addr_cache_remove_device(struct pci_dev
*dev
)
356 spin_lock_irqsave(&pci_io_addr_cache_root
.piar_lock
, flags
);
357 __pci_addr_cache_remove_device(dev
);
358 spin_unlock_irqrestore(&pci_io_addr_cache_root
.piar_lock
, flags
);
362 * pci_addr_cache_build - Build a cache of I/O addresses
364 * Build a cache of pci i/o addresses. This cache will be used to
365 * find the pci device that corresponds to a given address.
366 * This routine scans all pci busses to build the cache.
367 * Must be run late in boot process, after the pci controllers
368 * have been scaned for devices (after all device resources are known).
370 void __init
pci_addr_cache_build(void)
372 struct device_node
*dn
;
373 struct pci_dev
*dev
= NULL
;
375 if (!eeh_subsystem_enabled
)
378 spin_lock_init(&pci_io_addr_cache_root
.piar_lock
);
380 while ((dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
)) != NULL
) {
381 /* Ignore PCI bridges ( XXX why ??) */
382 if ((dev
->class >> 16) == PCI_BASE_CLASS_BRIDGE
) {
385 pci_addr_cache_insert_device(dev
);
387 /* Save the BAR's; firmware doesn't restore these after EEH reset */
388 dn
= pci_device_to_OF_node(dev
);
389 eeh_save_bars(dev
, PCI_DN(dn
));
393 /* Verify tree built up above, echo back the list of addrs. */
394 pci_addr_cache_print(&pci_io_addr_cache_root
);
398 /* --------------------------------------------------------------- */
399 /* Above lies the PCI Address Cache. Below lies the EEH event infrastructure */
401 void eeh_slot_error_detail (struct pci_dn
*pdn
, int severity
)
406 /* Log the error with the rtas logger */
407 spin_lock_irqsave(&slot_errbuf_lock
, flags
);
408 memset(slot_errbuf
, 0, eeh_error_buf_size
);
410 rc
= rtas_call(ibm_slot_error_detail
,
411 8, 1, NULL
, pdn
->eeh_config_addr
,
412 BUID_HI(pdn
->phb
->buid
),
413 BUID_LO(pdn
->phb
->buid
), NULL
, 0,
414 virt_to_phys(slot_errbuf
),
419 log_error(slot_errbuf
, ERR_TYPE_RTAS_LOG
, 0);
420 spin_unlock_irqrestore(&slot_errbuf_lock
, flags
);
424 * read_slot_reset_state - Read the reset state of a device node's slot
425 * @dn: device node to read
426 * @rets: array to return results in
428 static int read_slot_reset_state(struct pci_dn
*pdn
, int rets
[])
432 if (ibm_read_slot_reset_state2
!= RTAS_UNKNOWN_SERVICE
) {
433 token
= ibm_read_slot_reset_state2
;
436 token
= ibm_read_slot_reset_state
;
437 rets
[2] = 0; /* fake PE Unavailable info */
441 return rtas_call(token
, 3, outputs
, rets
, pdn
->eeh_config_addr
,
442 BUID_HI(pdn
->phb
->buid
), BUID_LO(pdn
->phb
->buid
));
446 * eeh_token_to_phys - convert EEH address token to phys address
447 * @token i/o token, should be address in the form 0xA....
449 static inline unsigned long eeh_token_to_phys(unsigned long token
)
454 ptep
= find_linux_pte(init_mm
.pgd
, token
);
457 pa
= pte_pfn(*ptep
) << PAGE_SHIFT
;
459 return pa
| (token
& (PAGE_SIZE
-1));
463 * Return the "partitionable endpoint" (pe) under which this device lies
465 static struct device_node
* find_device_pe(struct device_node
*dn
)
467 while ((dn
->parent
) && PCI_DN(dn
->parent
) &&
468 (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
474 /** Mark all devices that are peers of this device as failed.
475 * Mark the device driver too, so that it can see the failure
476 * immediately; this is critical, since some drivers poll
477 * status registers in interrupts ... If a driver is polling,
478 * and the slot is frozen, then the driver can deadlock in
479 * an interrupt context, which is bad.
482 static inline void __eeh_mark_slot (struct device_node
*dn
)
485 PCI_DN(dn
)->eeh_mode
|= EEH_MODE_ISOLATED
;
488 __eeh_mark_slot (dn
->child
);
493 static inline void __eeh_clear_slot (struct device_node
*dn
)
496 PCI_DN(dn
)->eeh_mode
&= ~EEH_MODE_ISOLATED
;
498 __eeh_clear_slot (dn
->child
);
503 static inline void eeh_clear_slot (struct device_node
*dn
)
506 spin_lock_irqsave(&confirm_error_lock
, flags
);
507 __eeh_clear_slot (dn
);
508 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
512 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
514 * @dev pci device, if known
516 * Check for an EEH failure for the given device node. Call this
517 * routine if the result of a read was all 0xff's and you want to
518 * find out if this is due to an EEH slot freeze. This routine
519 * will query firmware for the EEH status.
521 * Returns 0 if there has not been an EEH error; otherwise returns
522 * a non-zero value and queues up a slot isolation event notification.
524 * It is safe to call this routine in an interrupt context.
526 int eeh_dn_check_failure(struct device_node
*dn
, struct pci_dev
*dev
)
532 struct device_node
*pe_dn
;
535 __get_cpu_var(total_mmio_ffs
)++;
537 if (!eeh_subsystem_enabled
)
541 __get_cpu_var(no_dn
)++;
546 /* Access to IO BARs might get this far and still not want checking. */
547 if (!(pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) ||
548 pdn
->eeh_mode
& EEH_MODE_NOCHECK
) {
549 __get_cpu_var(ignored_check
)++;
551 printk ("EEH:ignored check (%x) for %s %s\n",
552 pdn
->eeh_mode
, pci_name (dev
), dn
->full_name
);
557 if (!pdn
->eeh_config_addr
) {
558 __get_cpu_var(no_cfg_addr
)++;
562 /* If we already have a pending isolation event for this
563 * slot, we know it's bad already, we don't need to check.
564 * Do this checking under a lock; as multiple PCI devices
565 * in one slot might report errors simultaneously, and we
566 * only want one error recovery routine running.
568 spin_lock_irqsave(&confirm_error_lock
, flags
);
570 if (pdn
->eeh_mode
& EEH_MODE_ISOLATED
) {
571 pdn
->eeh_check_count
++;
572 if (pdn
->eeh_check_count
>= EEH_MAX_FAILS
) {
573 printk (KERN_ERR
"EEH: Device driver ignored %d bad reads, panicing\n",
574 pdn
->eeh_check_count
);
577 /* re-read the slot reset state */
578 if (read_slot_reset_state(pdn
, rets
) != 0)
579 rets
[0] = -1; /* reset state unknown */
581 /* If we are here, then we hit an infinite loop. Stop. */
582 panic("EEH: MMIO halt (%d) on device:%s\n", rets
[0], pci_name(dev
));
588 * Now test for an EEH failure. This is VERY expensive.
589 * Note that the eeh_config_addr may be a parent device
590 * in the case of a device behind a bridge, or it may be
591 * function zero of a multi-function device.
592 * In any case they must share a common PHB.
594 ret
= read_slot_reset_state(pdn
, rets
);
596 /* If the call to firmware failed, punt */
598 printk(KERN_WARNING
"EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
600 __get_cpu_var(false_positives
)++;
605 /* If EEH is not supported on this device, punt. */
607 printk(KERN_WARNING
"EEH: event on unsupported device, rc=%d dn=%s\n",
609 __get_cpu_var(false_positives
)++;
614 /* If not the kind of error we know about, punt. */
615 if (rets
[0] != 2 && rets
[0] != 4 && rets
[0] != 5) {
616 __get_cpu_var(false_positives
)++;
621 /* Note that config-io to empty slots may fail;
622 * we recognize empty because they don't have children. */
623 if ((rets
[0] == 5) && (dn
->child
== NULL
)) {
624 __get_cpu_var(false_positives
)++;
629 __get_cpu_var(slot_resets
)++;
631 /* Avoid repeated reports of this failure, including problems
632 * with other functions on this device, and functions under
634 pe_dn
= find_device_pe (dn
);
635 __eeh_mark_slot (pe_dn
);
636 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
638 eeh_send_failure_event (dn
, dev
, rets
[0], rets
[2]);
640 /* Most EEH events are due to device driver bugs. Having
641 * a stack trace will help the device-driver authors figure
642 * out what happened. So print that out. */
643 if (rets
[0] != 5) dump_stack();
647 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
651 EXPORT_SYMBOL_GPL(eeh_dn_check_failure
);
654 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
655 * @token i/o token, should be address in the form 0xA....
656 * @val value, should be all 1's (XXX why do we need this arg??)
658 * Check for an EEH failure at the given token address. Call this
659 * routine if the result of a read was all 0xff's and you want to
660 * find out if this is due to an EEH slot freeze event. This routine
661 * will query firmware for the EEH status.
663 * Note this routine is safe to call in an interrupt context.
665 unsigned long eeh_check_failure(const volatile void __iomem
*token
, unsigned long val
)
669 struct device_node
*dn
;
671 /* Finding the phys addr + pci device; this is pretty quick. */
672 addr
= eeh_token_to_phys((unsigned long __force
) token
);
673 dev
= pci_get_device_by_addr(addr
);
675 __get_cpu_var(no_device
)++;
679 dn
= pci_device_to_OF_node(dev
);
680 eeh_dn_check_failure (dn
, dev
);
686 EXPORT_SYMBOL(eeh_check_failure
);
688 /* ------------------------------------------------------------- */
689 /* The code below deals with error recovery */
691 /** Return negative value if a permanent error, else return
692 * a number of milliseconds to wait until the PCI slot is
696 eeh_slot_availability(struct pci_dn
*pdn
)
701 rc
= read_slot_reset_state(pdn
, rets
);
705 if (rets
[1] == 0) return -1; /* EEH is not supported */
706 if (rets
[0] == 0) return 0; /* Oll Korrect */
708 if (rets
[2] == 0) return -1; /* permanently unavailable */
709 return rets
[2]; /* number of millisecs to wait */
714 /** rtas_pci_slot_reset raises/lowers the pci #RST line
715 * state: 1/0 to raise/lower the #RST
717 * Clear the EEH-frozen condition on a slot. This routine
718 * asserts the PCI #RST line if the 'state' argument is '1',
719 * and drops the #RST line if 'state is '0'. This routine is
720 * safe to call in an interrupt context.
725 rtas_pci_slot_reset(struct pci_dn
*pdn
, int state
)
732 printk (KERN_WARNING
"EEH: in slot reset, device node %s has no phb\n",
733 pdn
->node
->full_name
);
737 rc
= rtas_call(ibm_set_slot_reset
,4,1, NULL
,
738 pdn
->eeh_config_addr
,
739 BUID_HI(pdn
->phb
->buid
),
740 BUID_LO(pdn
->phb
->buid
),
743 printk (KERN_WARNING
"EEH: Unable to reset the failed slot, (%d) #RST=%d dn=%s\n",
744 rc
, state
, pdn
->node
->full_name
);
749 eeh_clear_slot (pdn
->node
->parent
->child
);
752 /** rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
753 * dn -- device node to be reset.
757 rtas_set_slot_reset(struct pci_dn
*pdn
)
761 rtas_pci_slot_reset (pdn
, 1);
763 /* The PCI bus requires that the reset be held high for at least
764 * a 100 milliseconds. We wait a bit longer 'just in case'. */
766 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
767 msleep (PCI_BUS_RST_HOLD_TIME_MSEC
);
768 rtas_pci_slot_reset (pdn
, 0);
770 /* After a PCI slot has been reset, the PCI Express spec requires
771 * a 1.5 second idle time for the bus to stabilize, before starting
773 #define PCI_BUS_SETTLE_TIME_MSEC 1800
774 msleep (PCI_BUS_SETTLE_TIME_MSEC
);
776 /* Now double check with the firmware to make sure the device is
777 * ready to be used; if not, wait for recovery. */
778 for (i
=0; i
<10; i
++) {
779 rc
= eeh_slot_availability (pdn
);
786 /* ------------------------------------------------------- */
787 /** Save and restore of PCI BARs
789 * Although firmware will set up BARs during boot, it doesn't
790 * set up device BAR's after a device reset, although it will,
791 * if requested, set up bridge configuration. Thus, we need to
792 * configure the PCI devices ourselves.
796 * __restore_bars - Restore the Base Address Registers
797 * Loads the PCI configuration space base address registers,
798 * the expansion ROM base address, the latency timer, and etc.
799 * from the saved values in the device node.
801 static inline void __restore_bars (struct pci_dn
*pdn
)
805 if (NULL
==pdn
->phb
) return;
806 for (i
=4; i
<10; i
++) {
807 rtas_write_config(pdn
, i
*4, 4, pdn
->config_space
[i
]);
810 /* 12 == Expansion ROM Address */
811 rtas_write_config(pdn
, 12*4, 4, pdn
->config_space
[12]);
813 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
814 #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
816 rtas_write_config (pdn
, PCI_CACHE_LINE_SIZE
, 1,
817 SAVED_BYTE(PCI_CACHE_LINE_SIZE
));
819 rtas_write_config (pdn
, PCI_LATENCY_TIMER
, 1,
820 SAVED_BYTE(PCI_LATENCY_TIMER
));
822 /* max latency, min grant, interrupt pin and line */
823 rtas_write_config(pdn
, 15*4, 4, pdn
->config_space
[15]);
827 * eeh_restore_bars - restore the PCI config space info
829 * This routine performs a recursive walk to the children
830 * of this device as well.
832 void eeh_restore_bars(struct pci_dn
*pdn
)
834 struct device_node
*dn
;
838 if (! pdn
->eeh_is_bridge
)
839 __restore_bars (pdn
);
841 dn
= pdn
->node
->child
;
843 eeh_restore_bars (PCI_DN(dn
));
849 * eeh_save_bars - save device bars
851 * Save the values of the device bars. Unlike the restore
852 * routine, this routine is *not* recursive. This is because
853 * PCI devices are added individuallly; but, for the restore,
854 * an entire slot is reset at a time.
856 static void eeh_save_bars(struct pci_dev
* pdev
, struct pci_dn
*pdn
)
863 for (i
= 0; i
< 16; i
++)
864 pci_read_config_dword(pdev
, i
* 4, &pdn
->config_space
[i
]);
866 if (pdev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
)
867 pdn
->eeh_is_bridge
= 1;
871 rtas_configure_bridge(struct pci_dn
*pdn
)
873 int token
= rtas_token ("ibm,configure-bridge");
876 if (token
== RTAS_UNKNOWN_SERVICE
)
878 rc
= rtas_call(token
,3,1, NULL
,
879 pdn
->eeh_config_addr
,
880 BUID_HI(pdn
->phb
->buid
),
881 BUID_LO(pdn
->phb
->buid
));
883 printk (KERN_WARNING
"EEH: Unable to configure device bridge (%d) for %s\n",
884 rc
, pdn
->node
->full_name
);
888 /* ------------------------------------------------------------- */
889 /* The code below deals with enabling EEH for devices during the
890 * early boot sequence. EEH must be enabled before any PCI probing
896 struct eeh_early_enable_info
{
897 unsigned int buid_hi
;
898 unsigned int buid_lo
;
901 /* Enable eeh for the given device node. */
902 static void *early_enable_eeh(struct device_node
*dn
, void *data
)
904 struct eeh_early_enable_info
*info
= data
;
906 char *status
= get_property(dn
, "status", NULL
);
907 u32
*class_code
= (u32
*)get_property(dn
, "class-code", NULL
);
908 u32
*vendor_id
= (u32
*)get_property(dn
, "vendor-id", NULL
);
909 u32
*device_id
= (u32
*)get_property(dn
, "device-id", NULL
);
912 struct pci_dn
*pdn
= PCI_DN(dn
);
915 pdn
->eeh_check_count
= 0;
916 pdn
->eeh_freeze_count
= 0;
918 if (status
&& strcmp(status
, "ok") != 0)
919 return NULL
; /* ignore devices with bad status */
921 /* Ignore bad nodes. */
922 if (!class_code
|| !vendor_id
|| !device_id
)
925 /* There is nothing to check on PCI to ISA bridges */
926 if (dn
->type
&& !strcmp(dn
->type
, "isa")) {
927 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
932 * Now decide if we are going to "Disable" EEH checking
933 * for this device. We still run with the EEH hardware active,
934 * but we won't be checking for ff's. This means a driver
935 * could return bad data (very bad!), an interrupt handler could
936 * hang waiting on status bits that won't change, etc.
937 * But there are a few cases like display devices that make sense.
939 enable
= 1; /* i.e. we will do checking */
940 if ((*class_code
>> 16) == PCI_BASE_CLASS_DISPLAY
)
944 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
946 /* Ok... see if this device supports EEH. Some do, some don't,
947 * and the only way to find out is to check each and every one. */
948 regs
= (u32
*)get_property(dn
, "reg", NULL
);
950 /* First register entry is addr (00BBSS00) */
951 /* Try to enable eeh */
952 ret
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
953 regs
[0], info
->buid_hi
, info
->buid_lo
,
957 eeh_subsystem_enabled
= 1;
958 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
959 pdn
->eeh_config_addr
= regs
[0];
961 printk(KERN_DEBUG
"EEH: %s: eeh enabled\n", dn
->full_name
);
965 /* This device doesn't support EEH, but it may have an
966 * EEH parent, in which case we mark it as supported. */
967 if (dn
->parent
&& PCI_DN(dn
->parent
)
968 && (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
969 /* Parent supports EEH. */
970 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
971 pdn
->eeh_config_addr
= PCI_DN(dn
->parent
)->eeh_config_addr
;
976 printk(KERN_WARNING
"EEH: %s: unable to get reg property.\n",
984 * Initialize EEH by trying to enable it for all of the adapters in the system.
985 * As a side effect we can determine here if eeh is supported at all.
986 * Note that we leave EEH on so failed config cycles won't cause a machine
987 * check. If a user turns off EEH for a particular adapter they are really
988 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
989 * grant access to a slot if EEH isn't enabled, and so we always enable
990 * EEH for all slots/all devices.
992 * The eeh-force-off option disables EEH checking globally, for all slots.
993 * Even if force-off is set, the EEH hardware is still enabled, so that
994 * newer systems can boot.
996 void __init
eeh_init(void)
998 struct device_node
*phb
, *np
;
999 struct eeh_early_enable_info info
;
1001 spin_lock_init(&confirm_error_lock
);
1002 spin_lock_init(&slot_errbuf_lock
);
1004 np
= of_find_node_by_path("/rtas");
1008 ibm_set_eeh_option
= rtas_token("ibm,set-eeh-option");
1009 ibm_set_slot_reset
= rtas_token("ibm,set-slot-reset");
1010 ibm_read_slot_reset_state2
= rtas_token("ibm,read-slot-reset-state2");
1011 ibm_read_slot_reset_state
= rtas_token("ibm,read-slot-reset-state");
1012 ibm_slot_error_detail
= rtas_token("ibm,slot-error-detail");
1014 if (ibm_set_eeh_option
== RTAS_UNKNOWN_SERVICE
)
1017 eeh_error_buf_size
= rtas_token("rtas-error-log-max");
1018 if (eeh_error_buf_size
== RTAS_UNKNOWN_SERVICE
) {
1019 eeh_error_buf_size
= 1024;
1021 if (eeh_error_buf_size
> RTAS_ERROR_LOG_MAX
) {
1022 printk(KERN_WARNING
"EEH: rtas-error-log-max is bigger than allocated "
1023 "buffer ! (%d vs %d)", eeh_error_buf_size
, RTAS_ERROR_LOG_MAX
);
1024 eeh_error_buf_size
= RTAS_ERROR_LOG_MAX
;
1027 /* Enable EEH for all adapters. Note that eeh requires buid's */
1028 for (phb
= of_find_node_by_name(NULL
, "pci"); phb
;
1029 phb
= of_find_node_by_name(phb
, "pci")) {
1032 buid
= get_phb_buid(phb
);
1033 if (buid
== 0 || PCI_DN(phb
) == NULL
)
1036 info
.buid_lo
= BUID_LO(buid
);
1037 info
.buid_hi
= BUID_HI(buid
);
1038 traverse_pci_devices(phb
, early_enable_eeh
, &info
);
1041 if (eeh_subsystem_enabled
)
1042 printk(KERN_INFO
"EEH: PCI Enhanced I/O Error Handling Enabled\n");
1044 printk(KERN_WARNING
"EEH: No capable adapters found\n");
1048 * eeh_add_device_early - enable EEH for the indicated device_node
1049 * @dn: device node for which to set up EEH
1051 * This routine must be used to perform EEH initialization for PCI
1052 * devices that were added after system boot (e.g. hotplug, dlpar).
1053 * This routine must be called before any i/o is performed to the
1054 * adapter (inluding any config-space i/o).
1055 * Whether this actually enables EEH or not for this device depends
1056 * on the CEC architecture, type of the device, on earlier boot
1057 * command-line arguments & etc.
1059 void eeh_add_device_early(struct device_node
*dn
)
1061 struct pci_controller
*phb
;
1062 struct eeh_early_enable_info info
;
1064 if (!dn
|| !PCI_DN(dn
))
1066 phb
= PCI_DN(dn
)->phb
;
1067 if (NULL
== phb
|| 0 == phb
->buid
) {
1068 printk(KERN_WARNING
"EEH: Expected buid but found none for %s\n",
1074 info
.buid_hi
= BUID_HI(phb
->buid
);
1075 info
.buid_lo
= BUID_LO(phb
->buid
);
1076 early_enable_eeh(dn
, &info
);
1078 EXPORT_SYMBOL_GPL(eeh_add_device_early
);
1081 * eeh_add_device_late - perform EEH initialization for the indicated pci device
1082 * @dev: pci device for which to set up EEH
1084 * This routine must be used to complete EEH initialization for PCI
1085 * devices that were added after system boot (e.g. hotplug, dlpar).
1087 void eeh_add_device_late(struct pci_dev
*dev
)
1089 struct device_node
*dn
;
1092 if (!dev
|| !eeh_subsystem_enabled
)
1096 printk(KERN_DEBUG
"EEH: adding device %s\n", pci_name(dev
));
1100 dn
= pci_device_to_OF_node(dev
);
1104 pci_addr_cache_insert_device (dev
);
1105 eeh_save_bars(dev
, pdn
);
1107 EXPORT_SYMBOL_GPL(eeh_add_device_late
);
1110 * eeh_remove_device - undo EEH setup for the indicated pci device
1111 * @dev: pci device to be removed
1113 * This routine should be when a device is removed from a running
1114 * system (e.g. by hotplug or dlpar).
1116 void eeh_remove_device(struct pci_dev
*dev
)
1118 struct device_node
*dn
;
1119 if (!dev
|| !eeh_subsystem_enabled
)
1122 /* Unregister the device with the EEH/PCI address search system */
1124 printk(KERN_DEBUG
"EEH: remove device %s\n", pci_name(dev
));
1126 pci_addr_cache_remove_device(dev
);
1128 dn
= pci_device_to_OF_node(dev
);
1129 PCI_DN(dn
)->pcidev
= NULL
;
1132 EXPORT_SYMBOL_GPL(eeh_remove_device
);
1134 static int proc_eeh_show(struct seq_file
*m
, void *v
)
1137 unsigned long ffs
= 0, positives
= 0, failures
= 0;
1138 unsigned long resets
= 0;
1139 unsigned long no_dev
= 0, no_dn
= 0, no_cfg
= 0, no_check
= 0;
1142 ffs
+= per_cpu(total_mmio_ffs
, cpu
);
1143 positives
+= per_cpu(false_positives
, cpu
);
1144 failures
+= per_cpu(ignored_failures
, cpu
);
1145 resets
+= per_cpu(slot_resets
, cpu
);
1146 no_dev
+= per_cpu(no_device
, cpu
);
1147 no_dn
+= per_cpu(no_dn
, cpu
);
1148 no_cfg
+= per_cpu(no_cfg_addr
, cpu
);
1149 no_check
+= per_cpu(ignored_check
, cpu
);
1152 if (0 == eeh_subsystem_enabled
) {
1153 seq_printf(m
, "EEH Subsystem is globally disabled\n");
1154 seq_printf(m
, "eeh_total_mmio_ffs=%ld\n", ffs
);
1156 seq_printf(m
, "EEH Subsystem is enabled\n");
1159 "no device node=%ld\n"
1160 "no config address=%ld\n"
1161 "check not wanted=%ld\n"
1162 "eeh_total_mmio_ffs=%ld\n"
1163 "eeh_false_positives=%ld\n"
1164 "eeh_ignored_failures=%ld\n"
1165 "eeh_slot_resets=%ld\n",
1166 no_dev
, no_dn
, no_cfg
, no_check
,
1167 ffs
, positives
, failures
, resets
);
1173 static int proc_eeh_open(struct inode
*inode
, struct file
*file
)
1175 return single_open(file
, proc_eeh_show
, NULL
);
1178 static struct file_operations proc_eeh_operations
= {
1179 .open
= proc_eeh_open
,
1181 .llseek
= seq_lseek
,
1182 .release
= single_release
,
1185 static int __init
eeh_init_proc(void)
1187 struct proc_dir_entry
*e
;
1189 if (systemcfg
->platform
& PLATFORM_PSERIES
) {
1190 e
= create_proc_entry("ppc64/eeh", 0, NULL
);
1192 e
->proc_fops
= &proc_eeh_operations
;
1197 __initcall(eeh_init_proc
);