2 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
4 * May be copied or modified under the terms of the GNU General Public License
7 * 00:12.0 Unknown mass storage controller:
8 * Triones Technologies, Inc.
9 * Unknown device 0003 (rev 01)
11 * hde: UDMA 2 (0x0000 0x0002) (0x0000 0x0010)
12 * hdf: UDMA 2 (0x0002 0x0012) (0x0010 0x0030)
13 * hde: DMA 2 (0x0000 0x0002) (0x0000 0x0010)
14 * hdf: DMA 2 (0x0002 0x0012) (0x0010 0x0030)
15 * hdg: DMA 1 (0x0012 0x0052) (0x0030 0x0070)
16 * hdh: DMA 1 (0x0052 0x0252) (0x0070 0x00f0)
20 * Since there are two cards that report almost identically,
21 * the only discernable difference is the values reported in pcicmd.
22 * Booting-BIOS card or HPT363 :: pcicmd == 0x07
23 * Non-bootable card or HPT343 :: pcicmd == 0x05
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/kernel.h>
29 #include <linux/ioport.h>
30 #include <linux/hdreg.h>
31 #include <linux/interrupt.h>
32 #include <linux/pci.h>
33 #include <linux/init.h>
34 #include <linux/ide.h>
36 #define DRV_NAME "hpt34x"
38 #define HPT343_DEBUG_DRIVE_INFO 0
40 static void hpt34x_set_mode(ide_drive_t
*drive
, const u8 speed
)
42 struct pci_dev
*dev
= to_pci_dev(drive
->hwif
->dev
);
43 u32 reg1
= 0, tmp1
= 0, reg2
= 0, tmp2
= 0;
44 u8 hi_speed
, lo_speed
;
46 hi_speed
= speed
>> 4;
47 lo_speed
= speed
& 0x0f;
50 hi_speed
= (hi_speed
& 4) ? 0x01 : 0x10;
56 pci_read_config_dword(dev
, 0x44, ®1
);
57 pci_read_config_dword(dev
, 0x48, ®2
);
58 tmp1
= ((lo_speed
<< (3*drive
->dn
)) | (reg1
& ~(7 << (3*drive
->dn
))));
59 tmp2
= ((hi_speed
<< drive
->dn
) | (reg2
& ~(0x11 << drive
->dn
)));
60 pci_write_config_dword(dev
, 0x44, tmp1
);
61 pci_write_config_dword(dev
, 0x48, tmp2
);
63 #if HPT343_DEBUG_DRIVE_INFO
64 printk("%s: %s drive%d (0x%04x 0x%04x) (0x%04x 0x%04x)" \
66 drive
->name
, ide_xfer_verbose(speed
),
67 drive
->dn
, reg1
, tmp1
, reg2
, tmp2
,
69 #endif /* HPT343_DEBUG_DRIVE_INFO */
72 static void hpt34x_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
74 hpt34x_set_mode(drive
, XFER_PIO_0
+ pio
);
78 * If the BIOS does not set the IO base addaress to XX00, 343 will fail.
80 #define HPT34X_PCI_INIT_REG 0x80
82 static unsigned int __devinit
init_chipset_hpt34x(struct pci_dev
*dev
)
85 unsigned long hpt34xIoBase
= pci_resource_start(dev
, 4);
86 unsigned long hpt_addr
[4] = { 0x20, 0x34, 0x28, 0x3c };
87 unsigned long hpt_addr_len
[4] = { 7, 3, 7, 3 };
91 local_irq_save(flags
);
93 pci_write_config_byte(dev
, HPT34X_PCI_INIT_REG
, 0x00);
94 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
96 if (cmd
& PCI_COMMAND_MEMORY
)
97 pci_write_config_byte(dev
, PCI_LATENCY_TIMER
, 0xF0);
99 pci_write_config_byte(dev
, PCI_LATENCY_TIMER
, 0x20);
102 * Since 20-23 can be assigned and are R/W, we correct them.
104 pci_write_config_word(dev
, PCI_COMMAND
, cmd
& ~PCI_COMMAND_IO
);
106 dev
->resource
[i
].start
= (hpt34xIoBase
+ hpt_addr
[i
]);
107 dev
->resource
[i
].end
= dev
->resource
[i
].start
+ hpt_addr_len
[i
];
108 dev
->resource
[i
].flags
= IORESOURCE_IO
;
109 pci_write_config_dword(dev
,
110 (PCI_BASE_ADDRESS_0
+ (i
* 4)),
111 dev
->resource
[i
].start
);
113 pci_write_config_word(dev
, PCI_COMMAND
, cmd
);
115 local_irq_restore(flags
);
120 static const struct ide_port_ops hpt34x_port_ops
= {
121 .set_pio_mode
= hpt34x_set_pio_mode
,
122 .set_dma_mode
= hpt34x_set_mode
,
125 #define IDE_HFLAGS_HPT34X \
126 (IDE_HFLAG_NO_ATAPI_DMA | \
128 IDE_HFLAG_NO_AUTODMA)
130 static const struct ide_port_info hpt34x_chipsets
[] __devinitdata
= {
133 .init_chipset
= init_chipset_hpt34x
,
134 .port_ops
= &hpt34x_port_ops
,
135 .host_flags
= IDE_HFLAGS_HPT34X
| IDE_HFLAG_NON_BOOTABLE
,
136 .pio_mask
= ATA_PIO5
,
140 .init_chipset
= init_chipset_hpt34x
,
141 .port_ops
= &hpt34x_port_ops
,
142 .host_flags
= IDE_HFLAGS_HPT34X
| IDE_HFLAG_OFF_BOARD
,
143 .pio_mask
= ATA_PIO5
,
144 #ifdef CONFIG_HPT34X_AUTODMA
145 .swdma_mask
= ATA_SWDMA2
,
146 .mwdma_mask
= ATA_MWDMA2
,
147 .udma_mask
= ATA_UDMA2
,
152 static int __devinit
hpt34x_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
154 const struct ide_port_info
*d
;
157 pci_read_config_word(dev
, PCI_COMMAND
, &pcicmd
);
159 d
= &hpt34x_chipsets
[(pcicmd
& PCI_COMMAND_MEMORY
) ? 1 : 0];
161 return ide_pci_init_one(dev
, d
, NULL
);
164 static const struct pci_device_id hpt34x_pci_tbl
[] = {
165 { PCI_VDEVICE(TTI
, PCI_DEVICE_ID_TTI_HPT343
), 0 },
168 MODULE_DEVICE_TABLE(pci
, hpt34x_pci_tbl
);
170 static struct pci_driver driver
= {
171 .name
= "HPT34x_IDE",
172 .id_table
= hpt34x_pci_tbl
,
173 .probe
= hpt34x_init_one
,
174 .remove
= ide_pci_remove
,
177 static int __init
hpt34x_ide_init(void)
179 return ide_pci_register_driver(&driver
);
182 static void __exit
hpt34x_ide_exit(void)
184 pci_unregister_driver(&driver
);
187 module_init(hpt34x_ide_init
);
188 module_exit(hpt34x_ide_exit
);
190 MODULE_AUTHOR("Andre Hedrick");
191 MODULE_DESCRIPTION("PCI driver module for Highpoint 34x IDE");
192 MODULE_LICENSE("GPL");