arch/arm/mach-davinci/include/mach/gpio-davinci.h

   1 /*
   2  * TI DaVinci GPIO Support
   3  *
   4  * Copyright (c) 2006 David Brownell
   5  * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  */
  12
  13 #ifndef __DAVINCI_DAVINCI_GPIO_H
  14 #define __DAVINCI_DAVINCI_GPIO_H
  15
  16 #include <linux/io.h>
  17 #include <linux/spinlock.h>
  18
  19 #include <asm-generic/gpio.h>
  20
  21 #include <mach/irqs.h>
  22 #include <mach/common.h>
  23
  24 enum davinci_gpio_type {
  25         GPIO_TYPE_DAVINCI = 0,
  26         GPIO_TYPE_TNETV107X,
  27 };
  28
  29 /*
  30  * basic gpio routines
  31  *
  32  * board-specific init should be done by arch/.../.../board-XXX.c (maybe
  33  * initializing banks together) rather than boot loaders; kexec() won't
  34  * go through boot loaders.
  35  *
  36  * the gpio clock will be turned on when gpios are used, and you may also
  37  * need to pay attention to PINMUX registers to be sure those pins are
  38  * used as gpios, not with other peripherals.
  39  *
  40  * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1).  For documentation,
  41  * and maybe for later updates, code may write GPIO(N).  These may be
  42  * all 1.8V signals, all 3.3V ones, or a mix of the two.  A given chip
  43  * may not support all the GPIOs in that range.
  44  *
  45  * GPIOs can also be on external chips, numbered after the ones built-in
  46  * to the DaVinci chip.  For now, they won't be usable as IRQ sources.
  47  */
  48 #define GPIO(X)         (X)             /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
  49
  50 /* Convert GPIO signal to GPIO pin number */
  51 #define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
  52
  53 struct davinci_gpio_controller {
  54         struct gpio_chip        chip;
  55         int                     irq_base;
  56         spinlock_t              lock;
  57         void __iomem            *regs;
  58         void __iomem            *set_data;
  59         void __iomem            *clr_data;
  60         void __iomem            *in_data;
  61         unsigned                gpio_irq;
  62 };
  63
  64 /* The __gpio_to_controller() and __gpio_mask() functions inline to constants
  65  * with constant parameters; or in outlined code they execute at runtime.
  66  *
  67  * You'd access the controller directly when reading or writing more than
  68  * one gpio value at a time, and to support wired logic where the value
  69  * being driven by the cpu need not match the value read back.
  70  *
  71  * These are NOT part of the cross-platform GPIO interface
  72  */
  73 static inline struct davinci_gpio_controller *
  74 __gpio_to_controller(unsigned gpio)
  75 {
  76         struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
  77         int index = gpio / 32;
  78
  79         if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
  80                 return NULL;
  81
  82         return ctlrs + index;
  83 }
  84
  85 static inline u32 __gpio_mask(unsigned gpio)
  86 {
  87         return 1 << (gpio % 32);
  88 }
  89
  90 #endif  /* __DAVINCI_DAVINCI_GPIO_H */