IB/qib: checkpatch fixes
[linux-2.6.git] / drivers / infiniband / hw / qib / qib_driver.c
blobe41e7f7fc763e8ad3659f9060e2efab5f911c317
1 /*
2 * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
3 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
34 #include <linux/spinlock.h>
35 #include <linux/pci.h>
36 #include <linux/io.h>
37 #include <linux/delay.h>
38 #include <linux/netdevice.h>
39 #include <linux/vmalloc.h>
40 #include <linux/module.h>
41 #include <linux/prefetch.h>
43 #include "qib.h"
46 * The size has to be longer than this string, so we can append
47 * board/chip information to it in the init code.
49 const char ib_qib_version[] = QIB_IDSTR "\n";
51 DEFINE_SPINLOCK(qib_devs_lock);
52 LIST_HEAD(qib_dev_list);
53 DEFINE_MUTEX(qib_mutex); /* general driver use */
55 unsigned qib_ibmtu;
56 module_param_named(ibmtu, qib_ibmtu, uint, S_IRUGO);
57 MODULE_PARM_DESC(ibmtu, "Set max IB MTU (0=2KB, 1=256, 2=512, ... 5=4096");
59 unsigned qib_compat_ddr_negotiate = 1;
60 module_param_named(compat_ddr_negotiate, qib_compat_ddr_negotiate, uint,
61 S_IWUSR | S_IRUGO);
62 MODULE_PARM_DESC(compat_ddr_negotiate,
63 "Attempt pre-IBTA 1.2 DDR speed negotiation");
65 MODULE_LICENSE("Dual BSD/GPL");
66 MODULE_AUTHOR("QLogic <support@qlogic.com>");
67 MODULE_DESCRIPTION("QLogic IB driver");
70 * QIB_PIO_MAXIBHDR is the max IB header size allowed for in our
71 * PIO send buffers. This is well beyond anything currently
72 * defined in the InfiniBand spec.
74 #define QIB_PIO_MAXIBHDR 128
77 * QIB_MAX_PKT_RCV is the max # if packets processed per receive interrupt.
79 #define QIB_MAX_PKT_RECV 64
81 struct qlogic_ib_stats qib_stats;
83 const char *qib_get_unit_name(int unit)
85 static char iname[16];
87 snprintf(iname, sizeof iname, "infinipath%u", unit);
88 return iname;
92 * Return count of units with at least one port ACTIVE.
94 int qib_count_active_units(void)
96 struct qib_devdata *dd;
97 struct qib_pportdata *ppd;
98 unsigned long flags;
99 int pidx, nunits_active = 0;
101 spin_lock_irqsave(&qib_devs_lock, flags);
102 list_for_each_entry(dd, &qib_dev_list, list) {
103 if (!(dd->flags & QIB_PRESENT) || !dd->kregbase)
104 continue;
105 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
106 ppd = dd->pport + pidx;
107 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
108 QIBL_LINKARMED | QIBL_LINKACTIVE))) {
109 nunits_active++;
110 break;
114 spin_unlock_irqrestore(&qib_devs_lock, flags);
115 return nunits_active;
119 * Return count of all units, optionally return in arguments
120 * the number of usable (present) units, and the number of
121 * ports that are up.
123 int qib_count_units(int *npresentp, int *nupp)
125 int nunits = 0, npresent = 0, nup = 0;
126 struct qib_devdata *dd;
127 unsigned long flags;
128 int pidx;
129 struct qib_pportdata *ppd;
131 spin_lock_irqsave(&qib_devs_lock, flags);
133 list_for_each_entry(dd, &qib_dev_list, list) {
134 nunits++;
135 if ((dd->flags & QIB_PRESENT) && dd->kregbase)
136 npresent++;
137 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
138 ppd = dd->pport + pidx;
139 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
140 QIBL_LINKARMED | QIBL_LINKACTIVE)))
141 nup++;
145 spin_unlock_irqrestore(&qib_devs_lock, flags);
147 if (npresentp)
148 *npresentp = npresent;
149 if (nupp)
150 *nupp = nup;
152 return nunits;
156 * qib_wait_linkstate - wait for an IB link state change to occur
157 * @dd: the qlogic_ib device
158 * @state: the state to wait for
159 * @msecs: the number of milliseconds to wait
161 * wait up to msecs milliseconds for IB link state change to occur for
162 * now, take the easy polling route. Currently used only by
163 * qib_set_linkstate. Returns 0 if state reached, otherwise
164 * -ETIMEDOUT state can have multiple states set, for any of several
165 * transitions.
167 int qib_wait_linkstate(struct qib_pportdata *ppd, u32 state, int msecs)
169 int ret;
170 unsigned long flags;
172 spin_lock_irqsave(&ppd->lflags_lock, flags);
173 if (ppd->state_wanted) {
174 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
175 ret = -EBUSY;
176 goto bail;
178 ppd->state_wanted = state;
179 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
180 wait_event_interruptible_timeout(ppd->state_wait,
181 (ppd->lflags & state),
182 msecs_to_jiffies(msecs));
183 spin_lock_irqsave(&ppd->lflags_lock, flags);
184 ppd->state_wanted = 0;
185 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
187 if (!(ppd->lflags & state))
188 ret = -ETIMEDOUT;
189 else
190 ret = 0;
191 bail:
192 return ret;
195 int qib_set_linkstate(struct qib_pportdata *ppd, u8 newstate)
197 u32 lstate;
198 int ret;
199 struct qib_devdata *dd = ppd->dd;
200 unsigned long flags;
202 switch (newstate) {
203 case QIB_IB_LINKDOWN_ONLY:
204 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
205 IB_LINKCMD_DOWN | IB_LINKINITCMD_NOP);
206 /* don't wait */
207 ret = 0;
208 goto bail;
210 case QIB_IB_LINKDOWN:
211 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
212 IB_LINKCMD_DOWN | IB_LINKINITCMD_POLL);
213 /* don't wait */
214 ret = 0;
215 goto bail;
217 case QIB_IB_LINKDOWN_SLEEP:
218 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
219 IB_LINKCMD_DOWN | IB_LINKINITCMD_SLEEP);
220 /* don't wait */
221 ret = 0;
222 goto bail;
224 case QIB_IB_LINKDOWN_DISABLE:
225 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
226 IB_LINKCMD_DOWN | IB_LINKINITCMD_DISABLE);
227 /* don't wait */
228 ret = 0;
229 goto bail;
231 case QIB_IB_LINKARM:
232 if (ppd->lflags & QIBL_LINKARMED) {
233 ret = 0;
234 goto bail;
236 if (!(ppd->lflags & (QIBL_LINKINIT | QIBL_LINKACTIVE))) {
237 ret = -EINVAL;
238 goto bail;
241 * Since the port can be ACTIVE when we ask for ARMED,
242 * clear QIBL_LINKV so we can wait for a transition.
243 * If the link isn't ARMED, then something else happened
244 * and there is no point waiting for ARMED.
246 spin_lock_irqsave(&ppd->lflags_lock, flags);
247 ppd->lflags &= ~QIBL_LINKV;
248 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
249 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
250 IB_LINKCMD_ARMED | IB_LINKINITCMD_NOP);
251 lstate = QIBL_LINKV;
252 break;
254 case QIB_IB_LINKACTIVE:
255 if (ppd->lflags & QIBL_LINKACTIVE) {
256 ret = 0;
257 goto bail;
259 if (!(ppd->lflags & QIBL_LINKARMED)) {
260 ret = -EINVAL;
261 goto bail;
263 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
264 IB_LINKCMD_ACTIVE | IB_LINKINITCMD_NOP);
265 lstate = QIBL_LINKACTIVE;
266 break;
268 default:
269 ret = -EINVAL;
270 goto bail;
272 ret = qib_wait_linkstate(ppd, lstate, 10);
274 bail:
275 return ret;
279 * Get address of eager buffer from it's index (allocated in chunks, not
280 * contiguous).
282 static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail)
284 const u32 chunk = etail >> rcd->rcvegrbufs_perchunk_shift;
285 const u32 idx = etail & ((u32)rcd->rcvegrbufs_perchunk - 1);
287 return rcd->rcvegrbuf[chunk] + (idx << rcd->dd->rcvegrbufsize_shift);
291 * Returns 1 if error was a CRC, else 0.
292 * Needed for some chip's synthesized error counters.
294 static u32 qib_rcv_hdrerr(struct qib_ctxtdata *rcd, struct qib_pportdata *ppd,
295 u32 ctxt, u32 eflags, u32 l, u32 etail,
296 __le32 *rhf_addr, struct qib_message_header *rhdr)
298 u32 ret = 0;
300 if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR))
301 ret = 1;
302 else if (eflags == QLOGIC_IB_RHF_H_TIDERR) {
303 /* For TIDERR and RC QPs premptively schedule a NAK */
304 struct qib_ib_header *hdr = (struct qib_ib_header *) rhdr;
305 struct qib_other_headers *ohdr = NULL;
306 struct qib_ibport *ibp = &ppd->ibport_data;
307 struct qib_qp *qp = NULL;
308 u32 tlen = qib_hdrget_length_in_bytes(rhf_addr);
309 u16 lid = be16_to_cpu(hdr->lrh[1]);
310 int lnh = be16_to_cpu(hdr->lrh[0]) & 3;
311 u32 qp_num;
312 u32 opcode;
313 u32 psn;
314 int diff;
316 /* Sanity check packet */
317 if (tlen < 24)
318 goto drop;
320 if (lid < QIB_MULTICAST_LID_BASE) {
321 lid &= ~((1 << ppd->lmc) - 1);
322 if (unlikely(lid != ppd->lid))
323 goto drop;
326 /* Check for GRH */
327 if (lnh == QIB_LRH_BTH)
328 ohdr = &hdr->u.oth;
329 else if (lnh == QIB_LRH_GRH) {
330 u32 vtf;
332 ohdr = &hdr->u.l.oth;
333 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
334 goto drop;
335 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
336 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
337 goto drop;
338 } else
339 goto drop;
341 /* Get opcode and PSN from packet */
342 opcode = be32_to_cpu(ohdr->bth[0]);
343 opcode >>= 24;
344 psn = be32_to_cpu(ohdr->bth[2]);
346 /* Get the destination QP number. */
347 qp_num = be32_to_cpu(ohdr->bth[1]) & QIB_QPN_MASK;
348 if (qp_num != QIB_MULTICAST_QPN) {
349 int ruc_res;
350 qp = qib_lookup_qpn(ibp, qp_num);
351 if (!qp)
352 goto drop;
355 * Handle only RC QPs - for other QP types drop error
356 * packet.
358 spin_lock(&qp->r_lock);
360 /* Check for valid receive state. */
361 if (!(ib_qib_state_ops[qp->state] &
362 QIB_PROCESS_RECV_OK)) {
363 ibp->n_pkt_drops++;
364 goto unlock;
367 switch (qp->ibqp.qp_type) {
368 case IB_QPT_RC:
369 ruc_res =
370 qib_ruc_check_hdr(
371 ibp, hdr,
372 lnh == QIB_LRH_GRH,
374 be32_to_cpu(ohdr->bth[0]));
375 if (ruc_res)
376 goto unlock;
378 /* Only deal with RDMA Writes for now */
379 if (opcode <
380 IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
381 diff = qib_cmp24(psn, qp->r_psn);
382 if (!qp->r_nak_state && diff >= 0) {
383 ibp->n_rc_seqnak++;
384 qp->r_nak_state =
385 IB_NAK_PSN_ERROR;
386 /* Use the expected PSN. */
387 qp->r_ack_psn = qp->r_psn;
389 * Wait to send the sequence
390 * NAK until all packets
391 * in the receive queue have
392 * been processed.
393 * Otherwise, we end up
394 * propagating congestion.
396 if (list_empty(&qp->rspwait)) {
397 qp->r_flags |=
398 QIB_R_RSP_NAK;
399 atomic_inc(
400 &qp->refcount);
401 list_add_tail(
402 &qp->rspwait,
403 &rcd->qp_wait_list);
405 } /* Out of sequence NAK */
406 } /* QP Request NAKs */
407 break;
408 case IB_QPT_SMI:
409 case IB_QPT_GSI:
410 case IB_QPT_UD:
411 case IB_QPT_UC:
412 default:
413 /* For now don't handle any other QP types */
414 break;
417 unlock:
418 spin_unlock(&qp->r_lock);
420 * Notify qib_destroy_qp() if it is waiting
421 * for us to finish.
423 if (atomic_dec_and_test(&qp->refcount))
424 wake_up(&qp->wait);
425 } /* Unicast QP */
426 } /* Valid packet with TIDErr */
428 drop:
429 return ret;
433 * qib_kreceive - receive a packet
434 * @rcd: the qlogic_ib context
435 * @llic: gets count of good packets needed to clear lli,
436 * (used with chips that need need to track crcs for lli)
438 * called from interrupt handler for errors or receive interrupt
439 * Returns number of CRC error packets, needed by some chips for
440 * local link integrity tracking. crcs are adjusted down by following
441 * good packets, if any, and count of good packets is also tracked.
443 u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts)
445 struct qib_devdata *dd = rcd->dd;
446 struct qib_pportdata *ppd = rcd->ppd;
447 __le32 *rhf_addr;
448 void *ebuf;
449 const u32 rsize = dd->rcvhdrentsize; /* words */
450 const u32 maxcnt = dd->rcvhdrcnt * rsize; /* words */
451 u32 etail = -1, l, hdrqtail;
452 struct qib_message_header *hdr;
453 u32 eflags, etype, tlen, i = 0, updegr = 0, crcs = 0;
454 int last;
455 u64 lval;
456 struct qib_qp *qp, *nqp;
458 l = rcd->head;
459 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
460 if (dd->flags & QIB_NODMA_RTAIL) {
461 u32 seq = qib_hdrget_seq(rhf_addr);
462 if (seq != rcd->seq_cnt)
463 goto bail;
464 hdrqtail = 0;
465 } else {
466 hdrqtail = qib_get_rcvhdrtail(rcd);
467 if (l == hdrqtail)
468 goto bail;
469 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
472 for (last = 0, i = 1; !last; i += !last) {
473 hdr = dd->f_get_msgheader(dd, rhf_addr);
474 eflags = qib_hdrget_err_flags(rhf_addr);
475 etype = qib_hdrget_rcv_type(rhf_addr);
476 /* total length */
477 tlen = qib_hdrget_length_in_bytes(rhf_addr);
478 ebuf = NULL;
479 if ((dd->flags & QIB_NODMA_RTAIL) ?
480 qib_hdrget_use_egr_buf(rhf_addr) :
481 (etype != RCVHQ_RCV_TYPE_EXPECTED)) {
482 etail = qib_hdrget_index(rhf_addr);
483 updegr = 1;
484 if (tlen > sizeof(*hdr) ||
485 etype >= RCVHQ_RCV_TYPE_NON_KD) {
486 ebuf = qib_get_egrbuf(rcd, etail);
487 prefetch_range(ebuf, tlen - sizeof(*hdr));
490 if (!eflags) {
491 u16 lrh_len = be16_to_cpu(hdr->lrh[2]) << 2;
493 if (lrh_len != tlen) {
494 qib_stats.sps_lenerrs++;
495 goto move_along;
498 if (etype == RCVHQ_RCV_TYPE_NON_KD && !eflags &&
499 ebuf == NULL &&
500 tlen > (dd->rcvhdrentsize - 2 + 1 -
501 qib_hdrget_offset(rhf_addr)) << 2) {
502 goto move_along;
506 * Both tiderr and qibhdrerr are set for all plain IB
507 * packets; only qibhdrerr should be set.
509 if (unlikely(eflags))
510 crcs += qib_rcv_hdrerr(rcd, ppd, rcd->ctxt, eflags, l,
511 etail, rhf_addr, hdr);
512 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
513 qib_ib_rcv(rcd, hdr, ebuf, tlen);
514 if (crcs)
515 crcs--;
516 else if (llic && *llic)
517 --*llic;
519 move_along:
520 l += rsize;
521 if (l >= maxcnt)
522 l = 0;
523 if (i == QIB_MAX_PKT_RECV)
524 last = 1;
526 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
527 if (dd->flags & QIB_NODMA_RTAIL) {
528 u32 seq = qib_hdrget_seq(rhf_addr);
530 if (++rcd->seq_cnt > 13)
531 rcd->seq_cnt = 1;
532 if (seq != rcd->seq_cnt)
533 last = 1;
534 } else if (l == hdrqtail)
535 last = 1;
537 * Update head regs etc., every 16 packets, if not last pkt,
538 * to help prevent rcvhdrq overflows, when many packets
539 * are processed and queue is nearly full.
540 * Don't request an interrupt for intermediate updates.
542 lval = l;
543 if (!last && !(i & 0xf)) {
544 dd->f_update_usrhead(rcd, lval, updegr, etail, i);
545 updegr = 0;
549 * Notify qib_destroy_qp() if it is waiting
550 * for lookaside_qp to finish.
552 if (rcd->lookaside_qp) {
553 if (atomic_dec_and_test(&rcd->lookaside_qp->refcount))
554 wake_up(&rcd->lookaside_qp->wait);
555 rcd->lookaside_qp = NULL;
558 rcd->head = l;
559 rcd->pkt_count += i;
562 * Iterate over all QPs waiting to respond.
563 * The list won't change since the IRQ is only run on one CPU.
565 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
566 list_del_init(&qp->rspwait);
567 if (qp->r_flags & QIB_R_RSP_NAK) {
568 qp->r_flags &= ~QIB_R_RSP_NAK;
569 qib_send_rc_ack(qp);
571 if (qp->r_flags & QIB_R_RSP_SEND) {
572 unsigned long flags;
574 qp->r_flags &= ~QIB_R_RSP_SEND;
575 spin_lock_irqsave(&qp->s_lock, flags);
576 if (ib_qib_state_ops[qp->state] &
577 QIB_PROCESS_OR_FLUSH_SEND)
578 qib_schedule_send(qp);
579 spin_unlock_irqrestore(&qp->s_lock, flags);
581 if (atomic_dec_and_test(&qp->refcount))
582 wake_up(&qp->wait);
585 bail:
586 /* Report number of packets consumed */
587 if (npkts)
588 *npkts = i;
591 * Always write head at end, and setup rcv interrupt, even
592 * if no packets were processed.
594 lval = (u64)rcd->head | dd->rhdrhead_intr_off;
595 dd->f_update_usrhead(rcd, lval, updegr, etail, i);
596 return crcs;
600 * qib_set_mtu - set the MTU
601 * @ppd: the perport data
602 * @arg: the new MTU
604 * We can handle "any" incoming size, the issue here is whether we
605 * need to restrict our outgoing size. For now, we don't do any
606 * sanity checking on this, and we don't deal with what happens to
607 * programs that are already running when the size changes.
608 * NOTE: changing the MTU will usually cause the IBC to go back to
609 * link INIT state...
611 int qib_set_mtu(struct qib_pportdata *ppd, u16 arg)
613 u32 piosize;
614 int ret, chk;
616 if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
617 arg != 4096) {
618 ret = -EINVAL;
619 goto bail;
621 chk = ib_mtu_enum_to_int(qib_ibmtu);
622 if (chk > 0 && arg > chk) {
623 ret = -EINVAL;
624 goto bail;
627 piosize = ppd->ibmaxlen;
628 ppd->ibmtu = arg;
630 if (arg >= (piosize - QIB_PIO_MAXIBHDR)) {
631 /* Only if it's not the initial value (or reset to it) */
632 if (piosize != ppd->init_ibmaxlen) {
633 if (arg > piosize && arg <= ppd->init_ibmaxlen)
634 piosize = ppd->init_ibmaxlen - 2 * sizeof(u32);
635 ppd->ibmaxlen = piosize;
637 } else if ((arg + QIB_PIO_MAXIBHDR) != ppd->ibmaxlen) {
638 piosize = arg + QIB_PIO_MAXIBHDR - 2 * sizeof(u32);
639 ppd->ibmaxlen = piosize;
642 ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_MTU, 0);
644 ret = 0;
646 bail:
647 return ret;
650 int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc)
652 struct qib_devdata *dd = ppd->dd;
653 ppd->lid = lid;
654 ppd->lmc = lmc;
656 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LIDLMC,
657 lid | (~((1U << lmc) - 1)) << 16);
659 qib_devinfo(dd->pcidev, "IB%u:%u got a lid: 0x%x\n",
660 dd->unit, ppd->port, lid);
662 return 0;
666 * Following deal with the "obviously simple" task of overriding the state
667 * of the LEDS, which normally indicate link physical and logical status.
668 * The complications arise in dealing with different hardware mappings
669 * and the board-dependent routine being called from interrupts.
670 * and then there's the requirement to _flash_ them.
672 #define LED_OVER_FREQ_SHIFT 8
673 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
674 /* Below is "non-zero" to force override, but both actual LEDs are off */
675 #define LED_OVER_BOTH_OFF (8)
677 static void qib_run_led_override(unsigned long opaque)
679 struct qib_pportdata *ppd = (struct qib_pportdata *)opaque;
680 struct qib_devdata *dd = ppd->dd;
681 int timeoff;
682 int ph_idx;
684 if (!(dd->flags & QIB_INITTED))
685 return;
687 ph_idx = ppd->led_override_phase++ & 1;
688 ppd->led_override = ppd->led_override_vals[ph_idx];
689 timeoff = ppd->led_override_timeoff;
691 dd->f_setextled(ppd, 1);
693 * don't re-fire the timer if user asked for it to be off; we let
694 * it fire one more time after they turn it off to simplify
696 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
697 mod_timer(&ppd->led_override_timer, jiffies + timeoff);
700 void qib_set_led_override(struct qib_pportdata *ppd, unsigned int val)
702 struct qib_devdata *dd = ppd->dd;
703 int timeoff, freq;
705 if (!(dd->flags & QIB_INITTED))
706 return;
708 /* First check if we are blinking. If not, use 1HZ polling */
709 timeoff = HZ;
710 freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
712 if (freq) {
713 /* For blink, set each phase from one nybble of val */
714 ppd->led_override_vals[0] = val & 0xF;
715 ppd->led_override_vals[1] = (val >> 4) & 0xF;
716 timeoff = (HZ << 4)/freq;
717 } else {
718 /* Non-blink set both phases the same. */
719 ppd->led_override_vals[0] = val & 0xF;
720 ppd->led_override_vals[1] = val & 0xF;
722 ppd->led_override_timeoff = timeoff;
725 * If the timer has not already been started, do so. Use a "quick"
726 * timeout so the function will be called soon, to look at our request.
728 if (atomic_inc_return(&ppd->led_override_timer_active) == 1) {
729 /* Need to start timer */
730 init_timer(&ppd->led_override_timer);
731 ppd->led_override_timer.function = qib_run_led_override;
732 ppd->led_override_timer.data = (unsigned long) ppd;
733 ppd->led_override_timer.expires = jiffies + 1;
734 add_timer(&ppd->led_override_timer);
735 } else {
736 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
737 mod_timer(&ppd->led_override_timer, jiffies + 1);
738 atomic_dec(&ppd->led_override_timer_active);
743 * qib_reset_device - reset the chip if possible
744 * @unit: the device to reset
746 * Whether or not reset is successful, we attempt to re-initialize the chip
747 * (that is, much like a driver unload/reload). We clear the INITTED flag
748 * so that the various entry points will fail until we reinitialize. For
749 * now, we only allow this if no user contexts are open that use chip resources
751 int qib_reset_device(int unit)
753 int ret, i;
754 struct qib_devdata *dd = qib_lookup(unit);
755 struct qib_pportdata *ppd;
756 unsigned long flags;
757 int pidx;
759 if (!dd) {
760 ret = -ENODEV;
761 goto bail;
764 qib_devinfo(dd->pcidev, "Reset on unit %u requested\n", unit);
766 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) {
767 qib_devinfo(dd->pcidev,
768 "Invalid unit number %u or not initialized or not present\n",
769 unit);
770 ret = -ENXIO;
771 goto bail;
774 spin_lock_irqsave(&dd->uctxt_lock, flags);
775 if (dd->rcd)
776 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
777 if (!dd->rcd[i] || !dd->rcd[i]->cnt)
778 continue;
779 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
780 ret = -EBUSY;
781 goto bail;
783 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
785 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
786 ppd = dd->pport + pidx;
787 if (atomic_read(&ppd->led_override_timer_active)) {
788 /* Need to stop LED timer, _then_ shut off LEDs */
789 del_timer_sync(&ppd->led_override_timer);
790 atomic_set(&ppd->led_override_timer_active, 0);
793 /* Shut off LEDs after we are sure timer is not running */
794 ppd->led_override = LED_OVER_BOTH_OFF;
795 dd->f_setextled(ppd, 0);
796 if (dd->flags & QIB_HAS_SEND_DMA)
797 qib_teardown_sdma(ppd);
800 ret = dd->f_reset(dd);
801 if (ret == 1)
802 ret = qib_init(dd, 1);
803 else
804 ret = -EAGAIN;
805 if (ret)
806 qib_dev_err(dd,
807 "Reinitialize unit %u after reset failed with %d\n",
808 unit, ret);
809 else
810 qib_devinfo(dd->pcidev,
811 "Reinitialized unit %u after resetting\n",
812 unit);
814 bail:
815 return ret;