arch/arm/mach-omap2/mux.c

   1 /*
   2  * linux/arch/arm/mach-omap2/mux.c
   3  *
   4  * OMAP1 pin multiplexing configurations
   5  *
   6  * Copyright (C) 2003 - 2005 Nokia Corporation
   7  *
   8  * Written by Tony Lindgren <tony.lindgren@nokia.com>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23  *
  24  */
  25 #include <linux/module.h>
  26 #include <linux/init.h>
  27 #include <asm/system.h>
  28 #include <asm/io.h>
  29 #include <linux/spinlock.h>
  30
  31 #include <asm/arch/mux.h>
  32
  33 #ifdef CONFIG_OMAP_MUX
  34
  35 static struct omap_mux_cfg arch_mux_cfg;
  36
  37 /* NOTE: See mux.h for the enumeration */
  38
  39 struct pin_config __initdata_or_module omap24xx_pins[] = {
  40 /*
  41  *      description                     mux     mux     pull    pull    debug
  42  *                                      offset  mode    ena     type
  43  */
  44
  45 /* 24xx I2C */
  46 MUX_CFG_24XX("M19_24XX_I2C1_SCL",       0x111,  0,      0,      0,      1)
  47 MUX_CFG_24XX("L15_24XX_I2C1_SDA",       0x112,  0,      0,      0,      1)
  48 MUX_CFG_24XX("J15_24XX_I2C2_SCL",       0x113,  0,      0,      1,      1)
  49 MUX_CFG_24XX("H19_24XX_I2C2_SDA",       0x114,  0,      0,      0,      1)
  50
  51 /* Menelaus interrupt */
  52 MUX_CFG_24XX("W19_24XX_SYS_NIRQ",       0x12c,  0,      1,      1,      1)
  53
  54 /* 24xx clocks */
  55 MUX_CFG_24XX("W14_24XX_SYS_CLKOUT",     0x137,  0,      1,      1,      1)
  56
  57 /* 24xx GPMC chipselects, wait pin monitoring */
  58 MUX_CFG_24XX("E2_GPMC_NCS2",            0x08e,  0,      1,      1,      1)
  59 MUX_CFG_24XX("L2_GPMC_NCS7",            0x093,  0,      1,      1,      1)
  60 MUX_CFG_24XX("L3_GPMC_WAIT0",           0x09a,  0,      1,      1,      1)
  61 MUX_CFG_24XX("N7_GPMC_WAIT1",           0x09b,  0,      1,      1,      1)
  62 MUX_CFG_24XX("M1_GPMC_WAIT2",           0x09c,  0,      1,      1,      1)
  63 MUX_CFG_24XX("P1_GPMC_WAIT3",           0x09d,  0,      1,      1,      1)
  64
  65 /* 24xx McBSP */
  66 MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX",    0x124,  1,      1,      0,      1)
  67 MUX_CFG_24XX("R14_24XX_MCBSP2_FSX",     0x125,  1,      1,      0,      1)
  68 MUX_CFG_24XX("W15_24XX_MCBSP2_DR",      0x126,  1,      1,      0,      1)
  69 MUX_CFG_24XX("V15_24XX_MCBSP2_DX",      0x127,  1,      1,      0,      1)
  70
  71 /* 24xx GPIO */
  72 MUX_CFG_24XX("M21_242X_GPIO11",         0x0c9,  3,      1,      1,      1)
  73 MUX_CFG_24XX("P21_242X_GPIO12",         0x0ca,  3,      0,      0,      1)
  74 MUX_CFG_24XX("AA10_242X_GPIO13",        0x0e5,  3,      0,      0,      1)
  75 MUX_CFG_24XX("AA6_242X_GPIO14",         0x0e6,  3,      0,      0,      1)
  76 MUX_CFG_24XX("AA4_242X_GPIO15",         0x0e7,  3,      0,      0,      1)
  77 MUX_CFG_24XX("Y11_242X_GPIO16",         0x0e8,  3,      0,      0,      1)
  78 MUX_CFG_24XX("AA12_242X_GPIO17",        0x0e9,  3,      0,      0,      1)
  79 MUX_CFG_24XX("AA8_242X_GPIO58",         0x0ea,  3,      0,      0,      1)
  80 MUX_CFG_24XX("Y20_24XX_GPIO60",         0x12c,  3,      0,      0,      1)
  81 MUX_CFG_24XX("W4__24XX_GPIO74",         0x0f2,  3,      0,      0,      1)
  82 MUX_CFG_24XX("M15_24XX_GPIO92",         0x10a,  3,      0,      0,      1)
  83 MUX_CFG_24XX("J15_24XX_GPIO99",         0x113,  3,      1,      1,      1)
  84 MUX_CFG_24XX("V14_24XX_GPIO117",        0x128,  3,      1,      0,      1)
  85 MUX_CFG_24XX("P14_24XX_GPIO125",        0x140,  3,      1,      1,      1)
  86
  87 /* 242x DBG GPIO */
  88 MUX_CFG_24XX("V4_242X_GPIO49",          0xd3,   3,      0,      0,      1)
  89 MUX_CFG_24XX("W2_242X_GPIO50",          0xd4,   3,      0,      0,      1)
  90 MUX_CFG_24XX("U4_242X_GPIO51",          0xd5,   3,      0,      0,      1)
  91 MUX_CFG_24XX("V3_242X_GPIO52",          0xd6,   3,      0,      0,      1)
  92 MUX_CFG_24XX("V2_242X_GPIO53",          0xd7,   3,      0,      0,      1)
  93 MUX_CFG_24XX("V6_242X_GPIO53",          0xcf,   3,      0,      0,      1)
  94 MUX_CFG_24XX("T4_242X_GPIO54",          0xd8,   3,      0,      0,      1)
  95 MUX_CFG_24XX("Y4_242X_GPIO54",          0xd0,   3,      0,      0,      1)
  96 MUX_CFG_24XX("T3_242X_GPIO55",          0xd9,   3,      0,      0,      1)
  97 MUX_CFG_24XX("U2_242X_GPIO56",          0xda,   3,      0,      0,      1)
  98
  99 /* 24xx external DMA requests */
 100 MUX_CFG_24XX("AA10_242X_DMAREQ0",       0x0e5,  2,      0,      0,      1)
 101 MUX_CFG_24XX("AA6_242X_DMAREQ1",        0x0e6,  2,      0,      0,      1)
 102 MUX_CFG_24XX("E4_242X_DMAREQ2",         0x074,  2,      0,      0,      1)
 103 MUX_CFG_24XX("G4_242X_DMAREQ3",         0x073,  2,      0,      0,      1)
 104 MUX_CFG_24XX("D3_242X_DMAREQ4",         0x072,  2,      0,      0,      1)
 105 MUX_CFG_24XX("E3_242X_DMAREQ5",         0x071,  2,      0,      0,      1)
 106
 107 /* TSC IRQ */
 108 MUX_CFG_24XX("P20_24XX_TSC_IRQ",        0x108,  0,      0,      0,      1)
 109
 110 /* UART3 */
 111 MUX_CFG_24XX("K15_24XX_UART3_TX",       0x118,  0,      0,      0,      1)
 112 MUX_CFG_24XX("K14_24XX_UART3_RX",       0x119,  0,      0,      0,      1)
 113
 114 /* MMC/SDIO */
 115 MUX_CFG_24XX("G19_24XX_MMC_CLKO",       0x0f3,  0,      0,      0,      1)
 116 MUX_CFG_24XX("H18_24XX_MMC_CMD",        0x0f4,  0,      0,      0,      1)
 117 MUX_CFG_24XX("F20_24XX_MMC_DAT0",       0x0f5,  0,      0,      0,      1)
 118 MUX_CFG_24XX("H14_24XX_MMC_DAT1",       0x0f6,  0,      0,      0,      1)
 119 MUX_CFG_24XX("E19_24XX_MMC_DAT2",       0x0f7,  0,      0,      0,      1)
 120 MUX_CFG_24XX("D19_24XX_MMC_DAT3",       0x0f8,  0,      0,      0,      1)
 121 MUX_CFG_24XX("F19_24XX_MMC_DAT_DIR0",   0x0f9,  0,      0,      0,      1)
 122 MUX_CFG_24XX("E20_24XX_MMC_DAT_DIR1",   0x0fa,  0,      0,      0,      1)
 123 MUX_CFG_24XX("F18_24XX_MMC_DAT_DIR2",   0x0fb,  0,      0,      0,      1)
 124 MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3",   0x0fc,  0,      0,      0,      1)
 125 MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR",    0x0fd,  0,      0,      0,      1)
 126 MUX_CFG_24XX("H15_24XX_MMC_CLKI",       0x0fe,  0,      0,      0,      1)
 127
 128 /* Full speed USB */
 129 MUX_CFG_24XX("J20_24XX_USB0_PUEN",      0x11d,  0,      0,      0,      1)
 130 MUX_CFG_24XX("J19_24XX_USB0_VP",        0x11e,  0,      0,      0,      1)
 131 MUX_CFG_24XX("K20_24XX_USB0_VM",        0x11f,  0,      0,      0,      1)
 132 MUX_CFG_24XX("J18_24XX_USB0_RCV",       0x120,  0,      0,      0,      1)
 133 MUX_CFG_24XX("K19_24XX_USB0_TXEN",      0x121,  0,      0,      0,      1)
 134 MUX_CFG_24XX("J14_24XX_USB0_SE0",       0x122,  0,      0,      0,      1)
 135 MUX_CFG_24XX("K18_24XX_USB0_DAT",       0x123,  0,      0,      0,      1)
 136
 137 MUX_CFG_24XX("N14_24XX_USB1_SE0",       0x0ed,  2,      0,      0,      1)
 138 MUX_CFG_24XX("W12_24XX_USB1_SE0",       0x0dd,  3,      0,      0,      1)
 139 MUX_CFG_24XX("P15_24XX_USB1_DAT",       0x0ee,  2,      0,      0,      1)
 140 MUX_CFG_24XX("R13_24XX_USB1_DAT",       0x0e0,  3,      0,      0,      1)
 141 MUX_CFG_24XX("W20_24XX_USB1_TXEN",      0x0ec,  2,      0,      0,      1)
 142 MUX_CFG_24XX("P13_24XX_USB1_TXEN",      0x0df,  3,      0,      0,      1)
 143 MUX_CFG_24XX("V19_24XX_USB1_RCV",       0x0eb,  2,      0,      0,      1)
 144 MUX_CFG_24XX("V12_24XX_USB1_RCV",       0x0de,  3,      0,      0,      1)
 145
 146 MUX_CFG_24XX("AA10_24XX_USB2_SE0",      0x0e5,  2,      0,      0,      1)
 147 MUX_CFG_24XX("Y11_24XX_USB2_DAT",       0x0e8,  2,      0,      0,      1)
 148 MUX_CFG_24XX("AA12_24XX_USB2_TXEN",     0x0e9,  2,      0,      0,      1)
 149 MUX_CFG_24XX("AA6_24XX_USB2_RCV",       0x0e6,  2,      0,      0,      1)
 150 MUX_CFG_24XX("AA4_24XX_USB2_TLLSE0",    0x0e7,  2,      0,      0,      1)
 151
 152 /* Keypad GPIO*/
 153 MUX_CFG_24XX("T19_24XX_KBR0",           0x106,  3,      1,      1,      1)
 154 MUX_CFG_24XX("R19_24XX_KBR1",           0x107,  3,      1,      1,      1)
 155 MUX_CFG_24XX("V18_24XX_KBR2",           0x139,  3,      1,      1,      1)
 156 MUX_CFG_24XX("M21_24XX_KBR3",           0xc9,   3,      1,      1,      1)
 157 MUX_CFG_24XX("E5__24XX_KBR4",           0x138,  3,      1,      1,      1)
 158 MUX_CFG_24XX("M18_24XX_KBR5",           0x10e,  3,      1,      1,      1)
 159 MUX_CFG_24XX("R20_24XX_KBC0",           0x108,  3,      0,      0,      1)
 160 MUX_CFG_24XX("M14_24XX_KBC1",           0x109,  3,      0,      0,      1)
 161 MUX_CFG_24XX("H19_24XX_KBC2",           0x114,  3,      0,      0,      1)
 162 MUX_CFG_24XX("V17_24XX_KBC3",           0x135,  3,      0,      0,      1)
 163 MUX_CFG_24XX("P21_24XX_KBC4",           0xca,   3,      0,      0,      1)
 164 MUX_CFG_24XX("L14_24XX_KBC5",           0x10f,  3,      0,      0,      1)
 165 MUX_CFG_24XX("N19_24XX_KBC6",           0x110,  3,      0,      0,      1)
 166
 167 /* 24xx Menelaus Keypad GPIO */
 168 MUX_CFG_24XX("B3__24XX_KBR5",           0x30,   3,      1,      1,      1)
 169 MUX_CFG_24XX("AA4_24XX_KBC2",           0xe7,   3,      0,      0,      1)
 170 MUX_CFG_24XX("B13_24XX_KBC6",           0x110,  3,      0,      0,      1)
 171
 172 };
 173
 174 #ifdef CONFIG_ARCH_OMAP24XX
 175 int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
 176 {
 177         return 0;
 178 }
 179 #endif
 180
 181 int __init omap2_mux_init(void)
 182 {
 183
 184 #ifdef CONFIG_ARCH_OMAP24XX
 185         if (cpu_is_omap24xx()) {
 186                 arch_mux_cfg.pins       = omap24xx_pins;
 187                 arch_mux_cfg.size       = ARRAY_SIZE(omap24xx_pins);
 188                 arch_mux_cfg.cfg_reg    = omap24xx_cfg_reg;
 189         }
 190 #endif
 191
 192         return omap_mux_register(&arch_mux_cfg);
 193 }
 194
 195 #endif