[PATCH] PPC 44x EMAC driver: add 440SPe support
[linux-2.6.git] / include / asm-v850 / ptrace.h
blob7bf72bb5078cf122036cb47c220973022c0b11a0
1 /*
2 * include/asm-v850/ptrace.h -- Access to CPU registers
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
11 * Written by Miles Bader <miles@gnu.org>
14 #ifndef __V850_PTRACE_H__
15 #define __V850_PTRACE_H__
18 /* v850 general purpose registers with special meanings. */
19 #define GPR_ZERO 0 /* constant zero */
20 #define GPR_ASM 1 /* reserved for assembler */
21 #define GPR_SP 3 /* stack pointer */
22 #define GPR_GP 4 /* global data pointer */
23 #define GPR_TP 5 /* `text pointer' */
24 #define GPR_EP 30 /* `element pointer' */
25 #define GPR_LP 31 /* link pointer (current return address) */
27 /* These aren't official names, but they make some code more descriptive. */
28 #define GPR_ARG0 6
29 #define GPR_ARG1 7
30 #define GPR_ARG2 8
31 #define GPR_ARG3 9
32 #define GPR_RVAL0 10
33 #define GPR_RVAL1 11
34 #define GPR_RVAL GPR_RVAL0
36 #define NUM_GPRS 32
38 /* v850 `system' registers. */
39 #define SR_EIPC 0
40 #define SR_EIPSW 1
41 #define SR_FEPC 2
42 #define SR_FEPSW 3
43 #define SR_ECR 4
44 #define SR_PSW 5
45 #define SR_CTPC 16
46 #define SR_CTPSW 17
47 #define SR_DBPC 18
48 #define SR_DBPSW 19
49 #define SR_CTBP 20
50 #define SR_DIR 21
51 #define SR_ASID 23
54 #ifndef __ASSEMBLY__
56 typedef unsigned long v850_reg_t;
58 /* How processor state is stored on the stack during a syscall/signal.
59 If you change this structure, change the associated assembly-language
60 macros below too (PT_*)! */
61 struct pt_regs
63 /* General purpose registers. */
64 v850_reg_t gpr[NUM_GPRS];
66 v850_reg_t pc; /* program counter */
67 v850_reg_t psw; /* program status word */
69 /* Registers used by `callt' instruction: */
70 v850_reg_t ctpc; /* saved program counter */
71 v850_reg_t ctpsw; /* saved psw */
72 v850_reg_t ctbp; /* base pointer for callt table */
74 char kernel_mode; /* 1 if in `kernel mode', 0 if user mode */
78 #define instruction_pointer(regs) ((regs)->pc)
79 #define profile_pc(regs) instruction_pointer(regs)
80 #define user_mode(regs) (!(regs)->kernel_mode)
82 /* When a struct pt_regs is used to save user state for a system call in
83 the kernel, the system call is stored in the space for R0 (since it's
84 never used otherwise, R0 being a constant 0). Non-system-calls
85 simply store 0 there. */
86 #define PT_REGS_SYSCALL(regs) (regs)->gpr[0]
87 #define PT_REGS_SET_SYSCALL(regs, val) ((regs)->gpr[0] = (val))
89 #endif /* !__ASSEMBLY__ */
92 /* The number of bytes used to store each register. */
93 #define _PT_REG_SIZE 4
95 /* Offset of a general purpose register in a stuct pt_regs. */
96 #define PT_GPR(num) ((num) * _PT_REG_SIZE)
98 /* Offsets of various special registers & fields in a struct pt_regs. */
99 #define PT_PC ((NUM_GPRS + 0) * _PT_REG_SIZE)
100 #define PT_PSW ((NUM_GPRS + 1) * _PT_REG_SIZE)
101 #define PT_CTPC ((NUM_GPRS + 2) * _PT_REG_SIZE)
102 #define PT_CTPSW ((NUM_GPRS + 3) * _PT_REG_SIZE)
103 #define PT_CTBP ((NUM_GPRS + 4) * _PT_REG_SIZE)
104 #define PT_KERNEL_MODE ((NUM_GPRS + 5) * _PT_REG_SIZE)
106 /* Where the current syscall number is stashed; obviously only valid in
107 the kernel! */
108 #define PT_CUR_SYSCALL PT_GPR(0)
110 /* Size of struct pt_regs, including alignment. */
111 #define PT_SIZE ((NUM_GPRS + 6) * _PT_REG_SIZE)
114 /* These are `magic' values for PTRACE_PEEKUSR that return info about where
115 a process is located in memory. */
116 #define PT_TEXT_ADDR (PT_SIZE + 1)
117 #define PT_TEXT_LEN (PT_SIZE + 2)
118 #define PT_DATA_ADDR (PT_SIZE + 3)
121 #endif /* __V850_PTRACE_H__ */