arch/arm/mach-integrator/platsmp.c

   1 /*
   2  *  linux/arch/arm/mach-cintegrator/platsmp.c
   3  *
   4  *  Copyright (C) 2002 ARM Ltd.
   5  *  All Rights Reserved
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #include <linux/init.h>
  12 #include <linux/kernel.h>
  13 #include <linux/sched.h>
  14 #include <linux/errno.h>
  15 #include <linux/mm.h>
  16
  17 #include <asm/atomic.h>
  18 #include <asm/cacheflush.h>
  19 #include <asm/delay.h>
  20 #include <asm/mmu_context.h>
  21 #include <asm/procinfo.h>
  22 #include <asm/ptrace.h>
  23 #include <asm/smp.h>
  24
  25 extern void integrator_secondary_startup(void);
  26
  27 /*
  28  * control for which core is the next to come out of the secondary
  29  * boot "holding pen"
  30  */
  31 volatile int __cpuinitdata pen_release = -1;
  32 unsigned long __cpuinitdata phys_pen_release = 0;
  33
  34 static DEFINE_SPINLOCK(boot_lock);
  35
  36 void __cpuinit platform_secondary_init(unsigned int cpu)
  37 {
  38         /*
  39          * the primary core may have used a "cross call" soft interrupt
  40          * to get this processor out of WFI in the BootMonitor - make
  41          * sure that we are no longer being sent this soft interrupt
  42          */
  43         smp_cross_call_done(cpumask_of_cpu(cpu));
  44
  45         /*
  46          * if any interrupts are already enabled for the primary
  47          * core (e.g. timer irq), then they will not have been enabled
  48          * for us: do so
  49          */
  50         secondary_scan_irqs();
  51
  52         /*
  53          * let the primary processor know we're out of the
  54          * pen, then head off into the C entry point
  55          */
  56         pen_release = -1;
  57
  58         /*
  59          * Synchronise with the boot thread.
  60          */
  61         spin_lock(&boot_lock);
  62         spin_unlock(&boot_lock);
  63 }
  64
  65 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
  66 {
  67         unsigned long timeout;
  68
  69         /*
  70          * set synchronisation state between this boot processor
  71          * and the secondary one
  72          */
  73         spin_lock(&boot_lock);
  74
  75         /*
  76          * The secondary processor is waiting to be released from
  77          * the holding pen - release it, then wait for it to flag
  78          * that it has been released by resetting pen_release.
  79          *
  80          * Note that "pen_release" is the hardware CPU ID, whereas
  81          * "cpu" is Linux's internal ID.
  82          */
  83         pen_release = cpu;
  84         flush_cache_all();
  85
  86         /*
  87          * XXX
  88          *
  89          * This is a later addition to the booting protocol: the
  90          * bootMonitor now puts secondary cores into WFI, so
  91          * poke_milo() no longer gets the cores moving; we need
  92          * to send a soft interrupt to wake the secondary core.
  93          * Use smp_cross_call() for this, since there's little
  94          * point duplicating the code here
  95          */
  96         smp_cross_call(cpumask_of_cpu(cpu));
  97
  98         timeout = jiffies + (1 * HZ);
  99         while (time_before(jiffies, timeout)) {
 100                 if (pen_release == -1)
 101                         break;
 102
 103                 udelay(10);
 104         }
 105
 106         /*
 107          * now the secondary core is starting up let it run its
 108          * calibrations, then wait for it to finish
 109          */
 110         spin_unlock(&boot_lock);
 111
 112         return pen_release != -1 ? -ENOSYS : 0;
 113 }
 114
 115 static void __init poke_milo(void)
 116 {
 117         extern void secondary_startup(void);
 118
 119         /* nobody is to be released from the pen yet */
 120         pen_release = -1;
 121
 122         phys_pen_release = virt_to_phys(&pen_release);
 123
 124         /*
 125          * write the address of secondary startup into the system-wide
 126          * flags register, then clear the bottom two bits, which is what
 127          * BootMonitor is waiting for
 128          */
 129 #if 1
 130 #define CINTEGRATOR_HDR_FLAGSS_OFFSET 0x30
 131         __raw_writel(virt_to_phys(integrator_secondary_startup),
 132                      (IO_ADDRESS(INTEGRATOR_HDR_BASE) +
 133                       CINTEGRATOR_HDR_FLAGSS_OFFSET));
 134 #define CINTEGRATOR_HDR_FLAGSC_OFFSET 0x34
 135         __raw_writel(3,
 136                      (IO_ADDRESS(INTEGRATOR_HDR_BASE) +
 137                       CINTEGRATOR_HDR_FLAGSC_OFFSET));
 138 #endif
 139
 140         mb();
 141 }
 142
 143 void __init smp_prepare_cpus(unsigned int max_cpus)
 144 {
 145         unsigned int ncores = get_core_count();
 146         unsigned int cpu = smp_processor_id();
 147         int i;
 148
 149         /* sanity check */
 150         if (ncores == 0) {
 151                 printk(KERN_ERR
 152                        "Integrator/CP: strange CM count of 0? Default to 1\n");
 153
 154                 ncores = 1;
 155         }
 156
 157         if (ncores > NR_CPUS) {
 158                 printk(KERN_WARNING
 159                        "Integrator/CP: no. of cores (%d) greater than configured "
 160                        "maximum of %d - clipping\n",
 161                        ncores, NR_CPUS);
 162                 ncores = NR_CPUS;
 163         }
 164
 165         /*
 166          * start with some more config for the Boot CPU, now that
 167          * the world is a bit more alive (which was not the case
 168          * when smp_prepare_boot_cpu() was called)
 169          */
 170         smp_store_cpu_info(cpu);
 171
 172         /*
 173          * are we trying to boot more cores than exist?
 174          */
 175         if (max_cpus > ncores)
 176                 max_cpus = ncores;
 177
 178         /*
 179          * Initialise the possible/present maps.
 180          * cpu_possible_map describes the set of CPUs which may be present
 181          * cpu_present_map describes the set of CPUs populated
 182          */
 183         for (i = 0; i < max_cpus; i++) {
 184                 cpu_set(i, cpu_possible_map);
 185                 cpu_set(i, cpu_present_map);
 186         }
 187
 188         /*
 189          * Do we need any more CPUs? If so, then let them know where
 190          * to start. Note that, on modern versions of MILO, the "poke"
 191          * doesn't actually do anything until each individual core is
 192          * sent a soft interrupt to get it out of WFI
 193          */
 194         if (max_cpus > 1)
 195                 poke_milo();
 196 }