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iwl3945: cleanup and remove duplicate code
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
blob52c03cf2908939e0e2c74d71de5e498c3637e088
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #define DRV_NAME "iwl3945"
50
51 #include "iwl-commands.h"
52 #include "iwl-3945.h"
53 #include "iwl-3945-fh.h"
54 #include "iwl-helpers.h"
55 #include "iwl-core.h"
56 #include "iwl-dev.h"
57
58 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
59 struct iwl3945_tx_queue *txq);
60
61 /*
62 * module name, copyright, version, etc.
63 */
64
65 #define DRV_DESCRIPTION \
66 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
67
68 #ifdef CONFIG_IWL3945_DEBUG
69 #define VD "d"
70 #else
71 #define VD
72 #endif
73
74 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
75 #define VS "s"
76 #else
77 #define VS
78 #endif
79
80 #define IWL39_VERSION "1.2.26k" VD VS
81 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
82 #define DRV_AUTHOR "<ilw@linux.intel.com>"
83 #define DRV_VERSION IWL39_VERSION
84
85
86 MODULE_DESCRIPTION(DRV_DESCRIPTION);
87 MODULE_VERSION(DRV_VERSION);
88 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
89 MODULE_LICENSE("GPL");
90
91 /* module parameters */
92 struct iwl_mod_params iwl3945_mod_params = {
93 .num_of_queues = IWL39_MAX_NUM_QUEUES,
94 /* the rest are 0 by default */
95 };
96
97 static const struct ieee80211_supported_band *iwl3945_get_band(
98 struct iwl_priv *priv, enum ieee80211_band band)
99 {
100 return priv->hw->wiphy->bands[band];
101 }
102
103 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
104 * DMA services
105 *
106 * Theory of operation
107 *
108 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
109 * of buffer descriptors, each of which points to one or more data buffers for
110 * the device to read from or fill. Driver and device exchange status of each
111 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
112 * entries in each circular buffer, to protect against confusing empty and full
113 * queue states.
114 *
115 * The device reads or writes the data in the queues via the device's several
116 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
117 *
118 * For Tx queue, there are low mark and high mark limits. If, after queuing
119 * the packet for Tx, free space become < low mark, Tx queue stopped. When
120 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
121 * Tx queue resumed.
122 *
123 * The 3945 operates with six queues: One receive queue, one transmit queue
124 * (#4) for sending commands to the device firmware, and four transmit queues
125 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
126 ***************************************************/
127
128 int iwl3945_x2_queue_used(const struct iwl_queue *q, int i)
129 {
130 return q->write_ptr > q->read_ptr ?
131 (i >= q->read_ptr && i < q->write_ptr) :
132 !(i < q->read_ptr && i >= q->write_ptr);
133 }
134
135 /**
136 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
137 */
138 static int iwl3945_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
139 int count, int slots_num, u32 id)
140 {
141 q->n_bd = count;
142 q->n_window = slots_num;
143 q->id = id;
144
145 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
146 * and iwl_queue_dec_wrap are broken. */
147 BUG_ON(!is_power_of_2(count));
148
149 /* slots_num must be power-of-two size, otherwise
150 * get_cmd_index is broken. */
151 BUG_ON(!is_power_of_2(slots_num));
152
153 q->low_mark = q->n_window / 4;
154 if (q->low_mark < 4)
155 q->low_mark = 4;
156
157 q->high_mark = q->n_window / 8;
158 if (q->high_mark < 2)
159 q->high_mark = 2;
160
161 q->write_ptr = q->read_ptr = 0;
162
163 return 0;
164 }
165
166 /**
167 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
168 */
169 static int iwl3945_tx_queue_alloc(struct iwl_priv *priv,
170 struct iwl3945_tx_queue *txq, u32 id)
171 {
172 struct pci_dev *dev = priv->pci_dev;
173
174 /* Driver private data, only for Tx (not command) queues,
175 * not shared with device. */
176 if (id != IWL_CMD_QUEUE_NUM) {
177 txq->txb = kmalloc(sizeof(txq->txb[0]) *
178 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
179 if (!txq->txb) {
180 IWL_ERR(priv, "kmalloc for auxiliary BD "
181 "structures failed\n");
182 goto error;
183 }
184 } else
185 txq->txb = NULL;
186
187 /* Circular buffer of transmit frame descriptors (TFDs),
188 * shared with device */
189 txq->bd = pci_alloc_consistent(dev,
190 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
191 &txq->q.dma_addr);
192
193 if (!txq->bd) {
194 IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n",
195 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
196 goto error;
197 }
198 txq->q.id = id;
199
200 return 0;
201
202 error:
203 kfree(txq->txb);
204 txq->txb = NULL;
205
206 return -ENOMEM;
207 }
208
209 /**
210 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
211 */
212 int iwl3945_tx_queue_init(struct iwl_priv *priv,
213 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
214 {
215 struct pci_dev *dev = priv->pci_dev;
216 int len;
217 int rc = 0;
218
219 /*
220 * Alloc buffer array for commands (Tx or other types of commands).
221 * For the command queue (#4), allocate command space + one big
222 * command for scan, since scan command is very huge; the system will
223 * not have two scans at the same time, so only one is needed.
224 * For data Tx queues (all other queues), no super-size command
225 * space is needed.
226 */
227 len = sizeof(struct iwl_cmd) * slots_num;
228 if (txq_id == IWL_CMD_QUEUE_NUM)
229 len += IWL_MAX_SCAN_SIZE;
230 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
231 if (!txq->cmd)
232 return -ENOMEM;
233
234 /* Alloc driver data array and TFD circular buffer */
235 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
236 if (rc) {
237 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
238
239 return -ENOMEM;
240 }
241 txq->need_update = 0;
242
243 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
244 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
245 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
246
247 /* Initialize queue high/low-water, head/tail indexes */
248 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
249
250 /* Tell device where to find queue, enable DMA channel. */
251 iwl3945_hw_tx_queue_init(priv, txq);
252
253 return 0;
254 }
255
256 /**
257 * iwl3945_tx_queue_free - Deallocate DMA queue.
258 * @txq: Transmit queue to deallocate.
259 *
260 * Empty queue by removing and destroying all BD's.
261 * Free all buffers.
262 * 0-fill, but do not free "txq" descriptor structure.
263 */
264 void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl3945_tx_queue *txq)
265 {
266 struct iwl_queue *q = &txq->q;
267 struct pci_dev *dev = priv->pci_dev;
268 int len;
269
270 if (q->n_bd == 0)
271 return;
272
273 /* first, empty all BD's */
274 for (; q->write_ptr != q->read_ptr;
275 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
276 iwl3945_hw_txq_free_tfd(priv, txq);
277
278 len = sizeof(struct iwl_cmd) * q->n_window;
279 if (q->id == IWL_CMD_QUEUE_NUM)
280 len += IWL_MAX_SCAN_SIZE;
281
282 /* De-alloc array of command/tx buffers */
283 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
284
285 /* De-alloc circular buffer of TFDs */
286 if (txq->q.n_bd)
287 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
288 txq->q.n_bd, txq->bd, txq->q.dma_addr);
289
290 /* De-alloc array of per-TFD driver data */
291 kfree(txq->txb);
292 txq->txb = NULL;
293
294 /* 0-fill queue descriptor structure */
295 memset(txq, 0, sizeof(*txq));
296 }
297
298 /*************** STATION TABLE MANAGEMENT ****
299 * mac80211 should be examined to determine if sta_info is duplicating
300 * the functionality provided here
301 */
302
303 /**************************************************************/
304 #if 0 /* temporary disable till we add real remove station */
305 /**
306 * iwl3945_remove_station - Remove driver's knowledge of station.
307 *
308 * NOTE: This does not remove station from device's station table.
309 */
310 static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
311 {
312 int index = IWL_INVALID_STATION;
313 int i;
314 unsigned long flags;
315
316 spin_lock_irqsave(&priv->sta_lock, flags);
317
318 if (is_ap)
319 index = IWL_AP_ID;
320 else if (is_broadcast_ether_addr(addr))
321 index = priv->hw_params.bcast_sta_id;
322 else
323 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
324 if (priv->stations_39[i].used &&
325 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
326 addr)) {
327 index = i;
328 break;
329 }
330
331 if (unlikely(index == IWL_INVALID_STATION))
332 goto out;
333
334 if (priv->stations_39[index].used) {
335 priv->stations_39[index].used = 0;
336 priv->num_stations--;
337 }
338
339 BUG_ON(priv->num_stations < 0);
340
341 out:
342 spin_unlock_irqrestore(&priv->sta_lock, flags);
343 return 0;
344 }
345 #endif
346
347 /**
348 * iwl3945_clear_stations_table - Clear the driver's station table
349 *
350 * NOTE: This does not clear or otherwise alter the device's station table.
351 */
352 static void iwl3945_clear_stations_table(struct iwl_priv *priv)
353 {
354 unsigned long flags;
355
356 spin_lock_irqsave(&priv->sta_lock, flags);
357
358 priv->num_stations = 0;
359 memset(priv->stations_39, 0, sizeof(priv->stations_39));
360
361 spin_unlock_irqrestore(&priv->sta_lock, flags);
362 }
363
364 /**
365 * iwl3945_add_station - Add station to station tables in driver and device
366 */
367 u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
368 {
369 int i;
370 int index = IWL_INVALID_STATION;
371 struct iwl3945_station_entry *station;
372 unsigned long flags_spin;
373 u8 rate;
374
375 spin_lock_irqsave(&priv->sta_lock, flags_spin);
376 if (is_ap)
377 index = IWL_AP_ID;
378 else if (is_broadcast_ether_addr(addr))
379 index = priv->hw_params.bcast_sta_id;
380 else
381 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
382 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
383 addr)) {
384 index = i;
385 break;
386 }
387
388 if (!priv->stations_39[i].used &&
389 index == IWL_INVALID_STATION)
390 index = i;
391 }
392
393 /* These two conditions has the same outcome but keep them separate
394 since they have different meaning */
395 if (unlikely(index == IWL_INVALID_STATION)) {
396 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
397 return index;
398 }
399
400 if (priv->stations_39[index].used &&
401 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
402 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
403 return index;
404 }
405
406 IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
407 station = &priv->stations_39[index];
408 station->used = 1;
409 priv->num_stations++;
410
411 /* Set up the REPLY_ADD_STA command to send to device */
412 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
413 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
414 station->sta.mode = 0;
415 station->sta.sta.sta_id = index;
416 station->sta.station_flags = 0;
417
418 if (priv->band == IEEE80211_BAND_5GHZ)
419 rate = IWL_RATE_6M_PLCP;
420 else
421 rate = IWL_RATE_1M_PLCP;
422
423 /* Turn on both antennas for the station... */
424 station->sta.rate_n_flags =
425 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
426
427 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
428
429 /* Add station to device's station table */
430 iwl3945_send_add_station(priv, &station->sta, flags);
431 return index;
432
433 }
434
435
436 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
437
438 #define IWL_CMD(x) case x: return #x
439 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
440
441 /**
442 * iwl3945_enqueue_hcmd - enqueue a uCode command
443 * @priv: device private data point
444 * @cmd: a point to the ucode command structure
445 *
446 * The function returns < 0 values to indicate the operation is
447 * failed. On success, it turns the index (> 0) of command in the
448 * command queue.
449 */
450 static int iwl3945_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
451 {
452 struct iwl3945_tx_queue *txq = &priv->txq39[IWL_CMD_QUEUE_NUM];
453 struct iwl_queue *q = &txq->q;
454 struct iwl3945_tfd_frame *tfd;
455 u32 *control_flags;
456 struct iwl_cmd *out_cmd;
457 u32 idx;
458 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
459 dma_addr_t phys_addr;
460 int pad;
461 u16 count;
462 int ret;
463 unsigned long flags;
464
465 /* If any of the command structures end up being larger than
466 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
467 * we will need to increase the size of the TFD entries */
468 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
469 !(cmd->meta.flags & CMD_SIZE_HUGE));
470
471
472 if (iwl_is_rfkill(priv)) {
473 IWL_DEBUG_INFO("Not sending command - RF KILL");
474 return -EIO;
475 }
476
477 if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
478 IWL_ERR(priv, "No space for Tx\n");
479 return -ENOSPC;
480 }
481
482 spin_lock_irqsave(&priv->hcmd_lock, flags);
483
484 tfd = &txq->bd[q->write_ptr];
485 memset(tfd, 0, sizeof(*tfd));
486
487 control_flags = (u32 *) tfd;
488
489 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
490 out_cmd = &txq->cmd[idx];
491
492 out_cmd->hdr.cmd = cmd->id;
493 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
494 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
495
496 /* At this point, the out_cmd now has all of the incoming cmd
497 * information */
498
499 out_cmd->hdr.flags = 0;
500 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
501 INDEX_TO_SEQ(q->write_ptr));
502 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
503 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
504
505 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
506 offsetof(struct iwl_cmd, hdr);
507 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
508
509 pad = U32_PAD(cmd->len);
510 count = TFD_CTL_COUNT_GET(*control_flags);
511 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
512
513 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
514 "%d bytes at %d[%d]:%d\n",
515 get_cmd_string(out_cmd->hdr.cmd),
516 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
517 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
518
519 txq->need_update = 1;
520
521 /* Increment and update queue's write index */
522 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
523 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
524
525 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
526 return ret ? ret : idx;
527 }
528
529 static int iwl3945_send_cmd_async(struct iwl_priv *priv,
530 struct iwl_host_cmd *cmd)
531 {
532 int ret;
533
534 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
535
536 /* An asynchronous command can not expect an SKB to be set. */
537 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
538
539 /* An asynchronous command MUST have a callback. */
540 BUG_ON(!cmd->meta.u.callback);
541
542 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
543 return -EBUSY;
544
545 ret = iwl3945_enqueue_hcmd(priv, cmd);
546 if (ret < 0) {
547 IWL_ERR(priv,
548 "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
549 get_cmd_string(cmd->id), ret);
550 return ret;
551 }
552 return 0;
553 }
554
555 static int iwl3945_send_cmd_sync(struct iwl_priv *priv,
556 struct iwl_host_cmd *cmd)
557 {
558 int cmd_idx;
559 int ret;
560
561 BUG_ON(cmd->meta.flags & CMD_ASYNC);
562
563 /* A synchronous command can not have a callback set. */
564 BUG_ON(cmd->meta.u.callback != NULL);
565
566 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
567 IWL_ERR(priv,
568 "Error sending %s: Already sending a host command\n",
569 get_cmd_string(cmd->id));
570 ret = -EBUSY;
571 goto out;
572 }
573
574 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
575
576 if (cmd->meta.flags & CMD_WANT_SKB)
577 cmd->meta.source = &cmd->meta;
578
579 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
580 if (cmd_idx < 0) {
581 ret = cmd_idx;
582 IWL_ERR(priv,
583 "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
584 get_cmd_string(cmd->id), ret);
585 goto out;
586 }
587
588 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
589 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
590 HOST_COMPLETE_TIMEOUT);
591 if (!ret) {
592 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
593 IWL_ERR(priv, "Error sending %s: time out after %dms\n",
594 get_cmd_string(cmd->id),
595 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
596
597 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
598 ret = -ETIMEDOUT;
599 goto cancel;
600 }
601 }
602
603 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
604 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
605 get_cmd_string(cmd->id));
606 ret = -ECANCELED;
607 goto fail;
608 }
609 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
610 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
611 get_cmd_string(cmd->id));
612 ret = -EIO;
613 goto fail;
614 }
615 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
616 IWL_ERR(priv, "Error: Response NULL in '%s'\n",
617 get_cmd_string(cmd->id));
618 ret = -EIO;
619 goto cancel;
620 }
621
622 ret = 0;
623 goto out;
624
625 cancel:
626 if (cmd->meta.flags & CMD_WANT_SKB) {
627 struct iwl_cmd *qcmd;
628
629 /* Cancel the CMD_WANT_SKB flag for the cmd in the
630 * TX cmd queue. Otherwise in case the cmd comes
631 * in later, it will possibly set an invalid
632 * address (cmd->meta.source). */
633 qcmd = &priv->txq39[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
634 qcmd->meta.flags &= ~CMD_WANT_SKB;
635 }
636 fail:
637 if (cmd->meta.u.skb) {
638 dev_kfree_skb_any(cmd->meta.u.skb);
639 cmd->meta.u.skb = NULL;
640 }
641 out:
642 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
643 return ret;
644 }
645
646 int iwl3945_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
647 {
648 if (cmd->meta.flags & CMD_ASYNC)
649 return iwl3945_send_cmd_async(priv, cmd);
650
651 return iwl3945_send_cmd_sync(priv, cmd);
652 }
653
654 int iwl3945_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
655 {
656 struct iwl_host_cmd cmd = {
657 .id = id,
658 .len = len,
659 .data = data,
660 };
661
662 return iwl3945_send_cmd_sync(priv, &cmd);
663 }
664
665 static int __must_check iwl3945_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
666 {
667 struct iwl_host_cmd cmd = {
668 .id = id,
669 .len = sizeof(val),
670 .data = &val,
671 };
672
673 return iwl3945_send_cmd_sync(priv, &cmd);
674 }
675
676 int iwl3945_send_statistics_request(struct iwl_priv *priv)
677 {
678 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
679 }
680
681 /**
682 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
683 * @band: 2.4 or 5 GHz band
684 * @channel: Any channel valid for the requested band
685
686 * In addition to setting the staging RXON, priv->band is also set.
687 *
688 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
689 * in the staging RXON flag structure based on the band
690 */
691 static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
692 enum ieee80211_band band,
693 u16 channel)
694 {
695 if (!iwl3945_get_channel_info(priv, band, channel)) {
696 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
697 channel, band);
698 return -EINVAL;
699 }
700
701 if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
702 (priv->band == band))
703 return 0;
704
705 priv->staging39_rxon.channel = cpu_to_le16(channel);
706 if (band == IEEE80211_BAND_5GHZ)
707 priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
708 else
709 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
710
711 priv->band = band;
712
713 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
714
715 return 0;
716 }
717
718 /**
719 * iwl3945_check_rxon_cmd - validate RXON structure is valid
720 *
721 * NOTE: This is really only useful during development and can eventually
722 * be #ifdef'd out once the driver is stable and folks aren't actively
723 * making changes
724 */
725 static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
726 {
727 int error = 0;
728 int counter = 1;
729 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
730
731 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
732 error |= le32_to_cpu(rxon->flags &
733 (RXON_FLG_TGJ_NARROW_BAND_MSK |
734 RXON_FLG_RADAR_DETECT_MSK));
735 if (error)
736 IWL_WARN(priv, "check 24G fields %d | %d\n",
737 counter++, error);
738 } else {
739 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
740 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
741 if (error)
742 IWL_WARN(priv, "check 52 fields %d | %d\n",
743 counter++, error);
744 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
745 if (error)
746 IWL_WARN(priv, "check 52 CCK %d | %d\n",
747 counter++, error);
748 }
749 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
750 if (error)
751 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
752
753 /* make sure basic rates 6Mbps and 1Mbps are supported */
754 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
755 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
756 if (error)
757 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
758
759 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
760 if (error)
761 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
762
763 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
764 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
765 if (error)
766 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
767 counter++, error);
768
769 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
770 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
771 if (error)
772 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
773 counter++, error);
774
775 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
776 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
777 if (error)
778 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
779 counter++, error);
780
781 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
782 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
783 RXON_FLG_ANT_A_MSK)) == 0);
784 if (error)
785 IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
786
787 if (error)
788 IWL_WARN(priv, "Tuning to channel %d\n",
789 le16_to_cpu(rxon->channel));
790
791 if (error) {
792 IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
793 return -1;
794 }
795 return 0;
796 }
797
798 /**
799 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
800 * @priv: staging_rxon is compared to active_rxon
801 *
802 * If the RXON structure is changing enough to require a new tune,
803 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
804 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
805 */
806 static int iwl3945_full_rxon_required(struct iwl_priv *priv)
807 {
808
809 /* These items are only settable from the full RXON command */
810 if (!(iwl3945_is_associated(priv)) ||
811 compare_ether_addr(priv->staging39_rxon.bssid_addr,
812 priv->active39_rxon.bssid_addr) ||
813 compare_ether_addr(priv->staging39_rxon.node_addr,
814 priv->active39_rxon.node_addr) ||
815 compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
816 priv->active39_rxon.wlap_bssid_addr) ||
817 (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
818 (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
819 (priv->staging39_rxon.air_propagation !=
820 priv->active39_rxon.air_propagation) ||
821 (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
822 return 1;
823
824 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
825 * be updated with the RXON_ASSOC command -- however only some
826 * flag transitions are allowed using RXON_ASSOC */
827
828 /* Check if we are not switching bands */
829 if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
830 (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
831 return 1;
832
833 /* Check if we are switching association toggle */
834 if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
835 (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
836 return 1;
837
838 return 0;
839 }
840
841 static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
842 {
843 int rc = 0;
844 struct iwl_rx_packet *res = NULL;
845 struct iwl3945_rxon_assoc_cmd rxon_assoc;
846 struct iwl_host_cmd cmd = {
847 .id = REPLY_RXON_ASSOC,
848 .len = sizeof(rxon_assoc),
849 .meta.flags = CMD_WANT_SKB,
850 .data = &rxon_assoc,
851 };
852 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
853 const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
854
855 if ((rxon1->flags == rxon2->flags) &&
856 (rxon1->filter_flags == rxon2->filter_flags) &&
857 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
858 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
859 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
860 return 0;
861 }
862
863 rxon_assoc.flags = priv->staging39_rxon.flags;
864 rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
865 rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
866 rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
867 rxon_assoc.reserved = 0;
868
869 rc = iwl3945_send_cmd_sync(priv, &cmd);
870 if (rc)
871 return rc;
872
873 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
874 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
875 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
876 rc = -EIO;
877 }
878
879 priv->alloc_rxb_skb--;
880 dev_kfree_skb_any(cmd.meta.u.skb);
881
882 return rc;
883 }
884
885 /**
886 * iwl3945_commit_rxon - commit staging_rxon to hardware
887 *
888 * The RXON command in staging_rxon is committed to the hardware and
889 * the active_rxon structure is updated with the new data. This
890 * function correctly transitions out of the RXON_ASSOC_MSK state if
891 * a HW tune is required based on the RXON structure changes.
892 */
893 static int iwl3945_commit_rxon(struct iwl_priv *priv)
894 {
895 /* cast away the const for active_rxon in this function */
896 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
897 int rc = 0;
898
899 if (!iwl_is_alive(priv))
900 return -1;
901
902 /* always get timestamp with Rx frame */
903 priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
904
905 /* select antenna */
906 priv->staging39_rxon.flags &=
907 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
908 priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
909
910 rc = iwl3945_check_rxon_cmd(priv);
911 if (rc) {
912 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
913 return -EINVAL;
914 }
915
916 /* If we don't need to send a full RXON, we can use
917 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
918 * and other flags for the current radio configuration. */
919 if (!iwl3945_full_rxon_required(priv)) {
920 rc = iwl3945_send_rxon_assoc(priv);
921 if (rc) {
922 IWL_ERR(priv, "Error setting RXON_ASSOC "
923 "configuration (%d).\n", rc);
924 return rc;
925 }
926
927 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
928
929 return 0;
930 }
931
932 /* If we are currently associated and the new config requires
933 * an RXON_ASSOC and the new config wants the associated mask enabled,
934 * we must clear the associated from the active configuration
935 * before we apply the new config */
936 if (iwl3945_is_associated(priv) &&
937 (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
938 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
939 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
940
941 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
942 sizeof(struct iwl3945_rxon_cmd),
943 &priv->active39_rxon);
944
945 /* If the mask clearing failed then we set
946 * active_rxon back to what it was previously */
947 if (rc) {
948 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
949 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
950 "configuration (%d).\n", rc);
951 return rc;
952 }
953 }
954
955 IWL_DEBUG_INFO("Sending RXON\n"
956 "* with%s RXON_FILTER_ASSOC_MSK\n"
957 "* channel = %d\n"
958 "* bssid = %pM\n",
959 ((priv->staging39_rxon.filter_flags &
960 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
961 le16_to_cpu(priv->staging39_rxon.channel),
962 priv->staging_rxon.bssid_addr);
963
964 /* Apply the new configuration */
965 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
966 sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
967 if (rc) {
968 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
969 return rc;
970 }
971
972 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
973
974 iwl3945_clear_stations_table(priv);
975
976 /* If we issue a new RXON command which required a tune then we must
977 * send a new TXPOWER command or we won't be able to Tx any frames */
978 rc = iwl3945_hw_reg_send_txpower(priv);
979 if (rc) {
980 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
981 return rc;
982 }
983
984 /* Add the broadcast address so we can send broadcast frames */
985 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
986 IWL_INVALID_STATION) {
987 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
988 return -EIO;
989 }
990
991 /* If we have set the ASSOC_MSK and we are in BSS mode then
992 * add the IWL_AP_ID to the station rate table */
993 if (iwl3945_is_associated(priv) &&
994 (priv->iw_mode == NL80211_IFTYPE_STATION))
995 if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
996 == IWL_INVALID_STATION) {
997 IWL_ERR(priv, "Error adding AP address for transmit\n");
998 return -EIO;
999 }
1000
1001 /* Init the hardware's rate fallback order based on the band */
1002 rc = iwl3945_init_hw_rate_table(priv);
1003 if (rc) {
1004 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
1005 return -EIO;
1006 }
1007
1008 return 0;
1009 }
1010
1011 static int iwl3945_send_bt_config(struct iwl_priv *priv)
1012 {
1013 struct iwl_bt_cmd bt_cmd = {
1014 .flags = 3,
1015 .lead_time = 0xAA,
1016 .max_kill = 1,
1017 .kill_ack_mask = 0,
1018 .kill_cts_mask = 0,
1019 };
1020
1021 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1022 sizeof(bt_cmd), &bt_cmd);
1023 }
1024
1025 static int iwl3945_send_scan_abort(struct iwl_priv *priv)
1026 {
1027 int rc = 0;
1028 struct iwl_rx_packet *res;
1029 struct iwl_host_cmd cmd = {
1030 .id = REPLY_SCAN_ABORT_CMD,
1031 .meta.flags = CMD_WANT_SKB,
1032 };
1033
1034 /* If there isn't a scan actively going on in the hardware
1035 * then we are in between scan bands and not actually
1036 * actively scanning, so don't send the abort command */
1037 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1038 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1039 return 0;
1040 }
1041
1042 rc = iwl3945_send_cmd_sync(priv, &cmd);
1043 if (rc) {
1044 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1045 return rc;
1046 }
1047
1048 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1049 if (res->u.status != CAN_ABORT_STATUS) {
1050 /* The scan abort will return 1 for success or
1051 * 2 for "failure". A failure condition can be
1052 * due to simply not being in an active scan which
1053 * can occur if we send the scan abort before we
1054 * the microcode has notified us that a scan is
1055 * completed. */
1056 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1057 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1058 clear_bit(STATUS_SCAN_HW, &priv->status);
1059 }
1060
1061 dev_kfree_skb_any(cmd.meta.u.skb);
1062
1063 return rc;
1064 }
1065
1066 static int iwl3945_card_state_sync_callback(struct iwl_priv *priv,
1067 struct iwl_cmd *cmd,
1068 struct sk_buff *skb)
1069 {
1070 return 1;
1071 }
1072
1073 /*
1074 * CARD_STATE_CMD
1075 *
1076 * Use: Sets the device's internal card state to enable, disable, or halt
1077 *
1078 * When in the 'enable' state the card operates as normal.
1079 * When in the 'disable' state, the card enters into a low power mode.
1080 * When in the 'halt' state, the card is shut down and must be fully
1081 * restarted to come back on.
1082 */
1083 static int iwl3945_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
1084 {
1085 struct iwl_host_cmd cmd = {
1086 .id = REPLY_CARD_STATE_CMD,
1087 .len = sizeof(u32),
1088 .data = &flags,
1089 .meta.flags = meta_flag,
1090 };
1091
1092 if (meta_flag & CMD_ASYNC)
1093 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1094
1095 return iwl3945_send_cmd(priv, &cmd);
1096 }
1097
1098 static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
1099 struct iwl_cmd *cmd, struct sk_buff *skb)
1100 {
1101 struct iwl_rx_packet *res = NULL;
1102
1103 if (!skb) {
1104 IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
1105 return 1;
1106 }
1107
1108 res = (struct iwl_rx_packet *)skb->data;
1109 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1110 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1111 res->hdr.flags);
1112 return 1;
1113 }
1114
1115 switch (res->u.add_sta.status) {
1116 case ADD_STA_SUCCESS_MSK:
1117 break;
1118 default:
1119 break;
1120 }
1121
1122 /* We didn't cache the SKB; let the caller free it */
1123 return 1;
1124 }
1125
1126 int iwl3945_send_add_station(struct iwl_priv *priv,
1127 struct iwl3945_addsta_cmd *sta, u8 flags)
1128 {
1129 struct iwl_rx_packet *res = NULL;
1130 int rc = 0;
1131 struct iwl_host_cmd cmd = {
1132 .id = REPLY_ADD_STA,
1133 .len = sizeof(struct iwl3945_addsta_cmd),
1134 .meta.flags = flags,
1135 .data = sta,
1136 };
1137
1138 if (flags & CMD_ASYNC)
1139 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1140 else
1141 cmd.meta.flags |= CMD_WANT_SKB;
1142
1143 rc = iwl3945_send_cmd(priv, &cmd);
1144
1145 if (rc || (flags & CMD_ASYNC))
1146 return rc;
1147
1148 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1149 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1150 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1151 res->hdr.flags);
1152 rc = -EIO;
1153 }
1154
1155 if (rc == 0) {
1156 switch (res->u.add_sta.status) {
1157 case ADD_STA_SUCCESS_MSK:
1158 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1159 break;
1160 default:
1161 rc = -EIO;
1162 IWL_WARN(priv, "REPLY_ADD_STA failed\n");
1163 break;
1164 }
1165 }
1166
1167 priv->alloc_rxb_skb--;
1168 dev_kfree_skb_any(cmd.meta.u.skb);
1169
1170 return rc;
1171 }
1172
1173 static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
1174 struct ieee80211_key_conf *keyconf,
1175 u8 sta_id)
1176 {
1177 unsigned long flags;
1178 __le16 key_flags = 0;
1179
1180 switch (keyconf->alg) {
1181 case ALG_CCMP:
1182 key_flags |= STA_KEY_FLG_CCMP;
1183 key_flags |= cpu_to_le16(
1184 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1185 key_flags &= ~STA_KEY_FLG_INVALID;
1186 break;
1187 case ALG_TKIP:
1188 case ALG_WEP:
1189 default:
1190 return -EINVAL;
1191 }
1192 spin_lock_irqsave(&priv->sta_lock, flags);
1193 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
1194 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
1195 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
1196 keyconf->keylen);
1197
1198 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
1199 keyconf->keylen);
1200 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
1201 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1202 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1203
1204 spin_unlock_irqrestore(&priv->sta_lock, flags);
1205
1206 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1207 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1208 return 0;
1209 }
1210
1211 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
1212 {
1213 unsigned long flags;
1214
1215 spin_lock_irqsave(&priv->sta_lock, flags);
1216 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1217 memset(&priv->stations_39[sta_id].sta.key, 0,
1218 sizeof(struct iwl4965_keyinfo));
1219 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1220 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1221 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1222 spin_unlock_irqrestore(&priv->sta_lock, flags);
1223
1224 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1225 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1226 return 0;
1227 }
1228
1229 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
1230 {
1231 struct list_head *element;
1232
1233 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1234 priv->frames_count);
1235
1236 while (!list_empty(&priv->free_frames)) {
1237 element = priv->free_frames.next;
1238 list_del(element);
1239 kfree(list_entry(element, struct iwl3945_frame, list));
1240 priv->frames_count--;
1241 }
1242
1243 if (priv->frames_count) {
1244 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
1245 priv->frames_count);
1246 priv->frames_count = 0;
1247 }
1248 }
1249
1250 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
1251 {
1252 struct iwl3945_frame *frame;
1253 struct list_head *element;
1254 if (list_empty(&priv->free_frames)) {
1255 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1256 if (!frame) {
1257 IWL_ERR(priv, "Could not allocate frame!\n");
1258 return NULL;
1259 }
1260
1261 priv->frames_count++;
1262 return frame;
1263 }
1264
1265 element = priv->free_frames.next;
1266 list_del(element);
1267 return list_entry(element, struct iwl3945_frame, list);
1268 }
1269
1270 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
1271 {
1272 memset(frame, 0, sizeof(*frame));
1273 list_add(&frame->list, &priv->free_frames);
1274 }
1275
1276 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
1277 struct ieee80211_hdr *hdr,
1278 int left)
1279 {
1280
1281 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1282 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
1283 (priv->iw_mode != NL80211_IFTYPE_AP)))
1284 return 0;
1285
1286 if (priv->ibss_beacon->len > left)
1287 return 0;
1288
1289 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1290
1291 return priv->ibss_beacon->len;
1292 }
1293
1294 static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
1295 {
1296 u8 i;
1297 int rate_mask;
1298
1299 /* Set rate mask*/
1300 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1301 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
1302 else
1303 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
1304
1305 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1306 i = iwl3945_rates[i].next_ieee) {
1307 if (rate_mask & (1 << i))
1308 return iwl3945_rates[i].plcp;
1309 }
1310
1311 /* No valid rate was found. Assign the lowest one */
1312 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1313 return IWL_RATE_1M_PLCP;
1314 else
1315 return IWL_RATE_6M_PLCP;
1316 }
1317
1318 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
1319 {
1320 struct iwl3945_frame *frame;
1321 unsigned int frame_size;
1322 int rc;
1323 u8 rate;
1324
1325 frame = iwl3945_get_free_frame(priv);
1326
1327 if (!frame) {
1328 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
1329 "command.\n");
1330 return -ENOMEM;
1331 }
1332
1333 rate = iwl3945_rate_get_lowest_plcp(priv);
1334
1335 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1336
1337 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1338 &frame->u.cmd[0]);
1339
1340 iwl3945_free_frame(priv, frame);
1341
1342 return rc;
1343 }
1344
1345 /******************************************************************************
1346 *
1347 * EEPROM related functions
1348 *
1349 ******************************************************************************/
1350
1351 static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
1352 {
1353 memcpy(mac, priv->eeprom39.mac_address, 6);
1354 }
1355
1356 /*
1357 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1358 * embedded controller) as EEPROM reader; each read is a series of pulses
1359 * to/from the EEPROM chip, not a single event, so even reads could conflict
1360 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1361 * simply claims ownership, which should be safe when this function is called
1362 * (i.e. before loading uCode!).
1363 */
1364 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
1365 {
1366 _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1367 return 0;
1368 }
1369
1370 /**
1371 * iwl3945_eeprom_init - read EEPROM contents
1372 *
1373 * Load the EEPROM contents from adapter into priv->eeprom39
1374 *
1375 * NOTE: This routine uses the non-debug IO access functions.
1376 */
1377 int iwl3945_eeprom_init(struct iwl_priv *priv)
1378 {
1379 u16 *e = (u16 *)&priv->eeprom39;
1380 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
1381 int sz = sizeof(priv->eeprom39);
1382 int ret;
1383 u16 addr;
1384
1385 /* The EEPROM structure has several padding buffers within it
1386 * and when adding new EEPROM maps is subject to programmer errors
1387 * which may be very difficult to identify without explicitly
1388 * checking the resulting size of the eeprom map. */
1389 BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
1390
1391 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1392 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1393 return -ENOENT;
1394 }
1395
1396 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1397 ret = iwl3945_eeprom_acquire_semaphore(priv);
1398 if (ret < 0) {
1399 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
1400 return -ENOENT;
1401 }
1402
1403 /* eeprom is an array of 16bit values */
1404 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1405 u32 r;
1406
1407 _iwl_write32(priv, CSR_EEPROM_REG,
1408 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
1409 _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1410 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
1411 CSR_EEPROM_REG_READ_VALID_MSK,
1412 IWL_EEPROM_ACCESS_TIMEOUT);
1413 if (ret < 0) {
1414 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
1415 return ret;
1416 }
1417
1418 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
1419 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1420 }
1421
1422 return 0;
1423 }
1424
1425 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
1426 {
1427 if (priv->shared_virt)
1428 pci_free_consistent(priv->pci_dev,
1429 sizeof(struct iwl3945_shared),
1430 priv->shared_virt,
1431 priv->shared_phys);
1432 }
1433
1434 /**
1435 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1436 *
1437 * return : set the bit for each supported rate insert in ie
1438 */
1439 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1440 u16 basic_rate, int *left)
1441 {
1442 u16 ret_rates = 0, bit;
1443 int i;
1444 u8 *cnt = ie;
1445 u8 *rates = ie + 1;
1446
1447 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1448 if (bit & supported_rate) {
1449 ret_rates |= bit;
1450 rates[*cnt] = iwl3945_rates[i].ieee |
1451 ((bit & basic_rate) ? 0x80 : 0x00);
1452 (*cnt)++;
1453 (*left)--;
1454 if ((*left <= 0) ||
1455 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1456 break;
1457 }
1458 }
1459
1460 return ret_rates;
1461 }
1462
1463 /**
1464 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1465 */
1466 static u16 iwl3945_fill_probe_req(struct iwl_priv *priv,
1467 struct ieee80211_mgmt *frame,
1468 int left)
1469 {
1470 int len = 0;
1471 u8 *pos = NULL;
1472 u16 active_rates, ret_rates, cck_rates;
1473
1474 /* Make sure there is enough space for the probe request,
1475 * two mandatory IEs and the data */
1476 left -= 24;
1477 if (left < 0)
1478 return 0;
1479 len += 24;
1480
1481 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1482 memcpy(frame->da, iwl_bcast_addr, ETH_ALEN);
1483 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1484 memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN);
1485 frame->seq_ctrl = 0;
1486
1487 /* fill in our indirect SSID IE */
1488 /* ...next IE... */
1489
1490 left -= 2;
1491 if (left < 0)
1492 return 0;
1493 len += 2;
1494 pos = &(frame->u.probe_req.variable[0]);
1495 *pos++ = WLAN_EID_SSID;
1496 *pos++ = 0;
1497
1498 /* fill in supported rate */
1499 /* ...next IE... */
1500 left -= 2;
1501 if (left < 0)
1502 return 0;
1503
1504 /* ... fill it in... */
1505 *pos++ = WLAN_EID_SUPP_RATES;
1506 *pos = 0;
1507
1508 priv->active_rate = priv->rates_mask;
1509 active_rates = priv->active_rate;
1510 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1511
1512 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1513 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1514 priv->active_rate_basic, &left);
1515 active_rates &= ~ret_rates;
1516
1517 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1518 priv->active_rate_basic, &left);
1519 active_rates &= ~ret_rates;
1520
1521 len += 2 + *pos;
1522 pos += (*pos) + 1;
1523 if (active_rates == 0)
1524 goto fill_end;
1525
1526 /* fill in supported extended rate */
1527 /* ...next IE... */
1528 left -= 2;
1529 if (left < 0)
1530 return 0;
1531 /* ... fill it in... */
1532 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1533 *pos = 0;
1534 iwl3945_supported_rate_to_ie(pos, active_rates,
1535 priv->active_rate_basic, &left);
1536 if (*pos > 0)
1537 len += 2 + *pos;
1538
1539 fill_end:
1540 return (u16)len;
1541 }
1542
1543 /*
1544 * QoS support
1545 */
1546 static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
1547 struct iwl_qosparam_cmd *qos)
1548 {
1549
1550 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1551 sizeof(struct iwl_qosparam_cmd), qos);
1552 }
1553
1554 static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
1555 {
1556 unsigned long flags;
1557
1558 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1559 return;
1560
1561 spin_lock_irqsave(&priv->lock, flags);
1562 priv->qos_data.def_qos_parm.qos_flags = 0;
1563
1564 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1565 !priv->qos_data.qos_cap.q_AP.txop_request)
1566 priv->qos_data.def_qos_parm.qos_flags |=
1567 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1568
1569 if (priv->qos_data.qos_active)
1570 priv->qos_data.def_qos_parm.qos_flags |=
1571 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1572
1573 spin_unlock_irqrestore(&priv->lock, flags);
1574
1575 if (force || iwl3945_is_associated(priv)) {
1576 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
1577 priv->qos_data.qos_active);
1578
1579 iwl3945_send_qos_params_command(priv,
1580 &(priv->qos_data.def_qos_parm));
1581 }
1582 }
1583
1584 /*
1585 * Power management (not Tx power!) functions
1586 */
1587 #define MSEC_TO_USEC 1024
1588
1589
1590 #define NOSLP __constant_cpu_to_le16(0), 0, 0
1591 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1592 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1593 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1594 __constant_cpu_to_le32(X1), \
1595 __constant_cpu_to_le32(X2), \
1596 __constant_cpu_to_le32(X3), \
1597 __constant_cpu_to_le32(X4)}
1598
1599 /* default power management (not Tx power) table values */
1600 /* for TIM 0-10 */
1601 static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
1602 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1603 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1604 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1605 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1606 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1607 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1608 };
1609
1610 /* for TIM > 10 */
1611 static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
1612 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1613 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1614 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1615 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1616 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1617 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1618 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1619 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1620 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1621 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1622 };
1623
1624 int iwl3945_power_init_handle(struct iwl_priv *priv)
1625 {
1626 int rc = 0, i;
1627 struct iwl3945_power_mgr *pow_data;
1628 int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
1629 u16 pci_pm;
1630
1631 IWL_DEBUG_POWER("Initialize power \n");
1632
1633 pow_data = &(priv->power_data_39);
1634
1635 memset(pow_data, 0, sizeof(*pow_data));
1636
1637 pow_data->active_index = IWL_POWER_RANGE_0;
1638 pow_data->dtim_val = 0xffff;
1639
1640 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1641 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1642
1643 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1644 if (rc != 0)
1645 return 0;
1646 else {
1647 struct iwl_powertable_cmd *cmd;
1648
1649 IWL_DEBUG_POWER("adjust power command flags\n");
1650
1651 for (i = 0; i < IWL39_POWER_AC; i++) {
1652 cmd = &pow_data->pwr_range_0[i].cmd;
1653
1654 if (pci_pm & 0x1)
1655 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1656 else
1657 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1658 }
1659 }
1660 return rc;
1661 }
1662
1663 static int iwl3945_update_power_cmd(struct iwl_priv *priv,
1664 struct iwl_powertable_cmd *cmd, u32 mode)
1665 {
1666 int rc = 0, i;
1667 u8 skip;
1668 u32 max_sleep = 0;
1669 struct iwl_power_vec_entry *range;
1670 u8 period = 0;
1671 struct iwl3945_power_mgr *pow_data;
1672
1673 if (mode > IWL_POWER_INDEX_5) {
1674 IWL_DEBUG_POWER("Error invalid power mode \n");
1675 return -1;
1676 }
1677 pow_data = &(priv->power_data_39);
1678
1679 if (pow_data->active_index == IWL_POWER_RANGE_0)
1680 range = &pow_data->pwr_range_0[0];
1681 else
1682 range = &pow_data->pwr_range_1[1];
1683
1684 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1685
1686 #ifdef IWL_MAC80211_DISABLE
1687 if (priv->assoc_network != NULL) {
1688 unsigned long flags;
1689
1690 period = priv->assoc_network->tim.tim_period;
1691 }
1692 #endif /*IWL_MAC80211_DISABLE */
1693 skip = range[mode].no_dtim;
1694
1695 if (period == 0) {
1696 period = 1;
1697 skip = 0;
1698 }
1699
1700 if (skip == 0) {
1701 max_sleep = period;
1702 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1703 } else {
1704 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1705 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1706 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1707 }
1708
1709 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1710 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1711 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1712 }
1713
1714 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1715 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1716 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1717 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1718 le32_to_cpu(cmd->sleep_interval[0]),
1719 le32_to_cpu(cmd->sleep_interval[1]),
1720 le32_to_cpu(cmd->sleep_interval[2]),
1721 le32_to_cpu(cmd->sleep_interval[3]),
1722 le32_to_cpu(cmd->sleep_interval[4]));
1723
1724 return rc;
1725 }
1726
1727 static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
1728 {
1729 u32 uninitialized_var(final_mode);
1730 int rc;
1731 struct iwl_powertable_cmd cmd;
1732
1733 /* If on battery, set to 3,
1734 * if plugged into AC power, set to CAM ("continuously aware mode"),
1735 * else user level */
1736 switch (mode) {
1737 case IWL39_POWER_BATTERY:
1738 final_mode = IWL_POWER_INDEX_3;
1739 break;
1740 case IWL39_POWER_AC:
1741 final_mode = IWL_POWER_MODE_CAM;
1742 break;
1743 default:
1744 final_mode = mode;
1745 break;
1746 }
1747
1748 iwl3945_update_power_cmd(priv, &cmd, final_mode);
1749
1750 /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
1751 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
1752 sizeof(struct iwl3945_powertable_cmd), &cmd);
1753
1754 if (final_mode == IWL_POWER_MODE_CAM)
1755 clear_bit(STATUS_POWER_PMI, &priv->status);
1756 else
1757 set_bit(STATUS_POWER_PMI, &priv->status);
1758
1759 return rc;
1760 }
1761
1762 /**
1763 * iwl3945_scan_cancel - Cancel any currently executing HW scan
1764 *
1765 * NOTE: priv->mutex is not required before calling this function
1766 */
1767 static int iwl3945_scan_cancel(struct iwl_priv *priv)
1768 {
1769 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1770 clear_bit(STATUS_SCANNING, &priv->status);
1771 return 0;
1772 }
1773
1774 if (test_bit(STATUS_SCANNING, &priv->status)) {
1775 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1776 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1777 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1778 queue_work(priv->workqueue, &priv->abort_scan);
1779
1780 } else
1781 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1782
1783 return test_bit(STATUS_SCANNING, &priv->status);
1784 }
1785
1786 return 0;
1787 }
1788
1789 /**
1790 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
1791 * @ms: amount of time to wait (in milliseconds) for scan to abort
1792 *
1793 * NOTE: priv->mutex must be held before calling this function
1794 */
1795 static int iwl3945_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
1796 {
1797 unsigned long now = jiffies;
1798 int ret;
1799
1800 ret = iwl3945_scan_cancel(priv);
1801 if (ret && ms) {
1802 mutex_unlock(&priv->mutex);
1803 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1804 test_bit(STATUS_SCANNING, &priv->status))
1805 msleep(1);
1806 mutex_lock(&priv->mutex);
1807
1808 return test_bit(STATUS_SCANNING, &priv->status);
1809 }
1810
1811 return ret;
1812 }
1813
1814 #define MAX_UCODE_BEACON_INTERVAL 1024
1815 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1816
1817 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
1818 {
1819 u16 new_val = 0;
1820 u16 beacon_factor = 0;
1821
1822 beacon_factor =
1823 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1824 / MAX_UCODE_BEACON_INTERVAL;
1825 new_val = beacon_val / beacon_factor;
1826
1827 return cpu_to_le16(new_val);
1828 }
1829
1830 static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
1831 {
1832 u64 interval_tm_unit;
1833 u64 tsf, result;
1834 unsigned long flags;
1835 struct ieee80211_conf *conf = NULL;
1836 u16 beacon_int = 0;
1837
1838 conf = ieee80211_get_hw_conf(priv->hw);
1839
1840 spin_lock_irqsave(&priv->lock, flags);
1841 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
1842 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1843
1844 tsf = priv->timestamp;
1845
1846 beacon_int = priv->beacon_int;
1847 spin_unlock_irqrestore(&priv->lock, flags);
1848
1849 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
1850 if (beacon_int == 0) {
1851 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1852 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1853 } else {
1854 priv->rxon_timing.beacon_interval =
1855 cpu_to_le16(beacon_int);
1856 priv->rxon_timing.beacon_interval =
1857 iwl3945_adjust_beacon_interval(
1858 le16_to_cpu(priv->rxon_timing.beacon_interval));
1859 }
1860
1861 priv->rxon_timing.atim_window = 0;
1862 } else {
1863 priv->rxon_timing.beacon_interval =
1864 iwl3945_adjust_beacon_interval(conf->beacon_int);
1865 /* TODO: we need to get atim_window from upper stack
1866 * for now we set to 0 */
1867 priv->rxon_timing.atim_window = 0;
1868 }
1869
1870 interval_tm_unit =
1871 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
1872 result = do_div(tsf, interval_tm_unit);
1873 priv->rxon_timing.beacon_init_val =
1874 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
1875
1876 IWL_DEBUG_ASSOC
1877 ("beacon interval %d beacon timer %d beacon tim %d\n",
1878 le16_to_cpu(priv->rxon_timing.beacon_interval),
1879 le32_to_cpu(priv->rxon_timing.beacon_init_val),
1880 le16_to_cpu(priv->rxon_timing.atim_window));
1881 }
1882
1883 static int iwl3945_scan_initiate(struct iwl_priv *priv)
1884 {
1885 if (!iwl_is_ready_rf(priv)) {
1886 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
1887 return -EIO;
1888 }
1889
1890 if (test_bit(STATUS_SCANNING, &priv->status)) {
1891 IWL_DEBUG_SCAN("Scan already in progress.\n");
1892 return -EAGAIN;
1893 }
1894
1895 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1896 IWL_DEBUG_SCAN("Scan request while abort pending. "
1897 "Queuing.\n");
1898 return -EAGAIN;
1899 }
1900
1901 IWL_DEBUG_INFO("Starting scan...\n");
1902 if (priv->cfg->sku & IWL_SKU_G)
1903 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
1904 if (priv->cfg->sku & IWL_SKU_A)
1905 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
1906 set_bit(STATUS_SCANNING, &priv->status);
1907 priv->scan_start = jiffies;
1908 priv->scan_pass_start = priv->scan_start;
1909
1910 queue_work(priv->workqueue, &priv->request_scan);
1911
1912 return 0;
1913 }
1914
1915 static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
1916 {
1917 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
1918
1919 if (hw_decrypt)
1920 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
1921 else
1922 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
1923
1924 return 0;
1925 }
1926
1927 static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
1928 enum ieee80211_band band)
1929 {
1930 if (band == IEEE80211_BAND_5GHZ) {
1931 priv->staging39_rxon.flags &=
1932 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1933 | RXON_FLG_CCK_MSK);
1934 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1935 } else {
1936 /* Copied from iwl3945_bg_post_associate() */
1937 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1938 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1939 else
1940 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1941
1942 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1943 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1944
1945 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1946 priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1947 priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
1948 }
1949 }
1950
1951 /*
1952 * initialize rxon structure with default values from eeprom
1953 */
1954 static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
1955 int mode)
1956 {
1957 const struct iwl_channel_info *ch_info;
1958
1959 memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
1960
1961 switch (mode) {
1962 case NL80211_IFTYPE_AP:
1963 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
1964 break;
1965
1966 case NL80211_IFTYPE_STATION:
1967 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
1968 priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1969 break;
1970
1971 case NL80211_IFTYPE_ADHOC:
1972 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1973 priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1974 priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1975 RXON_FILTER_ACCEPT_GRP_MSK;
1976 break;
1977
1978 case NL80211_IFTYPE_MONITOR:
1979 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
1980 priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
1981 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
1982 break;
1983 default:
1984 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1985 break;
1986 }
1987
1988 #if 0
1989 /* TODO: Figure out when short_preamble would be set and cache from
1990 * that */
1991 if (!hw_to_local(priv->hw)->short_preamble)
1992 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1993 else
1994 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1995 #endif
1996
1997 ch_info = iwl3945_get_channel_info(priv, priv->band,
1998 le16_to_cpu(priv->active39_rxon.channel));
1999
2000 if (!ch_info)
2001 ch_info = &priv->channel_info[0];
2002
2003 /*
2004 * in some case A channels are all non IBSS
2005 * in this case force B/G channel
2006 */
2007 if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
2008 ch_info = &priv->channel_info[0];
2009
2010 priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
2011 if (is_channel_a_band(ch_info))
2012 priv->band = IEEE80211_BAND_5GHZ;
2013 else
2014 priv->band = IEEE80211_BAND_2GHZ;
2015
2016 iwl3945_set_flags_for_phymode(priv, priv->band);
2017
2018 priv->staging39_rxon.ofdm_basic_rates =
2019 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2020 priv->staging39_rxon.cck_basic_rates =
2021 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2022 }
2023
2024 static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
2025 {
2026 if (mode == NL80211_IFTYPE_ADHOC) {
2027 const struct iwl_channel_info *ch_info;
2028
2029 ch_info = iwl3945_get_channel_info(priv,
2030 priv->band,
2031 le16_to_cpu(priv->staging39_rxon.channel));
2032
2033 if (!ch_info || !is_channel_ibss(ch_info)) {
2034 IWL_ERR(priv, "channel %d not IBSS channel\n",
2035 le16_to_cpu(priv->staging39_rxon.channel));
2036 return -EINVAL;
2037 }
2038 }
2039
2040 iwl3945_connection_init_rx_config(priv, mode);
2041 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2042
2043 iwl3945_clear_stations_table(priv);
2044
2045 /* don't commit rxon if rf-kill is on*/
2046 if (!iwl_is_ready_rf(priv))
2047 return -EAGAIN;
2048
2049 cancel_delayed_work(&priv->scan_check);
2050 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2051 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2052 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2053 return -EAGAIN;
2054 }
2055
2056 iwl3945_commit_rxon(priv);
2057
2058 return 0;
2059 }
2060
2061 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
2062 struct ieee80211_tx_info *info,
2063 struct iwl_cmd *cmd,
2064 struct sk_buff *skb_frag,
2065 int last_frag)
2066 {
2067 struct iwl3945_hw_key *keyinfo =
2068 &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
2069
2070 switch (keyinfo->alg) {
2071 case ALG_CCMP:
2072 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2073 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2074 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
2075 break;
2076
2077 case ALG_TKIP:
2078 #if 0
2079 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2080
2081 if (last_frag)
2082 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2083 8);
2084 else
2085 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2086 #endif
2087 break;
2088
2089 case ALG_WEP:
2090 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2091 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2092
2093 if (keyinfo->keylen == 13)
2094 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2095
2096 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2097
2098 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2099 "with key %d\n", info->control.hw_key->hw_key_idx);
2100 break;
2101
2102 default:
2103 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
2104 break;
2105 }
2106 }
2107
2108 /*
2109 * handle build REPLY_TX command notification.
2110 */
2111 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
2112 struct iwl_cmd *cmd,
2113 struct ieee80211_tx_info *info,
2114 struct ieee80211_hdr *hdr,
2115 int is_unicast, u8 std_id)
2116 {
2117 __le16 fc = hdr->frame_control;
2118 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2119 u8 rc_flags = info->control.rates[0].flags;
2120
2121 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2122 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2123 tx_flags |= TX_CMD_FLG_ACK_MSK;
2124 if (ieee80211_is_mgmt(fc))
2125 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2126 if (ieee80211_is_probe_resp(fc) &&
2127 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2128 tx_flags |= TX_CMD_FLG_TSF_MSK;
2129 } else {
2130 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2131 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2132 }
2133
2134 cmd->cmd.tx.sta_id = std_id;
2135 if (ieee80211_has_morefrags(fc))
2136 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2137
2138 if (ieee80211_is_data_qos(fc)) {
2139 u8 *qc = ieee80211_get_qos_ctl(hdr);
2140 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
2141 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2142 } else {
2143 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2144 }
2145
2146 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
2147 tx_flags |= TX_CMD_FLG_RTS_MSK;
2148 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2149 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
2150 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2151 tx_flags |= TX_CMD_FLG_CTS_MSK;
2152 }
2153
2154 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2155 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2156
2157 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2158 if (ieee80211_is_mgmt(fc)) {
2159 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2160 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2161 else
2162 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2163 } else {
2164 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2165 #ifdef CONFIG_IWL3945_LEDS
2166 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2167 #endif
2168 }
2169
2170 cmd->cmd.tx.driver_txop = 0;
2171 cmd->cmd.tx.tx_flags = tx_flags;
2172 cmd->cmd.tx.next_frame_len = 0;
2173 }
2174
2175 /**
2176 * iwl3945_get_sta_id - Find station's index within station table
2177 */
2178 static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
2179 {
2180 int sta_id;
2181 u16 fc = le16_to_cpu(hdr->frame_control);
2182
2183 /* If this frame is broadcast or management, use broadcast station id */
2184 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2185 is_multicast_ether_addr(hdr->addr1))
2186 return priv->hw_params.bcast_sta_id;
2187
2188 switch (priv->iw_mode) {
2189
2190 /* If we are a client station in a BSS network, use the special
2191 * AP station entry (that's the only station we communicate with) */
2192 case NL80211_IFTYPE_STATION:
2193 return IWL_AP_ID;
2194
2195 /* If we are an AP, then find the station, or use BCAST */
2196 case NL80211_IFTYPE_AP:
2197 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2198 if (sta_id != IWL_INVALID_STATION)
2199 return sta_id;
2200 return priv->hw_params.bcast_sta_id;
2201
2202 /* If this frame is going out to an IBSS network, find the station,
2203 * or create a new station table entry */
2204 case NL80211_IFTYPE_ADHOC: {
2205 /* Create new station table entry */
2206 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2207 if (sta_id != IWL_INVALID_STATION)
2208 return sta_id;
2209
2210 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2211
2212 if (sta_id != IWL_INVALID_STATION)
2213 return sta_id;
2214
2215 IWL_DEBUG_DROP("Station %pM not in station map. "
2216 "Defaulting to broadcast...\n",
2217 hdr->addr1);
2218 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2219 return priv->hw_params.bcast_sta_id;
2220 }
2221 /* If we are in monitor mode, use BCAST. This is required for
2222 * packet injection. */
2223 case NL80211_IFTYPE_MONITOR:
2224 return priv->hw_params.bcast_sta_id;
2225
2226 default:
2227 IWL_WARN(priv, "Unknown mode of operation: %d\n",
2228 priv->iw_mode);
2229 return priv->hw_params.bcast_sta_id;
2230 }
2231 }
2232
2233 /*
2234 * start REPLY_TX command process
2235 */
2236 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
2237 {
2238 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2239 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2240 struct iwl3945_tfd_frame *tfd;
2241 u32 *control_flags;
2242 int txq_id = skb_get_queue_mapping(skb);
2243 struct iwl3945_tx_queue *txq = NULL;
2244 struct iwl_queue *q = NULL;
2245 dma_addr_t phys_addr;
2246 dma_addr_t txcmd_phys;
2247 struct iwl_cmd *out_cmd = NULL;
2248 u16 len, idx, len_org, hdr_len;
2249 u8 id;
2250 u8 unicast;
2251 u8 sta_id;
2252 u8 tid = 0;
2253 u16 seq_number = 0;
2254 __le16 fc;
2255 u8 wait_write_ptr = 0;
2256 u8 *qc = NULL;
2257 unsigned long flags;
2258 int rc;
2259
2260 spin_lock_irqsave(&priv->lock, flags);
2261 if (iwl_is_rfkill(priv)) {
2262 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2263 goto drop_unlock;
2264 }
2265
2266 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2267 IWL_ERR(priv, "ERROR: No TX rate available.\n");
2268 goto drop_unlock;
2269 }
2270
2271 unicast = !is_multicast_ether_addr(hdr->addr1);
2272 id = 0;
2273
2274 fc = hdr->frame_control;
2275
2276 #ifdef CONFIG_IWL3945_DEBUG
2277 if (ieee80211_is_auth(fc))
2278 IWL_DEBUG_TX("Sending AUTH frame\n");
2279 else if (ieee80211_is_assoc_req(fc))
2280 IWL_DEBUG_TX("Sending ASSOC frame\n");
2281 else if (ieee80211_is_reassoc_req(fc))
2282 IWL_DEBUG_TX("Sending REASSOC frame\n");
2283 #endif
2284
2285 /* drop all data frame if we are not associated */
2286 if (ieee80211_is_data(fc) &&
2287 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
2288 (!iwl3945_is_associated(priv) ||
2289 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
2290 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2291 goto drop_unlock;
2292 }
2293
2294 spin_unlock_irqrestore(&priv->lock, flags);
2295
2296 hdr_len = ieee80211_hdrlen(fc);
2297
2298 /* Find (or create) index into station table for destination station */
2299 sta_id = iwl3945_get_sta_id(priv, hdr);
2300 if (sta_id == IWL_INVALID_STATION) {
2301 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
2302 hdr->addr1);
2303 goto drop;
2304 }
2305
2306 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2307
2308 if (ieee80211_is_data_qos(fc)) {
2309 qc = ieee80211_get_qos_ctl(hdr);
2310 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
2311 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
2312 IEEE80211_SCTL_SEQ;
2313 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2314 (hdr->seq_ctrl &
2315 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2316 seq_number += 0x10;
2317 }
2318
2319 /* Descriptor for chosen Tx queue */
2320 txq = &priv->txq39[txq_id];
2321 q = &txq->q;
2322
2323 spin_lock_irqsave(&priv->lock, flags);
2324
2325 /* Set up first empty TFD within this queue's circular TFD buffer */
2326 tfd = &txq->bd[q->write_ptr];
2327 memset(tfd, 0, sizeof(*tfd));
2328 control_flags = (u32 *) tfd;
2329 idx = get_cmd_index(q, q->write_ptr, 0);
2330
2331 /* Set up driver data for this TFD */
2332 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2333 txq->txb[q->write_ptr].skb[0] = skb;
2334
2335 /* Init first empty entry in queue's array of Tx/cmd buffers */
2336 out_cmd = &txq->cmd[idx];
2337 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2338 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2339
2340 /*
2341 * Set up the Tx-command (not MAC!) header.
2342 * Store the chosen Tx queue and TFD index within the sequence field;
2343 * after Tx, uCode's Tx response will return this value so driver can
2344 * locate the frame within the tx queue and do post-tx processing.
2345 */
2346 out_cmd->hdr.cmd = REPLY_TX;
2347 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2348 INDEX_TO_SEQ(q->write_ptr)));
2349
2350 /* Copy MAC header from skb into command buffer */
2351 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2352
2353 /*
2354 * Use the first empty entry in this queue's command buffer array
2355 * to contain the Tx command and MAC header concatenated together
2356 * (payload data will be in another buffer).
2357 * Size of this varies, due to varying MAC header length.
2358 * If end is not dword aligned, we'll have 2 extra bytes at the end
2359 * of the MAC header (device reads on dword boundaries).
2360 * We'll tell device about this padding later.
2361 */
2362 len = sizeof(struct iwl3945_tx_cmd) +
2363 sizeof(struct iwl_cmd_header) + hdr_len;
2364
2365 len_org = len;
2366 len = (len + 3) & ~3;
2367
2368 if (len_org != len)
2369 len_org = 1;
2370 else
2371 len_org = 0;
2372
2373 /* Physical address of this Tx command's header (not MAC header!),
2374 * within command buffer array. */
2375 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
2376 offsetof(struct iwl_cmd, hdr);
2377
2378 /* Add buffer containing Tx command and MAC(!) header to TFD's
2379 * first entry */
2380 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2381
2382 if (info->control.hw_key)
2383 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2384
2385 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2386 * if any (802.11 null frames have no payload). */
2387 len = skb->len - hdr_len;
2388 if (len) {
2389 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2390 len, PCI_DMA_TODEVICE);
2391 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2392 }
2393
2394 if (!len)
2395 /* If there is no payload, then we use only one Tx buffer */
2396 *control_flags = TFD_CTL_COUNT_SET(1);
2397 else
2398 /* Else use 2 buffers.
2399 * Tell 3945 about any padding after MAC header */
2400 *control_flags = TFD_CTL_COUNT_SET(2) |
2401 TFD_CTL_PAD_SET(U32_PAD(len));
2402
2403 /* Total # bytes to be transmitted */
2404 len = (u16)skb->len;
2405 out_cmd->cmd.tx.len = cpu_to_le16(len);
2406
2407 /* TODO need this for burst mode later on */
2408 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
2409
2410 /* set is_hcca to 0; it probably will never be implemented */
2411 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2412
2413 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2414 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2415
2416 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2417 txq->need_update = 1;
2418 if (qc)
2419 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
2420 } else {
2421 wait_write_ptr = 1;
2422 txq->need_update = 0;
2423 }
2424
2425 iwl_print_hex_dump(priv, IWL_DL_TX, out_cmd->cmd.payload,
2426 sizeof(out_cmd->cmd.tx));
2427
2428 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2429 ieee80211_hdrlen(fc));
2430
2431 /* Tell device the write index *just past* this latest filled TFD */
2432 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2433 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2434 spin_unlock_irqrestore(&priv->lock, flags);
2435
2436 if (rc)
2437 return rc;
2438
2439 if ((iwl_queue_space(q) < q->high_mark)
2440 && priv->mac80211_registered) {
2441 if (wait_write_ptr) {
2442 spin_lock_irqsave(&priv->lock, flags);
2443 txq->need_update = 1;
2444 iwl3945_tx_queue_update_write_ptr(priv, txq);
2445 spin_unlock_irqrestore(&priv->lock, flags);
2446 }
2447
2448 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2449 }
2450
2451 return 0;
2452
2453 drop_unlock:
2454 spin_unlock_irqrestore(&priv->lock, flags);
2455 drop:
2456 return -1;
2457 }
2458
2459 static void iwl3945_set_rate(struct iwl_priv *priv)
2460 {
2461 const struct ieee80211_supported_band *sband = NULL;
2462 struct ieee80211_rate *rate;
2463 int i;
2464
2465 sband = iwl3945_get_band(priv, priv->band);
2466 if (!sband) {
2467 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
2468 return;
2469 }
2470
2471 priv->active_rate = 0;
2472 priv->active_rate_basic = 0;
2473
2474 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2475 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2476
2477 for (i = 0; i < sband->n_bitrates; i++) {
2478 rate = &sband->bitrates[i];
2479 if ((rate->hw_value < IWL_RATE_COUNT) &&
2480 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2481 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2482 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2483 priv->active_rate |= (1 << rate->hw_value);
2484 }
2485 }
2486
2487 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2488 priv->active_rate, priv->active_rate_basic);
2489
2490 /*
2491 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2492 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2493 * OFDM
2494 */
2495 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2496 priv->staging39_rxon.cck_basic_rates =
2497 ((priv->active_rate_basic &
2498 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2499 else
2500 priv->staging39_rxon.cck_basic_rates =
2501 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2502
2503 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2504 priv->staging39_rxon.ofdm_basic_rates =
2505 ((priv->active_rate_basic &
2506 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2507 IWL_FIRST_OFDM_RATE) & 0xFF;
2508 else
2509 priv->staging39_rxon.ofdm_basic_rates =
2510 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2511 }
2512
2513 static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
2514 {
2515 unsigned long flags;
2516
2517 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2518 return;
2519
2520 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2521 disable_radio ? "OFF" : "ON");
2522
2523 if (disable_radio) {
2524 iwl3945_scan_cancel(priv);
2525 /* FIXME: This is a workaround for AP */
2526 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2527 spin_lock_irqsave(&priv->lock, flags);
2528 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
2529 CSR_UCODE_SW_BIT_RFKILL);
2530 spin_unlock_irqrestore(&priv->lock, flags);
2531 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2532 set_bit(STATUS_RF_KILL_SW, &priv->status);
2533 }
2534 return;
2535 }
2536
2537 spin_lock_irqsave(&priv->lock, flags);
2538 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2539
2540 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2541 spin_unlock_irqrestore(&priv->lock, flags);
2542
2543 /* wake up ucode */
2544 msleep(10);
2545
2546 spin_lock_irqsave(&priv->lock, flags);
2547 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2548 if (!iwl_grab_nic_access(priv))
2549 iwl_release_nic_access(priv);
2550 spin_unlock_irqrestore(&priv->lock, flags);
2551
2552 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2553 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2554 "disabled by HW switch\n");
2555 return;
2556 }
2557
2558 if (priv->is_open)
2559 queue_work(priv->workqueue, &priv->restart);
2560 return;
2561 }
2562
2563 void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
2564 u32 decrypt_res, struct ieee80211_rx_status *stats)
2565 {
2566 u16 fc =
2567 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2568
2569 if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2570 return;
2571
2572 if (!(fc & IEEE80211_FCTL_PROTECTED))
2573 return;
2574
2575 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2576 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2577 case RX_RES_STATUS_SEC_TYPE_TKIP:
2578 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2579 RX_RES_STATUS_BAD_ICV_MIC)
2580 stats->flag |= RX_FLAG_MMIC_ERROR;
2581 case RX_RES_STATUS_SEC_TYPE_WEP:
2582 case RX_RES_STATUS_SEC_TYPE_CCMP:
2583 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2584 RX_RES_STATUS_DECRYPT_OK) {
2585 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2586 stats->flag |= RX_FLAG_DECRYPTED;
2587 }
2588 break;
2589
2590 default:
2591 break;
2592 }
2593 }
2594
2595 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2596
2597 #include "iwl-spectrum.h"
2598
2599 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2600 #define BEACON_TIME_MASK_HIGH 0xFF000000
2601 #define TIME_UNIT 1024
2602
2603 /*
2604 * extended beacon time format
2605 * time in usec will be changed into a 32-bit value in 8:24 format
2606 * the high 1 byte is the beacon counts
2607 * the lower 3 bytes is the time in usec within one beacon interval
2608 */
2609
2610 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2611 {
2612 u32 quot;
2613 u32 rem;
2614 u32 interval = beacon_interval * 1024;
2615
2616 if (!interval || !usec)
2617 return 0;
2618
2619 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2620 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2621
2622 return (quot << 24) + rem;
2623 }
2624
2625 /* base is usually what we get from ucode with each received frame,
2626 * the same as HW timer counter counting down
2627 */
2628
2629 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2630 {
2631 u32 base_low = base & BEACON_TIME_MASK_LOW;
2632 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2633 u32 interval = beacon_interval * TIME_UNIT;
2634 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2635 (addon & BEACON_TIME_MASK_HIGH);
2636
2637 if (base_low > addon_low)
2638 res += base_low - addon_low;
2639 else if (base_low < addon_low) {
2640 res += interval + base_low - addon_low;
2641 res += (1 << 24);
2642 } else
2643 res += (1 << 24);
2644
2645 return cpu_to_le32(res);
2646 }
2647
2648 static int iwl3945_get_measurement(struct iwl_priv *priv,
2649 struct ieee80211_measurement_params *params,
2650 u8 type)
2651 {
2652 struct iwl_spectrum_cmd spectrum;
2653 struct iwl_rx_packet *res;
2654 struct iwl_host_cmd cmd = {
2655 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2656 .data = (void *)&spectrum,
2657 .meta.flags = CMD_WANT_SKB,
2658 };
2659 u32 add_time = le64_to_cpu(params->start_time);
2660 int rc;
2661 int spectrum_resp_status;
2662 int duration = le16_to_cpu(params->duration);
2663
2664 if (iwl3945_is_associated(priv))
2665 add_time =
2666 iwl3945_usecs_to_beacons(
2667 le64_to_cpu(params->start_time) - priv->last_tsf,
2668 le16_to_cpu(priv->rxon_timing.beacon_interval));
2669
2670 memset(&spectrum, 0, sizeof(spectrum));
2671
2672 spectrum.channel_count = cpu_to_le16(1);
2673 spectrum.flags =
2674 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2675 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2676 cmd.len = sizeof(spectrum);
2677 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2678
2679 if (iwl3945_is_associated(priv))
2680 spectrum.start_time =
2681 iwl3945_add_beacon_time(priv->last_beacon_time,
2682 add_time,
2683 le16_to_cpu(priv->rxon_timing.beacon_interval));
2684 else
2685 spectrum.start_time = 0;
2686
2687 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2688 spectrum.channels[0].channel = params->channel;
2689 spectrum.channels[0].type = type;
2690 if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
2691 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2692 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2693
2694 rc = iwl3945_send_cmd_sync(priv, &cmd);
2695 if (rc)
2696 return rc;
2697
2698 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
2699 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2700 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
2701 rc = -EIO;
2702 }
2703
2704 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2705 switch (spectrum_resp_status) {
2706 case 0: /* Command will be handled */
2707 if (res->u.spectrum.id != 0xff) {
2708 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2709 res->u.spectrum.id);
2710 priv->measurement_status &= ~MEASUREMENT_READY;
2711 }
2712 priv->measurement_status |= MEASUREMENT_ACTIVE;
2713 rc = 0;
2714 break;
2715
2716 case 1: /* Command will not be handled */
2717 rc = -EAGAIN;
2718 break;
2719 }
2720
2721 dev_kfree_skb_any(cmd.meta.u.skb);
2722
2723 return rc;
2724 }
2725 #endif
2726
2727 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
2728 struct iwl_rx_mem_buffer *rxb)
2729 {
2730 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2731 struct iwl_alive_resp *palive;
2732 struct delayed_work *pwork;
2733
2734 palive = &pkt->u.alive_frame;
2735
2736 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2737 "0x%01X 0x%01X\n",
2738 palive->is_valid, palive->ver_type,
2739 palive->ver_subtype);
2740
2741 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2742 IWL_DEBUG_INFO("Initialization Alive received.\n");
2743 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
2744 sizeof(struct iwl_alive_resp));
2745 pwork = &priv->init_alive_start;
2746 } else {
2747 IWL_DEBUG_INFO("Runtime Alive received.\n");
2748 memcpy(&priv->card_alive, &pkt->u.alive_frame,
2749 sizeof(struct iwl_alive_resp));
2750 pwork = &priv->alive_start;
2751 iwl3945_disable_events(priv);
2752 }
2753
2754 /* We delay the ALIVE response by 5ms to
2755 * give the HW RF Kill time to activate... */
2756 if (palive->is_valid == UCODE_VALID_OK)
2757 queue_delayed_work(priv->workqueue, pwork,
2758 msecs_to_jiffies(5));
2759 else
2760 IWL_WARN(priv, "uCode did not respond OK.\n");
2761 }
2762
2763 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
2764 struct iwl_rx_mem_buffer *rxb)
2765 {
2766 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2767
2768 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2769 return;
2770 }
2771
2772 static void iwl3945_rx_reply_error(struct iwl_priv *priv,
2773 struct iwl_rx_mem_buffer *rxb)
2774 {
2775 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2776
2777 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2778 "seq 0x%04X ser 0x%08X\n",
2779 le32_to_cpu(pkt->u.err_resp.error_type),
2780 get_cmd_string(pkt->u.err_resp.cmd_id),
2781 pkt->u.err_resp.cmd_id,
2782 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2783 le32_to_cpu(pkt->u.err_resp.error_info));
2784 }
2785
2786 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2787
2788 static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
2789 {
2790 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2791 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
2792 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
2793 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
2794 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
2795 rxon->channel = csa->channel;
2796 priv->staging39_rxon.channel = csa->channel;
2797 }
2798
2799 static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
2800 struct iwl_rx_mem_buffer *rxb)
2801 {
2802 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2803 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2804 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
2805
2806 if (!report->state) {
2807 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
2808 "Spectrum Measure Notification: Start\n");
2809 return;
2810 }
2811
2812 memcpy(&priv->measure_report, report, sizeof(*report));
2813 priv->measurement_status |= MEASUREMENT_READY;
2814 #endif
2815 }
2816
2817 static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
2818 struct iwl_rx_mem_buffer *rxb)
2819 {
2820 #ifdef CONFIG_IWL3945_DEBUG
2821 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2822 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2823 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
2824 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2825 #endif
2826 }
2827
2828 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2829 struct iwl_rx_mem_buffer *rxb)
2830 {
2831 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2832 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
2833 "notification for %s:\n",
2834 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2835 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
2836 le32_to_cpu(pkt->len));
2837 }
2838
2839 static void iwl3945_bg_beacon_update(struct work_struct *work)
2840 {
2841 struct iwl_priv *priv =
2842 container_of(work, struct iwl_priv, beacon_update);
2843 struct sk_buff *beacon;
2844
2845 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
2846 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
2847
2848 if (!beacon) {
2849 IWL_ERR(priv, "update beacon failed\n");
2850 return;
2851 }
2852
2853 mutex_lock(&priv->mutex);
2854 /* new beacon skb is allocated every time; dispose previous.*/
2855 if (priv->ibss_beacon)
2856 dev_kfree_skb(priv->ibss_beacon);
2857
2858 priv->ibss_beacon = beacon;
2859 mutex_unlock(&priv->mutex);
2860
2861 iwl3945_send_beacon_cmd(priv);
2862 }
2863
2864 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
2865 struct iwl_rx_mem_buffer *rxb)
2866 {
2867 #ifdef CONFIG_IWL3945_DEBUG
2868 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2869 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
2870 u8 rate = beacon->beacon_notify_hdr.rate;
2871
2872 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
2873 "tsf %d %d rate %d\n",
2874 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
2875 beacon->beacon_notify_hdr.failure_frame,
2876 le32_to_cpu(beacon->ibss_mgr_status),
2877 le32_to_cpu(beacon->high_tsf),
2878 le32_to_cpu(beacon->low_tsf), rate);
2879 #endif
2880
2881 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
2882 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
2883 queue_work(priv->workqueue, &priv->beacon_update);
2884 }
2885
2886 /* Service response to REPLY_SCAN_CMD (0x80) */
2887 static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
2888 struct iwl_rx_mem_buffer *rxb)
2889 {
2890 #ifdef CONFIG_IWL3945_DEBUG
2891 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2892 struct iwl_scanreq_notification *notif =
2893 (struct iwl_scanreq_notification *)pkt->u.raw;
2894
2895 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
2896 #endif
2897 }
2898
2899 /* Service SCAN_START_NOTIFICATION (0x82) */
2900 static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
2901 struct iwl_rx_mem_buffer *rxb)
2902 {
2903 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2904 struct iwl_scanstart_notification *notif =
2905 (struct iwl_scanstart_notification *)pkt->u.raw;
2906 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
2907 IWL_DEBUG_SCAN("Scan start: "
2908 "%d [802.11%s] "
2909 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
2910 notif->channel,
2911 notif->band ? "bg" : "a",
2912 notif->tsf_high,
2913 notif->tsf_low, notif->status, notif->beacon_timer);
2914 }
2915
2916 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
2917 static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
2918 struct iwl_rx_mem_buffer *rxb)
2919 {
2920 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2921 struct iwl_scanresults_notification *notif =
2922 (struct iwl_scanresults_notification *)pkt->u.raw;
2923
2924 IWL_DEBUG_SCAN("Scan ch.res: "
2925 "%d [802.11%s] "
2926 "(TSF: 0x%08X:%08X) - %d "
2927 "elapsed=%lu usec (%dms since last)\n",
2928 notif->channel,
2929 notif->band ? "bg" : "a",
2930 le32_to_cpu(notif->tsf_high),
2931 le32_to_cpu(notif->tsf_low),
2932 le32_to_cpu(notif->statistics[0]),
2933 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
2934 jiffies_to_msecs(elapsed_jiffies
2935 (priv->last_scan_jiffies, jiffies)));
2936
2937 priv->last_scan_jiffies = jiffies;
2938 priv->next_scan_jiffies = 0;
2939 }
2940
2941 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
2942 static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
2943 struct iwl_rx_mem_buffer *rxb)
2944 {
2945 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2946 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
2947
2948 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
2949 scan_notif->scanned_channels,
2950 scan_notif->tsf_low,
2951 scan_notif->tsf_high, scan_notif->status);
2952
2953 /* The HW is no longer scanning */
2954 clear_bit(STATUS_SCAN_HW, &priv->status);
2955
2956 /* The scan completion notification came in, so kill that timer... */
2957 cancel_delayed_work(&priv->scan_check);
2958
2959 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
2960 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
2961 "2.4" : "5.2",
2962 jiffies_to_msecs(elapsed_jiffies
2963 (priv->scan_pass_start, jiffies)));
2964
2965 /* Remove this scanned band from the list of pending
2966 * bands to scan, band G precedes A in order of scanning
2967 * as seen in iwl3945_bg_request_scan */
2968 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
2969 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
2970 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
2971 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
2972
2973 /* If a request to abort was given, or the scan did not succeed
2974 * then we reset the scan state machine and terminate,
2975 * re-queuing another scan if one has been requested */
2976 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2977 IWL_DEBUG_INFO("Aborted scan completed.\n");
2978 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
2979 } else {
2980 /* If there are more bands on this scan pass reschedule */
2981 if (priv->scan_bands > 0)
2982 goto reschedule;
2983 }
2984
2985 priv->last_scan_jiffies = jiffies;
2986 priv->next_scan_jiffies = 0;
2987 IWL_DEBUG_INFO("Setting scan to off\n");
2988
2989 clear_bit(STATUS_SCANNING, &priv->status);
2990
2991 IWL_DEBUG_INFO("Scan took %dms\n",
2992 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
2993
2994 queue_work(priv->workqueue, &priv->scan_completed);
2995
2996 return;
2997
2998 reschedule:
2999 priv->scan_pass_start = jiffies;
3000 queue_work(priv->workqueue, &priv->request_scan);
3001 }
3002
3003 /* Handle notification from uCode that card's power state is changing
3004 * due to software, hardware, or critical temperature RFKILL */
3005 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
3006 struct iwl_rx_mem_buffer *rxb)
3007 {
3008 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3009 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3010 unsigned long status = priv->status;
3011
3012 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3013 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3014 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3015
3016 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
3017 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3018
3019 if (flags & HW_CARD_DISABLED)
3020 set_bit(STATUS_RF_KILL_HW, &priv->status);
3021 else
3022 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3023
3024
3025 if (flags & SW_CARD_DISABLED)
3026 set_bit(STATUS_RF_KILL_SW, &priv->status);
3027 else
3028 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3029
3030 iwl3945_scan_cancel(priv);
3031
3032 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3033 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3034 (test_bit(STATUS_RF_KILL_SW, &status) !=
3035 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3036 queue_work(priv->workqueue, &priv->rf_kill);
3037 else
3038 wake_up_interruptible(&priv->wait_command_queue);
3039 }
3040
3041 /**
3042 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3043 *
3044 * Setup the RX handlers for each of the reply types sent from the uCode
3045 * to the host.
3046 *
3047 * This function chains into the hardware specific files for them to setup
3048 * any hardware specific handlers as well.
3049 */
3050 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
3051 {
3052 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3053 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3054 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3055 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3056 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3057 iwl3945_rx_spectrum_measure_notif;
3058 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3059 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3060 iwl3945_rx_pm_debug_statistics_notif;
3061 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3062
3063 /*
3064 * The same handler is used for both the REPLY to a discrete
3065 * statistics request from the host as well as for the periodic
3066 * statistics notifications (after received beacons) from the uCode.
3067 */
3068 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3069 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3070
3071 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3072 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3073 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3074 iwl3945_rx_scan_results_notif;
3075 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3076 iwl3945_rx_scan_complete_notif;
3077 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3078
3079 /* Set up hardware specific Rx handlers */
3080 iwl3945_hw_rx_handler_setup(priv);
3081 }
3082
3083 /**
3084 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3085 * When FW advances 'R' index, all entries between old and new 'R' index
3086 * need to be reclaimed.
3087 */
3088 static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
3089 int txq_id, int index)
3090 {
3091 struct iwl3945_tx_queue *txq = &priv->txq39[txq_id];
3092 struct iwl_queue *q = &txq->q;
3093 int nfreed = 0;
3094
3095 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3096 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
3097 "is out of range [0-%d] %d %d.\n", txq_id,
3098 index, q->n_bd, q->write_ptr, q->read_ptr);
3099 return;
3100 }
3101
3102 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3103 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3104 if (nfreed > 1) {
3105 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
3106 q->write_ptr, q->read_ptr);
3107 queue_work(priv->workqueue, &priv->restart);
3108 break;
3109 }
3110 nfreed++;
3111 }
3112 }
3113
3114
3115 /**
3116 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3117 * @rxb: Rx buffer to reclaim
3118 *
3119 * If an Rx buffer has an async callback associated with it the callback
3120 * will be executed. The attached skb (if present) will only be freed
3121 * if the callback returns 1
3122 */
3123 static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
3124 struct iwl_rx_mem_buffer *rxb)
3125 {
3126 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3127 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3128 int txq_id = SEQ_TO_QUEUE(sequence);
3129 int index = SEQ_TO_INDEX(sequence);
3130 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3131 int cmd_index;
3132 struct iwl_cmd *cmd;
3133
3134 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3135
3136 cmd_index = get_cmd_index(&priv->txq39[IWL_CMD_QUEUE_NUM].q, index, huge);
3137 cmd = &priv->txq39[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3138
3139 /* Input error checking is done when commands are added to queue. */
3140 if (cmd->meta.flags & CMD_WANT_SKB) {
3141 cmd->meta.source->u.skb = rxb->skb;
3142 rxb->skb = NULL;
3143 } else if (cmd->meta.u.callback &&
3144 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3145 rxb->skb = NULL;
3146
3147 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3148
3149 if (!(cmd->meta.flags & CMD_ASYNC)) {
3150 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3151 wake_up_interruptible(&priv->wait_command_queue);
3152 }
3153 }
3154
3155 /************************** RX-FUNCTIONS ****************************/
3156 /*
3157 * Rx theory of operation
3158 *
3159 * The host allocates 32 DMA target addresses and passes the host address
3160 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3161 * 0 to 31
3162 *
3163 * Rx Queue Indexes
3164 * The host/firmware share two index registers for managing the Rx buffers.
3165 *
3166 * The READ index maps to the first position that the firmware may be writing
3167 * to -- the driver can read up to (but not including) this position and get
3168 * good data.
3169 * The READ index is managed by the firmware once the card is enabled.
3170 *
3171 * The WRITE index maps to the last position the driver has read from -- the
3172 * position preceding WRITE is the last slot the firmware can place a packet.
3173 *
3174 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3175 * WRITE = READ.
3176 *
3177 * During initialization, the host sets up the READ queue position to the first
3178 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3179 *
3180 * When the firmware places a packet in a buffer, it will advance the READ index
3181 * and fire the RX interrupt. The driver can then query the READ index and
3182 * process as many packets as possible, moving the WRITE index forward as it
3183 * resets the Rx queue buffers with new memory.
3184 *
3185 * The management in the driver is as follows:
3186 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3187 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3188 * to replenish the iwl->rxq->rx_free.
3189 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3190 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3191 * 'processed' and 'read' driver indexes as well)
3192 * + A received packet is processed and handed to the kernel network stack,
3193 * detached from the iwl->rxq. The driver 'processed' index is updated.
3194 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3195 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3196 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3197 * were enough free buffers and RX_STALLED is set it is cleared.
3198 *
3199 *
3200 * Driver sequence:
3201 *
3202 * iwl3945_rx_queue_alloc() Allocates rx_free
3203 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3204 * iwl3945_rx_queue_restock
3205 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3206 * queue, updates firmware pointers, and updates
3207 * the WRITE index. If insufficient rx_free buffers
3208 * are available, schedules iwl3945_rx_replenish
3209 *
3210 * -- enable interrupts --
3211 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
3212 * READ INDEX, detaching the SKB from the pool.
3213 * Moves the packet buffer from queue to rx_used.
3214 * Calls iwl3945_rx_queue_restock to refill any empty
3215 * slots.
3216 * ...
3217 *
3218 */
3219
3220 /**
3221 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3222 */
3223 static int iwl3945_rx_queue_space(const struct iwl_rx_queue *q)
3224 {
3225 int s = q->read - q->write;
3226 if (s <= 0)
3227 s += RX_QUEUE_SIZE;
3228 /* keep some buffer to not confuse full and empty queue */
3229 s -= 2;
3230 if (s < 0)
3231 s = 0;
3232 return s;
3233 }
3234
3235 /**
3236 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3237 */
3238 int iwl3945_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
3239 {
3240 u32 reg = 0;
3241 int rc = 0;
3242 unsigned long flags;
3243
3244 spin_lock_irqsave(&q->lock, flags);
3245
3246 if (q->need_update == 0)
3247 goto exit_unlock;
3248
3249 /* If power-saving is in use, make sure device is awake */
3250 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3251 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3252
3253 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3254 iwl_set_bit(priv, CSR_GP_CNTRL,
3255 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3256 goto exit_unlock;
3257 }
3258
3259 rc = iwl_grab_nic_access(priv);
3260 if (rc)
3261 goto exit_unlock;
3262
3263 /* Device expects a multiple of 8 */
3264 iwl_write_direct32(priv, FH39_RSCSR_CHNL0_WPTR,
3265 q->write & ~0x7);
3266 iwl_release_nic_access(priv);
3267
3268 /* Else device is assumed to be awake */
3269 } else
3270 /* Device expects a multiple of 8 */
3271 iwl_write32(priv, FH39_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3272
3273
3274 q->need_update = 0;
3275
3276 exit_unlock:
3277 spin_unlock_irqrestore(&q->lock, flags);
3278 return rc;
3279 }
3280
3281 /**
3282 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3283 */
3284 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
3285 dma_addr_t dma_addr)
3286 {
3287 return cpu_to_le32((u32)dma_addr);
3288 }
3289
3290 /**
3291 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3292 *
3293 * If there are slots in the RX queue that need to be restocked,
3294 * and we have free pre-allocated buffers, fill the ranks as much
3295 * as we can, pulling from rx_free.
3296 *
3297 * This moves the 'write' index forward to catch up with 'processed', and
3298 * also updates the memory address in the firmware to reference the new
3299 * target buffer.
3300 */
3301 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
3302 {
3303 struct iwl_rx_queue *rxq = &priv->rxq;
3304 struct list_head *element;
3305 struct iwl_rx_mem_buffer *rxb;
3306 unsigned long flags;
3307 int write, rc;
3308
3309 spin_lock_irqsave(&rxq->lock, flags);
3310 write = rxq->write & ~0x7;
3311 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3312 /* Get next free Rx buffer, remove from free list */
3313 element = rxq->rx_free.next;
3314 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3315 list_del(element);
3316
3317 /* Point to Rx buffer via next RBD in circular buffer */
3318 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
3319 rxq->queue[rxq->write] = rxb;
3320 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3321 rxq->free_count--;
3322 }
3323 spin_unlock_irqrestore(&rxq->lock, flags);
3324 /* If the pre-allocated buffer pool is dropping low, schedule to
3325 * refill it */
3326 if (rxq->free_count <= RX_LOW_WATERMARK)
3327 queue_work(priv->workqueue, &priv->rx_replenish);
3328
3329
3330 /* If we've added more space for the firmware to place data, tell it.
3331 * Increment device's write pointer in multiples of 8. */
3332 if ((write != (rxq->write & ~0x7))
3333 || (abs(rxq->write - rxq->read) > 7)) {
3334 spin_lock_irqsave(&rxq->lock, flags);
3335 rxq->need_update = 1;
3336 spin_unlock_irqrestore(&rxq->lock, flags);
3337 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3338 if (rc)
3339 return rc;
3340 }
3341
3342 return 0;
3343 }
3344
3345 /**
3346 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3347 *
3348 * When moving to rx_free an SKB is allocated for the slot.
3349 *
3350 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3351 * This is called as a scheduled work item (except for during initialization)
3352 */
3353 static void iwl3945_rx_allocate(struct iwl_priv *priv)
3354 {
3355 struct iwl_rx_queue *rxq = &priv->rxq;
3356 struct list_head *element;
3357 struct iwl_rx_mem_buffer *rxb;
3358 unsigned long flags;
3359 spin_lock_irqsave(&rxq->lock, flags);
3360 while (!list_empty(&rxq->rx_used)) {
3361 element = rxq->rx_used.next;
3362 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3363
3364 /* Alloc a new receive buffer */
3365 rxb->skb =
3366 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3367 if (!rxb->skb) {
3368 if (net_ratelimit())
3369 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
3370 /* We don't reschedule replenish work here -- we will
3371 * call the restock method and if it still needs
3372 * more buffers it will schedule replenish */
3373 break;
3374 }
3375
3376 /* If radiotap head is required, reserve some headroom here.
3377 * The physical head count is a variable rx_stats->phy_count.
3378 * We reserve 4 bytes here. Plus these extra bytes, the
3379 * headroom of the physical head should be enough for the
3380 * radiotap head that iwl3945 supported. See iwl3945_rt.
3381 */
3382 skb_reserve(rxb->skb, 4);
3383
3384 priv->alloc_rxb_skb++;
3385 list_del(element);
3386
3387 /* Get physical address of RB/SKB */
3388 rxb->real_dma_addr =
3389 pci_map_single(priv->pci_dev, rxb->skb->data,
3390 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3391 list_add_tail(&rxb->list, &rxq->rx_free);
3392 rxq->free_count++;
3393 }
3394 spin_unlock_irqrestore(&rxq->lock, flags);
3395 }
3396
3397 /*
3398 * this should be called while priv->lock is locked
3399 */
3400 static void __iwl3945_rx_replenish(void *data)
3401 {
3402 struct iwl_priv *priv = data;
3403
3404 iwl3945_rx_allocate(priv);
3405 iwl3945_rx_queue_restock(priv);
3406 }
3407
3408
3409 void iwl3945_rx_replenish(void *data)
3410 {
3411 struct iwl_priv *priv = data;
3412 unsigned long flags;
3413
3414 iwl3945_rx_allocate(priv);
3415
3416 spin_lock_irqsave(&priv->lock, flags);
3417 iwl3945_rx_queue_restock(priv);
3418 spin_unlock_irqrestore(&priv->lock, flags);
3419 }
3420
3421 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3422 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3423 * This free routine walks the list of POOL entries and if SKB is set to
3424 * non NULL it is unmapped and freed
3425 */
3426 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3427 {
3428 int i;
3429 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3430 if (rxq->pool[i].skb != NULL) {
3431 pci_unmap_single(priv->pci_dev,
3432 rxq->pool[i].real_dma_addr,
3433 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3434 dev_kfree_skb(rxq->pool[i].skb);
3435 }
3436 }
3437
3438 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3439 rxq->dma_addr);
3440 rxq->bd = NULL;
3441 }
3442
3443 int iwl3945_rx_queue_alloc(struct iwl_priv *priv)
3444 {
3445 struct iwl_rx_queue *rxq = &priv->rxq;
3446 struct pci_dev *dev = priv->pci_dev;
3447 int i;
3448
3449 spin_lock_init(&rxq->lock);
3450 INIT_LIST_HEAD(&rxq->rx_free);
3451 INIT_LIST_HEAD(&rxq->rx_used);
3452
3453 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3454 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3455 if (!rxq->bd)
3456 return -ENOMEM;
3457
3458 /* Fill the rx_used queue with _all_ of the Rx buffers */
3459 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3460 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3461
3462 /* Set us so that we have processed and used all buffers, but have
3463 * not restocked the Rx queue with fresh buffers */
3464 rxq->read = rxq->write = 0;
3465 rxq->free_count = 0;
3466 rxq->need_update = 0;
3467 return 0;
3468 }
3469
3470 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3471 {
3472 unsigned long flags;
3473 int i;
3474 spin_lock_irqsave(&rxq->lock, flags);
3475 INIT_LIST_HEAD(&rxq->rx_free);
3476 INIT_LIST_HEAD(&rxq->rx_used);
3477 /* Fill the rx_used queue with _all_ of the Rx buffers */
3478 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3479 /* In the reset function, these buffers may have been allocated
3480 * to an SKB, so we need to unmap and free potential storage */
3481 if (rxq->pool[i].skb != NULL) {
3482 pci_unmap_single(priv->pci_dev,
3483 rxq->pool[i].real_dma_addr,
3484 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3485 priv->alloc_rxb_skb--;
3486 dev_kfree_skb(rxq->pool[i].skb);
3487 rxq->pool[i].skb = NULL;
3488 }
3489 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3490 }
3491
3492 /* Set us so that we have processed and used all buffers, but have
3493 * not restocked the Rx queue with fresh buffers */
3494 rxq->read = rxq->write = 0;
3495 rxq->free_count = 0;
3496 spin_unlock_irqrestore(&rxq->lock, flags);
3497 }
3498
3499 /* Convert linear signal-to-noise ratio into dB */
3500 static u8 ratio2dB[100] = {
3501 /* 0 1 2 3 4 5 6 7 8 9 */
3502 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3503 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3504 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3505 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3506 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3507 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3508 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3509 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3510 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3511 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3512 };
3513
3514 /* Calculates a relative dB value from a ratio of linear
3515 * (i.e. not dB) signal levels.
3516 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3517 int iwl3945_calc_db_from_ratio(int sig_ratio)
3518 {
3519 /* 1000:1 or higher just report as 60 dB */
3520 if (sig_ratio >= 1000)
3521 return 60;
3522
3523 /* 100:1 or higher, divide by 10 and use table,
3524 * add 20 dB to make up for divide by 10 */
3525 if (sig_ratio >= 100)
3526 return 20 + (int)ratio2dB[sig_ratio/10];
3527
3528 /* We shouldn't see this */
3529 if (sig_ratio < 1)
3530 return 0;
3531
3532 /* Use table for ratios 1:1 - 99:1 */
3533 return (int)ratio2dB[sig_ratio];
3534 }
3535
3536 #define PERFECT_RSSI (-20) /* dBm */
3537 #define WORST_RSSI (-95) /* dBm */
3538 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3539
3540 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3541 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3542 * about formulas used below. */
3543 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3544 {
3545 int sig_qual;
3546 int degradation = PERFECT_RSSI - rssi_dbm;
3547
3548 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3549 * as indicator; formula is (signal dbm - noise dbm).
3550 * SNR at or above 40 is a great signal (100%).
3551 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3552 * Weakest usable signal is usually 10 - 15 dB SNR. */
3553 if (noise_dbm) {
3554 if (rssi_dbm - noise_dbm >= 40)
3555 return 100;
3556 else if (rssi_dbm < noise_dbm)
3557 return 0;
3558 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3559
3560 /* Else use just the signal level.
3561 * This formula is a least squares fit of data points collected and
3562 * compared with a reference system that had a percentage (%) display
3563 * for signal quality. */
3564 } else
3565 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3566 (15 * RSSI_RANGE + 62 * degradation)) /
3567 (RSSI_RANGE * RSSI_RANGE);
3568
3569 if (sig_qual > 100)
3570 sig_qual = 100;
3571 else if (sig_qual < 1)
3572 sig_qual = 0;
3573
3574 return sig_qual;
3575 }
3576
3577 /**
3578 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3579 *
3580 * Uses the priv->rx_handlers callback function array to invoke
3581 * the appropriate handlers, including command responses,
3582 * frame-received notifications, and other notifications.
3583 */
3584 static void iwl3945_rx_handle(struct iwl_priv *priv)
3585 {
3586 struct iwl_rx_mem_buffer *rxb;
3587 struct iwl_rx_packet *pkt;
3588 struct iwl_rx_queue *rxq = &priv->rxq;
3589 u32 r, i;
3590 int reclaim;
3591 unsigned long flags;
3592 u8 fill_rx = 0;
3593 u32 count = 8;
3594
3595 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3596 * buffer that the driver may process (last buffer filled by ucode). */
3597 r = iwl3945_hw_get_rx_read(priv);
3598 i = rxq->read;
3599
3600 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3601 fill_rx = 1;
3602 /* Rx interrupt, but nothing sent from uCode */
3603 if (i == r)
3604 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3605
3606 while (i != r) {
3607 rxb = rxq->queue[i];
3608
3609 /* If an RXB doesn't have a Rx queue slot associated with it,
3610 * then a bug has been introduced in the queue refilling
3611 * routines -- catch it here */
3612 BUG_ON(rxb == NULL);
3613
3614 rxq->queue[i] = NULL;
3615
3616 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
3617 IWL_RX_BUF_SIZE,
3618 PCI_DMA_FROMDEVICE);
3619 pkt = (struct iwl_rx_packet *)rxb->skb->data;
3620
3621 /* Reclaim a command buffer only if this packet is a response
3622 * to a (driver-originated) command.
3623 * If the packet (e.g. Rx frame) originated from uCode,
3624 * there is no command buffer to reclaim.
3625 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3626 * but apparently a few don't get set; catch them here. */
3627 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3628 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3629 (pkt->hdr.cmd != REPLY_TX);
3630
3631 /* Based on type of command response or notification,
3632 * handle those that need handling via function in
3633 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3634 if (priv->rx_handlers[pkt->hdr.cmd]) {
3635 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3636 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3637 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3638 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3639 } else {
3640 /* No handling needed */
3641 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3642 "r %d i %d No handler needed for %s, 0x%02x\n",
3643 r, i, get_cmd_string(pkt->hdr.cmd),
3644 pkt->hdr.cmd);
3645 }
3646
3647 if (reclaim) {
3648 /* Invoke any callbacks, transfer the skb to caller, and
3649 * fire off the (possibly) blocking iwl3945_send_cmd()
3650 * as we reclaim the driver command queue */
3651 if (rxb && rxb->skb)
3652 iwl3945_tx_cmd_complete(priv, rxb);
3653 else
3654 IWL_WARN(priv, "Claim null rxb?\n");
3655 }
3656
3657 /* For now we just don't re-use anything. We can tweak this
3658 * later to try and re-use notification packets and SKBs that
3659 * fail to Rx correctly */
3660 if (rxb->skb != NULL) {
3661 priv->alloc_rxb_skb--;
3662 dev_kfree_skb_any(rxb->skb);
3663 rxb->skb = NULL;
3664 }
3665
3666 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
3667 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3668 spin_lock_irqsave(&rxq->lock, flags);
3669 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3670 spin_unlock_irqrestore(&rxq->lock, flags);
3671 i = (i + 1) & RX_QUEUE_MASK;
3672 /* If there are a lot of unused frames,
3673 * restock the Rx queue so ucode won't assert. */
3674 if (fill_rx) {
3675 count++;
3676 if (count >= 8) {
3677 priv->rxq.read = i;
3678 __iwl3945_rx_replenish(priv);
3679 count = 0;
3680 }
3681 }
3682 }
3683
3684 /* Backtrack one entry */
3685 priv->rxq.read = i;
3686 iwl3945_rx_queue_restock(priv);
3687 }
3688
3689 /**
3690 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3691 */
3692 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
3693 struct iwl3945_tx_queue *txq)
3694 {
3695 u32 reg = 0;
3696 int rc = 0;
3697 int txq_id = txq->q.id;
3698
3699 if (txq->need_update == 0)
3700 return rc;
3701
3702 /* if we're trying to save power */
3703 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3704 /* wake up nic if it's powered down ...
3705 * uCode will wake up, and interrupt us again, so next
3706 * time we'll skip this part. */
3707 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3708
3709 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3710 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3711 iwl_set_bit(priv, CSR_GP_CNTRL,
3712 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3713 return rc;
3714 }
3715
3716 /* restore this queue's parameters in nic hardware. */
3717 rc = iwl_grab_nic_access(priv);
3718 if (rc)
3719 return rc;
3720 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
3721 txq->q.write_ptr | (txq_id << 8));
3722 iwl_release_nic_access(priv);
3723
3724 /* else not in power-save mode, uCode will never sleep when we're
3725 * trying to tx (during RFKILL, we're not trying to tx). */
3726 } else
3727 iwl_write32(priv, HBUS_TARG_WRPTR,
3728 txq->q.write_ptr | (txq_id << 8));
3729
3730 txq->need_update = 0;
3731
3732 return rc;
3733 }
3734
3735 #ifdef CONFIG_IWL3945_DEBUG
3736 static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
3737 struct iwl3945_rxon_cmd *rxon)
3738 {
3739 IWL_DEBUG_RADIO("RX CONFIG:\n");
3740 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
3741 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3742 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3743 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3744 le32_to_cpu(rxon->filter_flags));
3745 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3746 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3747 rxon->ofdm_basic_rates);
3748 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
3749 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
3750 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
3751 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3752 }
3753 #endif
3754
3755 static void iwl3945_enable_interrupts(struct iwl_priv *priv)
3756 {
3757 IWL_DEBUG_ISR("Enabling interrupts\n");
3758 set_bit(STATUS_INT_ENABLED, &priv->status);
3759 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
3760 }
3761
3762
3763 /* call this function to flush any scheduled tasklet */
3764 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
3765 {
3766 /* wait to make sure we flush pending tasklet*/
3767 synchronize_irq(priv->pci_dev->irq);
3768 tasklet_kill(&priv->irq_tasklet);
3769 }
3770
3771
3772 static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
3773 {
3774 clear_bit(STATUS_INT_ENABLED, &priv->status);
3775
3776 /* disable interrupts from uCode/NIC to host */
3777 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
3778
3779 /* acknowledge/clear/reset any interrupts still pending
3780 * from uCode or flow handler (Rx/Tx DMA) */
3781 iwl_write32(priv, CSR_INT, 0xffffffff);
3782 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
3783 IWL_DEBUG_ISR("Disabled interrupts\n");
3784 }
3785
3786 static const char *desc_lookup(int i)
3787 {
3788 switch (i) {
3789 case 1:
3790 return "FAIL";
3791 case 2:
3792 return "BAD_PARAM";
3793 case 3:
3794 return "BAD_CHECKSUM";
3795 case 4:
3796 return "NMI_INTERRUPT";
3797 case 5:
3798 return "SYSASSERT";
3799 case 6:
3800 return "FATAL_ERROR";
3801 }
3802
3803 return "UNKNOWN";
3804 }
3805
3806 #define ERROR_START_OFFSET (1 * sizeof(u32))
3807 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
3808
3809 static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
3810 {
3811 u32 i;
3812 u32 desc, time, count, base, data1;
3813 u32 blink1, blink2, ilink1, ilink2;
3814 int rc;
3815
3816 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
3817
3818 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3819 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
3820 return;
3821 }
3822
3823 rc = iwl_grab_nic_access(priv);
3824 if (rc) {
3825 IWL_WARN(priv, "Can not read from adapter at this time.\n");
3826 return;
3827 }
3828
3829 count = iwl_read_targ_mem(priv, base);
3830
3831 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
3832 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
3833 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
3834 priv->status, count);
3835 }
3836
3837 IWL_ERR(priv, "Desc Time asrtPC blink2 "
3838 "ilink1 nmiPC Line\n");
3839 for (i = ERROR_START_OFFSET;
3840 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
3841 i += ERROR_ELEM_SIZE) {
3842 desc = iwl_read_targ_mem(priv, base + i);
3843 time =
3844 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
3845 blink1 =
3846 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
3847 blink2 =
3848 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
3849 ilink1 =
3850 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
3851 ilink2 =
3852 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
3853 data1 =
3854 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
3855
3856 IWL_ERR(priv,
3857 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
3858 desc_lookup(desc), desc, time, blink1, blink2,
3859 ilink1, ilink2, data1);
3860 }
3861
3862 iwl_release_nic_access(priv);
3863
3864 }
3865
3866 #define EVENT_START_OFFSET (6 * sizeof(u32))
3867
3868 /**
3869 * iwl3945_print_event_log - Dump error event log to syslog
3870 *
3871 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
3872 */
3873 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
3874 u32 num_events, u32 mode)
3875 {
3876 u32 i;
3877 u32 base; /* SRAM byte address of event log header */
3878 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
3879 u32 ptr; /* SRAM byte address of log data */
3880 u32 ev, time, data; /* event log data */
3881
3882 if (num_events == 0)
3883 return;
3884
3885 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
3886
3887 if (mode == 0)
3888 event_size = 2 * sizeof(u32);
3889 else
3890 event_size = 3 * sizeof(u32);
3891
3892 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
3893
3894 /* "time" is actually "data" for mode 0 (no timestamp).
3895 * place event id # at far right for easier visual parsing. */
3896 for (i = 0; i < num_events; i++) {
3897 ev = iwl_read_targ_mem(priv, ptr);
3898 ptr += sizeof(u32);
3899 time = iwl_read_targ_mem(priv, ptr);
3900 ptr += sizeof(u32);
3901 if (mode == 0) {
3902 /* data, ev */
3903 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
3904 } else {
3905 data = iwl_read_targ_mem(priv, ptr);
3906 ptr += sizeof(u32);
3907 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
3908 }
3909 }
3910 }
3911
3912 static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
3913 {
3914 int rc;
3915 u32 base; /* SRAM byte address of event log header */
3916 u32 capacity; /* event log capacity in # entries */
3917 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
3918 u32 num_wraps; /* # times uCode wrapped to top of log */
3919 u32 next_entry; /* index of next entry to be written by uCode */
3920 u32 size; /* # entries that we'll print */
3921
3922 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
3923 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3924 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
3925 return;
3926 }
3927
3928 rc = iwl_grab_nic_access(priv);
3929 if (rc) {
3930 IWL_WARN(priv, "Can not read from adapter at this time.\n");
3931 return;
3932 }
3933
3934 /* event log header */
3935 capacity = iwl_read_targ_mem(priv, base);
3936 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
3937 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
3938 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
3939
3940 size = num_wraps ? capacity : next_entry;
3941
3942 /* bail out if nothing in log */
3943 if (size == 0) {
3944 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
3945 iwl_release_nic_access(priv);
3946 return;
3947 }
3948
3949 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
3950 size, num_wraps);
3951
3952 /* if uCode has wrapped back to top of log, start at the oldest entry,
3953 * i.e the next one that uCode would fill. */
3954 if (num_wraps)
3955 iwl3945_print_event_log(priv, next_entry,
3956 capacity - next_entry, mode);
3957
3958 /* (then/else) start at top of log */
3959 iwl3945_print_event_log(priv, 0, next_entry, mode);
3960
3961 iwl_release_nic_access(priv);
3962 }
3963
3964 /**
3965 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
3966 */
3967 static void iwl3945_irq_handle_error(struct iwl_priv *priv)
3968 {
3969 /* Set the FW error flag -- cleared on iwl3945_down */
3970 set_bit(STATUS_FW_ERROR, &priv->status);
3971
3972 /* Cancel currently queued command. */
3973 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3974
3975 #ifdef CONFIG_IWL3945_DEBUG
3976 if (priv->debug_level & IWL_DL_FW_ERRORS) {
3977 iwl3945_dump_nic_error_log(priv);
3978 iwl3945_dump_nic_event_log(priv);
3979 iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
3980 }
3981 #endif
3982
3983 wake_up_interruptible(&priv->wait_command_queue);
3984
3985 /* Keep the restart process from trying to send host
3986 * commands by clearing the INIT status bit */
3987 clear_bit(STATUS_READY, &priv->status);
3988
3989 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3990 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
3991 "Restarting adapter due to uCode error.\n");
3992
3993 if (iwl3945_is_associated(priv)) {
3994 memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
3995 sizeof(priv->recovery39_rxon));
3996 priv->error_recovering = 1;
3997 }
3998 queue_work(priv->workqueue, &priv->restart);
3999 }
4000 }
4001
4002 static void iwl3945_error_recovery(struct iwl_priv *priv)
4003 {
4004 unsigned long flags;
4005
4006 memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
4007 sizeof(priv->staging39_rxon));
4008 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4009 iwl3945_commit_rxon(priv);
4010
4011 iwl3945_add_station(priv, priv->bssid, 1, 0);
4012
4013 spin_lock_irqsave(&priv->lock, flags);
4014 priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
4015 priv->error_recovering = 0;
4016 spin_unlock_irqrestore(&priv->lock, flags);
4017 }
4018
4019 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
4020 {
4021 u32 inta, handled = 0;
4022 u32 inta_fh;
4023 unsigned long flags;
4024 #ifdef CONFIG_IWL3945_DEBUG
4025 u32 inta_mask;
4026 #endif
4027
4028 spin_lock_irqsave(&priv->lock, flags);
4029
4030 /* Ack/clear/reset pending uCode interrupts.
4031 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4032 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4033 inta = iwl_read32(priv, CSR_INT);
4034 iwl_write32(priv, CSR_INT, inta);
4035
4036 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4037 * Any new interrupts that happen after this, either while we're
4038 * in this tasklet, or later, will show up in next ISR/tasklet. */
4039 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4040 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4041
4042 #ifdef CONFIG_IWL3945_DEBUG
4043 if (priv->debug_level & IWL_DL_ISR) {
4044 /* just for debug */
4045 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4046 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4047 inta, inta_mask, inta_fh);
4048 }
4049 #endif
4050
4051 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4052 * atomic, make sure that inta covers all the interrupts that
4053 * we've discovered, even if FH interrupt came in just after
4054 * reading CSR_INT. */
4055 if (inta_fh & CSR39_FH_INT_RX_MASK)
4056 inta |= CSR_INT_BIT_FH_RX;
4057 if (inta_fh & CSR39_FH_INT_TX_MASK)
4058 inta |= CSR_INT_BIT_FH_TX;
4059
4060 /* Now service all interrupt bits discovered above. */
4061 if (inta & CSR_INT_BIT_HW_ERR) {
4062 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
4063
4064 /* Tell the device to stop sending interrupts */
4065 iwl3945_disable_interrupts(priv);
4066
4067 iwl3945_irq_handle_error(priv);
4068
4069 handled |= CSR_INT_BIT_HW_ERR;
4070
4071 spin_unlock_irqrestore(&priv->lock, flags);
4072
4073 return;
4074 }
4075
4076 #ifdef CONFIG_IWL3945_DEBUG
4077 if (priv->debug_level & (IWL_DL_ISR)) {
4078 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4079 if (inta & CSR_INT_BIT_SCD)
4080 IWL_DEBUG_ISR("Scheduler finished to transmit "
4081 "the frame/frames.\n");
4082
4083 /* Alive notification via Rx interrupt will do the real work */
4084 if (inta & CSR_INT_BIT_ALIVE)
4085 IWL_DEBUG_ISR("Alive interrupt\n");
4086 }
4087 #endif
4088 /* Safely ignore these bits for debug checks below */
4089 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4090
4091 /* Error detected by uCode */
4092 if (inta & CSR_INT_BIT_SW_ERR) {
4093 IWL_ERR(priv, "Microcode SW error detected. "
4094 "Restarting 0x%X.\n", inta);
4095 iwl3945_irq_handle_error(priv);
4096 handled |= CSR_INT_BIT_SW_ERR;
4097 }
4098
4099 /* uCode wakes up after power-down sleep */
4100 if (inta & CSR_INT_BIT_WAKEUP) {
4101 IWL_DEBUG_ISR("Wakeup interrupt\n");
4102 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4103 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[0]);
4104 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[1]);
4105 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[2]);
4106 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[3]);
4107 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[4]);
4108 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[5]);
4109
4110 handled |= CSR_INT_BIT_WAKEUP;
4111 }
4112
4113 /* All uCode command responses, including Tx command responses,
4114 * Rx "responses" (frame-received notification), and other
4115 * notifications from uCode come through here*/
4116 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4117 iwl3945_rx_handle(priv);
4118 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4119 }
4120
4121 if (inta & CSR_INT_BIT_FH_TX) {
4122 IWL_DEBUG_ISR("Tx interrupt\n");
4123
4124 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4125 if (!iwl_grab_nic_access(priv)) {
4126 iwl_write_direct32(priv, FH39_TCSR_CREDIT
4127 (FH39_SRVC_CHNL), 0x0);
4128 iwl_release_nic_access(priv);
4129 }
4130 handled |= CSR_INT_BIT_FH_TX;
4131 }
4132
4133 if (inta & ~handled)
4134 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
4135
4136 if (inta & ~CSR_INI_SET_MASK) {
4137 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
4138 inta & ~CSR_INI_SET_MASK);
4139 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
4140 }
4141
4142 /* Re-enable all interrupts */
4143 /* only Re-enable if disabled by irq */
4144 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4145 iwl3945_enable_interrupts(priv);
4146
4147 #ifdef CONFIG_IWL3945_DEBUG
4148 if (priv->debug_level & (IWL_DL_ISR)) {
4149 inta = iwl_read32(priv, CSR_INT);
4150 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4151 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4152 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4153 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4154 }
4155 #endif
4156 spin_unlock_irqrestore(&priv->lock, flags);
4157 }
4158
4159 static irqreturn_t iwl3945_isr(int irq, void *data)
4160 {
4161 struct iwl_priv *priv = data;
4162 u32 inta, inta_mask;
4163 u32 inta_fh;
4164 if (!priv)
4165 return IRQ_NONE;
4166
4167 spin_lock(&priv->lock);
4168
4169 /* Disable (but don't clear!) interrupts here to avoid
4170 * back-to-back ISRs and sporadic interrupts from our NIC.
4171 * If we have something to service, the tasklet will re-enable ints.
4172 * If we *don't* have something, we'll re-enable before leaving here. */
4173 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4174 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
4175
4176 /* Discover which interrupts are active/pending */
4177 inta = iwl_read32(priv, CSR_INT);
4178 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4179
4180 /* Ignore interrupt if there's nothing in NIC to service.
4181 * This may be due to IRQ shared with another device,
4182 * or due to sporadic interrupts thrown from our NIC. */
4183 if (!inta && !inta_fh) {
4184 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4185 goto none;
4186 }
4187
4188 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4189 /* Hardware disappeared */
4190 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
4191 goto unplugged;
4192 }
4193
4194 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4195 inta, inta_mask, inta_fh);
4196
4197 inta &= ~CSR_INT_BIT_SCD;
4198
4199 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4200 if (likely(inta || inta_fh))
4201 tasklet_schedule(&priv->irq_tasklet);
4202 unplugged:
4203 spin_unlock(&priv->lock);
4204
4205 return IRQ_HANDLED;
4206
4207 none:
4208 /* re-enable interrupts here since we don't have anything to service. */
4209 /* only Re-enable if disabled by irq */
4210 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4211 iwl3945_enable_interrupts(priv);
4212 spin_unlock(&priv->lock);
4213 return IRQ_NONE;
4214 }
4215
4216 /************************** EEPROM BANDS ****************************
4217 *
4218 * The iwl3945_eeprom_band definitions below provide the mapping from the
4219 * EEPROM contents to the specific channel number supported for each
4220 * band.
4221 *
4222 * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
4223 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4224 * The specific geography and calibration information for that channel
4225 * is contained in the eeprom map itself.
4226 *
4227 * During init, we copy the eeprom information and channel map
4228 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4229 *
4230 * channel_map_24/52 provides the index in the channel_info array for a
4231 * given channel. We have to have two separate maps as there is channel
4232 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4233 * band_2
4234 *
4235 * A value of 0xff stored in the channel_map indicates that the channel
4236 * is not supported by the hardware at all.
4237 *
4238 * A value of 0xfe in the channel_map indicates that the channel is not
4239 * valid for Tx with the current hardware. This means that
4240 * while the system can tune and receive on a given channel, it may not
4241 * be able to associate or transmit any frames on that
4242 * channel. There is no corresponding channel information for that
4243 * entry.
4244 *
4245 *********************************************************************/
4246
4247 /* 2.4 GHz */
4248 static const u8 iwl3945_eeprom_band_1[14] = {
4249 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4250 };
4251
4252 /* 5.2 GHz bands */
4253 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4254 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4255 };
4256
4257 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4258 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4259 };
4260
4261 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4262 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4263 };
4264
4265 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4266 145, 149, 153, 157, 161, 165
4267 };
4268
4269 static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
4270 int *eeprom_ch_count,
4271 const struct iwl_eeprom_channel
4272 **eeprom_ch_info,
4273 const u8 **eeprom_ch_index)
4274 {
4275 switch (band) {
4276 case 1: /* 2.4GHz band */
4277 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4278 *eeprom_ch_info = priv->eeprom39.band_1_channels;
4279 *eeprom_ch_index = iwl3945_eeprom_band_1;
4280 break;
4281 case 2: /* 4.9GHz band */
4282 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4283 *eeprom_ch_info = priv->eeprom39.band_2_channels;
4284 *eeprom_ch_index = iwl3945_eeprom_band_2;
4285 break;
4286 case 3: /* 5.2GHz band */
4287 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4288 *eeprom_ch_info = priv->eeprom39.band_3_channels;
4289 *eeprom_ch_index = iwl3945_eeprom_band_3;
4290 break;
4291 case 4: /* 5.5GHz band */
4292 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4293 *eeprom_ch_info = priv->eeprom39.band_4_channels;
4294 *eeprom_ch_index = iwl3945_eeprom_band_4;
4295 break;
4296 case 5: /* 5.7GHz band */
4297 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4298 *eeprom_ch_info = priv->eeprom39.band_5_channels;
4299 *eeprom_ch_index = iwl3945_eeprom_band_5;
4300 break;
4301 default:
4302 BUG();
4303 return;
4304 }
4305 }
4306
4307 /**
4308 * iwl3945_get_channel_info - Find driver's private channel info
4309 *
4310 * Based on band and channel number.
4311 */
4312 const struct iwl_channel_info *
4313 iwl3945_get_channel_info(const struct iwl_priv *priv,
4314 enum ieee80211_band band, u16 channel)
4315 {
4316 int i;
4317
4318 switch (band) {
4319 case IEEE80211_BAND_5GHZ:
4320 for (i = 14; i < priv->channel_count; i++) {
4321 if (priv->channel_info[i].channel == channel)
4322 return &priv->channel_info[i];
4323 }
4324 break;
4325
4326 case IEEE80211_BAND_2GHZ:
4327 if (channel >= 1 && channel <= 14)
4328 return &priv->channel_info[channel - 1];
4329 break;
4330 case IEEE80211_NUM_BANDS:
4331 WARN_ON(1);
4332 }
4333
4334 return NULL;
4335 }
4336
4337 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4338 ? # x " " : "")
4339
4340 /**
4341 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4342 */
4343 static int iwl3945_init_channel_map(struct iwl_priv *priv)
4344 {
4345 int eeprom_ch_count = 0;
4346 const u8 *eeprom_ch_index = NULL;
4347 const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
4348 int band, ch;
4349 struct iwl_channel_info *ch_info;
4350
4351 if (priv->channel_count) {
4352 IWL_DEBUG_INFO("Channel map already initialized.\n");
4353 return 0;
4354 }
4355
4356 if (priv->eeprom39.version < 0x2f) {
4357 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
4358 priv->eeprom39.version);
4359 return -EINVAL;
4360 }
4361
4362 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4363
4364 priv->channel_count =
4365 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4366 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4367 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4368 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4369 ARRAY_SIZE(iwl3945_eeprom_band_5);
4370
4371 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4372
4373 priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
4374 priv->channel_count, GFP_KERNEL);
4375 if (!priv->channel_info) {
4376 IWL_ERR(priv, "Could not allocate channel_info\n");
4377 priv->channel_count = 0;
4378 return -ENOMEM;
4379 }
4380
4381 ch_info = priv->channel_info;
4382
4383 /* Loop through the 5 EEPROM bands adding them in order to the
4384 * channel map we maintain (that contains additional information than
4385 * what just in the EEPROM) */
4386 for (band = 1; band <= 5; band++) {
4387
4388 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4389 &eeprom_ch_info, &eeprom_ch_index);
4390
4391 /* Loop through each band adding each of the channels */
4392 for (ch = 0; ch < eeprom_ch_count; ch++) {
4393 ch_info->channel = eeprom_ch_index[ch];
4394 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4395 IEEE80211_BAND_5GHZ;
4396
4397 /* permanently store EEPROM's channel regulatory flags
4398 * and max power in channel info database. */
4399 ch_info->eeprom = eeprom_ch_info[ch];
4400
4401 /* Copy the run-time flags so they are there even on
4402 * invalid channels */
4403 ch_info->flags = eeprom_ch_info[ch].flags;
4404
4405 if (!(is_channel_valid(ch_info))) {
4406 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4407 "No traffic\n",
4408 ch_info->channel,
4409 ch_info->flags,
4410 is_channel_a_band(ch_info) ?
4411 "5.2" : "2.4");
4412 ch_info++;
4413 continue;
4414 }
4415
4416 /* Initialize regulatory-based run-time data */
4417 ch_info->max_power_avg = ch_info->curr_txpow =
4418 eeprom_ch_info[ch].max_power_avg;
4419 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4420 ch_info->min_power = 0;
4421
4422 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4423 " %ddBm): Ad-Hoc %ssupported\n",
4424 ch_info->channel,
4425 is_channel_a_band(ch_info) ?
4426 "5.2" : "2.4",
4427 CHECK_AND_PRINT(VALID),
4428 CHECK_AND_PRINT(IBSS),
4429 CHECK_AND_PRINT(ACTIVE),
4430 CHECK_AND_PRINT(RADAR),
4431 CHECK_AND_PRINT(WIDE),
4432 CHECK_AND_PRINT(DFS),
4433 eeprom_ch_info[ch].flags,
4434 eeprom_ch_info[ch].max_power_avg,
4435 ((eeprom_ch_info[ch].
4436 flags & EEPROM_CHANNEL_IBSS)
4437 && !(eeprom_ch_info[ch].
4438 flags & EEPROM_CHANNEL_RADAR))
4439 ? "" : "not ");
4440
4441 /* Set the user_txpower_limit to the highest power
4442 * supported by any channel */
4443 if (eeprom_ch_info[ch].max_power_avg >
4444 priv->user_txpower_limit)
4445 priv->user_txpower_limit =
4446 eeprom_ch_info[ch].max_power_avg;
4447
4448 ch_info++;
4449 }
4450 }
4451
4452 /* Set up txpower settings in driver for all channels */
4453 if (iwl3945_txpower_set_from_eeprom(priv))
4454 return -EIO;
4455
4456 return 0;
4457 }
4458
4459 /*
4460 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4461 */
4462 static void iwl3945_free_channel_map(struct iwl_priv *priv)
4463 {
4464 kfree(priv->channel_info);
4465 priv->channel_count = 0;
4466 }
4467
4468 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4469 * sending probe req. This should be set long enough to hear probe responses
4470 * from more than one AP. */
4471 #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
4472 #define IWL_ACTIVE_DWELL_TIME_52 (20)
4473
4474 #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
4475 #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
4476
4477 /* For faster active scanning, scan will move to the next channel if fewer than
4478 * PLCP_QUIET_THRESH packets are heard on this channel within
4479 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4480 * time if it's a quiet channel (nothing responded to our probe, and there's
4481 * no other traffic).
4482 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4483 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4484 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
4485
4486 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4487 * Must be set longer than active dwell time.
4488 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4489 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4490 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4491 #define IWL_PASSIVE_DWELL_BASE (100)
4492 #define IWL_CHANNEL_TUNE_TIME 5
4493
4494 #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
4495
4496 static inline u16 iwl3945_get_active_dwell_time(struct iwl_priv *priv,
4497 enum ieee80211_band band,
4498 u8 n_probes)
4499 {
4500 if (band == IEEE80211_BAND_5GHZ)
4501 return IWL_ACTIVE_DWELL_TIME_52 +
4502 IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
4503 else
4504 return IWL_ACTIVE_DWELL_TIME_24 +
4505 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
4506 }
4507
4508 static u16 iwl3945_get_passive_dwell_time(struct iwl_priv *priv,
4509 enum ieee80211_band band)
4510 {
4511 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4512 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4513 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4514
4515 if (iwl3945_is_associated(priv)) {
4516 /* If we're associated, we clamp the maximum passive
4517 * dwell time to be 98% of the beacon interval (minus
4518 * 2 * channel tune time) */
4519 passive = priv->beacon_int;
4520 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4521 passive = IWL_PASSIVE_DWELL_BASE;
4522 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4523 }
4524
4525 return passive;
4526 }
4527
4528 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
4529 enum ieee80211_band band,
4530 u8 is_active, u8 n_probes,
4531 struct iwl3945_scan_channel *scan_ch)
4532 {
4533 const struct ieee80211_channel *channels = NULL;
4534 const struct ieee80211_supported_band *sband;
4535 const struct iwl_channel_info *ch_info;
4536 u16 passive_dwell = 0;
4537 u16 active_dwell = 0;
4538 int added, i;
4539
4540 sband = iwl3945_get_band(priv, band);
4541 if (!sband)
4542 return 0;
4543
4544 channels = sband->channels;
4545
4546 active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
4547 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4548
4549 if (passive_dwell <= active_dwell)
4550 passive_dwell = active_dwell + 1;
4551
4552 for (i = 0, added = 0; i < sband->n_channels; i++) {
4553 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4554 continue;
4555
4556 scan_ch->channel = channels[i].hw_value;
4557
4558 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4559 if (!is_channel_valid(ch_info)) {
4560 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4561 scan_ch->channel);
4562 continue;
4563 }
4564
4565 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4566 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4567 /* If passive , set up for auto-switch
4568 * and use long active_dwell time.
4569 */
4570 if (!is_active || is_channel_passive(ch_info) ||
4571 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
4572 scan_ch->type = 0; /* passive */
4573 if (IWL_UCODE_API(priv->ucode_ver) == 1)
4574 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
4575 } else {
4576 scan_ch->type = 1; /* active */
4577 }
4578
4579 /* Set direct probe bits. These may be used both for active
4580 * scan channels (probes gets sent right away),
4581 * or for passive channels (probes get se sent only after
4582 * hearing clear Rx packet).*/
4583 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
4584 if (n_probes)
4585 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4586 } else {
4587 /* uCode v1 does not allow setting direct probe bits on
4588 * passive channel. */
4589 if ((scan_ch->type & 1) && n_probes)
4590 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4591 }
4592
4593 /* Set txpower levels to defaults */
4594 scan_ch->tpc.dsp_atten = 110;
4595 /* scan_pwr_info->tpc.dsp_atten; */
4596
4597 /*scan_pwr_info->tpc.tx_gain; */
4598 if (band == IEEE80211_BAND_5GHZ)
4599 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4600 else {
4601 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4602 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4603 * power level:
4604 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4605 */
4606 }
4607
4608 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4609 scan_ch->channel,
4610 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4611 (scan_ch->type & 1) ?
4612 active_dwell : passive_dwell);
4613
4614 scan_ch++;
4615 added++;
4616 }
4617
4618 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4619 return added;
4620 }
4621
4622 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
4623 struct ieee80211_rate *rates)
4624 {
4625 int i;
4626
4627 for (i = 0; i < IWL_RATE_COUNT; i++) {
4628 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4629 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4630 rates[i].hw_value_short = i;
4631 rates[i].flags = 0;
4632 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4633 /*
4634 * If CCK != 1M then set short preamble rate flag.
4635 */
4636 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4637 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4638 }
4639 }
4640 }
4641
4642 /**
4643 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4644 */
4645 static int iwl3945_init_geos(struct iwl_priv *priv)
4646 {
4647 struct iwl_channel_info *ch;
4648 struct ieee80211_supported_band *sband;
4649 struct ieee80211_channel *channels;
4650 struct ieee80211_channel *geo_ch;
4651 struct ieee80211_rate *rates;
4652 int i = 0;
4653
4654 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4655 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4656 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4657 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4658 return 0;
4659 }
4660
4661 channels = kzalloc(sizeof(struct ieee80211_channel) *
4662 priv->channel_count, GFP_KERNEL);
4663 if (!channels)
4664 return -ENOMEM;
4665
4666 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4667 GFP_KERNEL);
4668 if (!rates) {
4669 kfree(channels);
4670 return -ENOMEM;
4671 }
4672
4673 /* 5.2GHz channels start after the 2.4GHz channels */
4674 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4675 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4676 /* just OFDM */
4677 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4678 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4679
4680 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4681 sband->channels = channels;
4682 /* OFDM & CCK */
4683 sband->bitrates = rates;
4684 sband->n_bitrates = IWL_RATE_COUNT;
4685
4686 priv->ieee_channels = channels;
4687 priv->ieee_rates = rates;
4688
4689 iwl3945_init_hw_rates(priv, rates);
4690
4691 for (i = 0; i < priv->channel_count; i++) {
4692 ch = &priv->channel_info[i];
4693
4694 /* FIXME: might be removed if scan is OK*/
4695 if (!is_channel_valid(ch))
4696 continue;
4697
4698 if (is_channel_a_band(ch))
4699 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4700 else
4701 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4702
4703 geo_ch = &sband->channels[sband->n_channels++];
4704
4705 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4706 geo_ch->max_power = ch->max_power_avg;
4707 geo_ch->max_antenna_gain = 0xff;
4708 geo_ch->hw_value = ch->channel;
4709
4710 if (is_channel_valid(ch)) {
4711 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4712 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
4713
4714 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4715 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4716
4717 if (ch->flags & EEPROM_CHANNEL_RADAR)
4718 geo_ch->flags |= IEEE80211_CHAN_RADAR;
4719
4720 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4721 priv->max_channel_txpower_limit =
4722 ch->max_power_avg;
4723 } else {
4724 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
4725 }
4726
4727 /* Save flags for reg domain usage */
4728 geo_ch->orig_flags = geo_ch->flags;
4729
4730 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4731 ch->channel, geo_ch->center_freq,
4732 is_channel_a_band(ch) ? "5.2" : "2.4",
4733 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4734 "restricted" : "valid",
4735 geo_ch->flags);
4736 }
4737
4738 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4739 priv->cfg->sku & IWL_SKU_A) {
4740 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
4741 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
4742 priv->pci_dev->device, priv->pci_dev->subsystem_device);
4743 priv->cfg->sku &= ~IWL_SKU_A;
4744 }
4745
4746 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
4747 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4748 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
4749
4750 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4751 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4752 &priv->bands[IEEE80211_BAND_2GHZ];
4753 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4754 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4755 &priv->bands[IEEE80211_BAND_5GHZ];
4756
4757 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4758
4759 return 0;
4760 }
4761
4762 /*
4763 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
4764 */
4765 static void iwl3945_free_geos(struct iwl_priv *priv)
4766 {
4767 kfree(priv->ieee_channels);
4768 kfree(priv->ieee_rates);
4769 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4770 }
4771
4772 /******************************************************************************
4773 *
4774 * uCode download functions
4775 *
4776 ******************************************************************************/
4777
4778 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
4779 {
4780 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4781 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4782 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4783 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4784 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4785 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
4786 }
4787
4788 /**
4789 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
4790 * looking at all data.
4791 */
4792 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
4793 {
4794 u32 val;
4795 u32 save_len = len;
4796 int rc = 0;
4797 u32 errcnt;
4798
4799 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4800
4801 rc = iwl_grab_nic_access(priv);
4802 if (rc)
4803 return rc;
4804
4805 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4806 IWL39_RTC_INST_LOWER_BOUND);
4807
4808 errcnt = 0;
4809 for (; len > 0; len -= sizeof(u32), image++) {
4810 /* read data comes through single port, auto-incr addr */
4811 /* NOTE: Use the debugless read so we don't flood kernel log
4812 * if IWL_DL_IO is set */
4813 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4814 if (val != le32_to_cpu(*image)) {
4815 IWL_ERR(priv, "uCode INST section is invalid at "
4816 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4817 save_len - len, val, le32_to_cpu(*image));
4818 rc = -EIO;
4819 errcnt++;
4820 if (errcnt >= 20)
4821 break;
4822 }
4823 }
4824
4825 iwl_release_nic_access(priv);
4826
4827 if (!errcnt)
4828 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
4829
4830 return rc;
4831 }
4832
4833
4834 /**
4835 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
4836 * using sample data 100 bytes apart. If these sample points are good,
4837 * it's a pretty good bet that everything between them is good, too.
4838 */
4839 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
4840 {
4841 u32 val;
4842 int rc = 0;
4843 u32 errcnt = 0;
4844 u32 i;
4845
4846 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4847
4848 rc = iwl_grab_nic_access(priv);
4849 if (rc)
4850 return rc;
4851
4852 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
4853 /* read data comes through single port, auto-incr addr */
4854 /* NOTE: Use the debugless read so we don't flood kernel log
4855 * if IWL_DL_IO is set */
4856 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4857 i + IWL39_RTC_INST_LOWER_BOUND);
4858 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4859 if (val != le32_to_cpu(*image)) {
4860 #if 0 /* Enable this if you want to see details */
4861 IWL_ERR(priv, "uCode INST section is invalid at "
4862 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4863 i, val, *image);
4864 #endif
4865 rc = -EIO;
4866 errcnt++;
4867 if (errcnt >= 3)
4868 break;
4869 }
4870 }
4871
4872 iwl_release_nic_access(priv);
4873
4874 return rc;
4875 }
4876
4877
4878 /**
4879 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
4880 * and verify its contents
4881 */
4882 static int iwl3945_verify_ucode(struct iwl_priv *priv)
4883 {
4884 __le32 *image;
4885 u32 len;
4886 int rc = 0;
4887
4888 /* Try bootstrap */
4889 image = (__le32 *)priv->ucode_boot.v_addr;
4890 len = priv->ucode_boot.len;
4891 rc = iwl3945_verify_inst_sparse(priv, image, len);
4892 if (rc == 0) {
4893 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
4894 return 0;
4895 }
4896
4897 /* Try initialize */
4898 image = (__le32 *)priv->ucode_init.v_addr;
4899 len = priv->ucode_init.len;
4900 rc = iwl3945_verify_inst_sparse(priv, image, len);
4901 if (rc == 0) {
4902 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
4903 return 0;
4904 }
4905
4906 /* Try runtime/protocol */
4907 image = (__le32 *)priv->ucode_code.v_addr;
4908 len = priv->ucode_code.len;
4909 rc = iwl3945_verify_inst_sparse(priv, image, len);
4910 if (rc == 0) {
4911 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
4912 return 0;
4913 }
4914
4915 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
4916
4917 /* Since nothing seems to match, show first several data entries in
4918 * instruction SRAM, so maybe visual inspection will give a clue.
4919 * Selection of bootstrap image (vs. other images) is arbitrary. */
4920 image = (__le32 *)priv->ucode_boot.v_addr;
4921 len = priv->ucode_boot.len;
4922 rc = iwl3945_verify_inst_full(priv, image, len);
4923
4924 return rc;
4925 }
4926
4927
4928 /* check contents of special bootstrap uCode SRAM */
4929 static int iwl3945_verify_bsm(struct iwl_priv *priv)
4930 {
4931 __le32 *image = priv->ucode_boot.v_addr;
4932 u32 len = priv->ucode_boot.len;
4933 u32 reg;
4934 u32 val;
4935
4936 IWL_DEBUG_INFO("Begin verify bsm\n");
4937
4938 /* verify BSM SRAM contents */
4939 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
4940 for (reg = BSM_SRAM_LOWER_BOUND;
4941 reg < BSM_SRAM_LOWER_BOUND + len;
4942 reg += sizeof(u32), image++) {
4943 val = iwl_read_prph(priv, reg);
4944 if (val != le32_to_cpu(*image)) {
4945 IWL_ERR(priv, "BSM uCode verification failed at "
4946 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
4947 BSM_SRAM_LOWER_BOUND,
4948 reg - BSM_SRAM_LOWER_BOUND, len,
4949 val, le32_to_cpu(*image));
4950 return -EIO;
4951 }
4952 }
4953
4954 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
4955
4956 return 0;
4957 }
4958
4959 /**
4960 * iwl3945_load_bsm - Load bootstrap instructions
4961 *
4962 * BSM operation:
4963 *
4964 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
4965 * in special SRAM that does not power down during RFKILL. When powering back
4966 * up after power-saving sleeps (or during initial uCode load), the BSM loads
4967 * the bootstrap program into the on-board processor, and starts it.
4968 *
4969 * The bootstrap program loads (via DMA) instructions and data for a new
4970 * program from host DRAM locations indicated by the host driver in the
4971 * BSM_DRAM_* registers. Once the new program is loaded, it starts
4972 * automatically.
4973 *
4974 * When initializing the NIC, the host driver points the BSM to the
4975 * "initialize" uCode image. This uCode sets up some internal data, then
4976 * notifies host via "initialize alive" that it is complete.
4977 *
4978 * The host then replaces the BSM_DRAM_* pointer values to point to the
4979 * normal runtime uCode instructions and a backup uCode data cache buffer
4980 * (filled initially with starting data values for the on-board processor),
4981 * then triggers the "initialize" uCode to load and launch the runtime uCode,
4982 * which begins normal operation.
4983 *
4984 * When doing a power-save shutdown, runtime uCode saves data SRAM into
4985 * the backup data cache in DRAM before SRAM is powered down.
4986 *
4987 * When powering back up, the BSM loads the bootstrap program. This reloads
4988 * the runtime uCode instructions and the backup data cache into SRAM,
4989 * and re-launches the runtime uCode from where it left off.
4990 */
4991 static int iwl3945_load_bsm(struct iwl_priv *priv)
4992 {
4993 __le32 *image = priv->ucode_boot.v_addr;
4994 u32 len = priv->ucode_boot.len;
4995 dma_addr_t pinst;
4996 dma_addr_t pdata;
4997 u32 inst_len;
4998 u32 data_len;
4999 int rc;
5000 int i;
5001 u32 done;
5002 u32 reg_offset;
5003
5004 IWL_DEBUG_INFO("Begin load bsm\n");
5005
5006 /* make sure bootstrap program is no larger than BSM's SRAM size */
5007 if (len > IWL39_MAX_BSM_SIZE)
5008 return -EINVAL;
5009
5010 /* Tell bootstrap uCode where to find the "Initialize" uCode
5011 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5012 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5013 * after the "initialize" uCode has run, to point to
5014 * runtime/protocol instructions and backup data cache. */
5015 pinst = priv->ucode_init.p_addr;
5016 pdata = priv->ucode_init_data.p_addr;
5017 inst_len = priv->ucode_init.len;
5018 data_len = priv->ucode_init_data.len;
5019
5020 rc = iwl_grab_nic_access(priv);
5021 if (rc)
5022 return rc;
5023
5024 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5025 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5026 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5027 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5028
5029 /* Fill BSM memory with bootstrap instructions */
5030 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5031 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5032 reg_offset += sizeof(u32), image++)
5033 _iwl_write_prph(priv, reg_offset,
5034 le32_to_cpu(*image));
5035
5036 rc = iwl3945_verify_bsm(priv);
5037 if (rc) {
5038 iwl_release_nic_access(priv);
5039 return rc;
5040 }
5041
5042 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5043 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5044 iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
5045 IWL39_RTC_INST_LOWER_BOUND);
5046 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5047
5048 /* Load bootstrap code into instruction SRAM now,
5049 * to prepare to load "initialize" uCode */
5050 iwl_write_prph(priv, BSM_WR_CTRL_REG,
5051 BSM_WR_CTRL_REG_BIT_START);
5052
5053 /* Wait for load of bootstrap uCode to finish */
5054 for (i = 0; i < 100; i++) {
5055 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
5056 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5057 break;
5058 udelay(10);
5059 }
5060 if (i < 100)
5061 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5062 else {
5063 IWL_ERR(priv, "BSM write did not complete!\n");
5064 return -EIO;
5065 }
5066
5067 /* Enable future boot loads whenever power management unit triggers it
5068 * (e.g. when powering back up after power-save shutdown) */
5069 iwl_write_prph(priv, BSM_WR_CTRL_REG,
5070 BSM_WR_CTRL_REG_BIT_START_EN);
5071
5072 iwl_release_nic_access(priv);
5073
5074 return 0;
5075 }
5076
5077 static void iwl3945_nic_start(struct iwl_priv *priv)
5078 {
5079 /* Remove all resets to allow NIC to operate */
5080 iwl_write32(priv, CSR_RESET, 0);
5081 }
5082
5083 /**
5084 * iwl3945_read_ucode - Read uCode images from disk file.
5085 *
5086 * Copy into buffers for card to fetch via bus-mastering
5087 */
5088 static int iwl3945_read_ucode(struct iwl_priv *priv)
5089 {
5090 struct iwl_ucode *ucode;
5091 int ret = -EINVAL, index;
5092 const struct firmware *ucode_raw;
5093 /* firmware file name contains uCode/driver compatibility version */
5094 const char *name_pre = priv->cfg->fw_name_pre;
5095 const unsigned int api_max = priv->cfg->ucode_api_max;
5096 const unsigned int api_min = priv->cfg->ucode_api_min;
5097 char buf[25];
5098 u8 *src;
5099 size_t len;
5100 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
5101
5102 /* Ask kernel firmware_class module to get the boot firmware off disk.
5103 * request_firmware() is synchronous, file is in memory on return. */
5104 for (index = api_max; index >= api_min; index--) {
5105 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
5106 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
5107 if (ret < 0) {
5108 IWL_ERR(priv, "%s firmware file req failed: %d\n",
5109 buf, ret);
5110 if (ret == -ENOENT)
5111 continue;
5112 else
5113 goto error;
5114 } else {
5115 if (index < api_max)
5116 IWL_ERR(priv, "Loaded firmware %s, "
5117 "which is deprecated. "
5118 " Please use API v%u instead.\n",
5119 buf, api_max);
5120 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5121 buf, ucode_raw->size);
5122 break;
5123 }
5124 }
5125
5126 if (ret < 0)
5127 goto error;
5128
5129 /* Make sure that we got at least our header! */
5130 if (ucode_raw->size < sizeof(*ucode)) {
5131 IWL_ERR(priv, "File size way too small!\n");
5132 ret = -EINVAL;
5133 goto err_release;
5134 }
5135
5136 /* Data from ucode file: header followed by uCode images */
5137 ucode = (void *)ucode_raw->data;
5138
5139 priv->ucode_ver = le32_to_cpu(ucode->ver);
5140 api_ver = IWL_UCODE_API(priv->ucode_ver);
5141 inst_size = le32_to_cpu(ucode->inst_size);
5142 data_size = le32_to_cpu(ucode->data_size);
5143 init_size = le32_to_cpu(ucode->init_size);
5144 init_data_size = le32_to_cpu(ucode->init_data_size);
5145 boot_size = le32_to_cpu(ucode->boot_size);
5146
5147 /* api_ver should match the api version forming part of the
5148 * firmware filename ... but we don't check for that and only rely
5149 * on the API version read from firware header from here on forward */
5150
5151 if (api_ver < api_min || api_ver > api_max) {
5152 IWL_ERR(priv, "Driver unable to support your firmware API. "
5153 "Driver supports v%u, firmware is v%u.\n",
5154 api_max, api_ver);
5155 priv->ucode_ver = 0;
5156 ret = -EINVAL;
5157 goto err_release;
5158 }
5159 if (api_ver != api_max)
5160 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
5161 "got %u. New firmware can be obtained "
5162 "from http://www.intellinuxwireless.org.\n",
5163 api_max, api_ver);
5164
5165 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
5166 IWL_UCODE_MAJOR(priv->ucode_ver),
5167 IWL_UCODE_MINOR(priv->ucode_ver),
5168 IWL_UCODE_API(priv->ucode_ver),
5169 IWL_UCODE_SERIAL(priv->ucode_ver));
5170
5171 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
5172 priv->ucode_ver);
5173 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5174 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5175 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5176 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5177 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5178
5179
5180 /* Verify size of file vs. image size info in file's header */
5181 if (ucode_raw->size < sizeof(*ucode) +
5182 inst_size + data_size + init_size +
5183 init_data_size + boot_size) {
5184
5185 IWL_DEBUG_INFO("uCode file size %d too small\n",
5186 (int)ucode_raw->size);
5187 ret = -EINVAL;
5188 goto err_release;
5189 }
5190
5191 /* Verify that uCode images will fit in card's SRAM */
5192 if (inst_size > IWL39_MAX_INST_SIZE) {
5193 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5194 inst_size);
5195 ret = -EINVAL;
5196 goto err_release;
5197 }
5198
5199 if (data_size > IWL39_MAX_DATA_SIZE) {
5200 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5201 data_size);
5202 ret = -EINVAL;
5203 goto err_release;
5204 }
5205 if (init_size > IWL39_MAX_INST_SIZE) {
5206 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5207 init_size);
5208 ret = -EINVAL;
5209 goto err_release;
5210 }
5211 if (init_data_size > IWL39_MAX_DATA_SIZE) {
5212 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5213 init_data_size);
5214 ret = -EINVAL;
5215 goto err_release;
5216 }
5217 if (boot_size > IWL39_MAX_BSM_SIZE) {
5218 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5219 boot_size);
5220 ret = -EINVAL;
5221 goto err_release;
5222 }
5223
5224 /* Allocate ucode buffers for card's bus-master loading ... */
5225
5226 /* Runtime instructions and 2 copies of data:
5227 * 1) unmodified from disk
5228 * 2) backup cache for save/restore during power-downs */
5229 priv->ucode_code.len = inst_size;
5230 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5231
5232 priv->ucode_data.len = data_size;
5233 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5234
5235 priv->ucode_data_backup.len = data_size;
5236 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5237
5238 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5239 !priv->ucode_data_backup.v_addr)
5240 goto err_pci_alloc;
5241
5242 /* Initialization instructions and data */
5243 if (init_size && init_data_size) {
5244 priv->ucode_init.len = init_size;
5245 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5246
5247 priv->ucode_init_data.len = init_data_size;
5248 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5249
5250 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5251 goto err_pci_alloc;
5252 }
5253
5254 /* Bootstrap (instructions only, no data) */
5255 if (boot_size) {
5256 priv->ucode_boot.len = boot_size;
5257 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5258
5259 if (!priv->ucode_boot.v_addr)
5260 goto err_pci_alloc;
5261 }
5262
5263 /* Copy images into buffers for card's bus-master reads ... */
5264
5265 /* Runtime instructions (first block of data in file) */
5266 src = &ucode->data[0];
5267 len = priv->ucode_code.len;
5268 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5269 memcpy(priv->ucode_code.v_addr, src, len);
5270 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5271 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5272
5273 /* Runtime data (2nd block)
5274 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5275 src = &ucode->data[inst_size];
5276 len = priv->ucode_data.len;
5277 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5278 memcpy(priv->ucode_data.v_addr, src, len);
5279 memcpy(priv->ucode_data_backup.v_addr, src, len);
5280
5281 /* Initialization instructions (3rd block) */
5282 if (init_size) {
5283 src = &ucode->data[inst_size + data_size];
5284 len = priv->ucode_init.len;
5285 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5286 len);
5287 memcpy(priv->ucode_init.v_addr, src, len);
5288 }
5289
5290 /* Initialization data (4th block) */
5291 if (init_data_size) {
5292 src = &ucode->data[inst_size + data_size + init_size];
5293 len = priv->ucode_init_data.len;
5294 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5295 (int)len);
5296 memcpy(priv->ucode_init_data.v_addr, src, len);
5297 }
5298
5299 /* Bootstrap instructions (5th block) */
5300 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5301 len = priv->ucode_boot.len;
5302 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5303 (int)len);
5304 memcpy(priv->ucode_boot.v_addr, src, len);
5305
5306 /* We have our copies now, allow OS release its copies */
5307 release_firmware(ucode_raw);
5308 return 0;
5309
5310 err_pci_alloc:
5311 IWL_ERR(priv, "failed to allocate pci memory\n");
5312 ret = -ENOMEM;
5313 iwl3945_dealloc_ucode_pci(priv);
5314
5315 err_release:
5316 release_firmware(ucode_raw);
5317
5318 error:
5319 return ret;
5320 }
5321
5322
5323 /**
5324 * iwl3945_set_ucode_ptrs - Set uCode address location
5325 *
5326 * Tell initialization uCode where to find runtime uCode.
5327 *
5328 * BSM registers initially contain pointers to initialization uCode.
5329 * We need to replace them to load runtime uCode inst and data,
5330 * and to save runtime data when powering down.
5331 */
5332 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
5333 {
5334 dma_addr_t pinst;
5335 dma_addr_t pdata;
5336 int rc = 0;
5337 unsigned long flags;
5338
5339 /* bits 31:0 for 3945 */
5340 pinst = priv->ucode_code.p_addr;
5341 pdata = priv->ucode_data_backup.p_addr;
5342
5343 spin_lock_irqsave(&priv->lock, flags);
5344 rc = iwl_grab_nic_access(priv);
5345 if (rc) {
5346 spin_unlock_irqrestore(&priv->lock, flags);
5347 return rc;
5348 }
5349
5350 /* Tell bootstrap uCode where to find image to load */
5351 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5352 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5353 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5354 priv->ucode_data.len);
5355
5356 /* Inst byte count must be last to set up, bit 31 signals uCode
5357 * that all new ptr/size info is in place */
5358 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5359 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5360
5361 iwl_release_nic_access(priv);
5362
5363 spin_unlock_irqrestore(&priv->lock, flags);
5364
5365 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5366
5367 return rc;
5368 }
5369
5370 /**
5371 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5372 *
5373 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5374 *
5375 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5376 */
5377 static void iwl3945_init_alive_start(struct iwl_priv *priv)
5378 {
5379 /* Check alive response for "valid" sign from uCode */
5380 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5381 /* We had an error bringing up the hardware, so take it
5382 * all the way back down so we can try again */
5383 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5384 goto restart;
5385 }
5386
5387 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5388 * This is a paranoid check, because we would not have gotten the
5389 * "initialize" alive if code weren't properly loaded. */
5390 if (iwl3945_verify_ucode(priv)) {
5391 /* Runtime instruction load was bad;
5392 * take it all the way back down so we can try again */
5393 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5394 goto restart;
5395 }
5396
5397 /* Send pointers to protocol/runtime uCode image ... init code will
5398 * load and launch runtime uCode, which will send us another "Alive"
5399 * notification. */
5400 IWL_DEBUG_INFO("Initialization Alive received.\n");
5401 if (iwl3945_set_ucode_ptrs(priv)) {
5402 /* Runtime instruction load won't happen;
5403 * take it all the way back down so we can try again */
5404 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5405 goto restart;
5406 }
5407 return;
5408
5409 restart:
5410 queue_work(priv->workqueue, &priv->restart);
5411 }
5412
5413
5414 /* temporary */
5415 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
5416 struct sk_buff *skb);
5417
5418 /**
5419 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5420 * from protocol/runtime uCode (initialization uCode's
5421 * Alive gets handled by iwl3945_init_alive_start()).
5422 */
5423 static void iwl3945_alive_start(struct iwl_priv *priv)
5424 {
5425 int rc = 0;
5426 int thermal_spin = 0;
5427 u32 rfkill;
5428
5429 IWL_DEBUG_INFO("Runtime Alive received.\n");
5430
5431 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5432 /* We had an error bringing up the hardware, so take it
5433 * all the way back down so we can try again */
5434 IWL_DEBUG_INFO("Alive failed.\n");
5435 goto restart;
5436 }
5437
5438 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5439 * This is a paranoid check, because we would not have gotten the
5440 * "runtime" alive if code weren't properly loaded. */
5441 if (iwl3945_verify_ucode(priv)) {
5442 /* Runtime instruction load was bad;
5443 * take it all the way back down so we can try again */
5444 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5445 goto restart;
5446 }
5447
5448 iwl3945_clear_stations_table(priv);
5449
5450 rc = iwl_grab_nic_access(priv);
5451 if (rc) {
5452 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
5453 return;
5454 }
5455
5456 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
5457 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5458 iwl_release_nic_access(priv);
5459
5460 if (rfkill & 0x1) {
5461 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5462 /* if RFKILL is not on, then wait for thermal
5463 * sensor in adapter to kick in */
5464 while (iwl3945_hw_get_temperature(priv) == 0) {
5465 thermal_spin++;
5466 udelay(10);
5467 }
5468
5469 if (thermal_spin)
5470 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5471 thermal_spin * 10);
5472 } else
5473 set_bit(STATUS_RF_KILL_HW, &priv->status);
5474
5475 /* After the ALIVE response, we can send commands to 3945 uCode */
5476 set_bit(STATUS_ALIVE, &priv->status);
5477
5478 /* Clear out the uCode error bit if it is set */
5479 clear_bit(STATUS_FW_ERROR, &priv->status);
5480
5481 if (iwl_is_rfkill(priv))
5482 return;
5483
5484 ieee80211_wake_queues(priv->hw);
5485
5486 priv->active_rate = priv->rates_mask;
5487 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5488
5489 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5490
5491 if (iwl3945_is_associated(priv)) {
5492 struct iwl3945_rxon_cmd *active_rxon =
5493 (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
5494
5495 memcpy(&priv->staging39_rxon, &priv->active39_rxon,
5496 sizeof(priv->staging39_rxon));
5497 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5498 } else {
5499 /* Initialize our rx_config data */
5500 iwl3945_connection_init_rx_config(priv, priv->iw_mode);
5501 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5502 }
5503
5504 /* Configure Bluetooth device coexistence support */
5505 iwl3945_send_bt_config(priv);
5506
5507 /* Configure the adapter for unassociated operation */
5508 iwl3945_commit_rxon(priv);
5509
5510 iwl3945_reg_txpower_periodic(priv);
5511
5512 iwl3945_led_register(priv);
5513
5514 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5515 set_bit(STATUS_READY, &priv->status);
5516 wake_up_interruptible(&priv->wait_command_queue);
5517
5518 if (priv->error_recovering)
5519 iwl3945_error_recovery(priv);
5520
5521 /* reassociate for ADHOC mode */
5522 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
5523 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
5524 priv->vif);
5525 if (beacon)
5526 iwl3945_mac_beacon_update(priv->hw, beacon);
5527 }
5528
5529 return;
5530
5531 restart:
5532 queue_work(priv->workqueue, &priv->restart);
5533 }
5534
5535 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
5536
5537 static void __iwl3945_down(struct iwl_priv *priv)
5538 {
5539 unsigned long flags;
5540 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5541 struct ieee80211_conf *conf = NULL;
5542
5543 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5544
5545 conf = ieee80211_get_hw_conf(priv->hw);
5546
5547 if (!exit_pending)
5548 set_bit(STATUS_EXIT_PENDING, &priv->status);
5549
5550 iwl3945_led_unregister(priv);
5551 iwl3945_clear_stations_table(priv);
5552
5553 /* Unblock any waiting calls */
5554 wake_up_interruptible_all(&priv->wait_command_queue);
5555
5556 /* Wipe out the EXIT_PENDING status bit if we are not actually
5557 * exiting the module */
5558 if (!exit_pending)
5559 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5560
5561 /* stop and reset the on-board processor */
5562 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5563
5564 /* tell the device to stop sending interrupts */
5565 spin_lock_irqsave(&priv->lock, flags);
5566 iwl3945_disable_interrupts(priv);
5567 spin_unlock_irqrestore(&priv->lock, flags);
5568 iwl_synchronize_irq(priv);
5569
5570 if (priv->mac80211_registered)
5571 ieee80211_stop_queues(priv->hw);
5572
5573 /* If we have not previously called iwl3945_init() then
5574 * clear all bits but the RF Kill and SUSPEND bits and return */
5575 if (!iwl_is_init(priv)) {
5576 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5577 STATUS_RF_KILL_HW |
5578 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5579 STATUS_RF_KILL_SW |
5580 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5581 STATUS_GEO_CONFIGURED |
5582 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5583 STATUS_IN_SUSPEND |
5584 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5585 STATUS_EXIT_PENDING;
5586 goto exit;
5587 }
5588
5589 /* ...otherwise clear out all the status bits but the RF Kill and
5590 * SUSPEND bits and continue taking the NIC down. */
5591 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5592 STATUS_RF_KILL_HW |
5593 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5594 STATUS_RF_KILL_SW |
5595 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5596 STATUS_GEO_CONFIGURED |
5597 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5598 STATUS_IN_SUSPEND |
5599 test_bit(STATUS_FW_ERROR, &priv->status) <<
5600 STATUS_FW_ERROR |
5601 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5602 STATUS_EXIT_PENDING;
5603
5604 spin_lock_irqsave(&priv->lock, flags);
5605 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5606 spin_unlock_irqrestore(&priv->lock, flags);
5607
5608 iwl3945_hw_txq_ctx_stop(priv);
5609 iwl3945_hw_rxq_stop(priv);
5610
5611 spin_lock_irqsave(&priv->lock, flags);
5612 if (!iwl_grab_nic_access(priv)) {
5613 iwl_write_prph(priv, APMG_CLK_DIS_REG,
5614 APMG_CLK_VAL_DMA_CLK_RQT);
5615 iwl_release_nic_access(priv);
5616 }
5617 spin_unlock_irqrestore(&priv->lock, flags);
5618
5619 udelay(5);
5620
5621 iwl3945_hw_nic_stop_master(priv);
5622 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5623 iwl3945_hw_nic_reset(priv);
5624
5625 exit:
5626 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
5627
5628 if (priv->ibss_beacon)
5629 dev_kfree_skb(priv->ibss_beacon);
5630 priv->ibss_beacon = NULL;
5631
5632 /* clear out any free frames */
5633 iwl3945_clear_free_frames(priv);
5634 }
5635
5636 static void iwl3945_down(struct iwl_priv *priv)
5637 {
5638 mutex_lock(&priv->mutex);
5639 __iwl3945_down(priv);
5640 mutex_unlock(&priv->mutex);
5641
5642 iwl3945_cancel_deferred_work(priv);
5643 }
5644
5645 #define MAX_HW_RESTARTS 5
5646
5647 static int __iwl3945_up(struct iwl_priv *priv)
5648 {
5649 int rc, i;
5650
5651 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5652 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
5653 return -EIO;
5654 }
5655
5656 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5657 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
5658 "parameter)\n");
5659 return -ENODEV;
5660 }
5661
5662 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5663 IWL_ERR(priv, "ucode not available for device bring up\n");
5664 return -EIO;
5665 }
5666
5667 /* If platform's RF_KILL switch is NOT set to KILL */
5668 if (iwl_read32(priv, CSR_GP_CNTRL) &
5669 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5670 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5671 else {
5672 set_bit(STATUS_RF_KILL_HW, &priv->status);
5673 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5674 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
5675 return -ENODEV;
5676 }
5677 }
5678
5679 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5680
5681 rc = iwl3945_hw_nic_init(priv);
5682 if (rc) {
5683 IWL_ERR(priv, "Unable to int nic\n");
5684 return rc;
5685 }
5686
5687 /* make sure rfkill handshake bits are cleared */
5688 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5689 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5690 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5691
5692 /* clear (again), then enable host interrupts */
5693 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5694 iwl3945_enable_interrupts(priv);
5695
5696 /* really make sure rfkill handshake bits are cleared */
5697 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5698 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5699
5700 /* Copy original ucode data image from disk into backup cache.
5701 * This will be used to initialize the on-board processor's
5702 * data SRAM for a clean start when the runtime program first loads. */
5703 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5704 priv->ucode_data.len);
5705
5706 /* We return success when we resume from suspend and rf_kill is on. */
5707 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5708 return 0;
5709
5710 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5711
5712 iwl3945_clear_stations_table(priv);
5713
5714 /* load bootstrap state machine,
5715 * load bootstrap program into processor's memory,
5716 * prepare to load the "initialize" uCode */
5717 rc = iwl3945_load_bsm(priv);
5718
5719 if (rc) {
5720 IWL_ERR(priv,
5721 "Unable to set up bootstrap uCode: %d\n", rc);
5722 continue;
5723 }
5724
5725 /* start card; "initialize" will load runtime ucode */
5726 iwl3945_nic_start(priv);
5727
5728 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5729
5730 return 0;
5731 }
5732
5733 set_bit(STATUS_EXIT_PENDING, &priv->status);
5734 __iwl3945_down(priv);
5735 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5736
5737 /* tried to restart and config the device for as long as our
5738 * patience could withstand */
5739 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
5740 return -EIO;
5741 }
5742
5743
5744 /*****************************************************************************
5745 *
5746 * Workqueue callbacks
5747 *
5748 *****************************************************************************/
5749
5750 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5751 {
5752 struct iwl_priv *priv =
5753 container_of(data, struct iwl_priv, init_alive_start.work);
5754
5755 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5756 return;
5757
5758 mutex_lock(&priv->mutex);
5759 iwl3945_init_alive_start(priv);
5760 mutex_unlock(&priv->mutex);
5761 }
5762
5763 static void iwl3945_bg_alive_start(struct work_struct *data)
5764 {
5765 struct iwl_priv *priv =
5766 container_of(data, struct iwl_priv, alive_start.work);
5767
5768 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5769 return;
5770
5771 mutex_lock(&priv->mutex);
5772 iwl3945_alive_start(priv);
5773 mutex_unlock(&priv->mutex);
5774 }
5775
5776 static void iwl3945_bg_rf_kill(struct work_struct *work)
5777 {
5778 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
5779
5780 wake_up_interruptible(&priv->wait_command_queue);
5781
5782 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5783 return;
5784
5785 mutex_lock(&priv->mutex);
5786
5787 if (!iwl_is_rfkill(priv)) {
5788 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5789 "HW and/or SW RF Kill no longer active, restarting "
5790 "device\n");
5791 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5792 queue_work(priv->workqueue, &priv->restart);
5793 } else {
5794
5795 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5796 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5797 "disabled by SW switch\n");
5798 else
5799 IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
5800 "Kill switch must be turned off for "
5801 "wireless networking to work.\n");
5802 }
5803
5804 mutex_unlock(&priv->mutex);
5805 iwl3945_rfkill_set_hw_state(priv);
5806 }
5807
5808 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5809
5810 static void iwl3945_bg_scan_check(struct work_struct *data)
5811 {
5812 struct iwl_priv *priv =
5813 container_of(data, struct iwl_priv, scan_check.work);
5814
5815 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5816 return;
5817
5818 mutex_lock(&priv->mutex);
5819 if (test_bit(STATUS_SCANNING, &priv->status) ||
5820 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5821 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5822 "Scan completion watchdog resetting adapter (%dms)\n",
5823 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
5824
5825 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5826 iwl3945_send_scan_abort(priv);
5827 }
5828 mutex_unlock(&priv->mutex);
5829 }
5830
5831 static void iwl3945_bg_request_scan(struct work_struct *data)
5832 {
5833 struct iwl_priv *priv =
5834 container_of(data, struct iwl_priv, request_scan);
5835 struct iwl_host_cmd cmd = {
5836 .id = REPLY_SCAN_CMD,
5837 .len = sizeof(struct iwl3945_scan_cmd),
5838 .meta.flags = CMD_SIZE_HUGE,
5839 };
5840 int rc = 0;
5841 struct iwl3945_scan_cmd *scan;
5842 struct ieee80211_conf *conf = NULL;
5843 u8 n_probes = 2;
5844 enum ieee80211_band band;
5845 DECLARE_SSID_BUF(ssid);
5846
5847 conf = ieee80211_get_hw_conf(priv->hw);
5848
5849 mutex_lock(&priv->mutex);
5850
5851 if (!iwl_is_ready(priv)) {
5852 IWL_WARN(priv, "request scan called when driver not ready.\n");
5853 goto done;
5854 }
5855
5856 /* Make sure the scan wasn't canceled before this queued work
5857 * was given the chance to run... */
5858 if (!test_bit(STATUS_SCANNING, &priv->status))
5859 goto done;
5860
5861 /* This should never be called or scheduled if there is currently
5862 * a scan active in the hardware. */
5863 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
5864 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
5865 "Ignoring second request.\n");
5866 rc = -EIO;
5867 goto done;
5868 }
5869
5870 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5871 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
5872 goto done;
5873 }
5874
5875 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5876 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
5877 goto done;
5878 }
5879
5880 if (iwl_is_rfkill(priv)) {
5881 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
5882 goto done;
5883 }
5884
5885 if (!test_bit(STATUS_READY, &priv->status)) {
5886 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
5887 goto done;
5888 }
5889
5890 if (!priv->scan_bands) {
5891 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
5892 goto done;
5893 }
5894
5895 if (!priv->scan39) {
5896 priv->scan39 = kmalloc(sizeof(struct iwl3945_scan_cmd) +
5897 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
5898 if (!priv->scan39) {
5899 rc = -ENOMEM;
5900 goto done;
5901 }
5902 }
5903 scan = priv->scan39;
5904 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
5905
5906 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
5907 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
5908
5909 if (iwl3945_is_associated(priv)) {
5910 u16 interval = 0;
5911 u32 extra;
5912 u32 suspend_time = 100;
5913 u32 scan_suspend_time = 100;
5914 unsigned long flags;
5915
5916 IWL_DEBUG_INFO("Scanning while associated...\n");
5917
5918 spin_lock_irqsave(&priv->lock, flags);
5919 interval = priv->beacon_int;
5920 spin_unlock_irqrestore(&priv->lock, flags);
5921
5922 scan->suspend_time = 0;
5923 scan->max_out_time = cpu_to_le32(200 * 1024);
5924 if (!interval)
5925 interval = suspend_time;
5926 /*
5927 * suspend time format:
5928 * 0-19: beacon interval in usec (time before exec.)
5929 * 20-23: 0
5930 * 24-31: number of beacons (suspend between channels)
5931 */
5932
5933 extra = (suspend_time / interval) << 24;
5934 scan_suspend_time = 0xFF0FFFFF &
5935 (extra | ((suspend_time % interval) * 1024));
5936
5937 scan->suspend_time = cpu_to_le32(scan_suspend_time);
5938 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
5939 scan_suspend_time, interval);
5940 }
5941
5942 /* We should add the ability for user to lock to PASSIVE ONLY */
5943 if (priv->one_direct_scan) {
5944 IWL_DEBUG_SCAN
5945 ("Kicking off one direct scan for '%s'\n",
5946 print_ssid(ssid, priv->direct_ssid,
5947 priv->direct_ssid_len));
5948 scan->direct_scan[0].id = WLAN_EID_SSID;
5949 scan->direct_scan[0].len = priv->direct_ssid_len;
5950 memcpy(scan->direct_scan[0].ssid,
5951 priv->direct_ssid, priv->direct_ssid_len);
5952 n_probes++;
5953 } else
5954 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
5955
5956 /* We don't build a direct scan probe request; the uCode will do
5957 * that based on the direct_mask added to each channel entry */
5958 scan->tx_cmd.len = cpu_to_le16(
5959 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
5960 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
5961 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
5962 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
5963 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
5964
5965 /* flags + rate selection */
5966
5967 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
5968 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
5969 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
5970 scan->good_CRC_th = 0;
5971 band = IEEE80211_BAND_2GHZ;
5972 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
5973 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
5974 scan->good_CRC_th = IWL_GOOD_CRC_TH;
5975 band = IEEE80211_BAND_5GHZ;
5976 } else {
5977 IWL_WARN(priv, "Invalid scan band count\n");
5978 goto done;
5979 }
5980
5981 /* select Rx antennas */
5982 scan->flags |= iwl3945_get_antenna_flags(priv);
5983
5984 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
5985 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
5986
5987 scan->channel_count =
5988 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
5989 n_probes,
5990 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
5991
5992 if (scan->channel_count == 0) {
5993 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
5994 goto done;
5995 }
5996
5997 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
5998 scan->channel_count * sizeof(struct iwl3945_scan_channel);
5999 cmd.data = scan;
6000 scan->len = cpu_to_le16(cmd.len);
6001
6002 set_bit(STATUS_SCAN_HW, &priv->status);
6003 rc = iwl3945_send_cmd_sync(priv, &cmd);
6004 if (rc)
6005 goto done;
6006
6007 queue_delayed_work(priv->workqueue, &priv->scan_check,
6008 IWL_SCAN_CHECK_WATCHDOG);
6009
6010 mutex_unlock(&priv->mutex);
6011 return;
6012
6013 done:
6014 /* can not perform scan make sure we clear scanning
6015 * bits from status so next scan request can be performed.
6016 * if we dont clear scanning status bit here all next scan
6017 * will fail
6018 */
6019 clear_bit(STATUS_SCAN_HW, &priv->status);
6020 clear_bit(STATUS_SCANNING, &priv->status);
6021
6022 /* inform mac80211 scan aborted */
6023 queue_work(priv->workqueue, &priv->scan_completed);
6024 mutex_unlock(&priv->mutex);
6025 }
6026
6027 static void iwl3945_bg_up(struct work_struct *data)
6028 {
6029 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
6030
6031 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6032 return;
6033
6034 mutex_lock(&priv->mutex);
6035 __iwl3945_up(priv);
6036 mutex_unlock(&priv->mutex);
6037 iwl3945_rfkill_set_hw_state(priv);
6038 }
6039
6040 static void iwl3945_bg_restart(struct work_struct *data)
6041 {
6042 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
6043
6044 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6045 return;
6046
6047 iwl3945_down(priv);
6048 queue_work(priv->workqueue, &priv->up);
6049 }
6050
6051 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6052 {
6053 struct iwl_priv *priv =
6054 container_of(data, struct iwl_priv, rx_replenish);
6055
6056 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6057 return;
6058
6059 mutex_lock(&priv->mutex);
6060 iwl3945_rx_replenish(priv);
6061 mutex_unlock(&priv->mutex);
6062 }
6063
6064 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6065
6066 static void iwl3945_post_associate(struct iwl_priv *priv)
6067 {
6068 int rc = 0;
6069 struct ieee80211_conf *conf = NULL;
6070
6071 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6072 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
6073 return;
6074 }
6075
6076
6077 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
6078 priv->assoc_id, priv->active39_rxon.bssid_addr);
6079
6080 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6081 return;
6082
6083 if (!priv->vif || !priv->is_open)
6084 return;
6085
6086 iwl3945_scan_cancel_timeout(priv, 200);
6087
6088 conf = ieee80211_get_hw_conf(priv->hw);
6089
6090 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6091 iwl3945_commit_rxon(priv);
6092
6093 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6094 iwl3945_setup_rxon_timing(priv);
6095 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6096 sizeof(priv->rxon_timing), &priv->rxon_timing);
6097 if (rc)
6098 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
6099 "Attempting to continue.\n");
6100
6101 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6102
6103 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6104
6105 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6106 priv->assoc_id, priv->beacon_int);
6107
6108 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6109 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6110 else
6111 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6112
6113 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6114 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6115 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6116 else
6117 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6118
6119 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6120 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6121
6122 }
6123
6124 iwl3945_commit_rxon(priv);
6125
6126 switch (priv->iw_mode) {
6127 case NL80211_IFTYPE_STATION:
6128 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6129 break;
6130
6131 case NL80211_IFTYPE_ADHOC:
6132
6133 priv->assoc_id = 1;
6134 iwl3945_add_station(priv, priv->bssid, 0, 0);
6135 iwl3945_sync_sta(priv, IWL_STA_ID,
6136 (priv->band == IEEE80211_BAND_5GHZ) ?
6137 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6138 CMD_ASYNC);
6139 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6140 iwl3945_send_beacon_cmd(priv);
6141
6142 break;
6143
6144 default:
6145 IWL_ERR(priv, "%s Should not be called in %d mode\n",
6146 __func__, priv->iw_mode);
6147 break;
6148 }
6149
6150 iwl3945_activate_qos(priv, 0);
6151
6152 /* we have just associated, don't start scan too early */
6153 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6154 }
6155
6156 static void iwl3945_bg_abort_scan(struct work_struct *work)
6157 {
6158 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
6159
6160 if (!iwl_is_ready(priv))
6161 return;
6162
6163 mutex_lock(&priv->mutex);
6164
6165 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6166 iwl3945_send_scan_abort(priv);
6167
6168 mutex_unlock(&priv->mutex);
6169 }
6170
6171 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
6172
6173 static void iwl3945_bg_scan_completed(struct work_struct *work)
6174 {
6175 struct iwl_priv *priv =
6176 container_of(work, struct iwl_priv, scan_completed);
6177
6178 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6179
6180 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6181 return;
6182
6183 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6184 iwl3945_mac_config(priv->hw, 0);
6185
6186 ieee80211_scan_completed(priv->hw);
6187
6188 /* Since setting the TXPOWER may have been deferred while
6189 * performing the scan, fire one off */
6190 mutex_lock(&priv->mutex);
6191 iwl3945_hw_reg_send_txpower(priv);
6192 mutex_unlock(&priv->mutex);
6193 }
6194
6195 /*****************************************************************************
6196 *
6197 * mac80211 entry point functions
6198 *
6199 *****************************************************************************/
6200
6201 #define UCODE_READY_TIMEOUT (2 * HZ)
6202
6203 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6204 {
6205 struct iwl_priv *priv = hw->priv;
6206 int ret;
6207
6208 IWL_DEBUG_MAC80211("enter\n");
6209
6210 if (pci_enable_device(priv->pci_dev)) {
6211 IWL_ERR(priv, "Fail to pci_enable_device\n");
6212 return -ENODEV;
6213 }
6214 pci_restore_state(priv->pci_dev);
6215 pci_enable_msi(priv->pci_dev);
6216
6217 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6218 DRV_NAME, priv);
6219 if (ret) {
6220 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
6221 goto out_disable_msi;
6222 }
6223
6224 /* we should be verifying the device is ready to be opened */
6225 mutex_lock(&priv->mutex);
6226
6227 memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6228 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6229 * ucode filename and max sizes are card-specific. */
6230
6231 if (!priv->ucode_code.len) {
6232 ret = iwl3945_read_ucode(priv);
6233 if (ret) {
6234 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
6235 mutex_unlock(&priv->mutex);
6236 goto out_release_irq;
6237 }
6238 }
6239
6240 ret = __iwl3945_up(priv);
6241
6242 mutex_unlock(&priv->mutex);
6243
6244 iwl3945_rfkill_set_hw_state(priv);
6245
6246 if (ret)
6247 goto out_release_irq;
6248
6249 IWL_DEBUG_INFO("Start UP work.\n");
6250
6251 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6252 return 0;
6253
6254 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6255 * mac80211 will not be run successfully. */
6256 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6257 test_bit(STATUS_READY, &priv->status),
6258 UCODE_READY_TIMEOUT);
6259 if (!ret) {
6260 if (!test_bit(STATUS_READY, &priv->status)) {
6261 IWL_ERR(priv,
6262 "Wait for START_ALIVE timeout after %dms.\n",
6263 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6264 ret = -ETIMEDOUT;
6265 goto out_release_irq;
6266 }
6267 }
6268
6269 priv->is_open = 1;
6270 IWL_DEBUG_MAC80211("leave\n");
6271 return 0;
6272
6273 out_release_irq:
6274 free_irq(priv->pci_dev->irq, priv);
6275 out_disable_msi:
6276 pci_disable_msi(priv->pci_dev);
6277 pci_disable_device(priv->pci_dev);
6278 priv->is_open = 0;
6279 IWL_DEBUG_MAC80211("leave - failed\n");
6280 return ret;
6281 }
6282
6283 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6284 {
6285 struct iwl_priv *priv = hw->priv;
6286
6287 IWL_DEBUG_MAC80211("enter\n");
6288
6289 if (!priv->is_open) {
6290 IWL_DEBUG_MAC80211("leave - skip\n");
6291 return;
6292 }
6293
6294 priv->is_open = 0;
6295
6296 if (iwl_is_ready_rf(priv)) {
6297 /* stop mac, cancel any scan request and clear
6298 * RXON_FILTER_ASSOC_MSK BIT
6299 */
6300 mutex_lock(&priv->mutex);
6301 iwl3945_scan_cancel_timeout(priv, 100);
6302 mutex_unlock(&priv->mutex);
6303 }
6304
6305 iwl3945_down(priv);
6306
6307 flush_workqueue(priv->workqueue);
6308 free_irq(priv->pci_dev->irq, priv);
6309 pci_disable_msi(priv->pci_dev);
6310 pci_save_state(priv->pci_dev);
6311 pci_disable_device(priv->pci_dev);
6312
6313 IWL_DEBUG_MAC80211("leave\n");
6314 }
6315
6316 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6317 {
6318 struct iwl_priv *priv = hw->priv;
6319
6320 IWL_DEBUG_MAC80211("enter\n");
6321
6322 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6323 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6324
6325 if (iwl3945_tx_skb(priv, skb))
6326 dev_kfree_skb_any(skb);
6327
6328 IWL_DEBUG_MAC80211("leave\n");
6329 return NETDEV_TX_OK;
6330 }
6331
6332 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6333 struct ieee80211_if_init_conf *conf)
6334 {
6335 struct iwl_priv *priv = hw->priv;
6336 unsigned long flags;
6337
6338 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6339
6340 if (priv->vif) {
6341 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6342 return -EOPNOTSUPP;
6343 }
6344
6345 spin_lock_irqsave(&priv->lock, flags);
6346 priv->vif = conf->vif;
6347 priv->iw_mode = conf->type;
6348
6349 spin_unlock_irqrestore(&priv->lock, flags);
6350
6351 mutex_lock(&priv->mutex);
6352
6353 if (conf->mac_addr) {
6354 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
6355 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6356 }
6357
6358 if (iwl_is_ready(priv))
6359 iwl3945_set_mode(priv, conf->type);
6360
6361 mutex_unlock(&priv->mutex);
6362
6363 IWL_DEBUG_MAC80211("leave\n");
6364 return 0;
6365 }
6366
6367 /**
6368 * iwl3945_mac_config - mac80211 config callback
6369 *
6370 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6371 * be set inappropriately and the driver currently sets the hardware up to
6372 * use it whenever needed.
6373 */
6374 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
6375 {
6376 struct iwl_priv *priv = hw->priv;
6377 const struct iwl_channel_info *ch_info;
6378 struct ieee80211_conf *conf = &hw->conf;
6379 unsigned long flags;
6380 int ret = 0;
6381
6382 mutex_lock(&priv->mutex);
6383 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6384
6385 if (!iwl_is_ready(priv)) {
6386 IWL_DEBUG_MAC80211("leave - not ready\n");
6387 ret = -EIO;
6388 goto out;
6389 }
6390
6391 if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
6392 test_bit(STATUS_SCANNING, &priv->status))) {
6393 IWL_DEBUG_MAC80211("leave - scanning\n");
6394 set_bit(STATUS_CONF_PENDING, &priv->status);
6395 mutex_unlock(&priv->mutex);
6396 return 0;
6397 }
6398
6399 spin_lock_irqsave(&priv->lock, flags);
6400
6401 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6402 conf->channel->hw_value);
6403 if (!is_channel_valid(ch_info)) {
6404 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6405 conf->channel->hw_value, conf->channel->band);
6406 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6407 spin_unlock_irqrestore(&priv->lock, flags);
6408 ret = -EINVAL;
6409 goto out;
6410 }
6411
6412 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6413
6414 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6415
6416 /* The list of supported rates and rate mask can be different
6417 * for each phymode; since the phymode may have changed, reset
6418 * the rate mask to what mac80211 lists */
6419 iwl3945_set_rate(priv);
6420
6421 spin_unlock_irqrestore(&priv->lock, flags);
6422
6423 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6424 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6425 iwl3945_hw_channel_switch(priv, conf->channel);
6426 goto out;
6427 }
6428 #endif
6429
6430 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6431
6432 if (!conf->radio_enabled) {
6433 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6434 goto out;
6435 }
6436
6437 if (iwl_is_rfkill(priv)) {
6438 IWL_DEBUG_MAC80211("leave - RF kill\n");
6439 ret = -EIO;
6440 goto out;
6441 }
6442
6443 iwl3945_set_rate(priv);
6444
6445 if (memcmp(&priv->active39_rxon,
6446 &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
6447 iwl3945_commit_rxon(priv);
6448 else
6449 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6450
6451 IWL_DEBUG_MAC80211("leave\n");
6452
6453 out:
6454 clear_bit(STATUS_CONF_PENDING, &priv->status);
6455 mutex_unlock(&priv->mutex);
6456 return ret;
6457 }
6458
6459 static void iwl3945_config_ap(struct iwl_priv *priv)
6460 {
6461 int rc = 0;
6462
6463 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6464 return;
6465
6466 /* The following should be done only at AP bring up */
6467 if (!(iwl3945_is_associated(priv))) {
6468
6469 /* RXON - unassoc (to set timing command) */
6470 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6471 iwl3945_commit_rxon(priv);
6472
6473 /* RXON Timing */
6474 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6475 iwl3945_setup_rxon_timing(priv);
6476 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6477 sizeof(priv->rxon_timing), &priv->rxon_timing);
6478 if (rc)
6479 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
6480 "Attempting to continue.\n");
6481
6482 /* FIXME: what should be the assoc_id for AP? */
6483 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6484 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6485 priv->staging39_rxon.flags |=
6486 RXON_FLG_SHORT_PREAMBLE_MSK;
6487 else
6488 priv->staging39_rxon.flags &=
6489 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6490
6491 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6492 if (priv->assoc_capability &
6493 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6494 priv->staging39_rxon.flags |=
6495 RXON_FLG_SHORT_SLOT_MSK;
6496 else
6497 priv->staging39_rxon.flags &=
6498 ~RXON_FLG_SHORT_SLOT_MSK;
6499
6500 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6501 priv->staging39_rxon.flags &=
6502 ~RXON_FLG_SHORT_SLOT_MSK;
6503 }
6504 /* restore RXON assoc */
6505 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6506 iwl3945_commit_rxon(priv);
6507 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
6508 }
6509 iwl3945_send_beacon_cmd(priv);
6510
6511 /* FIXME - we need to add code here to detect a totally new
6512 * configuration, reset the AP, unassoc, rxon timing, assoc,
6513 * clear sta table, add BCAST sta... */
6514 }
6515
6516 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6517 struct ieee80211_vif *vif,
6518 struct ieee80211_if_conf *conf)
6519 {
6520 struct iwl_priv *priv = hw->priv;
6521 int rc;
6522
6523 if (conf == NULL)
6524 return -EIO;
6525
6526 if (priv->vif != vif) {
6527 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6528 return 0;
6529 }
6530
6531 /* handle this temporarily here */
6532 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
6533 conf->changed & IEEE80211_IFCC_BEACON) {
6534 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6535 if (!beacon)
6536 return -ENOMEM;
6537 mutex_lock(&priv->mutex);
6538 rc = iwl3945_mac_beacon_update(hw, beacon);
6539 mutex_unlock(&priv->mutex);
6540 if (rc)
6541 return rc;
6542 }
6543
6544 if (!iwl_is_alive(priv))
6545 return -EAGAIN;
6546
6547 mutex_lock(&priv->mutex);
6548
6549 if (conf->bssid)
6550 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
6551
6552 /*
6553 * very dubious code was here; the probe filtering flag is never set:
6554 *
6555 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6556 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6557 */
6558
6559 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6560 if (!conf->bssid) {
6561 conf->bssid = priv->mac_addr;
6562 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6563 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
6564 conf->bssid);
6565 }
6566 if (priv->ibss_beacon)
6567 dev_kfree_skb(priv->ibss_beacon);
6568
6569 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6570 }
6571
6572 if (iwl_is_rfkill(priv))
6573 goto done;
6574
6575 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6576 !is_multicast_ether_addr(conf->bssid)) {
6577 /* If there is currently a HW scan going on in the background
6578 * then we need to cancel it else the RXON below will fail. */
6579 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6580 IWL_WARN(priv, "Aborted scan still in progress "
6581 "after 100ms\n");
6582 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6583 mutex_unlock(&priv->mutex);
6584 return -EAGAIN;
6585 }
6586 memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6587
6588 /* TODO: Audit driver for usage of these members and see
6589 * if mac80211 deprecates them (priv->bssid looks like it
6590 * shouldn't be there, but I haven't scanned the IBSS code
6591 * to verify) - jpk */
6592 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6593
6594 if (priv->iw_mode == NL80211_IFTYPE_AP)
6595 iwl3945_config_ap(priv);
6596 else {
6597 rc = iwl3945_commit_rxon(priv);
6598 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
6599 iwl3945_add_station(priv,
6600 priv->active39_rxon.bssid_addr, 1, 0);
6601 }
6602
6603 } else {
6604 iwl3945_scan_cancel_timeout(priv, 100);
6605 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6606 iwl3945_commit_rxon(priv);
6607 }
6608
6609 done:
6610 IWL_DEBUG_MAC80211("leave\n");
6611 mutex_unlock(&priv->mutex);
6612
6613 return 0;
6614 }
6615
6616 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6617 unsigned int changed_flags,
6618 unsigned int *total_flags,
6619 int mc_count, struct dev_addr_list *mc_list)
6620 {
6621 struct iwl_priv *priv = hw->priv;
6622 __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
6623
6624 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
6625 changed_flags, *total_flags);
6626
6627 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
6628 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
6629 *filter_flags |= RXON_FILTER_PROMISC_MSK;
6630 else
6631 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
6632 }
6633 if (changed_flags & FIF_ALLMULTI) {
6634 if (*total_flags & FIF_ALLMULTI)
6635 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
6636 else
6637 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
6638 }
6639 if (changed_flags & FIF_CONTROL) {
6640 if (*total_flags & FIF_CONTROL)
6641 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
6642 else
6643 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
6644 }
6645 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
6646 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
6647 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
6648 else
6649 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
6650 }
6651
6652 /* We avoid iwl_commit_rxon here to commit the new filter flags
6653 * since mac80211 will call ieee80211_hw_config immediately.
6654 * (mc_list is not supported at this time). Otherwise, we need to
6655 * queue a background iwl_commit_rxon work.
6656 */
6657
6658 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6659 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6660 }
6661
6662 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6663 struct ieee80211_if_init_conf *conf)
6664 {
6665 struct iwl_priv *priv = hw->priv;
6666
6667 IWL_DEBUG_MAC80211("enter\n");
6668
6669 mutex_lock(&priv->mutex);
6670
6671 if (iwl_is_ready_rf(priv)) {
6672 iwl3945_scan_cancel_timeout(priv, 100);
6673 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6674 iwl3945_commit_rxon(priv);
6675 }
6676 if (priv->vif == conf->vif) {
6677 priv->vif = NULL;
6678 memset(priv->bssid, 0, ETH_ALEN);
6679 }
6680 mutex_unlock(&priv->mutex);
6681
6682 IWL_DEBUG_MAC80211("leave\n");
6683 }
6684
6685 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
6686
6687 static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
6688 struct ieee80211_vif *vif,
6689 struct ieee80211_bss_conf *bss_conf,
6690 u32 changes)
6691 {
6692 struct iwl_priv *priv = hw->priv;
6693
6694 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6695
6696 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
6697 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6698 bss_conf->use_short_preamble);
6699 if (bss_conf->use_short_preamble)
6700 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6701 else
6702 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6703 }
6704
6705 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
6706 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
6707 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
6708 priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6709 else
6710 priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6711 }
6712
6713 if (changes & BSS_CHANGED_ASSOC) {
6714 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
6715 /* This should never happen as this function should
6716 * never be called from interrupt context. */
6717 if (WARN_ON_ONCE(in_interrupt()))
6718 return;
6719 if (bss_conf->assoc) {
6720 priv->assoc_id = bss_conf->aid;
6721 priv->beacon_int = bss_conf->beacon_int;
6722 priv->timestamp = bss_conf->timestamp;
6723 priv->assoc_capability = bss_conf->assoc_capability;
6724 priv->next_scan_jiffies = jiffies +
6725 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
6726 mutex_lock(&priv->mutex);
6727 iwl3945_post_associate(priv);
6728 mutex_unlock(&priv->mutex);
6729 } else {
6730 priv->assoc_id = 0;
6731 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6732 }
6733 } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
6734 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
6735 iwl3945_send_rxon_assoc(priv);
6736 }
6737
6738 }
6739
6740 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6741 {
6742 int rc = 0;
6743 unsigned long flags;
6744 struct iwl_priv *priv = hw->priv;
6745 DECLARE_SSID_BUF(ssid_buf);
6746
6747 IWL_DEBUG_MAC80211("enter\n");
6748
6749 mutex_lock(&priv->mutex);
6750 spin_lock_irqsave(&priv->lock, flags);
6751
6752 if (!iwl_is_ready_rf(priv)) {
6753 rc = -EIO;
6754 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6755 goto out_unlock;
6756 }
6757
6758 /* we don't schedule scan within next_scan_jiffies period */
6759 if (priv->next_scan_jiffies &&
6760 time_after(priv->next_scan_jiffies, jiffies)) {
6761 rc = -EAGAIN;
6762 goto out_unlock;
6763 }
6764 /* if we just finished scan ask for delay for a broadcast scan */
6765 if ((len == 0) && priv->last_scan_jiffies &&
6766 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6767 jiffies)) {
6768 rc = -EAGAIN;
6769 goto out_unlock;
6770 }
6771 if (len) {
6772 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
6773 print_ssid(ssid_buf, ssid, len), (int)len);
6774
6775 priv->one_direct_scan = 1;
6776 priv->direct_ssid_len = (u8)
6777 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6778 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6779 } else
6780 priv->one_direct_scan = 0;
6781
6782 rc = iwl3945_scan_initiate(priv);
6783
6784 IWL_DEBUG_MAC80211("leave\n");
6785
6786 out_unlock:
6787 spin_unlock_irqrestore(&priv->lock, flags);
6788 mutex_unlock(&priv->mutex);
6789
6790 return rc;
6791 }
6792
6793 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
6794 const u8 *local_addr, const u8 *addr,
6795 struct ieee80211_key_conf *key)
6796 {
6797 struct iwl_priv *priv = hw->priv;
6798 int rc = 0;
6799 u8 sta_id;
6800
6801 IWL_DEBUG_MAC80211("enter\n");
6802
6803 if (iwl3945_mod_params.sw_crypto) {
6804 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
6805 return -EOPNOTSUPP;
6806 }
6807
6808 if (is_zero_ether_addr(addr))
6809 /* only support pairwise keys */
6810 return -EOPNOTSUPP;
6811
6812 sta_id = iwl3945_hw_find_station(priv, addr);
6813 if (sta_id == IWL_INVALID_STATION) {
6814 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
6815 addr);
6816 return -EINVAL;
6817 }
6818
6819 mutex_lock(&priv->mutex);
6820
6821 iwl3945_scan_cancel_timeout(priv, 100);
6822
6823 switch (cmd) {
6824 case SET_KEY:
6825 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
6826 if (!rc) {
6827 iwl3945_set_rxon_hwcrypto(priv, 1);
6828 iwl3945_commit_rxon(priv);
6829 key->hw_key_idx = sta_id;
6830 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
6831 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
6832 }
6833 break;
6834 case DISABLE_KEY:
6835 rc = iwl3945_clear_sta_key_info(priv, sta_id);
6836 if (!rc) {
6837 iwl3945_set_rxon_hwcrypto(priv, 0);
6838 iwl3945_commit_rxon(priv);
6839 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
6840 }
6841 break;
6842 default:
6843 rc = -EINVAL;
6844 }
6845
6846 IWL_DEBUG_MAC80211("leave\n");
6847 mutex_unlock(&priv->mutex);
6848
6849 return rc;
6850 }
6851
6852 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
6853 const struct ieee80211_tx_queue_params *params)
6854 {
6855 struct iwl_priv *priv = hw->priv;
6856 unsigned long flags;
6857 int q;
6858
6859 IWL_DEBUG_MAC80211("enter\n");
6860
6861 if (!iwl_is_ready_rf(priv)) {
6862 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6863 return -EIO;
6864 }
6865
6866 if (queue >= AC_NUM) {
6867 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
6868 return 0;
6869 }
6870
6871 q = AC_NUM - 1 - queue;
6872
6873 spin_lock_irqsave(&priv->lock, flags);
6874
6875 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
6876 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
6877 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
6878 priv->qos_data.def_qos_parm.ac[q].edca_txop =
6879 cpu_to_le16((params->txop * 32));
6880
6881 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
6882 priv->qos_data.qos_active = 1;
6883
6884 spin_unlock_irqrestore(&priv->lock, flags);
6885
6886 mutex_lock(&priv->mutex);
6887 if (priv->iw_mode == NL80211_IFTYPE_AP)
6888 iwl3945_activate_qos(priv, 1);
6889 else if (priv->assoc_id && iwl3945_is_associated(priv))
6890 iwl3945_activate_qos(priv, 0);
6891
6892 mutex_unlock(&priv->mutex);
6893
6894 IWL_DEBUG_MAC80211("leave\n");
6895 return 0;
6896 }
6897
6898 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
6899 struct ieee80211_tx_queue_stats *stats)
6900 {
6901 struct iwl_priv *priv = hw->priv;
6902 int i, avail;
6903 struct iwl3945_tx_queue *txq;
6904 struct iwl_queue *q;
6905 unsigned long flags;
6906
6907 IWL_DEBUG_MAC80211("enter\n");
6908
6909 if (!iwl_is_ready_rf(priv)) {
6910 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6911 return -EIO;
6912 }
6913
6914 spin_lock_irqsave(&priv->lock, flags);
6915
6916 for (i = 0; i < AC_NUM; i++) {
6917 txq = &priv->txq39[i];
6918 q = &txq->q;
6919 avail = iwl_queue_space(q);
6920
6921 stats[i].len = q->n_window - avail;
6922 stats[i].limit = q->n_window - q->high_mark;
6923 stats[i].count = q->n_window;
6924
6925 }
6926 spin_unlock_irqrestore(&priv->lock, flags);
6927
6928 IWL_DEBUG_MAC80211("leave\n");
6929
6930 return 0;
6931 }
6932
6933 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
6934 {
6935 struct iwl_priv *priv = hw->priv;
6936 unsigned long flags;
6937
6938 mutex_lock(&priv->mutex);
6939 IWL_DEBUG_MAC80211("enter\n");
6940
6941 iwl_reset_qos(priv);
6942
6943 spin_lock_irqsave(&priv->lock, flags);
6944 priv->assoc_id = 0;
6945 priv->assoc_capability = 0;
6946 priv->call_post_assoc_from_beacon = 0;
6947
6948 /* new association get rid of ibss beacon skb */
6949 if (priv->ibss_beacon)
6950 dev_kfree_skb(priv->ibss_beacon);
6951
6952 priv->ibss_beacon = NULL;
6953
6954 priv->beacon_int = priv->hw->conf.beacon_int;
6955 priv->timestamp = 0;
6956 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
6957 priv->beacon_int = 0;
6958
6959 spin_unlock_irqrestore(&priv->lock, flags);
6960
6961 if (!iwl_is_ready_rf(priv)) {
6962 IWL_DEBUG_MAC80211("leave - not ready\n");
6963 mutex_unlock(&priv->mutex);
6964 return;
6965 }
6966
6967 /* we are restarting association process
6968 * clear RXON_FILTER_ASSOC_MSK bit
6969 */
6970 if (priv->iw_mode != NL80211_IFTYPE_AP) {
6971 iwl3945_scan_cancel_timeout(priv, 100);
6972 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6973 iwl3945_commit_rxon(priv);
6974 }
6975
6976 /* Per mac80211.h: This is only used in IBSS mode... */
6977 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
6978
6979 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
6980 mutex_unlock(&priv->mutex);
6981 return;
6982 }
6983
6984 iwl3945_set_rate(priv);
6985
6986 mutex_unlock(&priv->mutex);
6987
6988 IWL_DEBUG_MAC80211("leave\n");
6989
6990 }
6991
6992 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
6993 {
6994 struct iwl_priv *priv = hw->priv;
6995 unsigned long flags;
6996
6997 IWL_DEBUG_MAC80211("enter\n");
6998
6999 if (!iwl_is_ready_rf(priv)) {
7000 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7001 return -EIO;
7002 }
7003
7004 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7005 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7006 return -EIO;
7007 }
7008
7009 spin_lock_irqsave(&priv->lock, flags);
7010
7011 if (priv->ibss_beacon)
7012 dev_kfree_skb(priv->ibss_beacon);
7013
7014 priv->ibss_beacon = skb;
7015
7016 priv->assoc_id = 0;
7017
7018 IWL_DEBUG_MAC80211("leave\n");
7019 spin_unlock_irqrestore(&priv->lock, flags);
7020
7021 iwl_reset_qos(priv);
7022
7023 iwl3945_post_associate(priv);
7024
7025
7026 return 0;
7027 }
7028
7029 /*****************************************************************************
7030 *
7031 * sysfs attributes
7032 *
7033 *****************************************************************************/
7034
7035 #ifdef CONFIG_IWL3945_DEBUG
7036
7037 /*
7038 * The following adds a new attribute to the sysfs representation
7039 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7040 * used for controlling the debug level.
7041 *
7042 * See the level definitions in iwl for details.
7043 */
7044 static ssize_t show_debug_level(struct device *d,
7045 struct device_attribute *attr, char *buf)
7046 {
7047 struct iwl_priv *priv = d->driver_data;
7048
7049 return sprintf(buf, "0x%08X\n", priv->debug_level);
7050 }
7051 static ssize_t store_debug_level(struct device *d,
7052 struct device_attribute *attr,
7053 const char *buf, size_t count)
7054 {
7055 struct iwl_priv *priv = d->driver_data;
7056 unsigned long val;
7057 int ret;
7058
7059 ret = strict_strtoul(buf, 0, &val);
7060 if (ret)
7061 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
7062 else
7063 priv->debug_level = val;
7064
7065 return strnlen(buf, count);
7066 }
7067
7068 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
7069 show_debug_level, store_debug_level);
7070
7071 #endif /* CONFIG_IWL3945_DEBUG */
7072
7073 static ssize_t show_temperature(struct device *d,
7074 struct device_attribute *attr, char *buf)
7075 {
7076 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7077
7078 if (!iwl_is_alive(priv))
7079 return -EAGAIN;
7080
7081 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7082 }
7083
7084 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7085
7086 static ssize_t show_tx_power(struct device *d,
7087 struct device_attribute *attr, char *buf)
7088 {
7089 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7090 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7091 }
7092
7093 static ssize_t store_tx_power(struct device *d,
7094 struct device_attribute *attr,
7095 const char *buf, size_t count)
7096 {
7097 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7098 char *p = (char *)buf;
7099 u32 val;
7100
7101 val = simple_strtoul(p, &p, 10);
7102 if (p == buf)
7103 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
7104 else
7105 iwl3945_hw_reg_set_txpower(priv, val);
7106
7107 return count;
7108 }
7109
7110 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7111
7112 static ssize_t show_flags(struct device *d,
7113 struct device_attribute *attr, char *buf)
7114 {
7115 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7116
7117 return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
7118 }
7119
7120 static ssize_t store_flags(struct device *d,
7121 struct device_attribute *attr,
7122 const char *buf, size_t count)
7123 {
7124 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7125 u32 flags = simple_strtoul(buf, NULL, 0);
7126
7127 mutex_lock(&priv->mutex);
7128 if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
7129 /* Cancel any currently running scans... */
7130 if (iwl3945_scan_cancel_timeout(priv, 100))
7131 IWL_WARN(priv, "Could not cancel scan.\n");
7132 else {
7133 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7134 flags);
7135 priv->staging39_rxon.flags = cpu_to_le32(flags);
7136 iwl3945_commit_rxon(priv);
7137 }
7138 }
7139 mutex_unlock(&priv->mutex);
7140
7141 return count;
7142 }
7143
7144 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7145
7146 static ssize_t show_filter_flags(struct device *d,
7147 struct device_attribute *attr, char *buf)
7148 {
7149 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7150
7151 return sprintf(buf, "0x%04X\n",
7152 le32_to_cpu(priv->active39_rxon.filter_flags));
7153 }
7154
7155 static ssize_t store_filter_flags(struct device *d,
7156 struct device_attribute *attr,
7157 const char *buf, size_t count)
7158 {
7159 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7160 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7161
7162 mutex_lock(&priv->mutex);
7163 if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
7164 /* Cancel any currently running scans... */
7165 if (iwl3945_scan_cancel_timeout(priv, 100))
7166 IWL_WARN(priv, "Could not cancel scan.\n");
7167 else {
7168 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7169 "0x%04X\n", filter_flags);
7170 priv->staging39_rxon.filter_flags =
7171 cpu_to_le32(filter_flags);
7172 iwl3945_commit_rxon(priv);
7173 }
7174 }
7175 mutex_unlock(&priv->mutex);
7176
7177 return count;
7178 }
7179
7180 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7181 store_filter_flags);
7182
7183 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7184
7185 static ssize_t show_measurement(struct device *d,
7186 struct device_attribute *attr, char *buf)
7187 {
7188 struct iwl_priv *priv = dev_get_drvdata(d);
7189 struct iwl_spectrum_notification measure_report;
7190 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7191 u8 *data = (u8 *)&measure_report;
7192 unsigned long flags;
7193
7194 spin_lock_irqsave(&priv->lock, flags);
7195 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7196 spin_unlock_irqrestore(&priv->lock, flags);
7197 return 0;
7198 }
7199 memcpy(&measure_report, &priv->measure_report, size);
7200 priv->measurement_status = 0;
7201 spin_unlock_irqrestore(&priv->lock, flags);
7202
7203 while (size && (PAGE_SIZE - len)) {
7204 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7205 PAGE_SIZE - len, 1);
7206 len = strlen(buf);
7207 if (PAGE_SIZE - len)
7208 buf[len++] = '\n';
7209
7210 ofs += 16;
7211 size -= min(size, 16U);
7212 }
7213
7214 return len;
7215 }
7216
7217 static ssize_t store_measurement(struct device *d,
7218 struct device_attribute *attr,
7219 const char *buf, size_t count)
7220 {
7221 struct iwl_priv *priv = dev_get_drvdata(d);
7222 struct ieee80211_measurement_params params = {
7223 .channel = le16_to_cpu(priv->active39_rxon.channel),
7224 .start_time = cpu_to_le64(priv->last_tsf),
7225 .duration = cpu_to_le16(1),
7226 };
7227 u8 type = IWL_MEASURE_BASIC;
7228 u8 buffer[32];
7229 u8 channel;
7230
7231 if (count) {
7232 char *p = buffer;
7233 strncpy(buffer, buf, min(sizeof(buffer), count));
7234 channel = simple_strtoul(p, NULL, 0);
7235 if (channel)
7236 params.channel = channel;
7237
7238 p = buffer;
7239 while (*p && *p != ' ')
7240 p++;
7241 if (*p)
7242 type = simple_strtoul(p + 1, NULL, 0);
7243 }
7244
7245 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7246 "channel %d (for '%s')\n", type, params.channel, buf);
7247 iwl3945_get_measurement(priv, &params, type);
7248
7249 return count;
7250 }
7251
7252 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7253 show_measurement, store_measurement);
7254 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7255
7256 static ssize_t store_retry_rate(struct device *d,
7257 struct device_attribute *attr,
7258 const char *buf, size_t count)
7259 {
7260 struct iwl_priv *priv = dev_get_drvdata(d);
7261
7262 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7263 if (priv->retry_rate <= 0)
7264 priv->retry_rate = 1;
7265
7266 return count;
7267 }
7268
7269 static ssize_t show_retry_rate(struct device *d,
7270 struct device_attribute *attr, char *buf)
7271 {
7272 struct iwl_priv *priv = dev_get_drvdata(d);
7273 return sprintf(buf, "%d", priv->retry_rate);
7274 }
7275
7276 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7277 store_retry_rate);
7278
7279 static ssize_t store_power_level(struct device *d,
7280 struct device_attribute *attr,
7281 const char *buf, size_t count)
7282 {
7283 struct iwl_priv *priv = dev_get_drvdata(d);
7284 int rc;
7285 int mode;
7286
7287 mode = simple_strtoul(buf, NULL, 0);
7288 mutex_lock(&priv->mutex);
7289
7290 if (!iwl_is_ready(priv)) {
7291 rc = -EAGAIN;
7292 goto out;
7293 }
7294
7295 if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
7296 (mode == IWL39_POWER_AC))
7297 mode = IWL39_POWER_AC;
7298 else
7299 mode |= IWL_POWER_ENABLED;
7300
7301 if (mode != priv->power_mode) {
7302 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7303 if (rc) {
7304 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7305 goto out;
7306 }
7307 priv->power_mode = mode;
7308 }
7309
7310 rc = count;
7311
7312 out:
7313 mutex_unlock(&priv->mutex);
7314 return rc;
7315 }
7316
7317 #define MAX_WX_STRING 80
7318
7319 /* Values are in microsecond */
7320 static const s32 timeout_duration[] = {
7321 350000,
7322 250000,
7323 75000,
7324 37000,
7325 25000,
7326 };
7327 static const s32 period_duration[] = {
7328 400000,
7329 700000,
7330 1000000,
7331 1000000,
7332 1000000
7333 };
7334
7335 static ssize_t show_power_level(struct device *d,
7336 struct device_attribute *attr, char *buf)
7337 {
7338 struct iwl_priv *priv = dev_get_drvdata(d);
7339 int level = IWL_POWER_LEVEL(priv->power_mode);
7340 char *p = buf;
7341
7342 p += sprintf(p, "%d ", level);
7343 switch (level) {
7344 case IWL_POWER_MODE_CAM:
7345 case IWL39_POWER_AC:
7346 p += sprintf(p, "(AC)");
7347 break;
7348 case IWL39_POWER_BATTERY:
7349 p += sprintf(p, "(BATTERY)");
7350 break;
7351 default:
7352 p += sprintf(p,
7353 "(Timeout %dms, Period %dms)",
7354 timeout_duration[level - 1] / 1000,
7355 period_duration[level - 1] / 1000);
7356 }
7357
7358 if (!(priv->power_mode & IWL_POWER_ENABLED))
7359 p += sprintf(p, " OFF\n");
7360 else
7361 p += sprintf(p, " \n");
7362
7363 return p - buf + 1;
7364
7365 }
7366
7367 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7368 store_power_level);
7369
7370 static ssize_t show_channels(struct device *d,
7371 struct device_attribute *attr, char *buf)
7372 {
7373 /* all this shit doesn't belong into sysfs anyway */
7374 return 0;
7375 }
7376
7377 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7378
7379 static ssize_t show_statistics(struct device *d,
7380 struct device_attribute *attr, char *buf)
7381 {
7382 struct iwl_priv *priv = dev_get_drvdata(d);
7383 u32 size = sizeof(struct iwl3945_notif_statistics);
7384 u32 len = 0, ofs = 0;
7385 u8 *data = (u8 *)&priv->statistics_39;
7386 int rc = 0;
7387
7388 if (!iwl_is_alive(priv))
7389 return -EAGAIN;
7390
7391 mutex_lock(&priv->mutex);
7392 rc = iwl3945_send_statistics_request(priv);
7393 mutex_unlock(&priv->mutex);
7394
7395 if (rc) {
7396 len = sprintf(buf,
7397 "Error sending statistics request: 0x%08X\n", rc);
7398 return len;
7399 }
7400
7401 while (size && (PAGE_SIZE - len)) {
7402 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7403 PAGE_SIZE - len, 1);
7404 len = strlen(buf);
7405 if (PAGE_SIZE - len)
7406 buf[len++] = '\n';
7407
7408 ofs += 16;
7409 size -= min(size, 16U);
7410 }
7411
7412 return len;
7413 }
7414
7415 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7416
7417 static ssize_t show_antenna(struct device *d,
7418 struct device_attribute *attr, char *buf)
7419 {
7420 struct iwl_priv *priv = dev_get_drvdata(d);
7421
7422 if (!iwl_is_alive(priv))
7423 return -EAGAIN;
7424
7425 return sprintf(buf, "%d\n", priv->antenna);
7426 }
7427
7428 static ssize_t store_antenna(struct device *d,
7429 struct device_attribute *attr,
7430 const char *buf, size_t count)
7431 {
7432 int ant;
7433 struct iwl_priv *priv = dev_get_drvdata(d);
7434
7435 if (count == 0)
7436 return 0;
7437
7438 if (sscanf(buf, "%1i", &ant) != 1) {
7439 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7440 return count;
7441 }
7442
7443 if ((ant >= 0) && (ant <= 2)) {
7444 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7445 priv->antenna = (enum iwl3945_antenna)ant;
7446 } else
7447 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7448
7449
7450 return count;
7451 }
7452
7453 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7454
7455 static ssize_t show_status(struct device *d,
7456 struct device_attribute *attr, char *buf)
7457 {
7458 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7459 if (!iwl_is_alive(priv))
7460 return -EAGAIN;
7461 return sprintf(buf, "0x%08x\n", (int)priv->status);
7462 }
7463
7464 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7465
7466 static ssize_t dump_error_log(struct device *d,
7467 struct device_attribute *attr,
7468 const char *buf, size_t count)
7469 {
7470 char *p = (char *)buf;
7471
7472 if (p[0] == '1')
7473 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
7474
7475 return strnlen(buf, count);
7476 }
7477
7478 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7479
7480 static ssize_t dump_event_log(struct device *d,
7481 struct device_attribute *attr,
7482 const char *buf, size_t count)
7483 {
7484 char *p = (char *)buf;
7485
7486 if (p[0] == '1')
7487 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
7488
7489 return strnlen(buf, count);
7490 }
7491
7492 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7493
7494 /*****************************************************************************
7495 *
7496 * driver setup and tear down
7497 *
7498 *****************************************************************************/
7499
7500 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
7501 {
7502 priv->workqueue = create_workqueue(DRV_NAME);
7503
7504 init_waitqueue_head(&priv->wait_command_queue);
7505
7506 INIT_WORK(&priv->up, iwl3945_bg_up);
7507 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7508 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7509 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7510 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7511 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7512 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7513 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7514 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7515 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7516 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7517
7518 iwl3945_hw_setup_deferred_work(priv);
7519
7520 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7521 iwl3945_irq_tasklet, (unsigned long)priv);
7522 }
7523
7524 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
7525 {
7526 iwl3945_hw_cancel_deferred_work(priv);
7527
7528 cancel_delayed_work_sync(&priv->init_alive_start);
7529 cancel_delayed_work(&priv->scan_check);
7530 cancel_delayed_work(&priv->alive_start);
7531 cancel_work_sync(&priv->beacon_update);
7532 }
7533
7534 static struct attribute *iwl3945_sysfs_entries[] = {
7535 &dev_attr_antenna.attr,
7536 &dev_attr_channels.attr,
7537 &dev_attr_dump_errors.attr,
7538 &dev_attr_dump_events.attr,
7539 &dev_attr_flags.attr,
7540 &dev_attr_filter_flags.attr,
7541 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7542 &dev_attr_measurement.attr,
7543 #endif
7544 &dev_attr_power_level.attr,
7545 &dev_attr_retry_rate.attr,
7546 &dev_attr_statistics.attr,
7547 &dev_attr_status.attr,
7548 &dev_attr_temperature.attr,
7549 &dev_attr_tx_power.attr,
7550 #ifdef CONFIG_IWL3945_DEBUG
7551 &dev_attr_debug_level.attr,
7552 #endif
7553 NULL
7554 };
7555
7556 static struct attribute_group iwl3945_attribute_group = {
7557 .name = NULL, /* put in device directory */
7558 .attrs = iwl3945_sysfs_entries,
7559 };
7560
7561 static struct ieee80211_ops iwl3945_hw_ops = {
7562 .tx = iwl3945_mac_tx,
7563 .start = iwl3945_mac_start,
7564 .stop = iwl3945_mac_stop,
7565 .add_interface = iwl3945_mac_add_interface,
7566 .remove_interface = iwl3945_mac_remove_interface,
7567 .config = iwl3945_mac_config,
7568 .config_interface = iwl3945_mac_config_interface,
7569 .configure_filter = iwl3945_configure_filter,
7570 .set_key = iwl3945_mac_set_key,
7571 .get_tx_stats = iwl3945_mac_get_tx_stats,
7572 .conf_tx = iwl3945_mac_conf_tx,
7573 .reset_tsf = iwl3945_mac_reset_tsf,
7574 .bss_info_changed = iwl3945_bss_info_changed,
7575 .hw_scan = iwl3945_mac_hw_scan
7576 };
7577
7578 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7579 {
7580 int err = 0;
7581 struct iwl_priv *priv;
7582 struct ieee80211_hw *hw;
7583 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
7584 unsigned long flags;
7585
7586 /***********************
7587 * 1. Allocating HW data
7588 * ********************/
7589
7590 /* mac80211 allocates memory for this device instance, including
7591 * space for this driver's private structure */
7592 hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl3945_hw_ops);
7593 if (hw == NULL) {
7594 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
7595 err = -ENOMEM;
7596 goto out;
7597 }
7598
7599 SET_IEEE80211_DEV(hw, &pdev->dev);
7600
7601 priv = hw->priv;
7602 priv->hw = hw;
7603 priv->pci_dev = pdev;
7604 priv->cfg = cfg;
7605
7606 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
7607 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
7608 IWL_ERR(priv,
7609 "invalid queues_num, should be between %d and %d\n",
7610 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7611 err = -EINVAL;
7612 goto out;
7613 }
7614
7615 /* Disabling hardware scan means that mac80211 will perform scans
7616 * "the hard way", rather than using device's scan. */
7617 if (iwl3945_mod_params.disable_hw_scan) {
7618 IWL_DEBUG_INFO("Disabling hw_scan\n");
7619 iwl3945_hw_ops.hw_scan = NULL;
7620 }
7621
7622 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7623 hw->rate_control_algorithm = "iwl-3945-rs";
7624 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
7625
7626 /* Select antenna (may be helpful if only one antenna is connected) */
7627 priv->antenna = (enum iwl3945_antenna)iwl3945_mod_params.antenna;
7628 #ifdef CONFIG_IWL3945_DEBUG
7629 priv->debug_level = iwl3945_mod_params.debug;
7630 atomic_set(&priv->restrict_refcnt, 0);
7631 #endif
7632
7633 /* Tell mac80211 our characteristics */
7634 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7635 IEEE80211_HW_NOISE_DBM;
7636
7637 hw->wiphy->interface_modes =
7638 BIT(NL80211_IFTYPE_STATION) |
7639 BIT(NL80211_IFTYPE_ADHOC);
7640
7641 hw->wiphy->fw_handles_regulatory = true;
7642
7643 /* 4 EDCA QOS priorities */
7644 hw->queues = 4;
7645
7646 /***************************
7647 * 2. Initializing PCI bus
7648 * *************************/
7649 if (pci_enable_device(pdev)) {
7650 err = -ENODEV;
7651 goto out_ieee80211_free_hw;
7652 }
7653
7654 pci_set_master(pdev);
7655
7656 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7657 if (!err)
7658 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7659 if (err) {
7660 IWL_WARN(priv, "No suitable DMA available.\n");
7661 goto out_pci_disable_device;
7662 }
7663
7664 pci_set_drvdata(pdev, priv);
7665 err = pci_request_regions(pdev, DRV_NAME);
7666 if (err)
7667 goto out_pci_disable_device;
7668
7669 /***********************
7670 * 3. Read REV Register
7671 * ********************/
7672 priv->hw_base = pci_iomap(pdev, 0, 0);
7673 if (!priv->hw_base) {
7674 err = -ENODEV;
7675 goto out_pci_release_regions;
7676 }
7677
7678 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7679 (unsigned long long) pci_resource_len(pdev, 0));
7680 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7681
7682 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7683 * PCI Tx retries from interfering with C3 CPU state */
7684 pci_write_config_byte(pdev, 0x41, 0x00);
7685
7686 /* nic init */
7687 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
7688 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
7689
7690 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
7691 err = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
7692 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
7693 if (err < 0) {
7694 IWL_DEBUG_INFO("Failed to init the card\n");
7695 goto out_remove_sysfs;
7696 }
7697
7698 /***********************
7699 * 4. Read EEPROM
7700 * ********************/
7701 /* Read the EEPROM */
7702 err = iwl3945_eeprom_init(priv);
7703 if (err) {
7704 IWL_ERR(priv, "Unable to init EEPROM\n");
7705 goto out_remove_sysfs;
7706 }
7707 /* MAC Address location in EEPROM same for 3945/4965 */
7708 get_eeprom_mac(priv, priv->mac_addr);
7709 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
7710 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7711
7712 /***********************
7713 * 5. Setup HW Constants
7714 * ********************/
7715 /* Device-specific setup */
7716 if (iwl3945_hw_set_hw_params(priv)) {
7717 IWL_ERR(priv, "failed to set hw settings\n");
7718 goto out_iounmap;
7719 }
7720
7721 /***********************
7722 * 6. Setup priv
7723 * ********************/
7724 priv->retry_rate = 1;
7725 priv->ibss_beacon = NULL;
7726
7727 spin_lock_init(&priv->lock);
7728 spin_lock_init(&priv->power_data_39.lock);
7729 spin_lock_init(&priv->sta_lock);
7730 spin_lock_init(&priv->hcmd_lock);
7731
7732 INIT_LIST_HEAD(&priv->free_frames);
7733 mutex_init(&priv->mutex);
7734
7735 /* Clear the driver's (not device's) station table */
7736 iwl3945_clear_stations_table(priv);
7737
7738 priv->data_retry_limit = -1;
7739 priv->ieee_channels = NULL;
7740 priv->ieee_rates = NULL;
7741 priv->band = IEEE80211_BAND_2GHZ;
7742
7743 priv->iw_mode = NL80211_IFTYPE_STATION;
7744
7745 iwl_reset_qos(priv);
7746
7747 priv->qos_data.qos_active = 0;
7748 priv->qos_data.qos_cap.val = 0;
7749
7750
7751 priv->rates_mask = IWL_RATES_MASK;
7752 /* If power management is turned on, default to AC mode */
7753 priv->power_mode = IWL39_POWER_AC;
7754 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7755
7756 err = iwl3945_init_channel_map(priv);
7757 if (err) {
7758 IWL_ERR(priv, "initializing regulatory failed: %d\n", err);
7759 goto out_release_irq;
7760 }
7761
7762 err = iwl3945_init_geos(priv);
7763 if (err) {
7764 IWL_ERR(priv, "initializing geos failed: %d\n", err);
7765 goto out_free_channel_map;
7766 }
7767
7768 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
7769 priv->cfg->name);
7770
7771 /***********************************
7772 * 7. Initialize Module Parameters
7773 * **********************************/
7774
7775 /* Initialize module parameter values here */
7776 /* Disable radio (SW RF KILL) via parameter when loading driver */
7777 if (iwl3945_mod_params.disable) {
7778 set_bit(STATUS_RF_KILL_SW, &priv->status);
7779 IWL_DEBUG_INFO("Radio disabled.\n");
7780 }
7781
7782
7783 /***********************
7784 * 8. Setup Services
7785 * ********************/
7786
7787 spin_lock_irqsave(&priv->lock, flags);
7788 iwl3945_disable_interrupts(priv);
7789 spin_unlock_irqrestore(&priv->lock, flags);
7790
7791 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7792 if (err) {
7793 IWL_ERR(priv, "failed to create sysfs device attributes\n");
7794 goto out_free_geos;
7795 }
7796
7797 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
7798 iwl3945_setup_deferred_work(priv);
7799 iwl3945_setup_rx_handlers(priv);
7800
7801 /***********************
7802 * 9. Conclude
7803 * ********************/
7804 pci_save_state(pdev);
7805 pci_disable_device(pdev);
7806
7807 /*********************************
7808 * 10. Setup and Register mac80211
7809 * *******************************/
7810
7811 err = ieee80211_register_hw(priv->hw);
7812 if (err) {
7813 IWL_ERR(priv, "Failed to register network device: %d\n", err);
7814 goto out_remove_sysfs;
7815 }
7816
7817 priv->hw->conf.beacon_int = 100;
7818 priv->mac80211_registered = 1;
7819
7820
7821 err = iwl3945_rfkill_init(priv);
7822 if (err)
7823 IWL_ERR(priv, "Unable to initialize RFKILL system. "
7824 "Ignoring error: %d\n", err);
7825
7826 return 0;
7827
7828 out_remove_sysfs:
7829 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7830 out_free_geos:
7831 iwl3945_free_geos(priv);
7832 out_free_channel_map:
7833 iwl3945_free_channel_map(priv);
7834
7835
7836 out_release_irq:
7837 destroy_workqueue(priv->workqueue);
7838 priv->workqueue = NULL;
7839 iwl3945_unset_hw_params(priv);
7840
7841 out_iounmap:
7842 pci_iounmap(pdev, priv->hw_base);
7843 out_pci_release_regions:
7844 pci_release_regions(pdev);
7845 out_pci_disable_device:
7846 pci_disable_device(pdev);
7847 pci_set_drvdata(pdev, NULL);
7848 out_ieee80211_free_hw:
7849 ieee80211_free_hw(priv->hw);
7850 out:
7851 return err;
7852 }
7853
7854 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
7855 {
7856 struct iwl_priv *priv = pci_get_drvdata(pdev);
7857 unsigned long flags;
7858
7859 if (!priv)
7860 return;
7861
7862 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
7863
7864 set_bit(STATUS_EXIT_PENDING, &priv->status);
7865
7866 iwl3945_down(priv);
7867
7868 /* make sure we flush any pending irq or
7869 * tasklet for the driver
7870 */
7871 spin_lock_irqsave(&priv->lock, flags);
7872 iwl3945_disable_interrupts(priv);
7873 spin_unlock_irqrestore(&priv->lock, flags);
7874
7875 iwl_synchronize_irq(priv);
7876
7877 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7878
7879 iwl3945_rfkill_unregister(priv);
7880 iwl3945_dealloc_ucode_pci(priv);
7881
7882 if (priv->rxq.bd)
7883 iwl3945_rx_queue_free(priv, &priv->rxq);
7884 iwl3945_hw_txq_ctx_free(priv);
7885
7886 iwl3945_unset_hw_params(priv);
7887 iwl3945_clear_stations_table(priv);
7888
7889 if (priv->mac80211_registered)
7890 ieee80211_unregister_hw(priv->hw);
7891
7892 /*netif_stop_queue(dev); */
7893 flush_workqueue(priv->workqueue);
7894
7895 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
7896 * priv->workqueue... so we can't take down the workqueue
7897 * until now... */
7898 destroy_workqueue(priv->workqueue);
7899 priv->workqueue = NULL;
7900
7901 pci_iounmap(pdev, priv->hw_base);
7902 pci_release_regions(pdev);
7903 pci_disable_device(pdev);
7904 pci_set_drvdata(pdev, NULL);
7905
7906 iwl3945_free_channel_map(priv);
7907 iwl3945_free_geos(priv);
7908 kfree(priv->scan39);
7909 if (priv->ibss_beacon)
7910 dev_kfree_skb(priv->ibss_beacon);
7911
7912 ieee80211_free_hw(priv->hw);
7913 }
7914
7915 #ifdef CONFIG_PM
7916
7917 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
7918 {
7919 struct iwl_priv *priv = pci_get_drvdata(pdev);
7920
7921 if (priv->is_open) {
7922 set_bit(STATUS_IN_SUSPEND, &priv->status);
7923 iwl3945_mac_stop(priv->hw);
7924 priv->is_open = 1;
7925 }
7926
7927 pci_set_power_state(pdev, PCI_D3hot);
7928
7929 return 0;
7930 }
7931
7932 static int iwl3945_pci_resume(struct pci_dev *pdev)
7933 {
7934 struct iwl_priv *priv = pci_get_drvdata(pdev);
7935
7936 pci_set_power_state(pdev, PCI_D0);
7937
7938 if (priv->is_open)
7939 iwl3945_mac_start(priv->hw);
7940
7941 clear_bit(STATUS_IN_SUSPEND, &priv->status);
7942 return 0;
7943 }
7944
7945 #endif /* CONFIG_PM */
7946
7947 /*************** RFKILL FUNCTIONS **********/
7948 #ifdef CONFIG_IWL3945_RFKILL
7949 /* software rf-kill from user */
7950 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
7951 {
7952 struct iwl_priv *priv = data;
7953 int err = 0;
7954
7955 if (!priv->rfkill)
7956 return 0;
7957
7958 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7959 return 0;
7960
7961 IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
7962 mutex_lock(&priv->mutex);
7963
7964 switch (state) {
7965 case RFKILL_STATE_UNBLOCKED:
7966 if (iwl_is_rfkill_hw(priv)) {
7967 err = -EBUSY;
7968 goto out_unlock;
7969 }
7970 iwl3945_radio_kill_sw(priv, 0);
7971 break;
7972 case RFKILL_STATE_SOFT_BLOCKED:
7973 iwl3945_radio_kill_sw(priv, 1);
7974 break;
7975 default:
7976 IWL_WARN(priv, "received unexpected RFKILL state %d\n", state);
7977 break;
7978 }
7979 out_unlock:
7980 mutex_unlock(&priv->mutex);
7981
7982 return err;
7983 }
7984
7985 int iwl3945_rfkill_init(struct iwl_priv *priv)
7986 {
7987 struct device *device = wiphy_dev(priv->hw->wiphy);
7988 int ret = 0;
7989
7990 BUG_ON(device == NULL);
7991
7992 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
7993 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
7994 if (!priv->rfkill) {
7995 IWL_ERR(priv, "Unable to allocate rfkill device.\n");
7996 ret = -ENOMEM;
7997 goto error;
7998 }
7999
8000 priv->rfkill->name = priv->cfg->name;
8001 priv->rfkill->data = priv;
8002 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
8003 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
8004 priv->rfkill->user_claim_unsupported = 1;
8005
8006 priv->rfkill->dev.class->suspend = NULL;
8007 priv->rfkill->dev.class->resume = NULL;
8008
8009 ret = rfkill_register(priv->rfkill);
8010 if (ret) {
8011 IWL_ERR(priv, "Unable to register rfkill: %d\n", ret);
8012 goto freed_rfkill;
8013 }
8014
8015 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8016 return ret;
8017
8018 freed_rfkill:
8019 if (priv->rfkill != NULL)
8020 rfkill_free(priv->rfkill);
8021 priv->rfkill = NULL;
8022
8023 error:
8024 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8025 return ret;
8026 }
8027
8028 void iwl3945_rfkill_unregister(struct iwl_priv *priv)
8029 {
8030 if (priv->rfkill)
8031 rfkill_unregister(priv->rfkill);
8032
8033 priv->rfkill = NULL;
8034 }
8035
8036 /* set rf-kill to the right state. */
8037 void iwl3945_rfkill_set_hw_state(struct iwl_priv *priv)
8038 {
8039
8040 if (!priv->rfkill)
8041 return;
8042
8043 if (iwl_is_rfkill_hw(priv)) {
8044 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
8045 return;
8046 }
8047
8048 if (!iwl_is_rfkill_sw(priv))
8049 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
8050 else
8051 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
8052 }
8053 #endif
8054
8055 /*****************************************************************************
8056 *
8057 * driver and module entry point
8058 *
8059 *****************************************************************************/
8060
8061 static struct pci_driver iwl3945_driver = {
8062 .name = DRV_NAME,
8063 .id_table = iwl3945_hw_card_ids,
8064 .probe = iwl3945_pci_probe,
8065 .remove = __devexit_p(iwl3945_pci_remove),
8066 #ifdef CONFIG_PM
8067 .suspend = iwl3945_pci_suspend,
8068 .resume = iwl3945_pci_resume,
8069 #endif
8070 };
8071
8072 static int __init iwl3945_init(void)
8073 {
8074
8075 int ret;
8076 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8077 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8078
8079 ret = iwl3945_rate_control_register();
8080 if (ret) {
8081 printk(KERN_ERR DRV_NAME
8082 "Unable to register rate control algorithm: %d\n", ret);
8083 return ret;
8084 }
8085
8086 ret = pci_register_driver(&iwl3945_driver);
8087 if (ret) {
8088 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
8089 goto error_register;
8090 }
8091
8092 return ret;
8093
8094 error_register:
8095 iwl3945_rate_control_unregister();
8096 return ret;
8097 }
8098
8099 static void __exit iwl3945_exit(void)
8100 {
8101 pci_unregister_driver(&iwl3945_driver);
8102 iwl3945_rate_control_unregister();
8103 }
8104
8105 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
8106
8107 module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
8108 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8109 module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
8110 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8111 module_param_named(hwcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
8112 MODULE_PARM_DESC(hwcrypto,
8113 "using hardware crypto engine (default 0 [software])\n");
8114 module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
8115 MODULE_PARM_DESC(debug, "debug output mask");
8116 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
8117 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8118
8119 module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
8120 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8121
8122 module_exit(iwl3945_exit);
8123 module_init(iwl3945_init);
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