include/linux/pci.h

   1 /*
   2  *      pci.h
   3  *
   4  *      PCI defines and function prototypes
   5  *      Copyright 1994, Drew Eckhardt
   6  *      Copyright 1997--1999 Martin Mares <mj@ucw.cz>
   7  *
   8  *      For more information, please consult the following manuals (look at
   9  *      http://www.pcisig.com/ for how to get them):
  10  *
  11  *      PCI BIOS Specification
  12  *      PCI Local Bus Specification
  13  *      PCI to PCI Bridge Specification
  14  *      PCI System Design Guide
  15  */
  16
  17 #ifndef LINUX_PCI_H
  18 #define LINUX_PCI_H
  19
  20 /* Include the pci register defines */
  21 #include <linux/pci_regs.h>
  22
  23 /* Include the ID list */
  24 #include <linux/pci_ids.h>
  25
  26 /*
  27  * The PCI interface treats multi-function devices as independent
  28  * devices.  The slot/function address of each device is encoded
  29  * in a single byte as follows:
  30  *
  31  *      7:3 = slot
  32  *      2:0 = function
  33  */
  34 #define PCI_DEVFN(slot,func)    ((((slot) & 0x1f) << 3) | ((func) & 0x07))
  35 #define PCI_SLOT(devfn)         (((devfn) >> 3) & 0x1f)
  36 #define PCI_FUNC(devfn)         ((devfn) & 0x07)
  37
  38 /* Ioctls for /proc/bus/pci/X/Y nodes. */
  39 #define PCIIOC_BASE             ('P' << 24 | 'C' << 16 | 'I' << 8)
  40 #define PCIIOC_CONTROLLER       (PCIIOC_BASE | 0x00)    /* Get controller for PCI device. */
  41 #define PCIIOC_MMAP_IS_IO       (PCIIOC_BASE | 0x01)    /* Set mmap state to I/O space. */
  42 #define PCIIOC_MMAP_IS_MEM      (PCIIOC_BASE | 0x02)    /* Set mmap state to MEM space. */
  43 #define PCIIOC_WRITE_COMBINE    (PCIIOC_BASE | 0x03)    /* Enable/disable write-combining. */
  44
  45 #ifdef __KERNEL__
  46
  47 #include <linux/mod_devicetable.h>
  48
  49 #include <linux/types.h>
  50 #include <linux/ioport.h>
  51 #include <linux/list.h>
  52 #include <linux/errno.h>
  53 #include <linux/device.h>
  54
  55 /* File state for mmap()s on /proc/bus/pci/X/Y */
  56 enum pci_mmap_state {
  57         pci_mmap_io,
  58         pci_mmap_mem
  59 };
  60
  61 /* This defines the direction arg to the DMA mapping routines. */
  62 #define PCI_DMA_BIDIRECTIONAL   0
  63 #define PCI_DMA_TODEVICE        1
  64 #define PCI_DMA_FROMDEVICE      2
  65 #define PCI_DMA_NONE            3
  66
  67 #define DEVICE_COUNT_COMPATIBLE 4
  68 #define DEVICE_COUNT_RESOURCE   12
  69
  70 typedef int __bitwise pci_power_t;
  71
  72 #define PCI_D0          ((pci_power_t __force) 0)
  73 #define PCI_D1          ((pci_power_t __force) 1)
  74 #define PCI_D2          ((pci_power_t __force) 2)
  75 #define PCI_D3hot       ((pci_power_t __force) 3)
  76 #define PCI_D3cold      ((pci_power_t __force) 4)
  77 #define PCI_UNKNOWN     ((pci_power_t __force) 5)
  78 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
  79
  80 /** The pci_channel state describes connectivity between the CPU and
  81  *  the pci device.  If some PCI bus between here and the pci device
  82  *  has crashed or locked up, this info is reflected here.
  83  */
  84 typedef unsigned int __bitwise pci_channel_state_t;
  85
  86 enum pci_channel_state {
  87         /* I/O channel is in normal state */
  88         pci_channel_io_normal = (__force pci_channel_state_t) 1,
  89
  90         /* I/O to channel is blocked */
  91         pci_channel_io_frozen = (__force pci_channel_state_t) 2,
  92
  93         /* PCI card is dead */
  94         pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
  95 };
  96
  97 typedef unsigned short __bitwise pci_bus_flags_t;
  98 enum pci_bus_flags {
  99         PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
 100 };
 101
 102 struct pci_cap_saved_state {
 103         struct hlist_node next;
 104         char cap_nr;
 105         u32 data[0];
 106 };
 107
 108 /*
 109  * The pci_dev structure is used to describe PCI devices.
 110  */
 111 struct pci_dev {
 112         struct list_head global_list;   /* node in list of all PCI devices */
 113         struct list_head bus_list;      /* node in per-bus list */
 114         struct pci_bus  *bus;           /* bus this device is on */
 115         struct pci_bus  *subordinate;   /* bus this device bridges to */
 116
 117         void            *sysdata;       /* hook for sys-specific extension */
 118         struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
 119
 120         unsigned int    devfn;          /* encoded device & function index */
 121         unsigned short  vendor;
 122         unsigned short  device;
 123         unsigned short  subsystem_vendor;
 124         unsigned short  subsystem_device;
 125         unsigned int    class;          /* 3 bytes: (base,sub,prog-if) */
 126         u8              hdr_type;       /* PCI header type (`multi' flag masked out) */
 127         u8              rom_base_reg;   /* which config register controls the ROM */
 128         u8              pin;            /* which interrupt pin this device uses */
 129
 130         struct pci_driver *driver;      /* which driver has allocated this device */
 131         u64             dma_mask;       /* Mask of the bits of bus address this
 132                                            device implements.  Normally this is
 133                                            0xffffffff.  You only need to change
 134                                            this if your device has broken DMA
 135                                            or supports 64-bit transfers.  */
 136
 137         pci_power_t     current_state;  /* Current operating state. In ACPI-speak,
 138                                            this is D0-D3, D0 being fully functional,
 139                                            and D3 being off. */
 140
 141         pci_channel_state_t error_state;        /* current connectivity state */
 142         struct  device  dev;            /* Generic device interface */
 143
 144         /* device is compatible with these IDs */
 145         unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
 146         unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
 147
 148         int             cfg_size;       /* Size of configuration space */
 149
 150         /*
 151          * Instead of touching interrupt line and base address registers
 152          * directly, use the values stored here. They might be different!
 153          */
 154         unsigned int    irq;
 155         struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
 156
 157         /* These fields are used by common fixups */
 158         unsigned int    transparent:1;  /* Transparent PCI bridge */
 159         unsigned int    multifunction:1;/* Part of multi-function device */
 160         /* keep track of device state */
 161         unsigned int    is_enabled:1;   /* pci_enable_device has been called */
 162         unsigned int    is_busmaster:1; /* device is busmaster */
 163         unsigned int    no_msi:1;       /* device may not use msi */
 164         unsigned int    block_ucfg_access:1;    /* userspace config space access is blocked */
 165
 166         u32             saved_config_space[16]; /* config space saved at suspend time */
 167         struct hlist_head saved_cap_space;
 168         struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
 169         int rom_attr_enabled;           /* has display of the rom attribute been enabled? */
 170         struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
 171 };
 172
 173 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
 174 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
 175 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
 176 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
 177
 178 static inline struct pci_cap_saved_state *pci_find_saved_cap(
 179         struct pci_dev *pci_dev,char cap)
 180 {
 181         struct pci_cap_saved_state *tmp;
 182         struct hlist_node *pos;
 183
 184         hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
 185                 if (tmp->cap_nr == cap)
 186                         return tmp;
 187         }
 188         return NULL;
 189 }
 190
 191 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
 192         struct pci_cap_saved_state *new_cap)
 193 {
 194         hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
 195 }
 196
 197 static inline void pci_remove_saved_cap(struct pci_cap_saved_state *cap)
 198 {
 199         hlist_del(&cap->next);
 200 }
 201
 202 /*
 203  *  For PCI devices, the region numbers are assigned this way:
 204  *
 205  *      0-5     standard PCI regions
 206  *      6       expansion ROM
 207  *      7-10    bridges: address space assigned to buses behind the bridge
 208  */
 209
 210 #define PCI_ROM_RESOURCE        6
 211 #define PCI_BRIDGE_RESOURCES    7
 212 #define PCI_NUM_RESOURCES       11
 213
 214 #ifndef PCI_BUS_NUM_RESOURCES
 215 #define PCI_BUS_NUM_RESOURCES   8
 216 #endif
 217
 218 #define PCI_REGION_FLAG_MASK    0x0fU   /* These bits of resource flags tell us the PCI region flags */
 219
 220 struct pci_bus {
 221         struct list_head node;          /* node in list of buses */
 222         struct pci_bus  *parent;        /* parent bus this bridge is on */
 223         struct list_head children;      /* list of child buses */
 224         struct list_head devices;       /* list of devices on this bus */
 225         struct pci_dev  *self;          /* bridge device as seen by parent */
 226         struct resource *resource[PCI_BUS_NUM_RESOURCES];
 227                                         /* address space routed to this bus */
 228
 229         struct pci_ops  *ops;           /* configuration access functions */
 230         void            *sysdata;       /* hook for sys-specific extension */
 231         struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
 232
 233         unsigned char   number;         /* bus number */
 234         unsigned char   primary;        /* number of primary bridge */
 235         unsigned char   secondary;      /* number of secondary bridge */
 236         unsigned char   subordinate;    /* max number of subordinate buses */
 237
 238         char            name[48];
 239
 240         unsigned short  bridge_ctl;     /* manage NO_ISA/FBB/et al behaviors */
 241         pci_bus_flags_t bus_flags;      /* Inherited by child busses */
 242         struct device           *bridge;
 243         struct class_device     class_dev;
 244         struct bin_attribute    *legacy_io; /* legacy I/O for this bus */
 245         struct bin_attribute    *legacy_mem; /* legacy mem */
 246 };
 247
 248 #define pci_bus_b(n)    list_entry(n, struct pci_bus, node)
 249 #define to_pci_bus(n)   container_of(n, struct pci_bus, class_dev)
 250
 251 /*
 252  * Error values that may be returned by PCI functions.
 253  */
 254 #define PCIBIOS_SUCCESSFUL              0x00
 255 #define PCIBIOS_FUNC_NOT_SUPPORTED      0x81
 256 #define PCIBIOS_BAD_VENDOR_ID           0x83
 257 #define PCIBIOS_DEVICE_NOT_FOUND        0x86
 258 #define PCIBIOS_BAD_REGISTER_NUMBER     0x87
 259 #define PCIBIOS_SET_FAILED              0x88
 260 #define PCIBIOS_BUFFER_TOO_SMALL        0x89
 261
 262 /* Low-level architecture-dependent routines */
 263
 264 struct pci_ops {
 265         int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
 266         int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
 267 };
 268
 269 struct pci_raw_ops {
 270         int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
 271                     int reg, int len, u32 *val);
 272         int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
 273                      int reg, int len, u32 val);
 274 };
 275
 276 extern struct pci_raw_ops *raw_pci_ops;
 277
 278 struct pci_bus_region {
 279         unsigned long start;
 280         unsigned long end;
 281 };
 282
 283 struct pci_dynids {
 284         spinlock_t lock;            /* protects list, index */
 285         struct list_head list;      /* for IDs added at runtime */
 286         unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
 287 };
 288
 289 /* ---------------------------------------------------------------- */
 290 /** PCI Error Recovery System (PCI-ERS).  If a PCI device driver provides
 291  *  a set fof callbacks in struct pci_error_handlers, then that device driver
 292  *  will be notified of PCI bus errors, and will be driven to recovery
 293  *  when an error occurs.
 294  */
 295
 296 typedef unsigned int __bitwise pci_ers_result_t;
 297
 298 enum pci_ers_result {
 299         /* no result/none/not supported in device driver */
 300         PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
 301
 302         /* Device driver can recover without slot reset */
 303         PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
 304
 305         /* Device driver wants slot to be reset. */
 306         PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
 307
 308         /* Device has completely failed, is unrecoverable */
 309         PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
 310
 311         /* Device driver is fully recovered and operational */
 312         PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
 313 };
 314
 315 /* PCI bus error event callbacks */
 316 struct pci_error_handlers
 317 {
 318         /* PCI bus error detected on this device */
 319         pci_ers_result_t (*error_detected)(struct pci_dev *dev,
 320                               enum pci_channel_state error);
 321
 322         /* MMIO has been re-enabled, but not DMA */
 323         pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
 324
 325         /* PCI Express link has been reset */
 326         pci_ers_result_t (*link_reset)(struct pci_dev *dev);
 327
 328         /* PCI slot has been reset */
 329         pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
 330
 331         /* Device driver may resume normal operations */
 332         void (*resume)(struct pci_dev *dev);
 333 };
 334
 335 /* ---------------------------------------------------------------- */
 336
 337 struct module;
 338 struct pci_driver {
 339         struct list_head node;
 340         char *name;
 341         const struct pci_device_id *id_table;   /* must be non-NULL for probe to be called */
 342         int  (*probe)  (struct pci_dev *dev, const struct pci_device_id *id);   /* New device inserted */
 343         void (*remove) (struct pci_dev *dev);   /* Device removed (NULL if not a hot-plug capable driver) */
 344         int  (*suspend) (struct pci_dev *dev, pm_message_t state);      /* Device suspended */
 345         int  (*resume) (struct pci_dev *dev);                   /* Device woken up */
 346         int  (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable);   /* Enable wake event */
 347         void (*shutdown) (struct pci_dev *dev);
 348
 349         struct pci_error_handlers *err_handler;
 350         struct device_driver    driver;
 351         struct pci_dynids dynids;
 352 };
 353
 354 #define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
 355
 356 /**
 357  * PCI_DEVICE - macro used to describe a specific pci device
 358  * @vend: the 16 bit PCI Vendor ID
 359  * @dev: the 16 bit PCI Device ID
 360  *
 361  * This macro is used to create a struct pci_device_id that matches a
 362  * specific device.  The subvendor and subdevice fields will be set to
 363  * PCI_ANY_ID.
 364  */
 365 #define PCI_DEVICE(vend,dev) \
 366         .vendor = (vend), .device = (dev), \
 367         .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
 368
 369 /**
 370  * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
 371  * @dev_class: the class, subclass, prog-if triple for this device
 372  * @dev_class_mask: the class mask for this device
 373  *
 374  * This macro is used to create a struct pci_device_id that matches a
 375  * specific PCI class.  The vendor, device, subvendor, and subdevice
 376  * fields will be set to PCI_ANY_ID.
 377  */
 378 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
 379         .class = (dev_class), .class_mask = (dev_class_mask), \
 380         .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
 381         .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
 382
 383 /*
 384  * pci_module_init is obsolete, this stays here till we fix up all usages of it
 385  * in the tree.
 386  */
 387 #define pci_module_init pci_register_driver
 388
 389 /* these external functions are only available when PCI support is enabled */
 390 #ifdef CONFIG_PCI
 391
 392 extern struct bus_type pci_bus_type;
 393
 394 /* Do NOT directly access these two variables, unless you are arch specific pci
 395  * code, or pci core code. */
 396 extern struct list_head pci_root_buses; /* list of all known PCI buses */
 397 extern struct list_head pci_devices;    /* list of all devices */
 398
 399 void pcibios_fixup_bus(struct pci_bus *);
 400 int pcibios_enable_device(struct pci_dev *, int mask);
 401 char *pcibios_setup (char *str);
 402
 403 /* Used only when drivers/pci/setup.c is used */
 404 void pcibios_align_resource(void *, struct resource *,
 405                             unsigned long, unsigned long);
 406 void pcibios_update_irq(struct pci_dev *, int irq);
 407
 408 /* Generic PCI functions used internally */
 409
 410 extern struct pci_bus *pci_find_bus(int domain, int busnr);
 411 void pci_bus_add_devices(struct pci_bus *bus);
 412 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
 413 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
 414 {
 415         struct pci_bus *root_bus;
 416         root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
 417         if (root_bus)
 418                 pci_bus_add_devices(root_bus);
 419         return root_bus;
 420 }
 421 struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
 422 struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
 423 int pci_scan_slot(struct pci_bus *bus, int devfn);
 424 struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
 425 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
 426 unsigned int pci_scan_child_bus(struct pci_bus *bus);
 427 void pci_bus_add_device(struct pci_dev *dev);
 428 void pci_read_bridge_bases(struct pci_bus *child);
 429 struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
 430 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
 431 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
 432 extern void pci_dev_put(struct pci_dev *dev);
 433 extern void pci_remove_bus(struct pci_bus *b);
 434 extern void pci_remove_bus_device(struct pci_dev *dev);
 435 void pci_setup_cardbus(struct pci_bus *bus);
 436
 437 /* Generic PCI functions exported to card drivers */
 438
 439 struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
 440 struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
 441 struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
 442 int pci_find_capability (struct pci_dev *dev, int cap);
 443 int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
 444 int pci_find_ext_capability (struct pci_dev *dev, int cap);
 445 struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
 446
 447 struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
 448 struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
 449                                 unsigned int ss_vendor, unsigned int ss_device,
 450                                 struct pci_dev *from);
 451 struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
 452 struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
 453 int pci_dev_present(const struct pci_device_id *ids);
 454
 455 int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
 456 int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
 457 int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
 458 int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
 459 int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
 460 int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
 461
 462 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
 463 {
 464         return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
 465 }
 466 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
 467 {
 468         return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
 469 }
 470 static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
 471 {
 472         return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
 473 }
 474 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
 475 {
 476         return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
 477 }
 478 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
 479 {
 480         return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
 481 }
 482 static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
 483 {
 484         return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
 485 }
 486
 487 int pci_enable_device(struct pci_dev *dev);
 488 int pci_enable_device_bars(struct pci_dev *dev, int mask);
 489 void pci_disable_device(struct pci_dev *dev);
 490 void pci_set_master(struct pci_dev *dev);
 491 #define HAVE_PCI_SET_MWI
 492 int pci_set_mwi(struct pci_dev *dev);
 493 void pci_clear_mwi(struct pci_dev *dev);
 494 void pci_intx(struct pci_dev *dev, int enable);
 495 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
 496 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
 497 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
 498 int pci_assign_resource(struct pci_dev *dev, int i);
 499 int pci_assign_resource_fixed(struct pci_dev *dev, int i);
 500 void pci_restore_bars(struct pci_dev *dev);
 501
 502 /* ROM control related routines */
 503 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
 504 void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
 505 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
 506 void pci_remove_rom(struct pci_dev *pdev);
 507
 508 /* Power management related routines */
 509 int pci_save_state(struct pci_dev *dev);
 510 int pci_restore_state(struct pci_dev *dev);
 511 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
 512 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
 513 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
 514
 515 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
 516 void pci_bus_assign_resources(struct pci_bus *bus);
 517 void pci_bus_size_bridges(struct pci_bus *bus);
 518 int pci_claim_resource(struct pci_dev *, int);
 519 void pci_assign_unassigned_resources(void);
 520 void pdev_enable_device(struct pci_dev *);
 521 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
 522 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
 523                     int (*)(struct pci_dev *, u8, u8));
 524 #define HAVE_PCI_REQ_REGIONS    2
 525 int pci_request_regions(struct pci_dev *, const char *);
 526 void pci_release_regions(struct pci_dev *);
 527 int pci_request_region(struct pci_dev *, int, const char *);
 528 void pci_release_region(struct pci_dev *, int);
 529
 530 /* drivers/pci/bus.c */
 531 int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
 532                            unsigned long size, unsigned long align,
 533                            unsigned long min, unsigned int type_mask,
 534                            void (*alignf)(void *, struct resource *,
 535                                           unsigned long, unsigned long),
 536                            void *alignf_data);
 537 void pci_enable_bridges(struct pci_bus *bus);
 538
 539 /* Proper probing supporting hot-pluggable devices */
 540 int __pci_register_driver(struct pci_driver *, struct module *);
 541 static inline int pci_register_driver(struct pci_driver *driver)
 542 {
 543         return __pci_register_driver(driver, THIS_MODULE);
 544 }
 545
 546 void pci_unregister_driver(struct pci_driver *);
 547 void pci_remove_behind_bridge(struct pci_dev *);
 548 struct pci_driver *pci_dev_driver(const struct pci_dev *);
 549 const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
 550 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
 551 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
 552
 553 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
 554                   void *userdata);
 555 int pci_cfg_space_size(struct pci_dev *dev);
 556 unsigned char pci_bus_max_busnr(struct pci_bus* bus);
 557
 558 /* kmem_cache style wrapper around pci_alloc_consistent() */
 559
 560 #include <linux/dmapool.h>
 561
 562 #define pci_pool dma_pool
 563 #define pci_pool_create(name, pdev, size, align, allocation) \
 564                 dma_pool_create(name, &pdev->dev, size, align, allocation)
 565 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
 566 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
 567 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
 568
 569 enum pci_dma_burst_strategy {
 570         PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
 571                                    strategy_parameter is N/A */
 572         PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
 573                                    byte boundaries */
 574         PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
 575                                    strategy_parameter byte boundaries */
 576 };
 577
 578 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
 579 extern struct pci_dev *isa_bridge;
 580 #endif
 581
 582 struct msix_entry {
 583         u16     vector; /* kernel uses to write allocated vector */
 584         u16     entry;  /* driver uses to specify entry, OS writes */
 585 };
 586
 587 #ifndef CONFIG_PCI_MSI
 588 static inline void pci_scan_msi_device(struct pci_dev *dev) {}
 589 static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
 590 static inline void pci_disable_msi(struct pci_dev *dev) {}
 591 static inline int pci_enable_msix(struct pci_dev* dev,
 592         struct msix_entry *entries, int nvec) {return -1;}
 593 static inline void pci_disable_msix(struct pci_dev *dev) {}
 594 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
 595 #else
 596 extern void pci_scan_msi_device(struct pci_dev *dev);
 597 extern int pci_enable_msi(struct pci_dev *dev);
 598 extern void pci_disable_msi(struct pci_dev *dev);
 599 extern int pci_enable_msix(struct pci_dev* dev,
 600         struct msix_entry *entries, int nvec);
 601 extern void pci_disable_msix(struct pci_dev *dev);
 602 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
 603 #endif
 604
 605 extern void pci_block_user_cfg_access(struct pci_dev *dev);
 606 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
 607
 608 /*
 609  * PCI domain support.  Sometimes called PCI segment (eg by ACPI),
 610  * a PCI domain is defined to be a set of PCI busses which share
 611  * configuration space.
 612  */
 613 #ifndef CONFIG_PCI_DOMAINS
 614 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
 615 static inline int pci_proc_domain(struct pci_bus *bus)
 616 {
 617         return 0;
 618 }
 619 #endif
 620
 621 #else /* CONFIG_PCI is not enabled */
 622
 623 /*
 624  *  If the system does not have PCI, clearly these return errors.  Define
 625  *  these as simple inline functions to avoid hair in drivers.
 626  */
 627
 628 #define _PCI_NOP(o,s,t) \
 629         static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
 630                 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
 631 #define _PCI_NOP_ALL(o,x)       _PCI_NOP(o,byte,u8 x) \
 632                                 _PCI_NOP(o,word,u16 x) \
 633                                 _PCI_NOP(o,dword,u32 x)
 634 _PCI_NOP_ALL(read, *)
 635 _PCI_NOP_ALL(write,)
 636
 637 static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
 638 { return NULL; }
 639
 640 static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
 641 { return NULL; }
 642
 643 static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
 644 { return NULL; }
 645
 646 static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
 647 unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
 648 { return NULL; }
 649
 650 static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
 651 { return NULL; }
 652
 653 #define pci_dev_present(ids)    (0)
 654 #define pci_dev_put(dev)        do { } while (0)
 655
 656 static inline void pci_set_master(struct pci_dev *dev) { }
 657 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
 658 static inline void pci_disable_device(struct pci_dev *dev) { }
 659 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
 660 static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
 661 static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
 662 static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
 663 static inline void pci_unregister_driver(struct pci_driver *drv) { }
 664 static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
 665 static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
 666 static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
 667 static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
 668
 669 /* Power management related routines */
 670 static inline int pci_save_state(struct pci_dev *dev) { return 0; }
 671 static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
 672 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
 673 static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
 674 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
 675
 676 #define isa_bridge      ((struct pci_dev *)NULL)
 677
 678 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
 679
 680 static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
 681 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
 682
 683 #endif /* CONFIG_PCI */
 684
 685 /* Include architecture-dependent settings and functions */
 686
 687 #include <asm/pci.h>
 688
 689 /* these helpers provide future and backwards compatibility
 690  * for accessing popular PCI BAR info */
 691 #define pci_resource_start(dev,bar)   ((dev)->resource[(bar)].start)
 692 #define pci_resource_end(dev,bar)     ((dev)->resource[(bar)].end)
 693 #define pci_resource_flags(dev,bar)   ((dev)->resource[(bar)].flags)
 694 #define pci_resource_len(dev,bar) \
 695         ((pci_resource_start((dev),(bar)) == 0 &&       \
 696           pci_resource_end((dev),(bar)) ==              \
 697           pci_resource_start((dev),(bar))) ? 0 :        \
 698                                                         \
 699          (pci_resource_end((dev),(bar)) -               \
 700           pci_resource_start((dev),(bar)) + 1))
 701
 702 /* Similar to the helpers above, these manipulate per-pci_dev
 703  * driver-specific data.  They are really just a wrapper around
 704  * the generic device structure functions of these calls.
 705  */
 706 static inline void *pci_get_drvdata (struct pci_dev *pdev)
 707 {
 708         return dev_get_drvdata(&pdev->dev);
 709 }
 710
 711 static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
 712 {
 713         dev_set_drvdata(&pdev->dev, data);
 714 }
 715
 716 /* If you want to know what to call your pci_dev, ask this function.
 717  * Again, it's a wrapper around the generic device.
 718  */
 719 static inline char *pci_name(struct pci_dev *pdev)
 720 {
 721         return pdev->dev.bus_id;
 722 }
 723
 724
 725 /* Some archs don't want to expose struct resource to userland as-is
 726  * in sysfs and /proc
 727  */
 728 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
 729 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
 730                 const struct resource *rsrc, u64 *start, u64 *end)
 731 {
 732         *start = rsrc->start;
 733         *end = rsrc->end;
 734 }
 735 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
 736
 737
 738 /*
 739  *  The world is not perfect and supplies us with broken PCI devices.
 740  *  For at least a part of these bugs we need a work-around, so both
 741  *  generic (drivers/pci/quirks.c) and per-architecture code can define
 742  *  fixup hooks to be called for particular buggy devices.
 743  */
 744
 745 struct pci_fixup {
 746         u16 vendor, device;     /* You can use PCI_ANY_ID here of course */
 747         void (*hook)(struct pci_dev *dev);
 748 };
 749
 750 enum pci_fixup_pass {
 751         pci_fixup_early,        /* Before probing BARs */
 752         pci_fixup_header,       /* After reading configuration header */
 753         pci_fixup_final,        /* Final phase of device fixups */
 754         pci_fixup_enable,       /* pci_enable_device() time */
 755 };
 756
 757 /* Anonymous variables would be nice... */
 758 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook)  \
 759         static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
 760         __attribute__((__section__(#section))) = { vendor, device, hook };
 761 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook)                   \
 762         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early,                     \
 763                         vendor##device##hook, vendor, device, hook)
 764 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook)                  \
 765         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header,                    \
 766                         vendor##device##hook, vendor, device, hook)
 767 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook)                   \
 768         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final,                     \
 769                         vendor##device##hook, vendor, device, hook)
 770 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook)                  \
 771         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable,                    \
 772                         vendor##device##hook, vendor, device, hook)
 773
 774
 775 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
 776
 777 extern int pci_pci_problems;
 778 #define PCIPCI_FAIL             1
 779 #define PCIPCI_TRITON           2
 780 #define PCIPCI_NATOMA           4
 781 #define PCIPCI_VIAETBF          8
 782 #define PCIPCI_VSFX             16
 783 #define PCIPCI_ALIMAGIK         32
 784
 785 #endif /* __KERNEL__ */
 786 #endif /* LINUX_PCI_H */