2 * HCI based Driver for NXP PN544 NFC Chip
4 * Copyright (C) 2012 Intel Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the
17 * Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 #include <linux/crc-ccitt.h>
22 #include <linux/module.h>
23 #include <linux/delay.h>
24 #include <linux/slab.h>
25 #include <linux/miscdevice.h>
26 #include <linux/interrupt.h>
27 #include <linux/gpio.h>
28 #include <linux/i2c.h>
30 #include <linux/nfc.h>
31 #include <net/nfc/hci.h>
32 #include <net/nfc/llc.h>
34 #include <linux/nfc/pn544.h>
36 #define DRIVER_DESC "HCI NFC driver for PN544"
38 #define PN544_HCI_DRIVER_NAME "pn544_hci"
40 /* Timing restrictions (ms) */
41 #define PN544_HCI_RESETVEN_TIME 30
43 static struct i2c_device_id pn544_hci_id_table
[] = {
48 MODULE_DEVICE_TABLE(i2c
, pn544_hci_id_table
);
53 /* framing in HCI mode */
54 #define PN544_HCI_LLC_LEN 1
55 #define PN544_HCI_LLC_CRC 2
56 #define PN544_HCI_LLC_LEN_CRC (PN544_HCI_LLC_LEN + PN544_HCI_LLC_CRC)
57 #define PN544_HCI_LLC_MIN_SIZE (1 + PN544_HCI_LLC_LEN_CRC)
58 #define PN544_HCI_LLC_MAX_PAYLOAD 29
59 #define PN544_HCI_LLC_MAX_SIZE (PN544_HCI_LLC_LEN_CRC + 1 + \
60 PN544_HCI_LLC_MAX_PAYLOAD)
68 #define FULL_VERSION_LEN 11
70 /* Proprietary commands */
71 #define PN544_WRITE 0x3f
73 /* Proprietary gates, events, commands and registers */
75 /* NFC_HCI_RF_READER_A_GATE additional registers and commands */
76 #define PN544_RF_READER_A_AUTO_ACTIVATION 0x10
77 #define PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION 0x12
78 #define PN544_MIFARE_CMD 0x21
80 /* Commands that apply to all RF readers */
81 #define PN544_RF_READER_CMD_PRESENCE_CHECK 0x30
82 #define PN544_RF_READER_CMD_ACTIVATE_NEXT 0x32
84 /* NFC_HCI_ID_MGMT_GATE additional registers */
85 #define PN544_ID_MGMT_FULL_VERSION_SW 0x10
87 #define PN544_RF_READER_ISO15693_GATE 0x12
89 #define PN544_RF_READER_F_GATE 0x14
90 #define PN544_FELICA_ID 0x04
91 #define PN544_FELICA_RAW 0x20
93 #define PN544_RF_READER_JEWEL_GATE 0x15
94 #define PN544_JEWEL_RAW_CMD 0x23
96 #define PN544_RF_READER_NFCIP1_INITIATOR_GATE 0x30
97 #define PN544_RF_READER_NFCIP1_TARGET_GATE 0x31
99 #define PN544_SYS_MGMT_GATE 0x90
100 #define PN544_SYS_MGMT_INFO_NOTIFICATION 0x02
102 #define PN544_POLLING_LOOP_MGMT_GATE 0x94
103 #define PN544_PL_RDPHASES 0x06
104 #define PN544_PL_EMULATION 0x07
105 #define PN544_PL_NFCT_DEACTIVATED 0x09
107 #define PN544_SWP_MGMT_GATE 0xA0
109 #define PN544_NFC_WI_MGMT_GATE 0xA1
111 static struct nfc_hci_gate pn544_gates
[] = {
112 {NFC_HCI_ADMIN_GATE
, NFC_HCI_INVALID_PIPE
},
113 {NFC_HCI_LOOPBACK_GATE
, NFC_HCI_INVALID_PIPE
},
114 {NFC_HCI_ID_MGMT_GATE
, NFC_HCI_INVALID_PIPE
},
115 {NFC_HCI_LINK_MGMT_GATE
, NFC_HCI_INVALID_PIPE
},
116 {NFC_HCI_RF_READER_B_GATE
, NFC_HCI_INVALID_PIPE
},
117 {NFC_HCI_RF_READER_A_GATE
, NFC_HCI_INVALID_PIPE
},
118 {PN544_SYS_MGMT_GATE
, NFC_HCI_INVALID_PIPE
},
119 {PN544_SWP_MGMT_GATE
, NFC_HCI_INVALID_PIPE
},
120 {PN544_POLLING_LOOP_MGMT_GATE
, NFC_HCI_INVALID_PIPE
},
121 {PN544_NFC_WI_MGMT_GATE
, NFC_HCI_INVALID_PIPE
},
122 {PN544_RF_READER_F_GATE
, NFC_HCI_INVALID_PIPE
},
123 {PN544_RF_READER_JEWEL_GATE
, NFC_HCI_INVALID_PIPE
},
124 {PN544_RF_READER_ISO15693_GATE
, NFC_HCI_INVALID_PIPE
},
125 {PN544_RF_READER_NFCIP1_INITIATOR_GATE
, NFC_HCI_INVALID_PIPE
},
126 {PN544_RF_READER_NFCIP1_TARGET_GATE
, NFC_HCI_INVALID_PIPE
}
129 /* Largest headroom needed for outgoing custom commands */
130 #define PN544_CMDS_HEADROOM 2
131 #define PN544_FRAME_HEADROOM 1
132 #define PN544_FRAME_TAILROOM 2
134 struct pn544_hci_info
{
135 struct i2c_client
*i2c_dev
;
136 struct nfc_hci_dev
*hdev
;
138 enum pn544_state state
;
140 struct mutex info_lock
;
142 unsigned int gpio_en
;
143 unsigned int gpio_irq
;
144 unsigned int gpio_fw
;
145 unsigned int en_polarity
;
148 * < 0 if hardware error occured (e.g. i2c err)
149 * and prevents normal operation.
152 data_exchange_cb_t async_cb
;
153 void *async_cb_context
;
156 static void pn544_hci_platform_init(struct pn544_hci_info
*info
)
158 int polarity
, retry
, ret
;
159 char rset_cmd
[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 };
160 int count
= sizeof(rset_cmd
);
162 pr_info(DRIVER_DESC
": %s\n", __func__
);
163 dev_info(&info
->i2c_dev
->dev
, "Detecting nfc_en polarity\n");
165 /* Disable fw download */
166 gpio_set_value(info
->gpio_fw
, 0);
168 for (polarity
= 0; polarity
< 2; polarity
++) {
169 info
->en_polarity
= polarity
;
173 gpio_set_value(info
->gpio_en
, !info
->en_polarity
);
174 usleep_range(10000, 15000);
177 gpio_set_value(info
->gpio_en
, info
->en_polarity
);
178 usleep_range(10000, 15000);
181 dev_dbg(&info
->i2c_dev
->dev
, "Sending reset cmd\n");
182 ret
= i2c_master_send(info
->i2c_dev
, rset_cmd
, count
);
184 dev_info(&info
->i2c_dev
->dev
,
185 "nfc_en polarity : active %s\n",
186 (polarity
== 0 ? "low" : "high"));
192 dev_err(&info
->i2c_dev
->dev
,
193 "Could not detect nfc_en polarity, fallback to active high\n");
196 gpio_set_value(info
->gpio_en
, !info
->en_polarity
);
199 static int pn544_hci_enable(struct pn544_hci_info
*info
, int mode
)
201 pr_info(DRIVER_DESC
": %s\n", __func__
);
203 gpio_set_value(info
->gpio_fw
, 0);
204 gpio_set_value(info
->gpio_en
, info
->en_polarity
);
205 usleep_range(10000, 15000);
210 static void pn544_hci_disable(struct pn544_hci_info
*info
)
212 pr_info(DRIVER_DESC
": %s\n", __func__
);
214 gpio_set_value(info
->gpio_fw
, 0);
215 gpio_set_value(info
->gpio_en
, !info
->en_polarity
);
216 usleep_range(10000, 15000);
218 gpio_set_value(info
->gpio_en
, info
->en_polarity
);
219 usleep_range(10000, 15000);
221 gpio_set_value(info
->gpio_en
, !info
->en_polarity
);
222 usleep_range(10000, 15000);
225 static int pn544_hci_i2c_write(struct i2c_client
*client
, u8
*buf
, int len
)
229 usleep_range(3000, 6000);
231 r
= i2c_master_send(client
, buf
, len
);
233 if (r
== -EREMOTEIO
) { /* Retry, chip was in standby */
234 usleep_range(6000, 10000);
235 r
= i2c_master_send(client
, buf
, len
);
248 static int check_crc(u8
*buf
, int buflen
)
254 crc
= crc_ccitt(0xffff, buf
, len
- 2);
257 if (buf
[len
- 2] != (crc
& 0xff) || buf
[len
- 1] != (crc
>> 8)) {
258 pr_err(PN544_HCI_DRIVER_NAME
": CRC error 0x%x != 0x%x 0x%x\n",
259 crc
, buf
[len
- 1], buf
[len
- 2]);
261 pr_info(DRIVER_DESC
": %s : BAD CRC\n", __func__
);
262 print_hex_dump(KERN_DEBUG
, "crc: ", DUMP_PREFIX_NONE
,
263 16, 2, buf
, buflen
, false);
270 * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
271 * that i2c bus will be flushed and that next read will start on a new frame.
272 * returned skb contains only LLC header and payload.
274 * -EREMOTEIO : i2c read error (fatal)
275 * -EBADMSG : frame was incorrect and discarded
276 * -ENOMEM : cannot allocate skb, frame dropped
278 static int pn544_hci_i2c_read(struct i2c_client
*client
, struct sk_buff
**skb
)
282 u8 tmp
[PN544_HCI_LLC_MAX_SIZE
- 1];
284 r
= i2c_master_recv(client
, &len
, 1);
286 dev_err(&client
->dev
, "cannot read len byte\n");
290 if ((len
< (PN544_HCI_LLC_MIN_SIZE
- 1)) ||
291 (len
> (PN544_HCI_LLC_MAX_SIZE
- 1))) {
292 dev_err(&client
->dev
, "invalid len byte\n");
297 *skb
= alloc_skb(1 + len
, GFP_KERNEL
);
303 *skb_put(*skb
, 1) = len
;
305 r
= i2c_master_recv(client
, skb_put(*skb
, len
), len
);
311 r
= check_crc((*skb
)->data
, (*skb
)->len
);
319 skb_trim(*skb
, (*skb
)->len
- 2);
321 usleep_range(3000, 6000);
326 if (i2c_master_recv(client
, tmp
, sizeof(tmp
)) < 0)
329 usleep_range(3000, 6000);
335 * Reads an shdlc frame from the chip. This is not as straightforward as it
336 * seems. There are cases where we could loose the frame start synchronization.
337 * The frame format is len-data-crc, and corruption can occur anywhere while
338 * transiting on i2c bus, such that we could read an invalid len.
339 * In order to recover synchronization with the next frame, we must be sure
340 * to read the real amount of data without using the len byte. We do this by
341 * assuming the following:
342 * - the chip will always present only one single complete frame on the bus
343 * before triggering the interrupt
344 * - the chip will not present a new frame until we have completely read
345 * the previous one (or until we have handled the interrupt).
346 * The tricky case is when we read a corrupted len that is less than the real
347 * len. We must detect this here in order to determine that we need to flush
348 * the bus. This is the reason why we check the crc here.
350 static irqreturn_t
pn544_hci_irq_thread_fn(int irq
, void *dev_id
)
352 struct pn544_hci_info
*info
= dev_id
;
353 struct i2c_client
*client
;
354 struct sk_buff
*skb
= NULL
;
357 if (!info
|| irq
!= info
->i2c_dev
->irq
) {
362 client
= info
->i2c_dev
;
363 dev_dbg(&client
->dev
, "IRQ\n");
365 if (info
->hard_fault
!= 0)
368 r
= pn544_hci_i2c_read(client
, &skb
);
369 if (r
== -EREMOTEIO
) {
370 info
->hard_fault
= r
;
372 nfc_hci_recv_frame(info
->hdev
, NULL
);
375 } else if ((r
== -ENOMEM
) || (r
== -EBADMSG
)) {
379 nfc_hci_recv_frame(info
->hdev
, skb
);
384 static int pn544_hci_open(struct nfc_hci_dev
*hdev
)
386 struct pn544_hci_info
*info
= nfc_hci_get_clientdata(hdev
);
389 mutex_lock(&info
->info_lock
);
391 if (info
->state
!= PN544_ST_COLD
) {
396 r
= pn544_hci_enable(info
, HCI_MODE
);
399 info
->state
= PN544_ST_READY
;
402 mutex_unlock(&info
->info_lock
);
406 static void pn544_hci_close(struct nfc_hci_dev
*hdev
)
408 struct pn544_hci_info
*info
= nfc_hci_get_clientdata(hdev
);
410 mutex_lock(&info
->info_lock
);
412 if (info
->state
== PN544_ST_COLD
)
415 pn544_hci_disable(info
);
417 info
->state
= PN544_ST_COLD
;
420 mutex_unlock(&info
->info_lock
);
423 static int pn544_hci_ready(struct nfc_hci_dev
*hdev
)
426 static struct hw_config
{
430 {{0x9f, 0x9a}, 0x00},
432 {{0x98, 0x10}, 0xbc},
434 {{0x9e, 0x71}, 0x00},
436 {{0x98, 0x09}, 0x00},
438 {{0x9e, 0xb4}, 0x00},
440 {{0x9e, 0xd9}, 0xff},
441 {{0x9e, 0xda}, 0xff},
442 {{0x9e, 0xdb}, 0x23},
443 {{0x9e, 0xdc}, 0x21},
444 {{0x9e, 0xdd}, 0x22},
445 {{0x9e, 0xde}, 0x24},
447 {{0x9c, 0x01}, 0x08},
449 {{0x9e, 0xaa}, 0x01},
451 {{0x9b, 0xd1}, 0x0d},
452 {{0x9b, 0xd2}, 0x24},
453 {{0x9b, 0xd3}, 0x0a},
454 {{0x9b, 0xd4}, 0x22},
455 {{0x9b, 0xd5}, 0x08},
456 {{0x9b, 0xd6}, 0x1e},
457 {{0x9b, 0xdd}, 0x1c},
459 {{0x9b, 0x84}, 0x13},
460 {{0x99, 0x81}, 0x7f},
461 {{0x99, 0x31}, 0x70},
463 {{0x98, 0x00}, 0x3f},
465 {{0x9f, 0x09}, 0x00},
467 {{0x9f, 0x0a}, 0x05},
469 {{0x9e, 0xd1}, 0xa1},
470 {{0x99, 0x23}, 0x00},
472 {{0x9e, 0x74}, 0x80},
474 {{0x9f, 0x28}, 0x10},
476 {{0x9f, 0x35}, 0x14},
478 {{0x9f, 0x36}, 0x60},
480 {{0x9c, 0x31}, 0x00},
482 {{0x9c, 0x32}, 0xc8},
484 {{0x9c, 0x19}, 0x40},
486 {{0x9c, 0x1a}, 0x40},
488 {{0x9c, 0x0c}, 0x00},
490 {{0x9c, 0x0d}, 0x00},
492 {{0x9c, 0x12}, 0x00},
494 {{0x9c, 0x13}, 0x00},
496 {{0x98, 0xa2}, 0x0e},
498 {{0x98, 0x93}, 0x40},
500 {{0x98, 0x7d}, 0x02},
501 {{0x98, 0x7e}, 0x00},
502 {{0x9f, 0xc8}, 0x01},
504 struct hw_config
*p
= hw_config
;
505 int count
= ARRAY_SIZE(hw_config
);
506 struct sk_buff
*res_skb
;
512 param
[1] = p
->adr
[0];
513 param
[2] = p
->adr
[1];
516 r
= nfc_hci_send_cmd(hdev
, PN544_SYS_MGMT_GATE
, PN544_WRITE
,
521 if (res_skb
->len
!= 1) {
526 if (res_skb
->data
[0] != p
->value
) {
536 param
[0] = NFC_HCI_UICC_HOST_ID
;
537 r
= nfc_hci_set_param(hdev
, NFC_HCI_ADMIN_GATE
,
538 NFC_HCI_ADMIN_WHITELIST
, param
, 1);
543 r
= nfc_hci_set_param(hdev
, PN544_SYS_MGMT_GATE
,
544 PN544_SYS_MGMT_INFO_NOTIFICATION
, param
, 1);
549 r
= nfc_hci_set_param(hdev
, NFC_HCI_RF_READER_A_GATE
,
550 PN544_RF_READER_A_AUTO_ACTIVATION
, param
, 1);
554 r
= nfc_hci_send_event(hdev
, NFC_HCI_RF_READER_A_GATE
,
555 NFC_HCI_EVT_END_OPERATION
, NULL
, 0);
560 r
= nfc_hci_set_param(hdev
, PN544_POLLING_LOOP_MGMT_GATE
,
561 PN544_PL_NFCT_DEACTIVATED
, param
, 1);
566 r
= nfc_hci_set_param(hdev
, PN544_POLLING_LOOP_MGMT_GATE
,
567 PN544_PL_RDPHASES
, param
, 1);
571 r
= nfc_hci_get_param(hdev
, NFC_HCI_ID_MGMT_GATE
,
572 PN544_ID_MGMT_FULL_VERSION_SW
, &skb
);
576 if (skb
->len
!= FULL_VERSION_LEN
) {
581 print_hex_dump(KERN_DEBUG
, "FULL VERSION SOFTWARE INFO: ",
582 DUMP_PREFIX_NONE
, 16, 1,
583 skb
->data
, FULL_VERSION_LEN
, false);
590 static void pn544_hci_add_len_crc(struct sk_buff
*skb
)
596 *skb_push(skb
, 1) = len
;
598 crc
= crc_ccitt(0xffff, skb
->data
, skb
->len
);
600 *skb_put(skb
, 1) = crc
& 0xff;
601 *skb_put(skb
, 1) = crc
>> 8;
604 static void pn544_hci_remove_len_crc(struct sk_buff
*skb
)
606 skb_pull(skb
, PN544_FRAME_HEADROOM
);
607 skb_trim(skb
, PN544_FRAME_TAILROOM
);
610 static int pn544_hci_xmit(struct nfc_hci_dev
*hdev
, struct sk_buff
*skb
)
612 struct pn544_hci_info
*info
= nfc_hci_get_clientdata(hdev
);
613 struct i2c_client
*client
= info
->i2c_dev
;
616 if (info
->hard_fault
!= 0)
617 return info
->hard_fault
;
619 pn544_hci_add_len_crc(skb
);
620 r
= pn544_hci_i2c_write(client
, skb
->data
, skb
->len
);
621 pn544_hci_remove_len_crc(skb
);
626 static int pn544_hci_start_poll(struct nfc_hci_dev
*hdev
,
627 u32 im_protocols
, u32 tm_protocols
)
634 pr_info(DRIVER_DESC
": %s protocols 0x%x 0x%x\n",
635 __func__
, im_protocols
, tm_protocols
);
637 r
= nfc_hci_send_event(hdev
, NFC_HCI_RF_READER_A_GATE
,
638 NFC_HCI_EVT_END_OPERATION
, NULL
, 0);
644 r
= nfc_hci_set_param(hdev
, PN544_POLLING_LOOP_MGMT_GATE
,
645 PN544_PL_EMULATION
, duration
, 2);
650 r
= nfc_hci_set_param(hdev
, PN544_POLLING_LOOP_MGMT_GATE
,
651 PN544_PL_NFCT_DEACTIVATED
, &activated
, 1);
655 if (im_protocols
& (NFC_PROTO_ISO14443_MASK
| NFC_PROTO_MIFARE_MASK
|
656 NFC_PROTO_JEWEL_MASK
))
657 phases
|= 1; /* Type A */
658 if (im_protocols
& NFC_PROTO_FELICA_MASK
) {
659 phases
|= (1 << 2); /* Type F 212 */
660 phases
|= (1 << 3); /* Type F 424 */
663 phases
|= (1 << 5); /* NFC active */
665 r
= nfc_hci_set_param(hdev
, PN544_POLLING_LOOP_MGMT_GATE
,
666 PN544_PL_RDPHASES
, &phases
, 1);
670 r
= nfc_hci_send_event(hdev
, NFC_HCI_RF_READER_A_GATE
,
671 NFC_HCI_EVT_READER_REQUESTED
, NULL
, 0);
673 nfc_hci_send_event(hdev
, NFC_HCI_RF_READER_A_GATE
,
674 NFC_HCI_EVT_END_OPERATION
, NULL
, 0);
679 static int pn544_hci_target_from_gate(struct nfc_hci_dev
*hdev
, u8 gate
,
680 struct nfc_target
*target
)
683 case PN544_RF_READER_F_GATE
:
684 target
->supported_protocols
= NFC_PROTO_FELICA_MASK
;
686 case PN544_RF_READER_JEWEL_GATE
:
687 target
->supported_protocols
= NFC_PROTO_JEWEL_MASK
;
688 target
->sens_res
= 0x0c00;
697 static int pn544_hci_complete_target_discovered(struct nfc_hci_dev
*hdev
,
699 struct nfc_target
*target
)
701 struct sk_buff
*uid_skb
;
704 if (target
->supported_protocols
& NFC_PROTO_MIFARE_MASK
) {
705 if (target
->nfcid1_len
!= 4 && target
->nfcid1_len
!= 7 &&
706 target
->nfcid1_len
!= 10)
709 r
= nfc_hci_send_cmd(hdev
, NFC_HCI_RF_READER_A_GATE
,
710 PN544_RF_READER_CMD_ACTIVATE_NEXT
,
711 target
->nfcid1
, target
->nfcid1_len
, NULL
);
712 } else if (target
->supported_protocols
& NFC_PROTO_FELICA_MASK
) {
713 r
= nfc_hci_get_param(hdev
, PN544_RF_READER_F_GATE
,
714 PN544_FELICA_ID
, &uid_skb
);
718 if (uid_skb
->len
!= 8) {
723 r
= nfc_hci_send_cmd(hdev
, PN544_RF_READER_F_GATE
,
724 PN544_RF_READER_CMD_ACTIVATE_NEXT
,
725 uid_skb
->data
, uid_skb
->len
, NULL
);
727 } else if (target
->supported_protocols
& NFC_PROTO_ISO14443_MASK
) {
729 * TODO: maybe other ISO 14443 require some kind of continue
730 * activation, but for now we've seen only this one below.
732 if (target
->sens_res
== 0x4403) /* Type 4 Mifare DESFire */
733 r
= nfc_hci_send_cmd(hdev
, NFC_HCI_RF_READER_A_GATE
,
734 PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION
,
741 #define PN544_CB_TYPE_READER_F 1
743 static void pn544_hci_data_exchange_cb(void *context
, struct sk_buff
*skb
,
746 struct pn544_hci_info
*info
= context
;
748 switch (info
->async_cb_type
) {
749 case PN544_CB_TYPE_READER_F
:
752 info
->async_cb(info
->async_cb_context
, skb
, err
);
761 #define MIFARE_CMD_AUTH_KEY_A 0x60
762 #define MIFARE_CMD_AUTH_KEY_B 0x61
763 #define MIFARE_CMD_HEADER 2
764 #define MIFARE_UID_LEN 4
765 #define MIFARE_KEY_LEN 6
766 #define MIFARE_CMD_LEN 12
769 * <= 0: driver handled the data exchange
770 * 1: driver doesn't especially handle, please do standard processing
772 static int pn544_hci_data_exchange(struct nfc_hci_dev
*hdev
,
773 struct nfc_target
*target
,
774 struct sk_buff
*skb
, data_exchange_cb_t cb
,
777 struct pn544_hci_info
*info
= nfc_hci_get_clientdata(hdev
);
779 pr_info(DRIVER_DESC
": %s for gate=%d\n", __func__
,
780 target
->hci_reader_gate
);
782 switch (target
->hci_reader_gate
) {
783 case NFC_HCI_RF_READER_A_GATE
:
784 if (target
->supported_protocols
& NFC_PROTO_MIFARE_MASK
) {
786 * It seems that pn544 is inverting key and UID for
787 * MIFARE authentication commands.
789 if (skb
->len
== MIFARE_CMD_LEN
&&
790 (skb
->data
[0] == MIFARE_CMD_AUTH_KEY_A
||
791 skb
->data
[0] == MIFARE_CMD_AUTH_KEY_B
)) {
792 u8 uid
[MIFARE_UID_LEN
];
793 u8
*data
= skb
->data
+ MIFARE_CMD_HEADER
;
795 memcpy(uid
, data
+ MIFARE_KEY_LEN
,
797 memmove(data
+ MIFARE_UID_LEN
, data
,
799 memcpy(data
, uid
, MIFARE_UID_LEN
);
802 return nfc_hci_send_cmd_async(hdev
,
803 target
->hci_reader_gate
,
809 case PN544_RF_READER_F_GATE
:
810 *skb_push(skb
, 1) = 0;
811 *skb_push(skb
, 1) = 0;
813 info
->async_cb_type
= PN544_CB_TYPE_READER_F
;
815 info
->async_cb_context
= cb_context
;
817 return nfc_hci_send_cmd_async(hdev
, target
->hci_reader_gate
,
818 PN544_FELICA_RAW
, skb
->data
,
820 pn544_hci_data_exchange_cb
, info
);
821 case PN544_RF_READER_JEWEL_GATE
:
822 return nfc_hci_send_cmd_async(hdev
, target
->hci_reader_gate
,
823 PN544_JEWEL_RAW_CMD
, skb
->data
,
824 skb
->len
, cb
, cb_context
);
830 static int pn544_hci_check_presence(struct nfc_hci_dev
*hdev
,
831 struct nfc_target
*target
)
833 return nfc_hci_send_cmd(hdev
, target
->hci_reader_gate
,
834 PN544_RF_READER_CMD_PRESENCE_CHECK
,
838 static struct nfc_hci_ops pn544_hci_ops
= {
839 .open
= pn544_hci_open
,
840 .close
= pn544_hci_close
,
841 .hci_ready
= pn544_hci_ready
,
842 .xmit
= pn544_hci_xmit
,
843 .start_poll
= pn544_hci_start_poll
,
844 .target_from_gate
= pn544_hci_target_from_gate
,
845 .complete_target_discovered
= pn544_hci_complete_target_discovered
,
846 .data_exchange
= pn544_hci_data_exchange
,
847 .check_presence
= pn544_hci_check_presence
,
850 static int __devinit
pn544_hci_probe(struct i2c_client
*client
,
851 const struct i2c_device_id
*id
)
853 struct pn544_hci_info
*info
;
854 struct pn544_nfc_platform_data
*pdata
;
857 struct nfc_hci_init_data init_data
;
859 dev_dbg(&client
->dev
, "%s\n", __func__
);
860 dev_dbg(&client
->dev
, "IRQ: %d\n", client
->irq
);
862 if (!i2c_check_functionality(client
->adapter
, I2C_FUNC_I2C
)) {
863 dev_err(&client
->dev
, "Need I2C_FUNC_I2C\n");
867 info
= kzalloc(sizeof(struct pn544_hci_info
), GFP_KERNEL
);
869 dev_err(&client
->dev
,
870 "Cannot allocate memory for pn544_hci_info.\n");
875 info
->i2c_dev
= client
;
876 info
->state
= PN544_ST_COLD
;
877 mutex_init(&info
->info_lock
);
878 i2c_set_clientdata(client
, info
);
880 pdata
= client
->dev
.platform_data
;
882 dev_err(&client
->dev
, "No platform data\n");
887 if (pdata
->request_resources
== NULL
) {
888 dev_err(&client
->dev
, "request_resources() missing\n");
893 r
= pdata
->request_resources(client
);
895 dev_err(&client
->dev
, "Cannot get platform resources\n");
899 info
->gpio_en
= pdata
->get_gpio(NFC_GPIO_ENABLE
);
900 info
->gpio_fw
= pdata
->get_gpio(NFC_GPIO_FW_RESET
);
901 info
->gpio_irq
= pdata
->get_gpio(NFC_GPIO_IRQ
);
903 pn544_hci_platform_init(info
);
905 r
= request_threaded_irq(client
->irq
, NULL
, pn544_hci_irq_thread_fn
,
906 IRQF_TRIGGER_RISING
| IRQF_ONESHOT
,
907 PN544_HCI_DRIVER_NAME
, info
);
909 dev_err(&client
->dev
, "Unable to register IRQ handler\n");
913 init_data
.gate_count
= ARRAY_SIZE(pn544_gates
);
915 memcpy(init_data
.gates
, pn544_gates
, sizeof(pn544_gates
));
918 * TODO: Session id must include the driver name + some bus addr
919 * persistent info to discriminate 2 identical chips
921 strcpy(init_data
.session_id
, "ID544HCI");
923 protocols
= NFC_PROTO_JEWEL_MASK
|
924 NFC_PROTO_MIFARE_MASK
|
925 NFC_PROTO_FELICA_MASK
|
926 NFC_PROTO_ISO14443_MASK
|
927 NFC_PROTO_ISO14443_B_MASK
|
928 NFC_PROTO_NFC_DEP_MASK
;
930 info
->hdev
= nfc_hci_allocate_device(&pn544_hci_ops
, &init_data
,
931 protocols
, LLC_SHDLC_NAME
,
932 PN544_FRAME_HEADROOM
+
934 PN544_FRAME_TAILROOM
,
935 PN544_HCI_LLC_MAX_PAYLOAD
);
937 dev_err(&client
->dev
, "Cannot allocate nfc hdev.\n");
942 nfc_hci_set_clientdata(info
->hdev
, info
);
944 r
= nfc_hci_register_device(info
->hdev
);
951 nfc_hci_free_device(info
->hdev
);
954 free_irq(client
->irq
, info
);
957 if (pdata
->free_resources
!= NULL
)
958 pdata
->free_resources();
967 static __devexit
int pn544_hci_remove(struct i2c_client
*client
)
969 struct pn544_hci_info
*info
= i2c_get_clientdata(client
);
970 struct pn544_nfc_platform_data
*pdata
= client
->dev
.platform_data
;
972 dev_dbg(&client
->dev
, "%s\n", __func__
);
974 nfc_hci_free_device(info
->hdev
);
976 if (info
->state
!= PN544_ST_COLD
) {
981 free_irq(client
->irq
, info
);
982 if (pdata
->free_resources
)
983 pdata
->free_resources();
990 static struct i2c_driver pn544_hci_driver
= {
992 .name
= PN544_HCI_DRIVER_NAME
,
994 .probe
= pn544_hci_probe
,
995 .id_table
= pn544_hci_id_table
,
996 .remove
= __devexit_p(pn544_hci_remove
),
999 static int __init
pn544_hci_init(void)
1003 pr_debug(DRIVER_DESC
": %s\n", __func__
);
1005 r
= i2c_add_driver(&pn544_hci_driver
);
1007 pr_err(PN544_HCI_DRIVER_NAME
": driver registration failed\n");
1014 static void __exit
pn544_hci_exit(void)
1016 i2c_del_driver(&pn544_hci_driver
);
1019 module_init(pn544_hci_init
);
1020 module_exit(pn544_hci_exit
);
1022 MODULE_LICENSE("GPL");
1023 MODULE_DESCRIPTION(DRIVER_DESC
);