arch/sparc/kernel/sys_sparc_64.c: s/COLOUR/COLOR/
[linux-2.6.git] / drivers / i2c / busses / i2c-xlr.c
blob96d3fabd8883af8d8c4f967874a27090a367b717
1 /*
2 * Copyright 2011, Netlogic Microsystems Inc.
3 * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
5 * This file is licensed under the terms of the GNU General Public
6 * License version 2. This program is licensed "as is" without any
7 * warranty of any kind, whether express or implied.
8 */
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/slab.h>
13 #include <linux/init.h>
14 #include <linux/ioport.h>
15 #include <linux/delay.h>
16 #include <linux/errno.h>
17 #include <linux/i2c.h>
18 #include <linux/io.h>
19 #include <linux/platform_device.h>
21 /* XLR I2C REGISTERS */
22 #define XLR_I2C_CFG 0x00
23 #define XLR_I2C_CLKDIV 0x01
24 #define XLR_I2C_DEVADDR 0x02
25 #define XLR_I2C_ADDR 0x03
26 #define XLR_I2C_DATAOUT 0x04
27 #define XLR_I2C_DATAIN 0x05
28 #define XLR_I2C_STATUS 0x06
29 #define XLR_I2C_STARTXFR 0x07
30 #define XLR_I2C_BYTECNT 0x08
31 #define XLR_I2C_HDSTATIM 0x09
33 /* XLR I2C REGISTERS FLAGS */
34 #define XLR_I2C_BUS_BUSY 0x01
35 #define XLR_I2C_SDOEMPTY 0x02
36 #define XLR_I2C_RXRDY 0x04
37 #define XLR_I2C_ACK_ERR 0x08
38 #define XLR_I2C_ARB_STARTERR 0x30
40 /* Register Values */
41 #define XLR_I2C_CFG_ADDR 0xF8
42 #define XLR_I2C_CFG_NOADDR 0xFA
43 #define XLR_I2C_STARTXFR_ND 0x02 /* No Data */
44 #define XLR_I2C_STARTXFR_RD 0x01 /* Read */
45 #define XLR_I2C_STARTXFR_WR 0x00 /* Write */
47 #define XLR_I2C_TIMEOUT 10 /* timeout per byte in msec */
50 * On XLR/XLS, we need to use __raw_ IO to read the I2C registers
51 * because they are in the big-endian MMIO area on the SoC.
53 * The readl/writel implementation on XLR/XLS byteswaps, because
54 * those are for its little-endian PCI space (see arch/mips/Kconfig).
56 static inline void xlr_i2c_wreg(u32 __iomem *base, unsigned int reg, u32 val)
58 __raw_writel(val, base + reg);
61 static inline u32 xlr_i2c_rdreg(u32 __iomem *base, unsigned int reg)
63 return __raw_readl(base + reg);
66 struct xlr_i2c_private {
67 struct i2c_adapter adap;
68 u32 __iomem *iobase;
71 static int xlr_i2c_tx(struct xlr_i2c_private *priv, u16 len,
72 u8 *buf, u16 addr)
74 struct i2c_adapter *adap = &priv->adap;
75 unsigned long timeout, stoptime, checktime;
76 u32 i2c_status;
77 int pos, timedout;
78 u8 offset, byte;
80 offset = buf[0];
81 xlr_i2c_wreg(priv->iobase, XLR_I2C_ADDR, offset);
82 xlr_i2c_wreg(priv->iobase, XLR_I2C_DEVADDR, addr);
83 xlr_i2c_wreg(priv->iobase, XLR_I2C_CFG, XLR_I2C_CFG_ADDR);
84 xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 1);
86 timeout = msecs_to_jiffies(XLR_I2C_TIMEOUT);
87 stoptime = jiffies + timeout;
88 timedout = 0;
89 pos = 1;
90 retry:
91 if (len == 1) {
92 xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR,
93 XLR_I2C_STARTXFR_ND);
94 } else {
95 xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, buf[pos]);
96 xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR,
97 XLR_I2C_STARTXFR_WR);
100 while (!timedout) {
101 checktime = jiffies;
102 i2c_status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS);
104 if (i2c_status & XLR_I2C_SDOEMPTY) {
105 pos++;
106 /* need to do a empty dataout after the last byte */
107 byte = (pos < len) ? buf[pos] : 0;
108 xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, byte);
110 /* reset timeout on successful xmit */
111 stoptime = jiffies + timeout;
113 timedout = time_after(checktime, stoptime);
115 if (i2c_status & XLR_I2C_ARB_STARTERR) {
116 if (timedout)
117 break;
118 goto retry;
121 if (i2c_status & XLR_I2C_ACK_ERR)
122 return -EIO;
124 if ((i2c_status & XLR_I2C_BUS_BUSY) == 0 && pos >= len)
125 return 0;
127 dev_err(&adap->dev, "I2C transmit timeout\n");
128 return -ETIMEDOUT;
131 static int xlr_i2c_rx(struct xlr_i2c_private *priv, u16 len, u8 *buf, u16 addr)
133 struct i2c_adapter *adap = &priv->adap;
134 u32 i2c_status;
135 unsigned long timeout, stoptime, checktime;
136 int nbytes, timedout;
137 u8 byte;
139 xlr_i2c_wreg(priv->iobase, XLR_I2C_CFG, XLR_I2C_CFG_NOADDR);
140 xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len);
141 xlr_i2c_wreg(priv->iobase, XLR_I2C_DEVADDR, addr);
143 timeout = msecs_to_jiffies(XLR_I2C_TIMEOUT);
144 stoptime = jiffies + timeout;
145 timedout = 0;
146 nbytes = 0;
147 retry:
148 xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR, XLR_I2C_STARTXFR_RD);
150 while (!timedout) {
151 checktime = jiffies;
152 i2c_status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS);
153 if (i2c_status & XLR_I2C_RXRDY) {
154 if (nbytes > len)
155 return -EIO; /* should not happen */
157 /* we need to do a dummy datain when nbytes == len */
158 byte = xlr_i2c_rdreg(priv->iobase, XLR_I2C_DATAIN);
159 if (nbytes < len)
160 buf[nbytes] = byte;
161 nbytes++;
163 /* reset timeout on successful read */
164 stoptime = jiffies + timeout;
167 timedout = time_after(checktime, stoptime);
168 if (i2c_status & XLR_I2C_ARB_STARTERR) {
169 if (timedout)
170 break;
171 goto retry;
174 if (i2c_status & XLR_I2C_ACK_ERR)
175 return -EIO;
177 if ((i2c_status & XLR_I2C_BUS_BUSY) == 0)
178 return 0;
181 dev_err(&adap->dev, "I2C receive timeout\n");
182 return -ETIMEDOUT;
185 static int xlr_i2c_xfer(struct i2c_adapter *adap,
186 struct i2c_msg *msgs, int num)
188 struct i2c_msg *msg;
189 int i;
190 int ret = 0;
191 struct xlr_i2c_private *priv = i2c_get_adapdata(adap);
193 for (i = 0; ret == 0 && i < num; i++) {
194 msg = &msgs[i];
195 if (msg->flags & I2C_M_RD)
196 ret = xlr_i2c_rx(priv, msg->len, &msg->buf[0],
197 msg->addr);
198 else
199 ret = xlr_i2c_tx(priv, msg->len, &msg->buf[0],
200 msg->addr);
203 return (ret != 0) ? ret : num;
206 static u32 xlr_func(struct i2c_adapter *adap)
208 /* Emulate SMBUS over I2C */
209 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
212 static struct i2c_algorithm xlr_i2c_algo = {
213 .master_xfer = xlr_i2c_xfer,
214 .functionality = xlr_func,
217 static int __devinit xlr_i2c_probe(struct platform_device *pdev)
219 struct xlr_i2c_private *priv;
220 struct resource *res;
221 int ret;
223 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
224 if (!priv)
225 return -ENOMEM;
227 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
228 priv->iobase = devm_request_and_ioremap(&pdev->dev, res);
229 if (!priv->iobase) {
230 dev_err(&pdev->dev, "devm_request_and_ioremap failed\n");
231 return -EBUSY;
234 priv->adap.dev.parent = &pdev->dev;
235 priv->adap.owner = THIS_MODULE;
236 priv->adap.algo_data = priv;
237 priv->adap.algo = &xlr_i2c_algo;
238 priv->adap.nr = pdev->id;
239 priv->adap.class = I2C_CLASS_HWMON;
240 snprintf(priv->adap.name, sizeof(priv->adap.name), "xlr-i2c");
242 i2c_set_adapdata(&priv->adap, priv);
243 ret = i2c_add_numbered_adapter(&priv->adap);
244 if (ret < 0) {
245 dev_err(&priv->adap.dev, "Failed to add i2c bus.\n");
246 return ret;
249 platform_set_drvdata(pdev, priv);
250 dev_info(&priv->adap.dev, "Added I2C Bus.\n");
251 return 0;
254 static int __devexit xlr_i2c_remove(struct platform_device *pdev)
256 struct xlr_i2c_private *priv;
258 priv = platform_get_drvdata(pdev);
259 i2c_del_adapter(&priv->adap);
260 platform_set_drvdata(pdev, NULL);
261 return 0;
264 static struct platform_driver xlr_i2c_driver = {
265 .probe = xlr_i2c_probe,
266 .remove = __devexit_p(xlr_i2c_remove),
267 .driver = {
268 .name = "xlr-i2cbus",
269 .owner = THIS_MODULE,
273 module_platform_driver(xlr_i2c_driver);
275 MODULE_AUTHOR("Ganesan Ramalingam <ganesanr@netlogicmicro.com>");
276 MODULE_DESCRIPTION("XLR/XLS SoC I2C Controller driver");
277 MODULE_LICENSE("GPL v2");
278 MODULE_ALIAS("platform:xlr-i2cbus");