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[PATCH] wireless/atmel: fix Open System authentication process bugs
[linux-2.6.git] / drivers / net / wireless / atmel.c
blobdfc24016ba81735a721b169d561e4993dcf3bdb1
1 /*** -*- linux-c -*- **********************************************************
2
3 Driver for Atmel at76c502 at76c504 and at76c506 wireless cards.
4
5 Copyright 2000-2001 ATMEL Corporation.
6 Copyright 2003-2004 Simon Kelley.
7
8 This code was developed from version 2.1.1 of the Atmel drivers,
9 released by Atmel corp. under the GPL in December 2002. It also
10 includes code from the Linux aironet drivers (C) Benjamin Reed,
11 and the Linux PCMCIA package, (C) David Hinds and the Linux wireless
12 extensions, (C) Jean Tourrilhes.
13
14 The firmware module for reading the MAC address of the card comes from
15 net.russotto.AtmelMACFW, written by Matthew T. Russotto and copyright
16 by him. net.russotto.AtmelMACFW is used under the GPL license version 2.
17 This file contains the module in binary form and, under the terms
18 of the GPL, in source form. The source is located at the end of the file.
19
20 This program is free software; you can redistribute it and/or modify
21 it under the terms of the GNU General Public License as published by
22 the Free Software Foundation; either version 2 of the License, or
23 (at your option) any later version.
24
25 This software is distributed in the hope that it will be useful,
26 but WITHOUT ANY WARRANTY; without even the implied warranty of
27 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 GNU General Public License for more details.
29
30 You should have received a copy of the GNU General Public License
31 along with Atmel wireless lan drivers; if not, write to the Free Software
32 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
33
34 For all queries about this code, please contact the current author,
35 Simon Kelley <simon@thekelleys.org.uk> and not Atmel Corporation.
36
37 Credit is due to HP UK and Cambridge Online Systems Ltd for supplying
38 hardware used during development of this driver.
39
40 ******************************************************************************/
41
42 #include <linux/config.h>
43 #include <linux/init.h>
44
45 #include <linux/kernel.h>
46 #include <linux/sched.h>
47 #include <linux/ptrace.h>
48 #include <linux/slab.h>
49 #include <linux/string.h>
50 #include <linux/ctype.h>
51 #include <linux/timer.h>
52 #include <asm/io.h>
53 #include <asm/system.h>
54 #include <asm/uaccess.h>
55 #include <linux/module.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/skbuff.h>
59 #include <linux/if_arp.h>
60 #include <linux/ioport.h>
61 #include <linux/fcntl.h>
62 #include <linux/delay.h>
63 #include <linux/wireless.h>
64 #include <net/iw_handler.h>
65 #include <linux/byteorder/generic.h>
66 #include <linux/crc32.h>
67 #include <linux/proc_fs.h>
68 #include <linux/device.h>
69 #include <linux/moduleparam.h>
70 #include <linux/firmware.h>
71 #include <net/ieee80211.h>
72 #include "atmel.h"
73
74 #define DRIVER_MAJOR 0
75 #define DRIVER_MINOR 98
76
77 MODULE_AUTHOR("Simon Kelley");
78 MODULE_DESCRIPTION("Support for Atmel at76c50x 802.11 wireless ethernet cards.");
79 MODULE_LICENSE("GPL");
80 MODULE_SUPPORTED_DEVICE("Atmel at76c50x wireless cards");
81
82 /* The name of the firmware file to be loaded
83 over-rides any automatic selection */
84 static char *firmware = NULL;
85 module_param(firmware, charp, 0);
86
87 /* table of firmware file names */
88 static struct {
89 AtmelFWType fw_type;
90 const char *fw_file;
91 const char *fw_file_ext;
92 } fw_table[] = {
93 { ATMEL_FW_TYPE_502, "atmel_at76c502", "bin" },
94 { ATMEL_FW_TYPE_502D, "atmel_at76c502d", "bin" },
95 { ATMEL_FW_TYPE_502E, "atmel_at76c502e", "bin" },
96 { ATMEL_FW_TYPE_502_3COM, "atmel_at76c502_3com", "bin" },
97 { ATMEL_FW_TYPE_504, "atmel_at76c504", "bin" },
98 { ATMEL_FW_TYPE_504_2958, "atmel_at76c504_2958", "bin" },
99 { ATMEL_FW_TYPE_504A_2958,"atmel_at76c504a_2958","bin" },
100 { ATMEL_FW_TYPE_506, "atmel_at76c506", "bin" },
101 { ATMEL_FW_TYPE_NONE, NULL, NULL }
102 };
103
104 #define MAX_SSID_LENGTH 32
105 #define MGMT_JIFFIES (256 * HZ / 100)
106
107 #define MAX_BSS_ENTRIES 64
108
109 /* registers */
110 #define GCR 0x00 // (SIR0) General Configuration Register
111 #define BSR 0x02 // (SIR1) Bank Switching Select Register
112 #define AR 0x04
113 #define DR 0x08
114 #define MR1 0x12 // Mirror Register 1
115 #define MR2 0x14 // Mirror Register 2
116 #define MR3 0x16 // Mirror Register 3
117 #define MR4 0x18 // Mirror Register 4
118
119 #define GPR1 0x0c
120 #define GPR2 0x0e
121 #define GPR3 0x10
122 //
123 // Constants for the GCR register.
124 //
125 #define GCR_REMAP 0x0400 // Remap internal SRAM to 0
126 #define GCR_SWRES 0x0080 // BIU reset (ARM and PAI are NOT reset)
127 #define GCR_CORES 0x0060 // Core Reset (ARM and PAI are reset)
128 #define GCR_ENINT 0x0002 // Enable Interrupts
129 #define GCR_ACKINT 0x0008 // Acknowledge Interrupts
130
131 #define BSS_SRAM 0x0200 // AMBA module selection --> SRAM
132 #define BSS_IRAM 0x0100 // AMBA module selection --> IRAM
133 //
134 // Constants for the MR registers.
135 //
136 #define MAC_INIT_COMPLETE 0x0001 // MAC init has been completed
137 #define MAC_BOOT_COMPLETE 0x0010 // MAC boot has been completed
138 #define MAC_INIT_OK 0x0002 // MAC boot has been completed
139
140 #define C80211_SUBTYPE_MGMT_ASS_REQUEST 0x00
141 #define C80211_SUBTYPE_MGMT_ASS_RESPONSE 0x10
142 #define C80211_SUBTYPE_MGMT_REASS_REQUEST 0x20
143 #define C80211_SUBTYPE_MGMT_REASS_RESPONSE 0x30
144 #define C80211_SUBTYPE_MGMT_ProbeRequest 0x40
145 #define C80211_SUBTYPE_MGMT_ProbeResponse 0x50
146 #define C80211_SUBTYPE_MGMT_BEACON 0x80
147 #define C80211_SUBTYPE_MGMT_ATIM 0x90
148 #define C80211_SUBTYPE_MGMT_DISASSOSIATION 0xA0
149 #define C80211_SUBTYPE_MGMT_Authentication 0xB0
150 #define C80211_SUBTYPE_MGMT_Deauthentication 0xC0
151
152 #define C80211_MGMT_AAN_OPENSYSTEM 0x0000
153 #define C80211_MGMT_AAN_SHAREDKEY 0x0001
154
155 #define C80211_MGMT_CAPABILITY_ESS 0x0001 // see 802.11 p.58
156 #define C80211_MGMT_CAPABILITY_IBSS 0x0002 // - " -
157 #define C80211_MGMT_CAPABILITY_CFPollable 0x0004 // - " -
158 #define C80211_MGMT_CAPABILITY_CFPollRequest 0x0008 // - " -
159 #define C80211_MGMT_CAPABILITY_Privacy 0x0010 // - " -
160
161 #define C80211_MGMT_SC_Success 0
162 #define C80211_MGMT_SC_Unspecified 1
163 #define C80211_MGMT_SC_SupportCapabilities 10
164 #define C80211_MGMT_SC_ReassDenied 11
165 #define C80211_MGMT_SC_AssDenied 12
166 #define C80211_MGMT_SC_AuthAlgNotSupported 13
167 #define C80211_MGMT_SC_AuthTransSeqNumError 14
168 #define C80211_MGMT_SC_AuthRejectChallenge 15
169 #define C80211_MGMT_SC_AuthRejectTimeout 16
170 #define C80211_MGMT_SC_AssDeniedHandleAP 17
171 #define C80211_MGMT_SC_AssDeniedBSSRate 18
172
173 #define C80211_MGMT_ElementID_SSID 0
174 #define C80211_MGMT_ElementID_SupportedRates 1
175 #define C80211_MGMT_ElementID_ChallengeText 16
176 #define C80211_MGMT_CAPABILITY_ShortPreamble 0x0020
177
178 #define MIB_MAX_DATA_BYTES 212
179 #define MIB_HEADER_SIZE 4 /* first four fields */
180
181 struct get_set_mib {
182 u8 type;
183 u8 size;
184 u8 index;
185 u8 reserved;
186 u8 data[MIB_MAX_DATA_BYTES];
187 };
188
189 struct rx_desc {
190 u32 Next;
191 u16 MsduPos;
192 u16 MsduSize;
193
194 u8 State;
195 u8 Status;
196 u8 Rate;
197 u8 Rssi;
198 u8 LinkQuality;
199 u8 PreambleType;
200 u16 Duration;
201 u32 RxTime;
202 };
203
204 #define RX_DESC_FLAG_VALID 0x80
205 #define RX_DESC_FLAG_CONSUMED 0x40
206 #define RX_DESC_FLAG_IDLE 0x00
207
208 #define RX_STATUS_SUCCESS 0x00
209
210 #define RX_DESC_MSDU_POS_OFFSET 4
211 #define RX_DESC_MSDU_SIZE_OFFSET 6
212 #define RX_DESC_FLAGS_OFFSET 8
213 #define RX_DESC_STATUS_OFFSET 9
214 #define RX_DESC_RSSI_OFFSET 11
215 #define RX_DESC_LINK_QUALITY_OFFSET 12
216 #define RX_DESC_PREAMBLE_TYPE_OFFSET 13
217 #define RX_DESC_DURATION_OFFSET 14
218 #define RX_DESC_RX_TIME_OFFSET 16
219
220 struct tx_desc {
221 u32 NextDescriptor;
222 u16 TxStartOfFrame;
223 u16 TxLength;
224
225 u8 TxState;
226 u8 TxStatus;
227 u8 RetryCount;
228
229 u8 TxRate;
230
231 u8 KeyIndex;
232 u8 ChiperType;
233 u8 ChipreLength;
234 u8 Reserved1;
235
236 u8 Reserved;
237 u8 PacketType;
238 u16 HostTxLength;
239 };
240
241 #define TX_DESC_NEXT_OFFSET 0
242 #define TX_DESC_POS_OFFSET 4
243 #define TX_DESC_SIZE_OFFSET 6
244 #define TX_DESC_FLAGS_OFFSET 8
245 #define TX_DESC_STATUS_OFFSET 9
246 #define TX_DESC_RETRY_OFFSET 10
247 #define TX_DESC_RATE_OFFSET 11
248 #define TX_DESC_KEY_INDEX_OFFSET 12
249 #define TX_DESC_CIPHER_TYPE_OFFSET 13
250 #define TX_DESC_CIPHER_LENGTH_OFFSET 14
251 #define TX_DESC_PACKET_TYPE_OFFSET 17
252 #define TX_DESC_HOST_LENGTH_OFFSET 18
253
254 ///////////////////////////////////////////////////////
255 // Host-MAC interface
256 ///////////////////////////////////////////////////////
257
258 #define TX_STATUS_SUCCESS 0x00
259
260 #define TX_FIRM_OWN 0x80
261 #define TX_DONE 0x40
262
263 #define TX_ERROR 0x01
264
265 #define TX_PACKET_TYPE_DATA 0x01
266 #define TX_PACKET_TYPE_MGMT 0x02
267
268 #define ISR_EMPTY 0x00 // no bits set in ISR
269 #define ISR_TxCOMPLETE 0x01 // packet transmitted
270 #define ISR_RxCOMPLETE 0x02 // packet received
271 #define ISR_RxFRAMELOST 0x04 // Rx Frame lost
272 #define ISR_FATAL_ERROR 0x08 // Fatal error
273 #define ISR_COMMAND_COMPLETE 0x10 // command completed
274 #define ISR_OUT_OF_RANGE 0x20 // command completed
275 #define ISR_IBSS_MERGE 0x40 // (4.1.2.30): IBSS merge
276 #define ISR_GENERIC_IRQ 0x80
277
278 #define Local_Mib_Type 0x01
279 #define Mac_Address_Mib_Type 0x02
280 #define Mac_Mib_Type 0x03
281 #define Statistics_Mib_Type 0x04
282 #define Mac_Mgmt_Mib_Type 0x05
283 #define Mac_Wep_Mib_Type 0x06
284 #define Phy_Mib_Type 0x07
285 #define Multi_Domain_MIB 0x08
286
287 #define MAC_MGMT_MIB_CUR_BSSID_POS 14
288 #define MAC_MIB_FRAG_THRESHOLD_POS 8
289 #define MAC_MIB_RTS_THRESHOLD_POS 10
290 #define MAC_MIB_SHORT_RETRY_POS 16
291 #define MAC_MIB_LONG_RETRY_POS 17
292 #define MAC_MIB_SHORT_RETRY_LIMIT_POS 16
293 #define MAC_MGMT_MIB_BEACON_PER_POS 0
294 #define MAC_MGMT_MIB_STATION_ID_POS 6
295 #define MAC_MGMT_MIB_CUR_PRIVACY_POS 11
296 #define MAC_MGMT_MIB_CUR_BSSID_POS 14
297 #define MAC_MGMT_MIB_PS_MODE_POS 53
298 #define MAC_MGMT_MIB_LISTEN_INTERVAL_POS 54
299 #define MAC_MGMT_MIB_MULTI_DOMAIN_IMPLEMENTED 56
300 #define MAC_MGMT_MIB_MULTI_DOMAIN_ENABLED 57
301 #define PHY_MIB_CHANNEL_POS 14
302 #define PHY_MIB_RATE_SET_POS 20
303 #define PHY_MIB_REG_DOMAIN_POS 26
304 #define LOCAL_MIB_AUTO_TX_RATE_POS 3
305 #define LOCAL_MIB_SSID_SIZE 5
306 #define LOCAL_MIB_TX_PROMISCUOUS_POS 6
307 #define LOCAL_MIB_TX_MGMT_RATE_POS 7
308 #define LOCAL_MIB_TX_CONTROL_RATE_POS 8
309 #define LOCAL_MIB_PREAMBLE_TYPE 9
310 #define MAC_ADDR_MIB_MAC_ADDR_POS 0
311
312 #define CMD_Set_MIB_Vars 0x01
313 #define CMD_Get_MIB_Vars 0x02
314 #define CMD_Scan 0x03
315 #define CMD_Join 0x04
316 #define CMD_Start 0x05
317 #define CMD_EnableRadio 0x06
318 #define CMD_DisableRadio 0x07
319 #define CMD_SiteSurvey 0x0B
320
321 #define CMD_STATUS_IDLE 0x00
322 #define CMD_STATUS_COMPLETE 0x01
323 #define CMD_STATUS_UNKNOWN 0x02
324 #define CMD_STATUS_INVALID_PARAMETER 0x03
325 #define CMD_STATUS_FUNCTION_NOT_SUPPORTED 0x04
326 #define CMD_STATUS_TIME_OUT 0x07
327 #define CMD_STATUS_IN_PROGRESS 0x08
328 #define CMD_STATUS_REJECTED_RADIO_OFF 0x09
329 #define CMD_STATUS_HOST_ERROR 0xFF
330 #define CMD_STATUS_BUSY 0xFE
331
332 #define CMD_BLOCK_COMMAND_OFFSET 0
333 #define CMD_BLOCK_STATUS_OFFSET 1
334 #define CMD_BLOCK_PARAMETERS_OFFSET 4
335
336 #define SCAN_OPTIONS_SITE_SURVEY 0x80
337
338 #define MGMT_FRAME_BODY_OFFSET 24
339 #define MAX_AUTHENTICATION_RETRIES 3
340 #define MAX_ASSOCIATION_RETRIES 3
341
342 #define AUTHENTICATION_RESPONSE_TIME_OUT 1000
343
344 #define MAX_WIRELESS_BODY 2316 /* mtu is 2312, CRC is 4 */
345 #define LOOP_RETRY_LIMIT 500000
346
347 #define ACTIVE_MODE 1
348 #define PS_MODE 2
349
350 #define MAX_ENCRYPTION_KEYS 4
351 #define MAX_ENCRYPTION_KEY_SIZE 40
352
353 ///////////////////////////////////////////////////////////////////////////
354 // 802.11 related definitions
355 ///////////////////////////////////////////////////////////////////////////
356
357 //
358 // Regulatory Domains
359 //
360
361 #define REG_DOMAIN_FCC 0x10 //Channels 1-11 USA
362 #define REG_DOMAIN_DOC 0x20 //Channel 1-11 Canada
363 #define REG_DOMAIN_ETSI 0x30 //Channel 1-13 Europe (ex Spain/France)
364 #define REG_DOMAIN_SPAIN 0x31 //Channel 10-11 Spain
365 #define REG_DOMAIN_FRANCE 0x32 //Channel 10-13 France
366 #define REG_DOMAIN_MKK 0x40 //Channel 14 Japan
367 #define REG_DOMAIN_MKK1 0x41 //Channel 1-14 Japan(MKK1)
368 #define REG_DOMAIN_ISRAEL 0x50 //Channel 3-9 ISRAEL
369
370 #define BSS_TYPE_AD_HOC 1
371 #define BSS_TYPE_INFRASTRUCTURE 2
372
373 #define SCAN_TYPE_ACTIVE 0
374 #define SCAN_TYPE_PASSIVE 1
375
376 #define LONG_PREAMBLE 0
377 #define SHORT_PREAMBLE 1
378 #define AUTO_PREAMBLE 2
379
380 #define DATA_FRAME_WS_HEADER_SIZE 30
381
382 /* promiscuous mode control */
383 #define PROM_MODE_OFF 0x0
384 #define PROM_MODE_UNKNOWN 0x1
385 #define PROM_MODE_CRC_FAILED 0x2
386 #define PROM_MODE_DUPLICATED 0x4
387 #define PROM_MODE_MGMT 0x8
388 #define PROM_MODE_CTRL 0x10
389 #define PROM_MODE_BAD_PROTOCOL 0x20
390
391 #define IFACE_INT_STATUS_OFFSET 0
392 #define IFACE_INT_MASK_OFFSET 1
393 #define IFACE_LOCKOUT_HOST_OFFSET 2
394 #define IFACE_LOCKOUT_MAC_OFFSET 3
395 #define IFACE_FUNC_CTRL_OFFSET 28
396 #define IFACE_MAC_STAT_OFFSET 30
397 #define IFACE_GENERIC_INT_TYPE_OFFSET 32
398
399 #define CIPHER_SUITE_NONE 0
400 #define CIPHER_SUITE_WEP_64 1
401 #define CIPHER_SUITE_TKIP 2
402 #define CIPHER_SUITE_AES 3
403 #define CIPHER_SUITE_CCX 4
404 #define CIPHER_SUITE_WEP_128 5
405
406 //
407 // IFACE MACROS & definitions
408 //
409 //
410
411 // FuncCtrl field:
412 //
413 #define FUNC_CTRL_TxENABLE 0x10
414 #define FUNC_CTRL_RxENABLE 0x20
415 #define FUNC_CTRL_INIT_COMPLETE 0x01
416
417 /* A stub firmware image which reads the MAC address from NVRAM on the card.
418 For copyright information and source see the end of this file. */
419 static u8 mac_reader[] = {
420 0x06,0x00,0x00,0xea,0x04,0x00,0x00,0xea,0x03,0x00,0x00,0xea,0x02,0x00,0x00,0xea,
421 0x01,0x00,0x00,0xea,0x00,0x00,0x00,0xea,0xff,0xff,0xff,0xea,0xfe,0xff,0xff,0xea,
422 0xd3,0x00,0xa0,0xe3,0x00,0xf0,0x21,0xe1,0x0e,0x04,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
423 0x81,0x11,0xa0,0xe1,0x00,0x10,0x81,0xe3,0x00,0x10,0x80,0xe5,0x1c,0x10,0x90,0xe5,
424 0x10,0x10,0xc1,0xe3,0x1c,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,0x08,0x10,0x80,0xe5,
425 0x02,0x03,0xa0,0xe3,0x00,0x10,0xa0,0xe3,0xb0,0x10,0xc0,0xe1,0xb4,0x10,0xc0,0xe1,
426 0xb8,0x10,0xc0,0xe1,0xbc,0x10,0xc0,0xe1,0x56,0xdc,0xa0,0xe3,0x21,0x00,0x00,0xeb,
427 0x0a,0x00,0xa0,0xe3,0x1a,0x00,0x00,0xeb,0x10,0x00,0x00,0xeb,0x07,0x00,0x00,0xeb,
428 0x02,0x03,0xa0,0xe3,0x02,0x14,0xa0,0xe3,0xb4,0x10,0xc0,0xe1,0x4c,0x10,0x9f,0xe5,
429 0xbc,0x10,0xc0,0xe1,0x10,0x10,0xa0,0xe3,0xb8,0x10,0xc0,0xe1,0xfe,0xff,0xff,0xea,
430 0x00,0x40,0x2d,0xe9,0x00,0x20,0xa0,0xe3,0x02,0x3c,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
431 0x28,0x00,0x9f,0xe5,0x37,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
432 0x00,0x40,0x2d,0xe9,0x12,0x2e,0xa0,0xe3,0x06,0x30,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
433 0x02,0x04,0xa0,0xe3,0x2f,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
434 0x00,0x02,0x00,0x02,0x80,0x01,0x90,0xe0,0x01,0x00,0x00,0x0a,0x01,0x00,0x50,0xe2,
435 0xfc,0xff,0xff,0xea,0x1e,0xff,0x2f,0xe1,0x80,0x10,0xa0,0xe3,0xf3,0x06,0xa0,0xe3,
436 0x00,0x10,0x80,0xe5,0x00,0x10,0xa0,0xe3,0x00,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,
437 0x04,0x10,0x80,0xe5,0x00,0x10,0x80,0xe5,0x0e,0x34,0xa0,0xe3,0x1c,0x10,0x93,0xe5,
438 0x02,0x1a,0x81,0xe3,0x1c,0x10,0x83,0xe5,0x58,0x11,0x9f,0xe5,0x30,0x10,0x80,0xe5,
439 0x54,0x11,0x9f,0xe5,0x34,0x10,0x80,0xe5,0x38,0x10,0x80,0xe5,0x3c,0x10,0x80,0xe5,
440 0x10,0x10,0x90,0xe5,0x08,0x00,0x90,0xe5,0x1e,0xff,0x2f,0xe1,0xf3,0x16,0xa0,0xe3,
441 0x08,0x00,0x91,0xe5,0x05,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,0x10,0x00,0x91,0xe5,
442 0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0xff,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,
443 0x10,0x00,0x91,0xe5,0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
444 0x10,0x00,0x91,0xe5,0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
445 0xff,0x00,0x00,0xe2,0x1e,0xff,0x2f,0xe1,0x30,0x40,0x2d,0xe9,0x00,0x50,0xa0,0xe1,
446 0x03,0x40,0xa0,0xe1,0xa2,0x02,0xa0,0xe1,0x08,0x00,0x00,0xe2,0x03,0x00,0x80,0xe2,
447 0xd8,0x10,0x9f,0xe5,0x00,0x00,0xc1,0xe5,0x01,0x20,0xc1,0xe5,0xe2,0xff,0xff,0xeb,
448 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x1a,0x14,0x00,0xa0,0xe3,0xc4,0xff,0xff,0xeb,
449 0x04,0x20,0xa0,0xe1,0x05,0x10,0xa0,0xe1,0x02,0x00,0xa0,0xe3,0x01,0x00,0x00,0xeb,
450 0x30,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x70,0x40,0x2d,0xe9,0xf3,0x46,0xa0,0xe3,
451 0x00,0x30,0xa0,0xe3,0x00,0x00,0x50,0xe3,0x08,0x00,0x00,0x9a,0x8c,0x50,0x9f,0xe5,
452 0x03,0x60,0xd5,0xe7,0x0c,0x60,0x84,0xe5,0x10,0x60,0x94,0xe5,0x02,0x00,0x16,0xe3,
453 0xfc,0xff,0xff,0x0a,0x01,0x30,0x83,0xe2,0x00,0x00,0x53,0xe1,0xf7,0xff,0xff,0x3a,
454 0xff,0x30,0xa0,0xe3,0x0c,0x30,0x84,0xe5,0x08,0x00,0x94,0xe5,0x10,0x00,0x94,0xe5,
455 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x94,0xe5,0x00,0x00,0xa0,0xe3,
456 0x00,0x00,0x52,0xe3,0x0b,0x00,0x00,0x9a,0x10,0x50,0x94,0xe5,0x02,0x00,0x15,0xe3,
457 0xfc,0xff,0xff,0x0a,0x0c,0x30,0x84,0xe5,0x10,0x50,0x94,0xe5,0x01,0x00,0x15,0xe3,
458 0xfc,0xff,0xff,0x0a,0x08,0x50,0x94,0xe5,0x01,0x50,0xc1,0xe4,0x01,0x00,0x80,0xe2,
459 0x02,0x00,0x50,0xe1,0xf3,0xff,0xff,0x3a,0xc8,0x00,0xa0,0xe3,0x98,0xff,0xff,0xeb,
460 0x70,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x01,0x0c,0x00,0x02,0x01,0x02,0x00,0x02,
461 0x00,0x01,0x00,0x02
462 };
463
464 struct atmel_private {
465 void *card; /* Bus dependent stucture varies for PCcard */
466 int (*present_callback)(void *); /* And callback which uses it */
467 char firmware_id[32];
468 AtmelFWType firmware_type;
469 u8 *firmware;
470 int firmware_length;
471 struct timer_list management_timer;
472 struct net_device *dev;
473 struct device *sys_dev;
474 struct iw_statistics wstats;
475 struct net_device_stats stats; // device stats
476 spinlock_t irqlock, timerlock; // spinlocks
477 enum { BUS_TYPE_PCCARD, BUS_TYPE_PCI } bus_type;
478 enum {
479 CARD_TYPE_PARALLEL_FLASH,
480 CARD_TYPE_SPI_FLASH,
481 CARD_TYPE_EEPROM
482 } card_type;
483 int do_rx_crc; /* If we need to CRC incoming packets */
484 int probe_crc; /* set if we don't yet know */
485 int crc_ok_cnt, crc_ko_cnt; /* counters for probing */
486 u16 rx_desc_head;
487 u16 tx_desc_free, tx_desc_head, tx_desc_tail, tx_desc_previous;
488 u16 tx_free_mem, tx_buff_head, tx_buff_tail;
489
490 u16 frag_seq, frag_len, frag_no;
491 u8 frag_source[6];
492
493 u8 wep_is_on, default_key, exclude_unencrypted, encryption_level;
494 u8 group_cipher_suite, pairwise_cipher_suite;
495 u8 wep_keys[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
496 int wep_key_len[MAX_ENCRYPTION_KEYS];
497 int use_wpa, radio_on_broken; /* firmware dependent stuff. */
498
499 u16 host_info_base;
500 struct host_info_struct {
501 /* NB this is matched to the hardware, don't change. */
502 u8 volatile int_status;
503 u8 volatile int_mask;
504 u8 volatile lockout_host;
505 u8 volatile lockout_mac;
506
507 u16 tx_buff_pos;
508 u16 tx_buff_size;
509 u16 tx_desc_pos;
510 u16 tx_desc_count;
511
512 u16 rx_buff_pos;
513 u16 rx_buff_size;
514 u16 rx_desc_pos;
515 u16 rx_desc_count;
516
517 u16 build_version;
518 u16 command_pos;
519
520 u16 major_version;
521 u16 minor_version;
522
523 u16 func_ctrl;
524 u16 mac_status;
525 u16 generic_IRQ_type;
526 u8 reserved[2];
527 } host_info;
528
529 enum {
530 STATION_STATE_SCANNING,
531 STATION_STATE_JOINNING,
532 STATION_STATE_AUTHENTICATING,
533 STATION_STATE_ASSOCIATING,
534 STATION_STATE_READY,
535 STATION_STATE_REASSOCIATING,
536 STATION_STATE_DOWN,
537 STATION_STATE_MGMT_ERROR
538 } station_state;
539
540 int operating_mode, power_mode;
541 time_t last_qual;
542 int beacons_this_sec;
543 int channel;
544 int reg_domain, config_reg_domain;
545 int tx_rate;
546 int auto_tx_rate;
547 int rts_threshold;
548 int frag_threshold;
549 int long_retry, short_retry;
550 int preamble;
551 int default_beacon_period, beacon_period, listen_interval;
552 int CurrentAuthentTransactionSeqNum, ExpectedAuthentTransactionSeqNum;
553 int AuthenticationRequestRetryCnt, AssociationRequestRetryCnt, ReAssociationRequestRetryCnt;
554 enum {
555 SITE_SURVEY_IDLE,
556 SITE_SURVEY_IN_PROGRESS,
557 SITE_SURVEY_COMPLETED
558 } site_survey_state;
559 time_t last_survey;
560
561 int station_was_associated, station_is_associated;
562 int fast_scan;
563
564 struct bss_info {
565 int channel;
566 int SSIDsize;
567 int RSSI;
568 int UsingWEP;
569 int preamble;
570 int beacon_period;
571 int BSStype;
572 u8 BSSID[6];
573 u8 SSID[MAX_SSID_LENGTH];
574 } BSSinfo[MAX_BSS_ENTRIES];
575 int BSS_list_entries, current_BSS;
576 int connect_to_any_BSS;
577 int SSID_size, new_SSID_size;
578 u8 CurrentBSSID[6], BSSID[6];
579 u8 SSID[MAX_SSID_LENGTH], new_SSID[MAX_SSID_LENGTH];
580 u64 last_beacon_timestamp;
581 u8 rx_buf[MAX_WIRELESS_BODY];
582 };
583
584 static u8 atmel_basic_rates[4] = {0x82,0x84,0x0b,0x16};
585
586 static const struct {
587 int reg_domain;
588 int min, max;
589 char *name;
590 } channel_table[] = { { REG_DOMAIN_FCC, 1, 11, "USA" },
591 { REG_DOMAIN_DOC, 1, 11, "Canada" },
592 { REG_DOMAIN_ETSI, 1, 13, "Europe" },
593 { REG_DOMAIN_SPAIN, 10, 11, "Spain" },
594 { REG_DOMAIN_FRANCE, 10, 13, "France" },
595 { REG_DOMAIN_MKK, 14, 14, "MKK" },
596 { REG_DOMAIN_MKK1, 1, 14, "MKK1" },
597 { REG_DOMAIN_ISRAEL, 3, 9, "Israel"} };
598
599 static void build_wpa_mib(struct atmel_private *priv);
600 static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
601 static void atmel_copy_to_card(struct net_device *dev, u16 dest,
602 unsigned char *src, u16 len);
603 static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
604 u16 src, u16 len);
605 static void atmel_set_gcr(struct net_device *dev, u16 mask);
606 static void atmel_clear_gcr(struct net_device *dev, u16 mask);
607 static int atmel_lock_mac(struct atmel_private *priv);
608 static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data);
609 static void atmel_command_irq(struct atmel_private *priv);
610 static int atmel_validate_channel(struct atmel_private *priv, int channel);
611 static void atmel_management_frame(struct atmel_private *priv,
612 struct ieee80211_hdr_4addr *header,
613 u16 frame_len, u8 rssi);
614 static void atmel_management_timer(u_long a);
615 static void atmel_send_command(struct atmel_private *priv, int command,
616 void *cmd, int cmd_size);
617 static int atmel_send_command_wait(struct atmel_private *priv, int command,
618 void *cmd, int cmd_size);
619 static void atmel_transmit_management_frame(struct atmel_private *priv,
620 struct ieee80211_hdr_4addr *header,
621 u8 *body, int body_len);
622
623 static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index);
624 static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index,
625 u8 data);
626 static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
627 u16 data);
628 static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
629 u8 *data, int data_len);
630 static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
631 u8 *data, int data_len);
632 static void atmel_scan(struct atmel_private *priv, int specific_ssid);
633 static void atmel_join_bss(struct atmel_private *priv, int bss_index);
634 static void atmel_smooth_qual(struct atmel_private *priv);
635 static void atmel_writeAR(struct net_device *dev, u16 data);
636 static int probe_atmel_card(struct net_device *dev);
637 static int reset_atmel_card(struct net_device *dev );
638 static void atmel_enter_state(struct atmel_private *priv, int new_state);
639 int atmel_open (struct net_device *dev);
640
641 static inline u16 atmel_hi(struct atmel_private *priv, u16 offset)
642 {
643 return priv->host_info_base + offset;
644 }
645
646 static inline u16 atmel_co(struct atmel_private *priv, u16 offset)
647 {
648 return priv->host_info.command_pos + offset;
649 }
650
651 static inline u16 atmel_rx(struct atmel_private *priv, u16 offset, u16 desc)
652 {
653 return priv->host_info.rx_desc_pos + (sizeof(struct rx_desc) * desc) + offset;
654 }
655
656 static inline u16 atmel_tx(struct atmel_private *priv, u16 offset, u16 desc)
657 {
658 return priv->host_info.tx_desc_pos + (sizeof(struct tx_desc) * desc) + offset;
659 }
660
661 static inline u8 atmel_read8(struct net_device *dev, u16 offset)
662 {
663 return inb(dev->base_addr + offset);
664 }
665
666 static inline void atmel_write8(struct net_device *dev, u16 offset, u8 data)
667 {
668 outb(data, dev->base_addr + offset);
669 }
670
671 static inline u16 atmel_read16(struct net_device *dev, u16 offset)
672 {
673 return inw(dev->base_addr + offset);
674 }
675
676 static inline void atmel_write16(struct net_device *dev, u16 offset, u16 data)
677 {
678 outw(data, dev->base_addr + offset);
679 }
680
681 static inline u8 atmel_rmem8(struct atmel_private *priv, u16 pos)
682 {
683 atmel_writeAR(priv->dev, pos);
684 return atmel_read8(priv->dev, DR);
685 }
686
687 static inline void atmel_wmem8(struct atmel_private *priv, u16 pos, u16 data)
688 {
689 atmel_writeAR(priv->dev, pos);
690 atmel_write8(priv->dev, DR, data);
691 }
692
693 static inline u16 atmel_rmem16(struct atmel_private *priv, u16 pos)
694 {
695 atmel_writeAR(priv->dev, pos);
696 return atmel_read16(priv->dev, DR);
697 }
698
699 static inline void atmel_wmem16(struct atmel_private *priv, u16 pos, u16 data)
700 {
701 atmel_writeAR(priv->dev, pos);
702 atmel_write16(priv->dev, DR, data);
703 }
704
705 static const struct iw_handler_def atmel_handler_def;
706
707 static void tx_done_irq(struct atmel_private *priv)
708 {
709 int i;
710
711 for (i = 0;
712 atmel_rmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head)) == TX_DONE &&
713 i < priv->host_info.tx_desc_count;
714 i++) {
715 u8 status = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_STATUS_OFFSET, priv->tx_desc_head));
716 u16 msdu_size = atmel_rmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_head));
717 u8 type = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_head));
718
719 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head), 0);
720
721 priv->tx_free_mem += msdu_size;
722 priv->tx_desc_free++;
723
724 if (priv->tx_buff_head + msdu_size > (priv->host_info.tx_buff_pos + priv->host_info.tx_buff_size))
725 priv->tx_buff_head = 0;
726 else
727 priv->tx_buff_head += msdu_size;
728
729 if (priv->tx_desc_head < (priv->host_info.tx_desc_count - 1))
730 priv->tx_desc_head++ ;
731 else
732 priv->tx_desc_head = 0;
733
734 if (type == TX_PACKET_TYPE_DATA) {
735 if (status == TX_STATUS_SUCCESS)
736 priv->stats.tx_packets++;
737 else
738 priv->stats.tx_errors++;
739 netif_wake_queue(priv->dev);
740 }
741 }
742 }
743
744 static u16 find_tx_buff(struct atmel_private *priv, u16 len)
745 {
746 u16 bottom_free = priv->host_info.tx_buff_size - priv->tx_buff_tail;
747
748 if (priv->tx_desc_free == 3 || priv->tx_free_mem < len)
749 return 0;
750
751 if (bottom_free >= len)
752 return priv->host_info.tx_buff_pos + priv->tx_buff_tail;
753
754 if (priv->tx_free_mem - bottom_free >= len) {
755 priv->tx_buff_tail = 0;
756 return priv->host_info.tx_buff_pos;
757 }
758
759 return 0;
760 }
761
762 static void tx_update_descriptor(struct atmel_private *priv, int is_bcast,
763 u16 len, u16 buff, u8 type)
764 {
765 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, priv->tx_desc_tail), buff);
766 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_tail), len);
767 if (!priv->use_wpa)
768 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_HOST_LENGTH_OFFSET, priv->tx_desc_tail), len);
769 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_tail), type);
770 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RATE_OFFSET, priv->tx_desc_tail), priv->tx_rate);
771 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RETRY_OFFSET, priv->tx_desc_tail), 0);
772 if (priv->use_wpa) {
773 int cipher_type, cipher_length;
774 if (is_bcast) {
775 cipher_type = priv->group_cipher_suite;
776 if (cipher_type == CIPHER_SUITE_WEP_64 ||
777 cipher_type == CIPHER_SUITE_WEP_128)
778 cipher_length = 8;
779 else if (cipher_type == CIPHER_SUITE_TKIP)
780 cipher_length = 12;
781 else if (priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_64 ||
782 priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_128) {
783 cipher_type = priv->pairwise_cipher_suite;
784 cipher_length = 8;
785 } else {
786 cipher_type = CIPHER_SUITE_NONE;
787 cipher_length = 0;
788 }
789 } else {
790 cipher_type = priv->pairwise_cipher_suite;
791 if (cipher_type == CIPHER_SUITE_WEP_64 ||
792 cipher_type == CIPHER_SUITE_WEP_128)
793 cipher_length = 8;
794 else if (cipher_type == CIPHER_SUITE_TKIP)
795 cipher_length = 12;
796 else if (priv->group_cipher_suite == CIPHER_SUITE_WEP_64 ||
797 priv->group_cipher_suite == CIPHER_SUITE_WEP_128) {
798 cipher_type = priv->group_cipher_suite;
799 cipher_length = 8;
800 } else {
801 cipher_type = CIPHER_SUITE_NONE;
802 cipher_length = 0;
803 }
804 }
805
806 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_TYPE_OFFSET, priv->tx_desc_tail),
807 cipher_type);
808 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_LENGTH_OFFSET, priv->tx_desc_tail),
809 cipher_length);
810 }
811 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_tail), 0x80000000L);
812 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_tail), TX_FIRM_OWN);
813 if (priv->tx_desc_previous != priv->tx_desc_tail)
814 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_previous), 0);
815 priv->tx_desc_previous = priv->tx_desc_tail;
816 if (priv->tx_desc_tail < (priv->host_info.tx_desc_count - 1))
817 priv->tx_desc_tail++;
818 else
819 priv->tx_desc_tail = 0;
820 priv->tx_desc_free--;
821 priv->tx_free_mem -= len;
822 }
823
824 static int start_tx(struct sk_buff *skb, struct net_device *dev)
825 {
826 struct atmel_private *priv = netdev_priv(dev);
827 struct ieee80211_hdr_4addr header;
828 unsigned long flags;
829 u16 buff, frame_ctl, len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
830 u8 SNAP_RFC1024[6] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00};
831
832 if (priv->card && priv->present_callback &&
833 !(*priv->present_callback)(priv->card)) {
834 priv->stats.tx_errors++;
835 dev_kfree_skb(skb);
836 return 0;
837 }
838
839 if (priv->station_state != STATION_STATE_READY) {
840 priv->stats.tx_errors++;
841 dev_kfree_skb(skb);
842 return 0;
843 }
844
845 /* first ensure the timer func cannot run */
846 spin_lock_bh(&priv->timerlock);
847 /* then stop the hardware ISR */
848 spin_lock_irqsave(&priv->irqlock, flags);
849 /* nb doing the above in the opposite order will deadlock */
850
851 /* The Wireless Header is 30 bytes. In the Ethernet packet we "cut" the
852 12 first bytes (containing DA/SA) and put them in the appropriate
853 fields of the Wireless Header. Thus the packet length is then the
854 initial + 18 (+30-12) */
855
856 if (!(buff = find_tx_buff(priv, len + 18))) {
857 priv->stats.tx_dropped++;
858 spin_unlock_irqrestore(&priv->irqlock, flags);
859 spin_unlock_bh(&priv->timerlock);
860 netif_stop_queue(dev);
861 return 1;
862 }
863
864 frame_ctl = IEEE80211_FTYPE_DATA;
865 header.duration_id = 0;
866 header.seq_ctl = 0;
867 if (priv->wep_is_on)
868 frame_ctl |= IEEE80211_FCTL_PROTECTED;
869 if (priv->operating_mode == IW_MODE_ADHOC) {
870 memcpy(&header.addr1, skb->data, 6);
871 memcpy(&header.addr2, dev->dev_addr, 6);
872 memcpy(&header.addr3, priv->BSSID, 6);
873 } else {
874 frame_ctl |= IEEE80211_FCTL_TODS;
875 memcpy(&header.addr1, priv->CurrentBSSID, 6);
876 memcpy(&header.addr2, dev->dev_addr, 6);
877 memcpy(&header.addr3, skb->data, 6);
878 }
879
880 if (priv->use_wpa)
881 memcpy(&header.addr4, SNAP_RFC1024, 6);
882
883 header.frame_ctl = cpu_to_le16(frame_ctl);
884 /* Copy the wireless header into the card */
885 atmel_copy_to_card(dev, buff, (unsigned char *)&header, DATA_FRAME_WS_HEADER_SIZE);
886 /* Copy the packet sans its 802.3 header addresses which have been replaced */
887 atmel_copy_to_card(dev, buff + DATA_FRAME_WS_HEADER_SIZE, skb->data + 12, len - 12);
888 priv->tx_buff_tail += len - 12 + DATA_FRAME_WS_HEADER_SIZE;
889
890 /* low bit of first byte of destination tells us if broadcast */
891 tx_update_descriptor(priv, *(skb->data) & 0x01, len + 18, buff, TX_PACKET_TYPE_DATA);
892 dev->trans_start = jiffies;
893 priv->stats.tx_bytes += len;
894
895 spin_unlock_irqrestore(&priv->irqlock, flags);
896 spin_unlock_bh(&priv->timerlock);
897 dev_kfree_skb(skb);
898
899 return 0;
900 }
901
902 static void atmel_transmit_management_frame(struct atmel_private *priv,
903 struct ieee80211_hdr_4addr *header,
904 u8 *body, int body_len)
905 {
906 u16 buff;
907 int len = MGMT_FRAME_BODY_OFFSET + body_len;
908
909 if (!(buff = find_tx_buff(priv, len)))
910 return;
911
912 atmel_copy_to_card(priv->dev, buff, (u8 *)header, MGMT_FRAME_BODY_OFFSET);
913 atmel_copy_to_card(priv->dev, buff + MGMT_FRAME_BODY_OFFSET, body, body_len);
914 priv->tx_buff_tail += len;
915 tx_update_descriptor(priv, header->addr1[0] & 0x01, len, buff, TX_PACKET_TYPE_MGMT);
916 }
917
918 static void fast_rx_path(struct atmel_private *priv,
919 struct ieee80211_hdr_4addr *header,
920 u16 msdu_size, u16 rx_packet_loc, u32 crc)
921 {
922 /* fast path: unfragmented packet copy directly into skbuf */
923 u8 mac4[6];
924 struct sk_buff *skb;
925 unsigned char *skbp;
926
927 /* get the final, mac 4 header field, this tells us encapsulation */
928 atmel_copy_to_host(priv->dev, mac4, rx_packet_loc + 24, 6);
929 msdu_size -= 6;
930
931 if (priv->do_rx_crc) {
932 crc = crc32_le(crc, mac4, 6);
933 msdu_size -= 4;
934 }
935
936 if (!(skb = dev_alloc_skb(msdu_size + 14))) {
937 priv->stats.rx_dropped++;
938 return;
939 }
940
941 skb_reserve(skb, 2);
942 skbp = skb_put(skb, msdu_size + 12);
943 atmel_copy_to_host(priv->dev, skbp + 12, rx_packet_loc + 30, msdu_size);
944
945 if (priv->do_rx_crc) {
946 u32 netcrc;
947 crc = crc32_le(crc, skbp + 12, msdu_size);
948 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + 30 + msdu_size, 4);
949 if ((crc ^ 0xffffffff) != netcrc) {
950 priv->stats.rx_crc_errors++;
951 dev_kfree_skb(skb);
952 return;
953 }
954 }
955
956 memcpy(skbp, header->addr1, 6); /* destination address */
957 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
958 memcpy(&skbp[6], header->addr3, 6);
959 else
960 memcpy(&skbp[6], header->addr2, 6); /* source address */
961
962 priv->dev->last_rx = jiffies;
963 skb->dev = priv->dev;
964 skb->protocol = eth_type_trans(skb, priv->dev);
965 skb->ip_summed = CHECKSUM_NONE;
966 netif_rx(skb);
967 priv->stats.rx_bytes += 12 + msdu_size;
968 priv->stats.rx_packets++;
969 }
970
971 /* Test to see if the packet in card memory at packet_loc has a valid CRC
972 It doesn't matter that this is slow: it is only used to proble the first few
973 packets. */
974 static int probe_crc(struct atmel_private *priv, u16 packet_loc, u16 msdu_size)
975 {
976 int i = msdu_size - 4;
977 u32 netcrc, crc = 0xffffffff;
978
979 if (msdu_size < 4)
980 return 0;
981
982 atmel_copy_to_host(priv->dev, (void *)&netcrc, packet_loc + i, 4);
983
984 atmel_writeAR(priv->dev, packet_loc);
985 while (i--) {
986 u8 octet = atmel_read8(priv->dev, DR);
987 crc = crc32_le(crc, &octet, 1);
988 }
989
990 return (crc ^ 0xffffffff) == netcrc;
991 }
992
993 static void frag_rx_path(struct atmel_private *priv,
994 struct ieee80211_hdr_4addr *header,
995 u16 msdu_size, u16 rx_packet_loc, u32 crc, u16 seq_no,
996 u8 frag_no, int more_frags)
997 {
998 u8 mac4[6];
999 u8 source[6];
1000 struct sk_buff *skb;
1001
1002 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
1003 memcpy(source, header->addr3, 6);
1004 else
1005 memcpy(source, header->addr2, 6);
1006
1007 rx_packet_loc += 24; /* skip header */
1008
1009 if (priv->do_rx_crc)
1010 msdu_size -= 4;
1011
1012 if (frag_no == 0) { /* first fragment */
1013 atmel_copy_to_host(priv->dev, mac4, rx_packet_loc, 6);
1014 msdu_size -= 6;
1015 rx_packet_loc += 6;
1016
1017 if (priv->do_rx_crc)
1018 crc = crc32_le(crc, mac4, 6);
1019
1020 priv->frag_seq = seq_no;
1021 priv->frag_no = 1;
1022 priv->frag_len = msdu_size;
1023 memcpy(priv->frag_source, source, 6);
1024 memcpy(&priv->rx_buf[6], source, 6);
1025 memcpy(priv->rx_buf, header->addr1, 6);
1026
1027 atmel_copy_to_host(priv->dev, &priv->rx_buf[12], rx_packet_loc, msdu_size);
1028
1029 if (priv->do_rx_crc) {
1030 u32 netcrc;
1031 crc = crc32_le(crc, &priv->rx_buf[12], msdu_size);
1032 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
1033 if ((crc ^ 0xffffffff) != netcrc) {
1034 priv->stats.rx_crc_errors++;
1035 memset(priv->frag_source, 0xff, 6);
1036 }
1037 }
1038
1039 } else if (priv->frag_no == frag_no &&
1040 priv->frag_seq == seq_no &&
1041 memcmp(priv->frag_source, source, 6) == 0) {
1042
1043 atmel_copy_to_host(priv->dev, &priv->rx_buf[12 + priv->frag_len],
1044 rx_packet_loc, msdu_size);
1045 if (priv->do_rx_crc) {
1046 u32 netcrc;
1047 crc = crc32_le(crc,
1048 &priv->rx_buf[12 + priv->frag_len],
1049 msdu_size);
1050 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
1051 if ((crc ^ 0xffffffff) != netcrc) {
1052 priv->stats.rx_crc_errors++;
1053 memset(priv->frag_source, 0xff, 6);
1054 more_frags = 1; /* don't send broken assembly */
1055 }
1056 }
1057
1058 priv->frag_len += msdu_size;
1059 priv->frag_no++;
1060
1061 if (!more_frags) { /* last one */
1062 memset(priv->frag_source, 0xff, 6);
1063 if (!(skb = dev_alloc_skb(priv->frag_len + 14))) {
1064 priv->stats.rx_dropped++;
1065 } else {
1066 skb_reserve(skb, 2);
1067 memcpy(skb_put(skb, priv->frag_len + 12),
1068 priv->rx_buf,
1069 priv->frag_len + 12);
1070 priv->dev->last_rx = jiffies;
1071 skb->dev = priv->dev;
1072 skb->protocol = eth_type_trans(skb, priv->dev);
1073 skb->ip_summed = CHECKSUM_NONE;
1074 netif_rx(skb);
1075 priv->stats.rx_bytes += priv->frag_len + 12;
1076 priv->stats.rx_packets++;
1077 }
1078 }
1079 } else
1080 priv->wstats.discard.fragment++;
1081 }
1082
1083 static void rx_done_irq(struct atmel_private *priv)
1084 {
1085 int i;
1086 struct ieee80211_hdr_4addr header;
1087
1088 for (i = 0;
1089 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head)) == RX_DESC_FLAG_VALID &&
1090 i < priv->host_info.rx_desc_count;
1091 i++) {
1092
1093 u16 msdu_size, rx_packet_loc, frame_ctl, seq_control;
1094 u8 status = atmel_rmem8(priv, atmel_rx(priv, RX_DESC_STATUS_OFFSET, priv->rx_desc_head));
1095 u32 crc = 0xffffffff;
1096
1097 if (status != RX_STATUS_SUCCESS) {
1098 if (status == 0xc1) /* determined by experiment */
1099 priv->wstats.discard.nwid++;
1100 else
1101 priv->stats.rx_errors++;
1102 goto next;
1103 }
1104
1105 msdu_size = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_SIZE_OFFSET, priv->rx_desc_head));
1106 rx_packet_loc = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_POS_OFFSET, priv->rx_desc_head));
1107
1108 if (msdu_size < 30) {
1109 priv->stats.rx_errors++;
1110 goto next;
1111 }
1112
1113 /* Get header as far as end of seq_ctl */
1114 atmel_copy_to_host(priv->dev, (char *)&header, rx_packet_loc, 24);
1115 frame_ctl = le16_to_cpu(header.frame_ctl);
1116 seq_control = le16_to_cpu(header.seq_ctl);
1117
1118 /* probe for CRC use here if needed once five packets have
1119 arrived with the same crc status, we assume we know what's
1120 happening and stop probing */
1121 if (priv->probe_crc) {
1122 if (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED)) {
1123 priv->do_rx_crc = probe_crc(priv, rx_packet_loc, msdu_size);
1124 } else {
1125 priv->do_rx_crc = probe_crc(priv, rx_packet_loc + 24, msdu_size - 24);
1126 }
1127 if (priv->do_rx_crc) {
1128 if (priv->crc_ok_cnt++ > 5)
1129 priv->probe_crc = 0;
1130 } else {
1131 if (priv->crc_ko_cnt++ > 5)
1132 priv->probe_crc = 0;
1133 }
1134 }
1135
1136 /* don't CRC header when WEP in use */
1137 if (priv->do_rx_crc && (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED))) {
1138 crc = crc32_le(0xffffffff, (unsigned char *)&header, 24);
1139 }
1140 msdu_size -= 24; /* header */
1141
1142 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) {
1143 int more_fragments = frame_ctl & IEEE80211_FCTL_MOREFRAGS;
1144 u8 packet_fragment_no = seq_control & IEEE80211_SCTL_FRAG;
1145 u16 packet_sequence_no = (seq_control & IEEE80211_SCTL_SEQ) >> 4;
1146
1147 if (!more_fragments && packet_fragment_no == 0) {
1148 fast_rx_path(priv, &header, msdu_size, rx_packet_loc, crc);
1149 } else {
1150 frag_rx_path(priv, &header, msdu_size, rx_packet_loc, crc,
1151 packet_sequence_no, packet_fragment_no, more_fragments);
1152 }
1153 }
1154
1155 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1156 /* copy rest of packet into buffer */
1157 atmel_copy_to_host(priv->dev, (unsigned char *)&priv->rx_buf, rx_packet_loc + 24, msdu_size);
1158
1159 /* we use the same buffer for frag reassembly and control packets */
1160 memset(priv->frag_source, 0xff, 6);
1161
1162 if (priv->do_rx_crc) {
1163 /* last 4 octets is crc */
1164 msdu_size -= 4;
1165 crc = crc32_le(crc, (unsigned char *)&priv->rx_buf, msdu_size);
1166 if ((crc ^ 0xffffffff) != (*((u32 *)&priv->rx_buf[msdu_size]))) {
1167 priv->stats.rx_crc_errors++;
1168 goto next;
1169 }
1170 }
1171
1172 atmel_management_frame(priv, &header, msdu_size,
1173 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_RSSI_OFFSET, priv->rx_desc_head)));
1174 }
1175
1176 next:
1177 /* release descriptor */
1178 atmel_wmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head), RX_DESC_FLAG_CONSUMED);
1179
1180 if (priv->rx_desc_head < (priv->host_info.rx_desc_count - 1))
1181 priv->rx_desc_head++;
1182 else
1183 priv->rx_desc_head = 0;
1184 }
1185 }
1186
1187 static irqreturn_t service_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1188 {
1189 struct net_device *dev = (struct net_device *) dev_id;
1190 struct atmel_private *priv = netdev_priv(dev);
1191 u8 isr;
1192 int i = -1;
1193 static u8 irq_order[] = {
1194 ISR_OUT_OF_RANGE,
1195 ISR_RxCOMPLETE,
1196 ISR_TxCOMPLETE,
1197 ISR_RxFRAMELOST,
1198 ISR_FATAL_ERROR,
1199 ISR_COMMAND_COMPLETE,
1200 ISR_IBSS_MERGE,
1201 ISR_GENERIC_IRQ
1202 };
1203
1204 if (priv->card && priv->present_callback &&
1205 !(*priv->present_callback)(priv->card))
1206 return IRQ_HANDLED;
1207
1208 /* In this state upper-level code assumes it can mess with
1209 the card unhampered by interrupts which may change register state.
1210 Note that even though the card shouldn't generate interrupts
1211 the inturrupt line may be shared. This allows card setup
1212 to go on without disabling interrupts for a long time. */
1213 if (priv->station_state == STATION_STATE_DOWN)
1214 return IRQ_NONE;
1215
1216 atmel_clear_gcr(dev, GCR_ENINT); /* disable interrupts */
1217
1218 while (1) {
1219 if (!atmel_lock_mac(priv)) {
1220 /* failed to contact card */
1221 printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1222 return IRQ_HANDLED;
1223 }
1224
1225 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1226 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
1227
1228 if (!isr) {
1229 atmel_set_gcr(dev, GCR_ENINT); /* enable interrupts */
1230 return i == -1 ? IRQ_NONE : IRQ_HANDLED;
1231 }
1232
1233 atmel_set_gcr(dev, GCR_ACKINT); /* acknowledge interrupt */
1234
1235 for (i = 0; i < sizeof(irq_order)/sizeof(u8); i++)
1236 if (isr & irq_order[i])
1237 break;
1238
1239 if (!atmel_lock_mac(priv)) {
1240 /* failed to contact card */
1241 printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1242 return IRQ_HANDLED;
1243 }
1244
1245 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1246 isr ^= irq_order[i];
1247 atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET), isr);
1248 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
1249
1250 switch (irq_order[i]) {
1251
1252 case ISR_OUT_OF_RANGE:
1253 if (priv->operating_mode == IW_MODE_INFRA &&
1254 priv->station_state == STATION_STATE_READY) {
1255 priv->station_is_associated = 0;
1256 atmel_scan(priv, 1);
1257 }
1258 break;
1259
1260 case ISR_RxFRAMELOST:
1261 priv->wstats.discard.misc++;
1262 /* fall through */
1263 case ISR_RxCOMPLETE:
1264 rx_done_irq(priv);
1265 break;
1266
1267 case ISR_TxCOMPLETE:
1268 tx_done_irq(priv);
1269 break;
1270
1271 case ISR_FATAL_ERROR:
1272 printk(KERN_ALERT "%s: *** FATAL error interrupt ***\n", dev->name);
1273 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
1274 break;
1275
1276 case ISR_COMMAND_COMPLETE:
1277 atmel_command_irq(priv);
1278 break;
1279
1280 case ISR_IBSS_MERGE:
1281 atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
1282 priv->CurrentBSSID, 6);
1283 /* The WPA stuff cares about the current AP address */
1284 if (priv->use_wpa)
1285 build_wpa_mib(priv);
1286 break;
1287 case ISR_GENERIC_IRQ:
1288 printk(KERN_INFO "%s: Generic_irq received.\n", dev->name);
1289 break;
1290 }
1291 }
1292 }
1293
1294 static struct net_device_stats *atmel_get_stats(struct net_device *dev)
1295 {
1296 struct atmel_private *priv = netdev_priv(dev);
1297 return &priv->stats;
1298 }
1299
1300 static struct iw_statistics *atmel_get_wireless_stats(struct net_device *dev)
1301 {
1302 struct atmel_private *priv = netdev_priv(dev);
1303
1304 /* update the link quality here in case we are seeing no beacons
1305 at all to drive the process */
1306 atmel_smooth_qual(priv);
1307
1308 priv->wstats.status = priv->station_state;
1309
1310 if (priv->operating_mode == IW_MODE_INFRA) {
1311 if (priv->station_state != STATION_STATE_READY) {
1312 priv->wstats.qual.qual = 0;
1313 priv->wstats.qual.level = 0;
1314 priv->wstats.qual.updated = (IW_QUAL_QUAL_INVALID
1315 | IW_QUAL_LEVEL_INVALID);
1316 }
1317 priv->wstats.qual.noise = 0;
1318 priv->wstats.qual.updated |= IW_QUAL_NOISE_INVALID;
1319 } else {
1320 /* Quality levels cannot be determined in ad-hoc mode,
1321 because we can 'hear' more that one remote station. */
1322 priv->wstats.qual.qual = 0;
1323 priv->wstats.qual.level = 0;
1324 priv->wstats.qual.noise = 0;
1325 priv->wstats.qual.updated = IW_QUAL_QUAL_INVALID
1326 | IW_QUAL_LEVEL_INVALID
1327 | IW_QUAL_NOISE_INVALID;
1328 priv->wstats.miss.beacon = 0;
1329 }
1330
1331 return &priv->wstats;
1332 }
1333
1334 static int atmel_change_mtu(struct net_device *dev, int new_mtu)
1335 {
1336 if ((new_mtu < 68) || (new_mtu > 2312))
1337 return -EINVAL;
1338 dev->mtu = new_mtu;
1339 return 0;
1340 }
1341
1342 static int atmel_set_mac_address(struct net_device *dev, void *p)
1343 {
1344 struct sockaddr *addr = p;
1345
1346 memcpy (dev->dev_addr, addr->sa_data, dev->addr_len);
1347 return atmel_open(dev);
1348 }
1349
1350 EXPORT_SYMBOL(atmel_open);
1351
1352 int atmel_open(struct net_device *dev)
1353 {
1354 struct atmel_private *priv = netdev_priv(dev);
1355 int i, channel;
1356
1357 /* any scheduled timer is no longer needed and might screw things up.. */
1358 del_timer_sync(&priv->management_timer);
1359
1360 /* Interrupts will not touch the card once in this state... */
1361 priv->station_state = STATION_STATE_DOWN;
1362
1363 if (priv->new_SSID_size) {
1364 memcpy(priv->SSID, priv->new_SSID, priv->new_SSID_size);
1365 priv->SSID_size = priv->new_SSID_size;
1366 priv->new_SSID_size = 0;
1367 }
1368 priv->BSS_list_entries = 0;
1369
1370 priv->AuthenticationRequestRetryCnt = 0;
1371 priv->AssociationRequestRetryCnt = 0;
1372 priv->ReAssociationRequestRetryCnt = 0;
1373 priv->CurrentAuthentTransactionSeqNum = 0x0001;
1374 priv->ExpectedAuthentTransactionSeqNum = 0x0002;
1375
1376 priv->site_survey_state = SITE_SURVEY_IDLE;
1377 priv->station_is_associated = 0;
1378
1379 if (!reset_atmel_card(dev))
1380 return -EAGAIN;
1381
1382 if (priv->config_reg_domain) {
1383 priv->reg_domain = priv->config_reg_domain;
1384 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS, priv->reg_domain);
1385 } else {
1386 priv->reg_domain = atmel_get_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS);
1387 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++)
1388 if (priv->reg_domain == channel_table[i].reg_domain)
1389 break;
1390 if (i == sizeof(channel_table)/sizeof(channel_table[0])) {
1391 priv->reg_domain = REG_DOMAIN_MKK1;
1392 printk(KERN_ALERT "%s: failed to get regulatory domain: assuming MKK1.\n", dev->name);
1393 }
1394 }
1395
1396 if ((channel = atmel_validate_channel(priv, priv->channel)))
1397 priv->channel = channel;
1398
1399 /* this moves station_state on.... */
1400 atmel_scan(priv, 1);
1401
1402 atmel_set_gcr(priv->dev, GCR_ENINT); /* enable interrupts */
1403 return 0;
1404 }
1405
1406 static int atmel_close(struct net_device *dev)
1407 {
1408 struct atmel_private *priv = netdev_priv(dev);
1409
1410 /* Send event to userspace that we are disassociating */
1411 if (priv->station_state == STATION_STATE_READY) {
1412 union iwreq_data wrqu;
1413
1414 wrqu.data.length = 0;
1415 wrqu.data.flags = 0;
1416 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
1417 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
1418 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
1419 }
1420
1421 atmel_enter_state(priv, STATION_STATE_DOWN);
1422
1423 if (priv->bus_type == BUS_TYPE_PCCARD)
1424 atmel_write16(dev, GCR, 0x0060);
1425 atmel_write16(dev, GCR, 0x0040);
1426 return 0;
1427 }
1428
1429 static int atmel_validate_channel(struct atmel_private *priv, int channel)
1430 {
1431 /* check that channel is OK, if so return zero,
1432 else return suitable default channel */
1433 int i;
1434
1435 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++)
1436 if (priv->reg_domain == channel_table[i].reg_domain) {
1437 if (channel >= channel_table[i].min &&
1438 channel <= channel_table[i].max)
1439 return 0;
1440 else
1441 return channel_table[i].min;
1442 }
1443 return 0;
1444 }
1445
1446 static int atmel_proc_output (char *buf, struct atmel_private *priv)
1447 {
1448 int i;
1449 char *p = buf;
1450 char *s, *r, *c;
1451
1452 p += sprintf(p, "Driver version:\t\t%d.%d\n",
1453 DRIVER_MAJOR, DRIVER_MINOR);
1454
1455 if (priv->station_state != STATION_STATE_DOWN) {
1456 p += sprintf(p, "Firmware version:\t%d.%d build %d\n"
1457 "Firmware location:\t",
1458 priv->host_info.major_version,
1459 priv->host_info.minor_version,
1460 priv->host_info.build_version);
1461
1462 if (priv->card_type != CARD_TYPE_EEPROM)
1463 p += sprintf(p, "on card\n");
1464 else if (priv->firmware)
1465 p += sprintf(p, "%s loaded by host\n",
1466 priv->firmware_id);
1467 else
1468 p += sprintf(p, "%s loaded by hotplug\n",
1469 priv->firmware_id);
1470
1471 switch (priv->card_type) {
1472 case CARD_TYPE_PARALLEL_FLASH: c = "Parallel flash"; break;
1473 case CARD_TYPE_SPI_FLASH: c = "SPI flash\n"; break;
1474 case CARD_TYPE_EEPROM: c = "EEPROM"; break;
1475 default: c = "<unknown>";
1476 }
1477
1478 r = "<unknown>";
1479 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++)
1480 if (priv->reg_domain == channel_table[i].reg_domain)
1481 r = channel_table[i].name;
1482
1483 p += sprintf(p, "MAC memory type:\t%s\n", c);
1484 p += sprintf(p, "Regulatory domain:\t%s\n", r);
1485 p += sprintf(p, "Host CRC checking:\t%s\n",
1486 priv->do_rx_crc ? "On" : "Off");
1487 p += sprintf(p, "WPA-capable firmware:\t%s\n",
1488 priv->use_wpa ? "Yes" : "No");
1489 }
1490
1491 switch(priv->station_state) {
1492 case STATION_STATE_SCANNING: s = "Scanning"; break;
1493 case STATION_STATE_JOINNING: s = "Joining"; break;
1494 case STATION_STATE_AUTHENTICATING: s = "Authenticating"; break;
1495 case STATION_STATE_ASSOCIATING: s = "Associating"; break;
1496 case STATION_STATE_READY: s = "Ready"; break;
1497 case STATION_STATE_REASSOCIATING: s = "Reassociating"; break;
1498 case STATION_STATE_MGMT_ERROR: s = "Management error"; break;
1499 case STATION_STATE_DOWN: s = "Down"; break;
1500 default: s = "<unknown>";
1501 }
1502
1503 p += sprintf(p, "Current state:\t\t%s\n", s);
1504 return p - buf;
1505 }
1506
1507 static int atmel_read_proc(char *page, char **start, off_t off,
1508 int count, int *eof, void *data)
1509 {
1510 struct atmel_private *priv = data;
1511 int len = atmel_proc_output (page, priv);
1512 if (len <= off+count) *eof = 1;
1513 *start = page + off;
1514 len -= off;
1515 if (len>count) len = count;
1516 if (len<0) len = 0;
1517 return len;
1518 }
1519
1520 struct net_device *init_atmel_card(unsigned short irq, unsigned long port,
1521 const AtmelFWType fw_type,
1522 struct device *sys_dev,
1523 int (*card_present)(void *), void *card)
1524 {
1525 struct proc_dir_entry *ent;
1526 struct net_device *dev;
1527 struct atmel_private *priv;
1528 int rc;
1529
1530 /* Create the network device object. */
1531 dev = alloc_etherdev(sizeof(*priv));
1532 if (!dev) {
1533 printk(KERN_ERR "atmel: Couldn't alloc_etherdev\n");
1534 return NULL;
1535 }
1536 if (dev_alloc_name(dev, dev->name) < 0) {
1537 printk(KERN_ERR "atmel: Couldn't get name!\n");
1538 goto err_out_free;
1539 }
1540
1541 priv = netdev_priv(dev);
1542 priv->dev = dev;
1543 priv->sys_dev = sys_dev;
1544 priv->present_callback = card_present;
1545 priv->card = card;
1546 priv->firmware = NULL;
1547 priv->firmware_id[0] = '\0';
1548 priv->firmware_type = fw_type;
1549 if (firmware) /* module parameter */
1550 strcpy(priv->firmware_id, firmware);
1551 priv->bus_type = card_present ? BUS_TYPE_PCCARD : BUS_TYPE_PCI;
1552 priv->station_state = STATION_STATE_DOWN;
1553 priv->do_rx_crc = 0;
1554 /* For PCMCIA cards, some chips need CRC, some don't
1555 so we have to probe. */
1556 if (priv->bus_type == BUS_TYPE_PCCARD) {
1557 priv->probe_crc = 1;
1558 priv->crc_ok_cnt = priv->crc_ko_cnt = 0;
1559 } else
1560 priv->probe_crc = 0;
1561 memset(&priv->stats, 0, sizeof(priv->stats));
1562 memset(&priv->wstats, 0, sizeof(priv->wstats));
1563 priv->last_qual = jiffies;
1564 priv->last_beacon_timestamp = 0;
1565 memset(priv->frag_source, 0xff, sizeof(priv->frag_source));
1566 memset(priv->BSSID, 0, 6);
1567 priv->CurrentBSSID[0] = 0xFF; /* Initialize to something invalid.... */
1568 priv->station_was_associated = 0;
1569
1570 priv->last_survey = jiffies;
1571 priv->preamble = LONG_PREAMBLE;
1572 priv->operating_mode = IW_MODE_INFRA;
1573 priv->connect_to_any_BSS = 0;
1574 priv->config_reg_domain = 0;
1575 priv->reg_domain = 0;
1576 priv->tx_rate = 3;
1577 priv->auto_tx_rate = 1;
1578 priv->channel = 4;
1579 priv->power_mode = 0;
1580 priv->SSID[0] = '\0';
1581 priv->SSID_size = 0;
1582 priv->new_SSID_size = 0;
1583 priv->frag_threshold = 2346;
1584 priv->rts_threshold = 2347;
1585 priv->short_retry = 7;
1586 priv->long_retry = 4;
1587
1588 priv->wep_is_on = 0;
1589 priv->default_key = 0;
1590 priv->encryption_level = 0;
1591 priv->exclude_unencrypted = 0;
1592 priv->group_cipher_suite = priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1593 priv->use_wpa = 0;
1594 memset(priv->wep_keys, 0, sizeof(priv->wep_keys));
1595 memset(priv->wep_key_len, 0, sizeof(priv->wep_key_len));
1596
1597 priv->default_beacon_period = priv->beacon_period = 100;
1598 priv->listen_interval = 1;
1599
1600 init_timer(&priv->management_timer);
1601 spin_lock_init(&priv->irqlock);
1602 spin_lock_init(&priv->timerlock);
1603 priv->management_timer.function = atmel_management_timer;
1604 priv->management_timer.data = (unsigned long) dev;
1605
1606 dev->open = atmel_open;
1607 dev->stop = atmel_close;
1608 dev->change_mtu = atmel_change_mtu;
1609 dev->set_mac_address = atmel_set_mac_address;
1610 dev->hard_start_xmit = start_tx;
1611 dev->get_stats = atmel_get_stats;
1612 dev->wireless_handlers = (struct iw_handler_def *)&atmel_handler_def;
1613 dev->do_ioctl = atmel_ioctl;
1614 dev->irq = irq;
1615 dev->base_addr = port;
1616
1617 SET_NETDEV_DEV(dev, sys_dev);
1618
1619 if ((rc = request_irq(dev->irq, service_interrupt, SA_SHIRQ, dev->name, dev))) {
1620 printk(KERN_ERR "%s: register interrupt %d failed, rc %d\n", dev->name, irq, rc);
1621 goto err_out_free;
1622 }
1623
1624 if (!request_region(dev->base_addr, 32,
1625 priv->bus_type == BUS_TYPE_PCCARD ? "atmel_cs" : "atmel_pci")) {
1626 goto err_out_irq;
1627 }
1628
1629 if (register_netdev(dev))
1630 goto err_out_res;
1631
1632 if (!probe_atmel_card(dev)){
1633 unregister_netdev(dev);
1634 goto err_out_res;
1635 }
1636
1637 netif_carrier_off(dev);
1638
1639 ent = create_proc_read_entry ("driver/atmel", 0, NULL, atmel_read_proc, priv);
1640 if (!ent)
1641 printk(KERN_WARNING "atmel: unable to create /proc entry.\n");
1642
1643 printk(KERN_INFO "%s: Atmel at76c50x. Version %d.%d. MAC %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
1644 dev->name, DRIVER_MAJOR, DRIVER_MINOR,
1645 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1646 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5] );
1647
1648 SET_MODULE_OWNER(dev);
1649 return dev;
1650
1651 err_out_res:
1652 release_region( dev->base_addr, 32);
1653 err_out_irq:
1654 free_irq(dev->irq, dev);
1655 err_out_free:
1656 free_netdev(dev);
1657 return NULL;
1658 }
1659
1660 EXPORT_SYMBOL(init_atmel_card);
1661
1662 void stop_atmel_card(struct net_device *dev)
1663 {
1664 struct atmel_private *priv = netdev_priv(dev);
1665
1666 /* put a brick on it... */
1667 if (priv->bus_type == BUS_TYPE_PCCARD)
1668 atmel_write16(dev, GCR, 0x0060);
1669 atmel_write16(dev, GCR, 0x0040);
1670
1671 del_timer_sync(&priv->management_timer);
1672 unregister_netdev(dev);
1673 remove_proc_entry("driver/atmel", NULL);
1674 free_irq(dev->irq, dev);
1675 kfree(priv->firmware);
1676 release_region(dev->base_addr, 32);
1677 free_netdev(dev);
1678 }
1679
1680 EXPORT_SYMBOL(stop_atmel_card);
1681
1682 static int atmel_set_essid(struct net_device *dev,
1683 struct iw_request_info *info,
1684 struct iw_point *dwrq,
1685 char *extra)
1686 {
1687 struct atmel_private *priv = netdev_priv(dev);
1688
1689 /* Check if we asked for `any' */
1690 if(dwrq->flags == 0) {
1691 priv->connect_to_any_BSS = 1;
1692 } else {
1693 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1694
1695 priv->connect_to_any_BSS = 0;
1696
1697 /* Check the size of the string */
1698 if (dwrq->length > MAX_SSID_LENGTH + 1)
1699 return -E2BIG;
1700 if (index != 0)
1701 return -EINVAL;
1702
1703 memcpy(priv->new_SSID, extra, dwrq->length - 1);
1704 priv->new_SSID_size = dwrq->length - 1;
1705 }
1706
1707 return -EINPROGRESS;
1708 }
1709
1710 static int atmel_get_essid(struct net_device *dev,
1711 struct iw_request_info *info,
1712 struct iw_point *dwrq,
1713 char *extra)
1714 {
1715 struct atmel_private *priv = netdev_priv(dev);
1716
1717 /* Get the current SSID */
1718 if (priv->new_SSID_size != 0) {
1719 memcpy(extra, priv->new_SSID, priv->new_SSID_size);
1720 extra[priv->new_SSID_size] = '\0';
1721 dwrq->length = priv->new_SSID_size;
1722 } else {
1723 memcpy(extra, priv->SSID, priv->SSID_size);
1724 extra[priv->SSID_size] = '\0';
1725 dwrq->length = priv->SSID_size;
1726 }
1727
1728 dwrq->flags = !priv->connect_to_any_BSS; /* active */
1729
1730 return 0;
1731 }
1732
1733 static int atmel_get_wap(struct net_device *dev,
1734 struct iw_request_info *info,
1735 struct sockaddr *awrq,
1736 char *extra)
1737 {
1738 struct atmel_private *priv = netdev_priv(dev);
1739 memcpy(awrq->sa_data, priv->CurrentBSSID, 6);
1740 awrq->sa_family = ARPHRD_ETHER;
1741
1742 return 0;
1743 }
1744
1745 static int atmel_set_encode(struct net_device *dev,
1746 struct iw_request_info *info,
1747 struct iw_point *dwrq,
1748 char *extra)
1749 {
1750 struct atmel_private *priv = netdev_priv(dev);
1751
1752 /* Basic checking: do we have a key to set ?
1753 * Note : with the new API, it's impossible to get a NULL pointer.
1754 * Therefore, we need to check a key size == 0 instead.
1755 * New version of iwconfig properly set the IW_ENCODE_NOKEY flag
1756 * when no key is present (only change flags), but older versions
1757 * don't do it. - Jean II */
1758 if (dwrq->length > 0) {
1759 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1760 int current_index = priv->default_key;
1761 /* Check the size of the key */
1762 if (dwrq->length > 13) {
1763 return -EINVAL;
1764 }
1765 /* Check the index (none -> use current) */
1766 if (index < 0 || index >= 4)
1767 index = current_index;
1768 else
1769 priv->default_key = index;
1770 /* Set the length */
1771 if (dwrq->length > 5)
1772 priv->wep_key_len[index] = 13;
1773 else
1774 if (dwrq->length > 0)
1775 priv->wep_key_len[index] = 5;
1776 else
1777 /* Disable the key */
1778 priv->wep_key_len[index] = 0;
1779 /* Check if the key is not marked as invalid */
1780 if(!(dwrq->flags & IW_ENCODE_NOKEY)) {
1781 /* Cleanup */
1782 memset(priv->wep_keys[index], 0, 13);
1783 /* Copy the key in the driver */
1784 memcpy(priv->wep_keys[index], extra, dwrq->length);
1785 }
1786 /* WE specify that if a valid key is set, encryption
1787 * should be enabled (user may turn it off later)
1788 * This is also how "iwconfig ethX key on" works */
1789 if (index == current_index &&
1790 priv->wep_key_len[index] > 0) {
1791 priv->wep_is_on = 1;
1792 priv->exclude_unencrypted = 1;
1793 if (priv->wep_key_len[index] > 5) {
1794 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1795 priv->encryption_level = 2;
1796 } else {
1797 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1798 priv->encryption_level = 1;
1799 }
1800 }
1801 } else {
1802 /* Do we want to just set the transmit key index ? */
1803 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1804 if (index >= 0 && index < 4) {
1805 priv->default_key = index;
1806 } else
1807 /* Don't complain if only change the mode */
1808 if (!dwrq->flags & IW_ENCODE_MODE) {
1809 return -EINVAL;
1810 }
1811 }
1812 /* Read the flags */
1813 if (dwrq->flags & IW_ENCODE_DISABLED) {
1814 priv->wep_is_on = 0;
1815 priv->encryption_level = 0;
1816 priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1817 } else {
1818 priv->wep_is_on = 1;
1819 if (priv->wep_key_len[priv->default_key] > 5) {
1820 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1821 priv->encryption_level = 2;
1822 } else {
1823 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1824 priv->encryption_level = 1;
1825 }
1826 }
1827 if (dwrq->flags & IW_ENCODE_RESTRICTED)
1828 priv->exclude_unencrypted = 1;
1829 if(dwrq->flags & IW_ENCODE_OPEN)
1830 priv->exclude_unencrypted = 0;
1831
1832 return -EINPROGRESS; /* Call commit handler */
1833 }
1834
1835 static int atmel_get_encode(struct net_device *dev,
1836 struct iw_request_info *info,
1837 struct iw_point *dwrq,
1838 char *extra)
1839 {
1840 struct atmel_private *priv = netdev_priv(dev);
1841 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1842
1843 if (!priv->wep_is_on)
1844 dwrq->flags = IW_ENCODE_DISABLED;
1845 else {
1846 if (priv->exclude_unencrypted)
1847 dwrq->flags = IW_ENCODE_RESTRICTED;
1848 else
1849 dwrq->flags = IW_ENCODE_OPEN;
1850 }
1851 /* Which key do we want ? -1 -> tx index */
1852 if (index < 0 || index >= 4)
1853 index = priv->default_key;
1854 dwrq->flags |= index + 1;
1855 /* Copy the key to the user buffer */
1856 dwrq->length = priv->wep_key_len[index];
1857 if (dwrq->length > 16) {
1858 dwrq->length=0;
1859 } else {
1860 memset(extra, 0, 16);
1861 memcpy(extra, priv->wep_keys[index], dwrq->length);
1862 }
1863
1864 return 0;
1865 }
1866
1867 static int atmel_set_encodeext(struct net_device *dev,
1868 struct iw_request_info *info,
1869 union iwreq_data *wrqu,
1870 char *extra)
1871 {
1872 struct atmel_private *priv = netdev_priv(dev);
1873 struct iw_point *encoding = &wrqu->encoding;
1874 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
1875 int idx, key_len, alg = ext->alg, set_key = 1;
1876
1877 /* Determine and validate the key index */
1878 idx = encoding->flags & IW_ENCODE_INDEX;
1879 if (idx) {
1880 if (idx < 1 || idx > WEP_KEYS)
1881 return -EINVAL;
1882 idx--;
1883 } else
1884 idx = priv->default_key;
1885
1886 if (encoding->flags & IW_ENCODE_DISABLED)
1887 alg = IW_ENCODE_ALG_NONE;
1888
1889 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
1890 priv->default_key = idx;
1891 set_key = ext->key_len > 0 ? 1 : 0;
1892 }
1893
1894 if (set_key) {
1895 /* Set the requested key first */
1896 switch (alg) {
1897 case IW_ENCODE_ALG_NONE:
1898 priv->wep_is_on = 0;
1899 priv->encryption_level = 0;
1900 priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1901 break;
1902 case IW_ENCODE_ALG_WEP:
1903 if (ext->key_len > 5) {
1904 priv->wep_key_len[idx] = 13;
1905 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1906 priv->encryption_level = 2;
1907 } else if (ext->key_len > 0) {
1908 priv->wep_key_len[idx] = 5;
1909 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1910 priv->encryption_level = 1;
1911 } else {
1912 return -EINVAL;
1913 }
1914 priv->wep_is_on = 1;
1915 memset(priv->wep_keys[idx], 0, 13);
1916 key_len = min ((int)ext->key_len, priv->wep_key_len[idx]);
1917 memcpy(priv->wep_keys[idx], ext->key, key_len);
1918 break;
1919 default:
1920 return -EINVAL;
1921 }
1922 }
1923
1924 return -EINPROGRESS;
1925 }
1926
1927 static int atmel_get_encodeext(struct net_device *dev,
1928 struct iw_request_info *info,
1929 union iwreq_data *wrqu,
1930 char *extra)
1931 {
1932 struct atmel_private *priv = netdev_priv(dev);
1933 struct iw_point *encoding = &wrqu->encoding;
1934 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
1935 int idx, max_key_len;
1936
1937 max_key_len = encoding->length - sizeof(*ext);
1938 if (max_key_len < 0)
1939 return -EINVAL;
1940
1941 idx = encoding->flags & IW_ENCODE_INDEX;
1942 if (idx) {
1943 if (idx < 1 || idx > WEP_KEYS)
1944 return -EINVAL;
1945 idx--;
1946 } else
1947 idx = priv->default_key;
1948
1949 encoding->flags = idx + 1;
1950 memset(ext, 0, sizeof(*ext));
1951
1952 if (!priv->wep_is_on) {
1953 ext->alg = IW_ENCODE_ALG_NONE;
1954 ext->key_len = 0;
1955 encoding->flags |= IW_ENCODE_DISABLED;
1956 } else {
1957 if (priv->encryption_level > 0)
1958 ext->alg = IW_ENCODE_ALG_WEP;
1959 else
1960 return -EINVAL;
1961
1962 ext->key_len = priv->wep_key_len[idx];
1963 memcpy(ext->key, priv->wep_keys[idx], ext->key_len);
1964 encoding->flags |= IW_ENCODE_ENABLED;
1965 }
1966
1967 return 0;
1968 }
1969
1970 static int atmel_set_auth(struct net_device *dev,
1971 struct iw_request_info *info,
1972 union iwreq_data *wrqu, char *extra)
1973 {
1974 struct atmel_private *priv = netdev_priv(dev);
1975 struct iw_param *param = &wrqu->param;
1976
1977 switch (param->flags & IW_AUTH_INDEX) {
1978 case IW_AUTH_WPA_VERSION:
1979 case IW_AUTH_CIPHER_PAIRWISE:
1980 case IW_AUTH_CIPHER_GROUP:
1981 case IW_AUTH_KEY_MGMT:
1982 case IW_AUTH_RX_UNENCRYPTED_EAPOL:
1983 case IW_AUTH_PRIVACY_INVOKED:
1984 /*
1985 * atmel does not use these parameters
1986 */
1987 break;
1988
1989 case IW_AUTH_DROP_UNENCRYPTED:
1990 priv->exclude_unencrypted = param->value ? 1 : 0;
1991 break;
1992
1993 case IW_AUTH_80211_AUTH_ALG: {
1994 if (param->value & IW_AUTH_ALG_SHARED_KEY) {
1995 priv->exclude_unencrypted = 1;
1996 } else if (param->value & IW_AUTH_ALG_OPEN_SYSTEM) {
1997 priv->exclude_unencrypted = 0;
1998 } else
1999 return -EINVAL;
2000 break;
2001 }
2002
2003 case IW_AUTH_WPA_ENABLED:
2004 /* Silently accept disable of WPA */
2005 if (param->value > 0)
2006 return -EOPNOTSUPP;
2007 break;
2008
2009 default:
2010 return -EOPNOTSUPP;
2011 }
2012 return -EINPROGRESS;
2013 }
2014
2015 static int atmel_get_auth(struct net_device *dev,
2016 struct iw_request_info *info,
2017 union iwreq_data *wrqu, char *extra)
2018 {
2019 struct atmel_private *priv = netdev_priv(dev);
2020 struct iw_param *param = &wrqu->param;
2021
2022 switch (param->flags & IW_AUTH_INDEX) {
2023 case IW_AUTH_DROP_UNENCRYPTED:
2024 param->value = priv->exclude_unencrypted;
2025 break;
2026
2027 case IW_AUTH_80211_AUTH_ALG:
2028 if (priv->exclude_unencrypted == 1)
2029 param->value = IW_AUTH_ALG_SHARED_KEY;
2030 else
2031 param->value = IW_AUTH_ALG_OPEN_SYSTEM;
2032 break;
2033
2034 case IW_AUTH_WPA_ENABLED:
2035 param->value = 0;
2036 break;
2037
2038 default:
2039 return -EOPNOTSUPP;
2040 }
2041 return 0;
2042 }
2043
2044
2045 static int atmel_get_name(struct net_device *dev,
2046 struct iw_request_info *info,
2047 char *cwrq,
2048 char *extra)
2049 {
2050 strcpy(cwrq, "IEEE 802.11-DS");
2051 return 0;
2052 }
2053
2054 static int atmel_set_rate(struct net_device *dev,
2055 struct iw_request_info *info,
2056 struct iw_param *vwrq,
2057 char *extra)
2058 {
2059 struct atmel_private *priv = netdev_priv(dev);
2060
2061 if (vwrq->fixed == 0) {
2062 priv->tx_rate = 3;
2063 priv->auto_tx_rate = 1;
2064 } else {
2065 priv->auto_tx_rate = 0;
2066
2067 /* Which type of value ? */
2068 if ((vwrq->value < 4) && (vwrq->value >= 0)) {
2069 /* Setting by rate index */
2070 priv->tx_rate = vwrq->value;
2071 } else {
2072 /* Setting by frequency value */
2073 switch (vwrq->value) {
2074 case 1000000: priv->tx_rate = 0; break;
2075 case 2000000: priv->tx_rate = 1; break;
2076 case 5500000: priv->tx_rate = 2; break;
2077 case 11000000: priv->tx_rate = 3; break;
2078 default: return -EINVAL;
2079 }
2080 }
2081 }
2082
2083 return -EINPROGRESS;
2084 }
2085
2086 static int atmel_set_mode(struct net_device *dev,
2087 struct iw_request_info *info,
2088 __u32 *uwrq,
2089 char *extra)
2090 {
2091 struct atmel_private *priv = netdev_priv(dev);
2092
2093 if (*uwrq != IW_MODE_ADHOC && *uwrq != IW_MODE_INFRA)
2094 return -EINVAL;
2095
2096 priv->operating_mode = *uwrq;
2097 return -EINPROGRESS;
2098 }
2099
2100 static int atmel_get_mode(struct net_device *dev,
2101 struct iw_request_info *info,
2102 __u32 *uwrq,
2103 char *extra)
2104 {
2105 struct atmel_private *priv = netdev_priv(dev);
2106
2107 *uwrq = priv->operating_mode;
2108 return 0;
2109 }
2110
2111 static int atmel_get_rate(struct net_device *dev,
2112 struct iw_request_info *info,
2113 struct iw_param *vwrq,
2114 char *extra)
2115 {
2116 struct atmel_private *priv = netdev_priv(dev);
2117
2118 if (priv->auto_tx_rate) {
2119 vwrq->fixed = 0;
2120 vwrq->value = 11000000;
2121 } else {
2122 vwrq->fixed = 1;
2123 switch(priv->tx_rate) {
2124 case 0: vwrq->value = 1000000; break;
2125 case 1: vwrq->value = 2000000; break;
2126 case 2: vwrq->value = 5500000; break;
2127 case 3: vwrq->value = 11000000; break;
2128 }
2129 }
2130 return 0;
2131 }
2132
2133 static int atmel_set_power(struct net_device *dev,
2134 struct iw_request_info *info,
2135 struct iw_param *vwrq,
2136 char *extra)
2137 {
2138 struct atmel_private *priv = netdev_priv(dev);
2139 priv->power_mode = vwrq->disabled ? 0 : 1;
2140 return -EINPROGRESS;
2141 }
2142
2143 static int atmel_get_power(struct net_device *dev,
2144 struct iw_request_info *info,
2145 struct iw_param *vwrq,
2146 char *extra)
2147 {
2148 struct atmel_private *priv = netdev_priv(dev);
2149 vwrq->disabled = priv->power_mode ? 0 : 1;
2150 vwrq->flags = IW_POWER_ON;
2151 return 0;
2152 }
2153
2154 static int atmel_set_retry(struct net_device *dev,
2155 struct iw_request_info *info,
2156 struct iw_param *vwrq,
2157 char *extra)
2158 {
2159 struct atmel_private *priv = netdev_priv(dev);
2160
2161 if (!vwrq->disabled && (vwrq->flags & IW_RETRY_LIMIT)) {
2162 if (vwrq->flags & IW_RETRY_MAX)
2163 priv->long_retry = vwrq->value;
2164 else if (vwrq->flags & IW_RETRY_MIN)
2165 priv->short_retry = vwrq->value;
2166 else {
2167 /* No modifier : set both */
2168 priv->long_retry = vwrq->value;
2169 priv->short_retry = vwrq->value;
2170 }
2171 return -EINPROGRESS;
2172 }
2173
2174 return -EINVAL;
2175 }
2176
2177 static int atmel_get_retry(struct net_device *dev,
2178 struct iw_request_info *info,
2179 struct iw_param *vwrq,
2180 char *extra)
2181 {
2182 struct atmel_private *priv = netdev_priv(dev);
2183
2184 vwrq->disabled = 0; /* Can't be disabled */
2185
2186 /* Note : by default, display the min retry number */
2187 if (vwrq->flags & IW_RETRY_MAX) {
2188 vwrq->flags = IW_RETRY_LIMIT | IW_RETRY_MAX;
2189 vwrq->value = priv->long_retry;
2190 } else {
2191 vwrq->flags = IW_RETRY_LIMIT;
2192 vwrq->value = priv->short_retry;
2193 if (priv->long_retry != priv->short_retry)
2194 vwrq->flags |= IW_RETRY_MIN;
2195 }
2196
2197 return 0;
2198 }
2199
2200 static int atmel_set_rts(struct net_device *dev,
2201 struct iw_request_info *info,
2202 struct iw_param *vwrq,
2203 char *extra)
2204 {
2205 struct atmel_private *priv = netdev_priv(dev);
2206 int rthr = vwrq->value;
2207
2208 if (vwrq->disabled)
2209 rthr = 2347;
2210 if ((rthr < 0) || (rthr > 2347)) {
2211 return -EINVAL;
2212 }
2213 priv->rts_threshold = rthr;
2214
2215 return -EINPROGRESS; /* Call commit handler */
2216 }
2217
2218 static int atmel_get_rts(struct net_device *dev,
2219 struct iw_request_info *info,
2220 struct iw_param *vwrq,
2221 char *extra)
2222 {
2223 struct atmel_private *priv = netdev_priv(dev);
2224
2225 vwrq->value = priv->rts_threshold;
2226 vwrq->disabled = (vwrq->value >= 2347);
2227 vwrq->fixed = 1;
2228
2229 return 0;
2230 }
2231
2232 static int atmel_set_frag(struct net_device *dev,
2233 struct iw_request_info *info,
2234 struct iw_param *vwrq,
2235 char *extra)
2236 {
2237 struct atmel_private *priv = netdev_priv(dev);
2238 int fthr = vwrq->value;
2239
2240 if (vwrq->disabled)
2241 fthr = 2346;
2242 if ((fthr < 256) || (fthr > 2346)) {
2243 return -EINVAL;
2244 }
2245 fthr &= ~0x1; /* Get an even value - is it really needed ??? */
2246 priv->frag_threshold = fthr;
2247
2248 return -EINPROGRESS; /* Call commit handler */
2249 }
2250
2251 static int atmel_get_frag(struct net_device *dev,
2252 struct iw_request_info *info,
2253 struct iw_param *vwrq,
2254 char *extra)
2255 {
2256 struct atmel_private *priv = netdev_priv(dev);
2257
2258 vwrq->value = priv->frag_threshold;
2259 vwrq->disabled = (vwrq->value >= 2346);
2260 vwrq->fixed = 1;
2261
2262 return 0;
2263 }
2264
2265 static const long frequency_list[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
2266 2447, 2452, 2457, 2462, 2467, 2472, 2484 };
2267
2268 static int atmel_set_freq(struct net_device *dev,
2269 struct iw_request_info *info,
2270 struct iw_freq *fwrq,
2271 char *extra)
2272 {
2273 struct atmel_private *priv = netdev_priv(dev);
2274 int rc = -EINPROGRESS; /* Call commit handler */
2275
2276 /* If setting by frequency, convert to a channel */
2277 if ((fwrq->e == 1) &&
2278 (fwrq->m >= (int) 241200000) &&
2279 (fwrq->m <= (int) 248700000)) {
2280 int f = fwrq->m / 100000;
2281 int c = 0;
2282 while ((c < 14) && (f != frequency_list[c]))
2283 c++;
2284 /* Hack to fall through... */
2285 fwrq->e = 0;
2286 fwrq->m = c + 1;
2287 }
2288 /* Setting by channel number */
2289 if ((fwrq->m > 1000) || (fwrq->e > 0))
2290 rc = -EOPNOTSUPP;
2291 else {
2292 int channel = fwrq->m;
2293 if (atmel_validate_channel(priv, channel) == 0) {
2294 priv->channel = channel;
2295 } else {
2296 rc = -EINVAL;
2297 }
2298 }
2299 return rc;
2300 }
2301
2302 static int atmel_get_freq(struct net_device *dev,
2303 struct iw_request_info *info,
2304 struct iw_freq *fwrq,
2305 char *extra)
2306 {
2307 struct atmel_private *priv = netdev_priv(dev);
2308
2309 fwrq->m = priv->channel;
2310 fwrq->e = 0;
2311 return 0;
2312 }
2313
2314 static int atmel_set_scan(struct net_device *dev,
2315 struct iw_request_info *info,
2316 struct iw_param *vwrq,
2317 char *extra)
2318 {
2319 struct atmel_private *priv = netdev_priv(dev);
2320 unsigned long flags;
2321
2322 /* Note : you may have realised that, as this is a SET operation,
2323 * this is privileged and therefore a normal user can't
2324 * perform scanning.
2325 * This is not an error, while the device perform scanning,
2326 * traffic doesn't flow, so it's a perfect DoS...
2327 * Jean II */
2328
2329 if (priv->station_state == STATION_STATE_DOWN)
2330 return -EAGAIN;
2331
2332 /* Timeout old surveys. */
2333 if ((jiffies - priv->last_survey) > (20 * HZ))
2334 priv->site_survey_state = SITE_SURVEY_IDLE;
2335 priv->last_survey = jiffies;
2336
2337 /* Initiate a scan command */
2338 if (priv->site_survey_state == SITE_SURVEY_IN_PROGRESS)
2339 return -EBUSY;
2340
2341 del_timer_sync(&priv->management_timer);
2342 spin_lock_irqsave(&priv->irqlock, flags);
2343
2344 priv->site_survey_state = SITE_SURVEY_IN_PROGRESS;
2345 priv->fast_scan = 0;
2346 atmel_scan(priv, 0);
2347 spin_unlock_irqrestore(&priv->irqlock, flags);
2348
2349 return 0;
2350 }
2351
2352 static int atmel_get_scan(struct net_device *dev,
2353 struct iw_request_info *info,
2354 struct iw_point *dwrq,
2355 char *extra)
2356 {
2357 struct atmel_private *priv = netdev_priv(dev);
2358 int i;
2359 char *current_ev = extra;
2360 struct iw_event iwe;
2361
2362 if (priv->site_survey_state != SITE_SURVEY_COMPLETED)
2363 return -EAGAIN;
2364
2365 for (i = 0; i < priv->BSS_list_entries; i++) {
2366 iwe.cmd = SIOCGIWAP;
2367 iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
2368 memcpy(iwe.u.ap_addr.sa_data, priv->BSSinfo[i].BSSID, 6);
2369 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_ADDR_LEN);
2370
2371 iwe.u.data.length = priv->BSSinfo[i].SSIDsize;
2372 if (iwe.u.data.length > 32)
2373 iwe.u.data.length = 32;
2374 iwe.cmd = SIOCGIWESSID;
2375 iwe.u.data.flags = 1;
2376 current_ev = iwe_stream_add_point(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, priv->BSSinfo[i].SSID);
2377
2378 iwe.cmd = SIOCGIWMODE;
2379 iwe.u.mode = priv->BSSinfo[i].BSStype;
2380 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_UINT_LEN);
2381
2382 iwe.cmd = SIOCGIWFREQ;
2383 iwe.u.freq.m = priv->BSSinfo[i].channel;
2384 iwe.u.freq.e = 0;
2385 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_FREQ_LEN);
2386
2387 iwe.cmd = SIOCGIWENCODE;
2388 if (priv->BSSinfo[i].UsingWEP)
2389 iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
2390 else
2391 iwe.u.data.flags = IW_ENCODE_DISABLED;
2392 iwe.u.data.length = 0;
2393 current_ev = iwe_stream_add_point(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, NULL);
2394 }
2395
2396 /* Length of data */
2397 dwrq->length = (current_ev - extra);
2398 dwrq->flags = 0;
2399
2400 return 0;
2401 }
2402
2403 static int atmel_get_range(struct net_device *dev,
2404 struct iw_request_info *info,
2405 struct iw_point *dwrq,
2406 char *extra)
2407 {
2408 struct atmel_private *priv = netdev_priv(dev);
2409 struct iw_range *range = (struct iw_range *) extra;
2410 int k, i, j;
2411
2412 dwrq->length = sizeof(struct iw_range);
2413 memset(range, 0, sizeof(struct iw_range));
2414 range->min_nwid = 0x0000;
2415 range->max_nwid = 0x0000;
2416 range->num_channels = 0;
2417 for (j = 0; j < sizeof(channel_table)/sizeof(channel_table[0]); j++)
2418 if (priv->reg_domain == channel_table[j].reg_domain) {
2419 range->num_channels = channel_table[j].max - channel_table[j].min + 1;
2420 break;
2421 }
2422 if (range->num_channels != 0) {
2423 for (k = 0, i = channel_table[j].min; i <= channel_table[j].max; i++) {
2424 range->freq[k].i = i; /* List index */
2425 range->freq[k].m = frequency_list[i - 1] * 100000;
2426 range->freq[k++].e = 1; /* Values in table in MHz -> * 10^5 * 10 */
2427 }
2428 range->num_frequency = k;
2429 }
2430
2431 range->max_qual.qual = 100;
2432 range->max_qual.level = 100;
2433 range->max_qual.noise = 0;
2434 range->max_qual.updated = IW_QUAL_NOISE_INVALID;
2435
2436 range->avg_qual.qual = 50;
2437 range->avg_qual.level = 50;
2438 range->avg_qual.noise = 0;
2439 range->avg_qual.updated = IW_QUAL_NOISE_INVALID;
2440
2441 range->sensitivity = 0;
2442
2443 range->bitrate[0] = 1000000;
2444 range->bitrate[1] = 2000000;
2445 range->bitrate[2] = 5500000;
2446 range->bitrate[3] = 11000000;
2447 range->num_bitrates = 4;
2448
2449 range->min_rts = 0;
2450 range->max_rts = 2347;
2451 range->min_frag = 256;
2452 range->max_frag = 2346;
2453
2454 range->encoding_size[0] = 5;
2455 range->encoding_size[1] = 13;
2456 range->num_encoding_sizes = 2;
2457 range->max_encoding_tokens = 4;
2458
2459 range->pmp_flags = IW_POWER_ON;
2460 range->pmt_flags = IW_POWER_ON;
2461 range->pm_capa = 0;
2462
2463 range->we_version_source = WIRELESS_EXT;
2464 range->we_version_compiled = WIRELESS_EXT;
2465 range->retry_capa = IW_RETRY_LIMIT ;
2466 range->retry_flags = IW_RETRY_LIMIT;
2467 range->r_time_flags = 0;
2468 range->min_retry = 1;
2469 range->max_retry = 65535;
2470
2471 return 0;
2472 }
2473
2474 static int atmel_set_wap(struct net_device *dev,
2475 struct iw_request_info *info,
2476 struct sockaddr *awrq,
2477 char *extra)
2478 {
2479 struct atmel_private *priv = netdev_priv(dev);
2480 int i;
2481 static const u8 any[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
2482 static const u8 off[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
2483 unsigned long flags;
2484
2485 if (awrq->sa_family != ARPHRD_ETHER)
2486 return -EINVAL;
2487
2488 if (!memcmp(any, awrq->sa_data, 6) ||
2489 !memcmp(off, awrq->sa_data, 6)) {
2490 del_timer_sync(&priv->management_timer);
2491 spin_lock_irqsave(&priv->irqlock, flags);
2492 atmel_scan(priv, 1);
2493 spin_unlock_irqrestore(&priv->irqlock, flags);
2494 return 0;
2495 }
2496
2497 for (i = 0; i < priv->BSS_list_entries; i++) {
2498 if (memcmp(priv->BSSinfo[i].BSSID, awrq->sa_data, 6) == 0) {
2499 if (!priv->wep_is_on && priv->BSSinfo[i].UsingWEP) {
2500 return -EINVAL;
2501 } else if (priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) {
2502 return -EINVAL;
2503 } else {
2504 del_timer_sync(&priv->management_timer);
2505 spin_lock_irqsave(&priv->irqlock, flags);
2506 atmel_join_bss(priv, i);
2507 spin_unlock_irqrestore(&priv->irqlock, flags);
2508 return 0;
2509 }
2510 }
2511 }
2512
2513 return -EINVAL;
2514 }
2515
2516 static int atmel_config_commit(struct net_device *dev,
2517 struct iw_request_info *info, /* NULL */
2518 void *zwrq, /* NULL */
2519 char *extra) /* NULL */
2520 {
2521 return atmel_open(dev);
2522 }
2523
2524 static const iw_handler atmel_handler[] =
2525 {
2526 (iw_handler) atmel_config_commit, /* SIOCSIWCOMMIT */
2527 (iw_handler) atmel_get_name, /* SIOCGIWNAME */
2528 (iw_handler) NULL, /* SIOCSIWNWID */
2529 (iw_handler) NULL, /* SIOCGIWNWID */
2530 (iw_handler) atmel_set_freq, /* SIOCSIWFREQ */
2531 (iw_handler) atmel_get_freq, /* SIOCGIWFREQ */
2532 (iw_handler) atmel_set_mode, /* SIOCSIWMODE */
2533 (iw_handler) atmel_get_mode, /* SIOCGIWMODE */
2534 (iw_handler) NULL, /* SIOCSIWSENS */
2535 (iw_handler) NULL, /* SIOCGIWSENS */
2536 (iw_handler) NULL, /* SIOCSIWRANGE */
2537 (iw_handler) atmel_get_range, /* SIOCGIWRANGE */
2538 (iw_handler) NULL, /* SIOCSIWPRIV */
2539 (iw_handler) NULL, /* SIOCGIWPRIV */
2540 (iw_handler) NULL, /* SIOCSIWSTATS */
2541 (iw_handler) NULL, /* SIOCGIWSTATS */
2542 (iw_handler) NULL, /* SIOCSIWSPY */
2543 (iw_handler) NULL, /* SIOCGIWSPY */
2544 (iw_handler) NULL, /* -- hole -- */
2545 (iw_handler) NULL, /* -- hole -- */
2546 (iw_handler) atmel_set_wap, /* SIOCSIWAP */
2547 (iw_handler) atmel_get_wap, /* SIOCGIWAP */
2548 (iw_handler) NULL, /* -- hole -- */
2549 (iw_handler) NULL, /* SIOCGIWAPLIST */
2550 (iw_handler) atmel_set_scan, /* SIOCSIWSCAN */
2551 (iw_handler) atmel_get_scan, /* SIOCGIWSCAN */
2552 (iw_handler) atmel_set_essid, /* SIOCSIWESSID */
2553 (iw_handler) atmel_get_essid, /* SIOCGIWESSID */
2554 (iw_handler) NULL, /* SIOCSIWNICKN */
2555 (iw_handler) NULL, /* SIOCGIWNICKN */
2556 (iw_handler) NULL, /* -- hole -- */
2557 (iw_handler) NULL, /* -- hole -- */
2558 (iw_handler) atmel_set_rate, /* SIOCSIWRATE */
2559 (iw_handler) atmel_get_rate, /* SIOCGIWRATE */
2560 (iw_handler) atmel_set_rts, /* SIOCSIWRTS */
2561 (iw_handler) atmel_get_rts, /* SIOCGIWRTS */
2562 (iw_handler) atmel_set_frag, /* SIOCSIWFRAG */
2563 (iw_handler) atmel_get_frag, /* SIOCGIWFRAG */
2564 (iw_handler) NULL, /* SIOCSIWTXPOW */
2565 (iw_handler) NULL, /* SIOCGIWTXPOW */
2566 (iw_handler) atmel_set_retry, /* SIOCSIWRETRY */
2567 (iw_handler) atmel_get_retry, /* SIOCGIWRETRY */
2568 (iw_handler) atmel_set_encode, /* SIOCSIWENCODE */
2569 (iw_handler) atmel_get_encode, /* SIOCGIWENCODE */
2570 (iw_handler) atmel_set_power, /* SIOCSIWPOWER */
2571 (iw_handler) atmel_get_power, /* SIOCGIWPOWER */
2572 (iw_handler) NULL, /* -- hole -- */
2573 (iw_handler) NULL, /* -- hole -- */
2574 (iw_handler) NULL, /* SIOCSIWGENIE */
2575 (iw_handler) NULL, /* SIOCGIWGENIE */
2576 (iw_handler) atmel_set_auth, /* SIOCSIWAUTH */
2577 (iw_handler) atmel_get_auth, /* SIOCGIWAUTH */
2578 (iw_handler) atmel_set_encodeext, /* SIOCSIWENCODEEXT */
2579 (iw_handler) atmel_get_encodeext, /* SIOCGIWENCODEEXT */
2580 (iw_handler) NULL, /* SIOCSIWPMKSA */
2581 };
2582
2583 static const iw_handler atmel_private_handler[] =
2584 {
2585 NULL, /* SIOCIWFIRSTPRIV */
2586 };
2587
2588 typedef struct atmel_priv_ioctl {
2589 char id[32];
2590 unsigned char __user *data;
2591 unsigned short len;
2592 } atmel_priv_ioctl;
2593
2594 #define ATMELFWL SIOCIWFIRSTPRIV
2595 #define ATMELIDIFC ATMELFWL + 1
2596 #define ATMELRD ATMELFWL + 2
2597 #define ATMELMAGIC 0x51807
2598 #define REGDOMAINSZ 20
2599
2600 static const struct iw_priv_args atmel_private_args[] = {
2601 {
2602 .cmd = ATMELFWL,
2603 .set_args = IW_PRIV_TYPE_BYTE
2604 | IW_PRIV_SIZE_FIXED
2605 | sizeof (atmel_priv_ioctl),
2606 .get_args = IW_PRIV_TYPE_NONE,
2607 .name = "atmelfwl"
2608 }, {
2609 .cmd = ATMELIDIFC,
2610 .set_args = IW_PRIV_TYPE_NONE,
2611 .get_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
2612 .name = "atmelidifc"
2613 }, {
2614 .cmd = ATMELRD,
2615 .set_args = IW_PRIV_TYPE_CHAR | REGDOMAINSZ,
2616 .get_args = IW_PRIV_TYPE_NONE,
2617 .name = "regdomain"
2618 },
2619 };
2620
2621 static const struct iw_handler_def atmel_handler_def =
2622 {
2623 .num_standard = sizeof(atmel_handler)/sizeof(iw_handler),
2624 .num_private = sizeof(atmel_private_handler)/sizeof(iw_handler),
2625 .num_private_args = sizeof(atmel_private_args)/sizeof(struct iw_priv_args),
2626 .standard = (iw_handler *) atmel_handler,
2627 .private = (iw_handler *) atmel_private_handler,
2628 .private_args = (struct iw_priv_args *) atmel_private_args,
2629 .get_wireless_stats = atmel_get_wireless_stats
2630 };
2631
2632 static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2633 {
2634 int i, rc = 0;
2635 struct atmel_private *priv = netdev_priv(dev);
2636 atmel_priv_ioctl com;
2637 struct iwreq *wrq = (struct iwreq *) rq;
2638 unsigned char *new_firmware;
2639 char domain[REGDOMAINSZ + 1];
2640
2641 switch (cmd) {
2642 case ATMELIDIFC:
2643 wrq->u.param.value = ATMELMAGIC;
2644 break;
2645
2646 case ATMELFWL:
2647 if (copy_from_user(&com, rq->ifr_data, sizeof(com))) {
2648 rc = -EFAULT;
2649 break;
2650 }
2651
2652 if (!capable(CAP_NET_ADMIN)) {
2653 rc = -EPERM;
2654 break;
2655 }
2656
2657 if (!(new_firmware = kmalloc(com.len, GFP_KERNEL))) {
2658 rc = -ENOMEM;
2659 break;
2660 }
2661
2662 if (copy_from_user(new_firmware, com.data, com.len)) {
2663 kfree(new_firmware);
2664 rc = -EFAULT;
2665 break;
2666 }
2667
2668 kfree(priv->firmware);
2669
2670 priv->firmware = new_firmware;
2671 priv->firmware_length = com.len;
2672 strncpy(priv->firmware_id, com.id, 31);
2673 priv->firmware_id[31] = '\0';
2674 break;
2675
2676 case ATMELRD:
2677 if (copy_from_user(domain, rq->ifr_data, REGDOMAINSZ)) {
2678 rc = -EFAULT;
2679 break;
2680 }
2681
2682 if (!capable(CAP_NET_ADMIN)) {
2683 rc = -EPERM;
2684 break;
2685 }
2686
2687 domain[REGDOMAINSZ] = 0;
2688 rc = -EINVAL;
2689 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++) {
2690 /* strcasecmp doesn't exist in the library */
2691 char *a = channel_table[i].name;
2692 char *b = domain;
2693 while (*a) {
2694 char c1 = *a++;
2695 char c2 = *b++;
2696 if (tolower(c1) != tolower(c2))
2697 break;
2698 }
2699 if (!*a && !*b) {
2700 priv->config_reg_domain = channel_table[i].reg_domain;
2701 rc = 0;
2702 }
2703 }
2704
2705 if (rc == 0 && priv->station_state != STATION_STATE_DOWN)
2706 rc = atmel_open(dev);
2707 break;
2708
2709 default:
2710 rc = -EOPNOTSUPP;
2711 }
2712
2713 return rc;
2714 }
2715
2716 struct auth_body {
2717 u16 alg;
2718 u16 trans_seq;
2719 u16 status;
2720 u8 el_id;
2721 u8 chall_text_len;
2722 u8 chall_text[253];
2723 };
2724
2725 static void atmel_enter_state(struct atmel_private *priv, int new_state)
2726 {
2727 int old_state = priv->station_state;
2728
2729 if (new_state == old_state)
2730 return;
2731
2732 priv->station_state = new_state;
2733
2734 if (new_state == STATION_STATE_READY) {
2735 netif_start_queue(priv->dev);
2736 netif_carrier_on(priv->dev);
2737 }
2738
2739 if (old_state == STATION_STATE_READY) {
2740 netif_carrier_off(priv->dev);
2741 if (netif_running(priv->dev))
2742 netif_stop_queue(priv->dev);
2743 priv->last_beacon_timestamp = 0;
2744 }
2745 }
2746
2747 static void atmel_scan(struct atmel_private *priv, int specific_ssid)
2748 {
2749 struct {
2750 u8 BSSID[6];
2751 u8 SSID[MAX_SSID_LENGTH];
2752 u8 scan_type;
2753 u8 channel;
2754 u16 BSS_type;
2755 u16 min_channel_time;
2756 u16 max_channel_time;
2757 u8 options;
2758 u8 SSID_size;
2759 } cmd;
2760
2761 memset(cmd.BSSID, 0xff, 6);
2762
2763 if (priv->fast_scan) {
2764 cmd.SSID_size = priv->SSID_size;
2765 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2766 cmd.min_channel_time = cpu_to_le16(10);
2767 cmd.max_channel_time = cpu_to_le16(50);
2768 } else {
2769 priv->BSS_list_entries = 0;
2770 cmd.SSID_size = 0;
2771 cmd.min_channel_time = cpu_to_le16(10);
2772 cmd.max_channel_time = cpu_to_le16(120);
2773 }
2774
2775 cmd.options = 0;
2776
2777 if (!specific_ssid)
2778 cmd.options |= SCAN_OPTIONS_SITE_SURVEY;
2779
2780 cmd.channel = (priv->channel & 0x7f);
2781 cmd.scan_type = SCAN_TYPE_ACTIVE;
2782 cmd.BSS_type = cpu_to_le16(priv->operating_mode == IW_MODE_ADHOC ?
2783 BSS_TYPE_AD_HOC : BSS_TYPE_INFRASTRUCTURE);
2784
2785 atmel_send_command(priv, CMD_Scan, &cmd, sizeof(cmd));
2786
2787 /* This must come after all hardware access to avoid being messed up
2788 by stuff happening in interrupt context after we leave STATE_DOWN */
2789 atmel_enter_state(priv, STATION_STATE_SCANNING);
2790 }
2791
2792 static void join(struct atmel_private *priv, int type)
2793 {
2794 struct {
2795 u8 BSSID[6];
2796 u8 SSID[MAX_SSID_LENGTH];
2797 u8 BSS_type; /* this is a short in a scan command - weird */
2798 u8 channel;
2799 u16 timeout;
2800 u8 SSID_size;
2801 u8 reserved;
2802 } cmd;
2803
2804 cmd.SSID_size = priv->SSID_size;
2805 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2806 memcpy(cmd.BSSID, priv->CurrentBSSID, 6);
2807 cmd.channel = (priv->channel & 0x7f);
2808 cmd.BSS_type = type;
2809 cmd.timeout = cpu_to_le16(2000);
2810
2811 atmel_send_command(priv, CMD_Join, &cmd, sizeof(cmd));
2812 }
2813
2814 static void start(struct atmel_private *priv, int type)
2815 {
2816 struct {
2817 u8 BSSID[6];
2818 u8 SSID[MAX_SSID_LENGTH];
2819 u8 BSS_type;
2820 u8 channel;
2821 u8 SSID_size;
2822 u8 reserved[3];
2823 } cmd;
2824
2825 cmd.SSID_size = priv->SSID_size;
2826 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2827 memcpy(cmd.BSSID, priv->BSSID, 6);
2828 cmd.BSS_type = type;
2829 cmd.channel = (priv->channel & 0x7f);
2830
2831 atmel_send_command(priv, CMD_Start, &cmd, sizeof(cmd));
2832 }
2833
2834 static void handle_beacon_probe(struct atmel_private *priv, u16 capability,
2835 u8 channel)
2836 {
2837 int rejoin = 0;
2838 int new = capability & C80211_MGMT_CAPABILITY_ShortPreamble ?
2839 SHORT_PREAMBLE : LONG_PREAMBLE;
2840
2841 if (priv->preamble != new) {
2842 priv->preamble = new;
2843 rejoin = 1;
2844 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, new);
2845 }
2846
2847 if (priv->channel != channel) {
2848 priv->channel = channel;
2849 rejoin = 1;
2850 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_CHANNEL_POS, channel);
2851 }
2852
2853 if (rejoin) {
2854 priv->station_is_associated = 0;
2855 atmel_enter_state(priv, STATION_STATE_JOINNING);
2856
2857 if (priv->operating_mode == IW_MODE_INFRA)
2858 join(priv, BSS_TYPE_INFRASTRUCTURE);
2859 else
2860 join(priv, BSS_TYPE_AD_HOC);
2861 }
2862 }
2863
2864 static void send_authentication_request(struct atmel_private *priv, u16 system,
2865 u8 *challenge, int challenge_len)
2866 {
2867 struct ieee80211_hdr_4addr header;
2868 struct auth_body auth;
2869
2870 header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_AUTH);
2871 header.duration_id = cpu_to_le16(0x8000);
2872 header.seq_ctl = 0;
2873 memcpy(header.addr1, priv->CurrentBSSID, 6);
2874 memcpy(header.addr2, priv->dev->dev_addr, 6);
2875 memcpy(header.addr3, priv->CurrentBSSID, 6);
2876
2877 if (priv->wep_is_on && priv->CurrentAuthentTransactionSeqNum != 1)
2878 /* no WEP for authentication frames with TrSeqNo 1 */
2879 header.frame_ctl |= cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2880
2881 auth.alg = cpu_to_le16(system);
2882
2883 auth.status = 0;
2884 auth.trans_seq = cpu_to_le16(priv->CurrentAuthentTransactionSeqNum);
2885 priv->ExpectedAuthentTransactionSeqNum = priv->CurrentAuthentTransactionSeqNum+1;
2886 priv->CurrentAuthentTransactionSeqNum += 2;
2887
2888 if (challenge_len != 0) {
2889 auth.el_id = 16; /* challenge_text */
2890 auth.chall_text_len = challenge_len;
2891 memcpy(auth.chall_text, challenge, challenge_len);
2892 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 8 + challenge_len);
2893 } else {
2894 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 6);
2895 }
2896 }
2897
2898 static void send_association_request(struct atmel_private *priv, int is_reassoc)
2899 {
2900 u8 *ssid_el_p;
2901 int bodysize;
2902 struct ieee80211_hdr_4addr header;
2903 struct ass_req_format {
2904 u16 capability;
2905 u16 listen_interval;
2906 u8 ap[6]; /* nothing after here directly accessible */
2907 u8 ssid_el_id;
2908 u8 ssid_len;
2909 u8 ssid[MAX_SSID_LENGTH];
2910 u8 sup_rates_el_id;
2911 u8 sup_rates_len;
2912 u8 rates[4];
2913 } body;
2914
2915 header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT |
2916 (is_reassoc ? IEEE80211_STYPE_REASSOC_REQ : IEEE80211_STYPE_ASSOC_REQ));
2917 header.duration_id = cpu_to_le16(0x8000);
2918 header.seq_ctl = 0;
2919
2920 memcpy(header.addr1, priv->CurrentBSSID, 6);
2921 memcpy(header.addr2, priv->dev->dev_addr, 6);
2922 memcpy(header.addr3, priv->CurrentBSSID, 6);
2923
2924 body.capability = cpu_to_le16(C80211_MGMT_CAPABILITY_ESS);
2925 if (priv->wep_is_on)
2926 body.capability |= cpu_to_le16(C80211_MGMT_CAPABILITY_Privacy);
2927 if (priv->preamble == SHORT_PREAMBLE)
2928 body.capability |= cpu_to_le16(C80211_MGMT_CAPABILITY_ShortPreamble);
2929
2930 body.listen_interval = cpu_to_le16(priv->listen_interval * priv->beacon_period);
2931
2932 /* current AP address - only in reassoc frame */
2933 if (is_reassoc) {
2934 memcpy(body.ap, priv->CurrentBSSID, 6);
2935 ssid_el_p = (u8 *)&body.ssid_el_id;
2936 bodysize = 18 + priv->SSID_size;
2937 } else {
2938 ssid_el_p = (u8 *)&body.ap[0];
2939 bodysize = 12 + priv->SSID_size;
2940 }
2941
2942 ssid_el_p[0] = C80211_MGMT_ElementID_SSID;
2943 ssid_el_p[1] = priv->SSID_size;
2944 memcpy(ssid_el_p + 2, priv->SSID, priv->SSID_size);
2945 ssid_el_p[2 + priv->SSID_size] = C80211_MGMT_ElementID_SupportedRates;
2946 ssid_el_p[3 + priv->SSID_size] = 4; /* len of suported rates */
2947 memcpy(ssid_el_p + 4 + priv->SSID_size, atmel_basic_rates, 4);
2948
2949 atmel_transmit_management_frame(priv, &header, (void *)&body, bodysize);
2950 }
2951
2952 static int is_frame_from_current_bss(struct atmel_private *priv,
2953 struct ieee80211_hdr_4addr *header)
2954 {
2955 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
2956 return memcmp(header->addr3, priv->CurrentBSSID, 6) == 0;
2957 else
2958 return memcmp(header->addr2, priv->CurrentBSSID, 6) == 0;
2959 }
2960
2961 static int retrieve_bss(struct atmel_private *priv)
2962 {
2963 int i;
2964 int max_rssi = -128;
2965 int max_index = -1;
2966
2967 if (priv->BSS_list_entries == 0)
2968 return -1;
2969
2970 if (priv->connect_to_any_BSS) {
2971 /* Select a BSS with the max-RSSI but of the same type and of
2972 the same WEP mode and that it is not marked as 'bad' (i.e.
2973 we had previously failed to connect to this BSS with the
2974 settings that we currently use) */
2975 priv->current_BSS = 0;
2976 for (i = 0; i < priv->BSS_list_entries; i++) {
2977 if (priv->operating_mode == priv->BSSinfo[i].BSStype &&
2978 ((!priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) ||
2979 (priv->wep_is_on && priv->BSSinfo[i].UsingWEP)) &&
2980 !(priv->BSSinfo[i].channel & 0x80)) {
2981 max_rssi = priv->BSSinfo[i].RSSI;
2982 priv->current_BSS = max_index = i;
2983 }
2984 }
2985 return max_index;
2986 }
2987
2988 for (i = 0; i < priv->BSS_list_entries; i++) {
2989 if (priv->SSID_size == priv->BSSinfo[i].SSIDsize &&
2990 memcmp(priv->SSID, priv->BSSinfo[i].SSID, priv->SSID_size) == 0 &&
2991 priv->operating_mode == priv->BSSinfo[i].BSStype &&
2992 atmel_validate_channel(priv, priv->BSSinfo[i].channel) == 0) {
2993 if (priv->BSSinfo[i].RSSI >= max_rssi) {
2994 max_rssi = priv->BSSinfo[i].RSSI;
2995 max_index = i;
2996 }
2997 }
2998 }
2999 return max_index;
3000 }
3001
3002 static void store_bss_info(struct atmel_private *priv,
3003 struct ieee80211_hdr_4addr *header, u16 capability,
3004 u16 beacon_period, u8 channel, u8 rssi, u8 ssid_len,
3005 u8 *ssid, int is_beacon)
3006 {
3007 u8 *bss = capability & C80211_MGMT_CAPABILITY_ESS ? header->addr2 : header->addr3;
3008 int i, index;
3009
3010 for (index = -1, i = 0; i < priv->BSS_list_entries; i++)
3011 if (memcmp(bss, priv->BSSinfo[i].BSSID, 6) == 0)
3012 index = i;
3013
3014 /* If we process a probe and an entry from this BSS exists
3015 we will update the BSS entry with the info from this BSS.
3016 If we process a beacon we will only update RSSI */
3017
3018 if (index == -1) {
3019 if (priv->BSS_list_entries == MAX_BSS_ENTRIES)
3020 return;
3021 index = priv->BSS_list_entries++;
3022 memcpy(priv->BSSinfo[index].BSSID, bss, 6);
3023 priv->BSSinfo[index].RSSI = rssi;
3024 } else {
3025 if (rssi > priv->BSSinfo[index].RSSI)
3026 priv->BSSinfo[index].RSSI = rssi;
3027 if (is_beacon)
3028 return;
3029 }
3030
3031 priv->BSSinfo[index].channel = channel;
3032 priv->BSSinfo[index].beacon_period = beacon_period;
3033 priv->BSSinfo[index].UsingWEP = capability & C80211_MGMT_CAPABILITY_Privacy;
3034 memcpy(priv->BSSinfo[index].SSID, ssid, ssid_len);
3035 priv->BSSinfo[index].SSIDsize = ssid_len;
3036
3037 if (capability & C80211_MGMT_CAPABILITY_IBSS)
3038 priv->BSSinfo[index].BSStype = IW_MODE_ADHOC;
3039 else if (capability & C80211_MGMT_CAPABILITY_ESS)
3040 priv->BSSinfo[index].BSStype =IW_MODE_INFRA;
3041
3042 priv->BSSinfo[index].preamble = capability & C80211_MGMT_CAPABILITY_ShortPreamble ?
3043 SHORT_PREAMBLE : LONG_PREAMBLE;
3044 }
3045
3046 static void authenticate(struct atmel_private *priv, u16 frame_len)
3047 {
3048 struct auth_body *auth = (struct auth_body *)priv->rx_buf;
3049 u16 status = le16_to_cpu(auth->status);
3050 u16 trans_seq_no = le16_to_cpu(auth->trans_seq);
3051 u16 system = le16_to_cpu(auth->alg);
3052
3053 if (status == C80211_MGMT_SC_Success && !priv->wep_is_on) {
3054 /* no WEP */
3055 if (priv->station_was_associated) {
3056 atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
3057 send_association_request(priv, 1);
3058 return;
3059 } else {
3060 atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
3061 send_association_request(priv, 0);
3062 return;
3063 }
3064 }
3065
3066 if (status == C80211_MGMT_SC_Success && priv->wep_is_on) {
3067 int should_associate = 0;
3068 /* WEP */
3069 if (trans_seq_no != priv->ExpectedAuthentTransactionSeqNum)
3070 return;
3071
3072 if (system == C80211_MGMT_AAN_OPENSYSTEM) {
3073 if (trans_seq_no == 0x0002) {
3074 should_associate = 1;
3075 }
3076 } else if (system == C80211_MGMT_AAN_SHAREDKEY) {
3077 if (trans_seq_no == 0x0002 &&
3078 auth->el_id == C80211_MGMT_ElementID_ChallengeText) {
3079 send_authentication_request(priv, system, auth->chall_text, auth->chall_text_len);
3080 return;
3081 } else if (trans_seq_no == 0x0004) {
3082 should_associate = 1;
3083 }
3084 }
3085
3086 if (should_associate) {
3087 if(priv->station_was_associated) {
3088 atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
3089 send_association_request(priv, 1);
3090 return;
3091 } else {
3092 atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
3093 send_association_request(priv, 0);
3094 return;
3095 }
3096 }
3097 }
3098
3099 if (status == WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG) {
3100 /* Do opensystem first, then try sharedkey */
3101 if (system == WLAN_AUTH_OPEN) {
3102 priv->CurrentAuthentTransactionSeqNum = 0x001;
3103 priv->exclude_unencrypted = 1;
3104 send_authentication_request(priv, WLAN_AUTH_SHARED_KEY, NULL, 0);
3105 return;
3106 } else if (priv->connect_to_any_BSS) {
3107 int bss_index;
3108
3109 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3110
3111 if ((bss_index = retrieve_bss(priv)) != -1) {
3112 atmel_join_bss(priv, bss_index);
3113 return;
3114 }
3115 }
3116 }
3117
3118 priv->AuthenticationRequestRetryCnt = 0;
3119 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3120 priv->station_is_associated = 0;
3121 }
3122
3123 static void associate(struct atmel_private *priv, u16 frame_len, u16 subtype)
3124 {
3125 struct ass_resp_format {
3126 u16 capability;
3127 u16 status;
3128 u16 ass_id;
3129 u8 el_id;
3130 u8 length;
3131 u8 rates[4];
3132 } *ass_resp = (struct ass_resp_format *)priv->rx_buf;
3133
3134 u16 status = le16_to_cpu(ass_resp->status);
3135 u16 ass_id = le16_to_cpu(ass_resp->ass_id);
3136 u16 rates_len = ass_resp->length > 4 ? 4 : ass_resp->length;
3137
3138 union iwreq_data wrqu;
3139
3140 if (frame_len < 8 + rates_len)
3141 return;
3142
3143 if (status == C80211_MGMT_SC_Success) {
3144 if (subtype == C80211_SUBTYPE_MGMT_ASS_RESPONSE)
3145 priv->AssociationRequestRetryCnt = 0;
3146 else
3147 priv->ReAssociationRequestRetryCnt = 0;
3148
3149 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3150 MAC_MGMT_MIB_STATION_ID_POS, ass_id & 0x3fff);
3151 atmel_set_mib(priv, Phy_Mib_Type,
3152 PHY_MIB_RATE_SET_POS, ass_resp->rates, rates_len);
3153 if (priv->power_mode == 0) {
3154 priv->listen_interval = 1;
3155 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3156 MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3157 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3158 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3159 } else {
3160 priv->listen_interval = 2;
3161 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3162 MAC_MGMT_MIB_PS_MODE_POS, PS_MODE);
3163 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3164 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 2);
3165 }
3166
3167 priv->station_is_associated = 1;
3168 priv->station_was_associated = 1;
3169 atmel_enter_state(priv, STATION_STATE_READY);
3170
3171 /* Send association event to userspace */
3172 wrqu.data.length = 0;
3173 wrqu.data.flags = 0;
3174 memcpy(wrqu.ap_addr.sa_data, priv->CurrentBSSID, ETH_ALEN);
3175 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
3176 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
3177
3178 return;
3179 }
3180
3181 if (subtype == C80211_SUBTYPE_MGMT_ASS_RESPONSE &&
3182 status != C80211_MGMT_SC_AssDeniedBSSRate &&
3183 status != C80211_MGMT_SC_SupportCapabilities &&
3184 priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
3185 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3186 priv->AssociationRequestRetryCnt++;
3187 send_association_request(priv, 0);
3188 return;
3189 }
3190
3191 if (subtype == C80211_SUBTYPE_MGMT_REASS_RESPONSE &&
3192 status != C80211_MGMT_SC_AssDeniedBSSRate &&
3193 status != C80211_MGMT_SC_SupportCapabilities &&
3194 priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
3195 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3196 priv->ReAssociationRequestRetryCnt++;
3197 send_association_request(priv, 1);
3198 return;
3199 }
3200
3201 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3202 priv->station_is_associated = 0;
3203
3204 if (priv->connect_to_any_BSS) {
3205 int bss_index;
3206 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3207
3208 if ((bss_index = retrieve_bss(priv)) != -1)
3209 atmel_join_bss(priv, bss_index);
3210 }
3211 }
3212
3213 void atmel_join_bss(struct atmel_private *priv, int bss_index)
3214 {
3215 struct bss_info *bss = &priv->BSSinfo[bss_index];
3216
3217 memcpy(priv->CurrentBSSID, bss->BSSID, 6);
3218 memcpy(priv->SSID, bss->SSID, priv->SSID_size = bss->SSIDsize);
3219
3220 /* The WPA stuff cares about the current AP address */
3221 if (priv->use_wpa)
3222 build_wpa_mib(priv);
3223
3224 /* When switching to AdHoc turn OFF Power Save if needed */
3225
3226 if (bss->BSStype == IW_MODE_ADHOC &&
3227 priv->operating_mode != IW_MODE_ADHOC &&
3228 priv->power_mode) {
3229 priv->power_mode = 0;
3230 priv->listen_interval = 1;
3231 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3232 MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3233 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3234 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3235 }
3236
3237 priv->operating_mode = bss->BSStype;
3238 priv->channel = bss->channel & 0x7f;
3239 priv->beacon_period = bss->beacon_period;
3240
3241 if (priv->preamble != bss->preamble) {
3242 priv->preamble = bss->preamble;
3243 atmel_set_mib8(priv, Local_Mib_Type,
3244 LOCAL_MIB_PREAMBLE_TYPE, bss->preamble);
3245 }
3246
3247 if (!priv->wep_is_on && bss->UsingWEP) {
3248 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3249 priv->station_is_associated = 0;
3250 return;
3251 }
3252
3253 if (priv->wep_is_on && !bss->UsingWEP) {
3254 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3255 priv->station_is_associated = 0;
3256 return;
3257 }
3258
3259 atmel_enter_state(priv, STATION_STATE_JOINNING);
3260
3261 if (priv->operating_mode == IW_MODE_INFRA)
3262 join(priv, BSS_TYPE_INFRASTRUCTURE);
3263 else
3264 join(priv, BSS_TYPE_AD_HOC);
3265 }
3266
3267 static void restart_search(struct atmel_private *priv)
3268 {
3269 int bss_index;
3270
3271 if (!priv->connect_to_any_BSS) {
3272 atmel_scan(priv, 1);
3273 } else {
3274 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3275
3276 if ((bss_index = retrieve_bss(priv)) != -1)
3277 atmel_join_bss(priv, bss_index);
3278 else
3279 atmel_scan(priv, 0);
3280 }
3281 }
3282
3283 static void smooth_rssi(struct atmel_private *priv, u8 rssi)
3284 {
3285 u8 old = priv->wstats.qual.level;
3286 u8 max_rssi = 42; /* 502-rmfd-revd max by experiment, default for now */
3287
3288 switch (priv->firmware_type) {
3289 case ATMEL_FW_TYPE_502E:
3290 max_rssi = 63; /* 502-rmfd-reve max by experiment */
3291 break;
3292 default:
3293 break;
3294 }
3295
3296 rssi = rssi * 100 / max_rssi;
3297 if ((rssi + old) % 2)
3298 priv->wstats.qual.level = (rssi + old) / 2 + 1;
3299 else
3300 priv->wstats.qual.level = (rssi + old) / 2;
3301 priv->wstats.qual.updated |= IW_QUAL_LEVEL_UPDATED;
3302 priv->wstats.qual.updated &= ~IW_QUAL_LEVEL_INVALID;
3303 }
3304
3305 static void atmel_smooth_qual(struct atmel_private *priv)
3306 {
3307 unsigned long time_diff = (jiffies - priv->last_qual) / HZ;
3308 while (time_diff--) {
3309 priv->last_qual += HZ;
3310 priv->wstats.qual.qual = priv->wstats.qual.qual / 2;
3311 priv->wstats.qual.qual +=
3312 priv->beacons_this_sec * priv->beacon_period * (priv->wstats.qual.level + 100) / 4000;
3313 priv->beacons_this_sec = 0;
3314 }
3315 priv->wstats.qual.updated |= IW_QUAL_QUAL_UPDATED;
3316 priv->wstats.qual.updated &= ~IW_QUAL_QUAL_INVALID;
3317 }
3318
3319 /* deals with incoming managment frames. */
3320 static void atmel_management_frame(struct atmel_private *priv,
3321 struct ieee80211_hdr_4addr *header,
3322 u16 frame_len, u8 rssi)
3323 {
3324 u16 subtype;
3325
3326 subtype = le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_STYPE;
3327 switch (subtype) {
3328 case C80211_SUBTYPE_MGMT_BEACON:
3329 case C80211_SUBTYPE_MGMT_ProbeResponse:
3330
3331 /* beacon frame has multiple variable-length fields -
3332 never let an engineer loose with a data structure design. */
3333 {
3334 struct beacon_format {
3335 u64 timestamp;
3336 u16 interval;
3337 u16 capability;
3338 u8 ssid_el_id;
3339 u8 ssid_length;
3340 /* ssid here */
3341 u8 rates_el_id;
3342 u8 rates_length;
3343 /* rates here */
3344 u8 ds_el_id;
3345 u8 ds_length;
3346 /* ds here */
3347 } *beacon = (struct beacon_format *)priv->rx_buf;
3348
3349 u8 channel, rates_length, ssid_length;
3350 u64 timestamp = le64_to_cpu(beacon->timestamp);
3351 u16 beacon_interval = le16_to_cpu(beacon->interval);
3352 u16 capability = le16_to_cpu(beacon->capability);
3353 u8 *beaconp = priv->rx_buf;
3354 ssid_length = beacon->ssid_length;
3355 /* this blows chunks. */
3356 if (frame_len < 14 || frame_len < ssid_length + 15)
3357 return;
3358 rates_length = beaconp[beacon->ssid_length + 15];
3359 if (frame_len < ssid_length + rates_length + 18)
3360 return;
3361 if (ssid_length > MAX_SSID_LENGTH)
3362 return;
3363 channel = beaconp[ssid_length + rates_length + 18];
3364
3365 if (priv->station_state == STATION_STATE_READY) {
3366 smooth_rssi(priv, rssi);
3367 if (is_frame_from_current_bss(priv, header)) {
3368 priv->beacons_this_sec++;
3369 atmel_smooth_qual(priv);
3370 if (priv->last_beacon_timestamp) {
3371 /* Note truncate this to 32 bits - kernel can't divide a long long */
3372 u32 beacon_delay = timestamp - priv->last_beacon_timestamp;
3373 int beacons = beacon_delay / (beacon_interval * 1000);
3374 if (beacons > 1)
3375 priv->wstats.miss.beacon += beacons - 1;
3376 }
3377 priv->last_beacon_timestamp = timestamp;
3378 handle_beacon_probe(priv, capability, channel);
3379 }
3380 }
3381
3382 if (priv->station_state == STATION_STATE_SCANNING)
3383 store_bss_info(priv, header, capability,
3384 beacon_interval, channel, rssi,
3385 ssid_length,
3386 &beacon->rates_el_id,
3387 subtype == C80211_SUBTYPE_MGMT_BEACON);
3388 }
3389 break;
3390
3391 case C80211_SUBTYPE_MGMT_Authentication:
3392
3393 if (priv->station_state == STATION_STATE_AUTHENTICATING)
3394 authenticate(priv, frame_len);
3395
3396 break;
3397
3398 case C80211_SUBTYPE_MGMT_ASS_RESPONSE:
3399 case C80211_SUBTYPE_MGMT_REASS_RESPONSE:
3400
3401 if (priv->station_state == STATION_STATE_ASSOCIATING ||
3402 priv->station_state == STATION_STATE_REASSOCIATING)
3403 associate(priv, frame_len, subtype);
3404
3405 break;
3406
3407 case C80211_SUBTYPE_MGMT_DISASSOSIATION:
3408 if (priv->station_is_associated &&
3409 priv->operating_mode == IW_MODE_INFRA &&
3410 is_frame_from_current_bss(priv, header)) {
3411 priv->station_was_associated = 0;
3412 priv->station_is_associated = 0;
3413
3414 atmel_enter_state(priv, STATION_STATE_JOINNING);
3415 join(priv, BSS_TYPE_INFRASTRUCTURE);
3416 }
3417
3418 break;
3419
3420 case C80211_SUBTYPE_MGMT_Deauthentication:
3421 if (priv->operating_mode == IW_MODE_INFRA &&
3422 is_frame_from_current_bss(priv, header)) {
3423 priv->station_was_associated = 0;
3424
3425 atmel_enter_state(priv, STATION_STATE_JOINNING);
3426 join(priv, BSS_TYPE_INFRASTRUCTURE);
3427 }
3428
3429 break;
3430 }
3431 }
3432
3433 /* run when timer expires */
3434 static void atmel_management_timer(u_long a)
3435 {
3436 struct net_device *dev = (struct net_device *) a;
3437 struct atmel_private *priv = netdev_priv(dev);
3438 unsigned long flags;
3439
3440 /* Check if the card has been yanked. */
3441 if (priv->card && priv->present_callback &&
3442 !(*priv->present_callback)(priv->card))
3443 return;
3444
3445 spin_lock_irqsave(&priv->irqlock, flags);
3446
3447 switch (priv->station_state) {
3448
3449 case STATION_STATE_AUTHENTICATING:
3450 if (priv->AuthenticationRequestRetryCnt >= MAX_AUTHENTICATION_RETRIES) {
3451 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3452 priv->station_is_associated = 0;
3453 priv->AuthenticationRequestRetryCnt = 0;
3454 restart_search(priv);
3455 } else {
3456 int auth = C80211_MGMT_AAN_OPENSYSTEM;
3457 priv->AuthenticationRequestRetryCnt++;
3458 priv->CurrentAuthentTransactionSeqNum = 0x0001;
3459 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3460 if (priv->wep_is_on && priv->exclude_unencrypted)
3461 auth = C80211_MGMT_AAN_SHAREDKEY;
3462 send_authentication_request(priv, auth, NULL, 0);
3463 }
3464 break;
3465
3466 case STATION_STATE_ASSOCIATING:
3467 if (priv->AssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3468 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3469 priv->station_is_associated = 0;
3470 priv->AssociationRequestRetryCnt = 0;
3471 restart_search(priv);
3472 } else {
3473 priv->AssociationRequestRetryCnt++;
3474 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3475 send_association_request(priv, 0);
3476 }
3477 break;
3478
3479 case STATION_STATE_REASSOCIATING:
3480 if (priv->ReAssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3481 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3482 priv->station_is_associated = 0;
3483 priv->ReAssociationRequestRetryCnt = 0;
3484 restart_search(priv);
3485 } else {
3486 priv->ReAssociationRequestRetryCnt++;
3487 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3488 send_association_request(priv, 1);
3489 }
3490 break;
3491
3492 default:
3493 break;
3494 }
3495
3496 spin_unlock_irqrestore(&priv->irqlock, flags);
3497 }
3498
3499 static void atmel_command_irq(struct atmel_private *priv)
3500 {
3501 u8 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
3502 u8 command = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET));
3503 int fast_scan;
3504
3505 if (status == CMD_STATUS_IDLE ||
3506 status == CMD_STATUS_IN_PROGRESS)
3507 return;
3508
3509 switch (command){
3510
3511 case CMD_Start:
3512 if (status == CMD_STATUS_COMPLETE) {
3513 priv->station_was_associated = priv->station_is_associated;
3514 atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
3515 (u8 *)priv->CurrentBSSID, 6);
3516 atmel_enter_state(priv, STATION_STATE_READY);
3517 }
3518 break;
3519
3520 case CMD_Scan:
3521 fast_scan = priv->fast_scan;
3522 priv->fast_scan = 0;
3523
3524 if (status != CMD_STATUS_COMPLETE) {
3525 atmel_scan(priv, 1);
3526 } else {
3527 int bss_index = retrieve_bss(priv);
3528 if (bss_index != -1) {
3529 atmel_join_bss(priv, bss_index);
3530 } else if (priv->operating_mode == IW_MODE_ADHOC &&
3531 priv->SSID_size != 0) {
3532 start(priv, BSS_TYPE_AD_HOC);
3533 } else {
3534 priv->fast_scan = !fast_scan;
3535 atmel_scan(priv, 1);
3536 }
3537 priv->site_survey_state = SITE_SURVEY_COMPLETED;
3538 }
3539 break;
3540
3541 case CMD_SiteSurvey:
3542 priv->fast_scan = 0;
3543
3544 if (status != CMD_STATUS_COMPLETE)
3545 return;
3546
3547 priv->site_survey_state = SITE_SURVEY_COMPLETED;
3548 if (priv->station_is_associated) {
3549 atmel_enter_state(priv, STATION_STATE_READY);
3550 } else {
3551 atmel_scan(priv, 1);
3552 }
3553 break;
3554
3555 case CMD_Join:
3556 if (status == CMD_STATUS_COMPLETE) {
3557 if (priv->operating_mode == IW_MODE_ADHOC) {
3558 priv->station_was_associated = priv->station_is_associated;
3559 atmel_enter_state(priv, STATION_STATE_READY);
3560 } else {
3561 int auth = C80211_MGMT_AAN_OPENSYSTEM;
3562 priv->AuthenticationRequestRetryCnt = 0;
3563 atmel_enter_state(priv, STATION_STATE_AUTHENTICATING);
3564
3565 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3566 priv->CurrentAuthentTransactionSeqNum = 0x0001;
3567 if (priv->wep_is_on && priv->exclude_unencrypted)
3568 auth = C80211_MGMT_AAN_SHAREDKEY;
3569 send_authentication_request(priv, auth, NULL, 0);
3570 }
3571 return;
3572 }
3573
3574 atmel_scan(priv, 1);
3575 }
3576 }
3577
3578 static int atmel_wakeup_firmware(struct atmel_private *priv)
3579 {
3580 struct host_info_struct *iface = &priv->host_info;
3581 u16 mr1, mr3;
3582 int i;
3583
3584 if (priv->card_type == CARD_TYPE_SPI_FLASH)
3585 atmel_set_gcr(priv->dev, GCR_REMAP);
3586
3587 /* wake up on-board processor */
3588 atmel_clear_gcr(priv->dev, 0x0040);
3589 atmel_write16(priv->dev, BSR, BSS_SRAM);
3590
3591 if (priv->card_type == CARD_TYPE_SPI_FLASH)
3592 mdelay(100);
3593
3594 /* and wait for it */
3595 for (i = LOOP_RETRY_LIMIT; i; i--) {
3596 mr1 = atmel_read16(priv->dev, MR1);
3597 mr3 = atmel_read16(priv->dev, MR3);
3598
3599 if (mr3 & MAC_BOOT_COMPLETE)
3600 break;
3601 if (mr1 & MAC_BOOT_COMPLETE &&
3602 priv->bus_type == BUS_TYPE_PCCARD)
3603 break;
3604 }
3605
3606 if (i == 0) {
3607 printk(KERN_ALERT "%s: MAC failed to boot.\n", priv->dev->name);
3608 return 0;
3609 }
3610
3611 if ((priv->host_info_base = atmel_read16(priv->dev, MR2)) == 0xffff) {
3612 printk(KERN_ALERT "%s: card missing.\n", priv->dev->name);
3613 return 0;
3614 }
3615
3616 /* now check for completion of MAC initialization through
3617 the FunCtrl field of the IFACE, poll MR1 to detect completion of
3618 MAC initialization, check completion status, set interrupt mask,
3619 enables interrupts and calls Tx and Rx initialization functions */
3620
3621 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET), FUNC_CTRL_INIT_COMPLETE);
3622
3623 for (i = LOOP_RETRY_LIMIT; i; i--) {
3624 mr1 = atmel_read16(priv->dev, MR1);
3625 mr3 = atmel_read16(priv->dev, MR3);
3626
3627 if (mr3 & MAC_INIT_COMPLETE)
3628 break;
3629 if (mr1 & MAC_INIT_COMPLETE &&
3630 priv->bus_type == BUS_TYPE_PCCARD)
3631 break;
3632 }
3633
3634 if (i == 0) {
3635 printk(KERN_ALERT "%s: MAC failed to initialise.\n",
3636 priv->dev->name);
3637 return 0;
3638 }
3639
3640 /* Check for MAC_INIT_OK only on the register that the MAC_INIT_OK was set */
3641 if ((mr3 & MAC_INIT_COMPLETE) &&
3642 !(atmel_read16(priv->dev, MR3) & MAC_INIT_OK)) {
3643 printk(KERN_ALERT "%s: MAC failed MR3 self-test.\n", priv->dev->name);
3644 return 0;
3645 }
3646 if ((mr1 & MAC_INIT_COMPLETE) &&
3647 !(atmel_read16(priv->dev, MR1) & MAC_INIT_OK)) {
3648 printk(KERN_ALERT "%s: MAC failed MR1 self-test.\n", priv->dev->name);
3649 return 0;
3650 }
3651
3652 atmel_copy_to_host(priv->dev, (unsigned char *)iface,
3653 priv->host_info_base, sizeof(*iface));
3654
3655 iface->tx_buff_pos = le16_to_cpu(iface->tx_buff_pos);
3656 iface->tx_buff_size = le16_to_cpu(iface->tx_buff_size);
3657 iface->tx_desc_pos = le16_to_cpu(iface->tx_desc_pos);
3658 iface->tx_desc_count = le16_to_cpu(iface->tx_desc_count);
3659 iface->rx_buff_pos = le16_to_cpu(iface->rx_buff_pos);
3660 iface->rx_buff_size = le16_to_cpu(iface->rx_buff_size);
3661 iface->rx_desc_pos = le16_to_cpu(iface->rx_desc_pos);
3662 iface->rx_desc_count = le16_to_cpu(iface->rx_desc_count);
3663 iface->build_version = le16_to_cpu(iface->build_version);
3664 iface->command_pos = le16_to_cpu(iface->command_pos);
3665 iface->major_version = le16_to_cpu(iface->major_version);
3666 iface->minor_version = le16_to_cpu(iface->minor_version);
3667 iface->func_ctrl = le16_to_cpu(iface->func_ctrl);
3668 iface->mac_status = le16_to_cpu(iface->mac_status);
3669
3670 return 1;
3671 }
3672
3673 /* determine type of memory and MAC address */
3674 static int probe_atmel_card(struct net_device *dev)
3675 {
3676 int rc = 0;
3677 struct atmel_private *priv = netdev_priv(dev);
3678
3679 /* reset pccard */
3680 if (priv->bus_type == BUS_TYPE_PCCARD)
3681 atmel_write16(dev, GCR, 0x0060);
3682
3683 atmel_write16(dev, GCR, 0x0040);
3684 mdelay(500);
3685
3686 if (atmel_read16(dev, MR2) == 0) {
3687 /* No stored firmware so load a small stub which just
3688 tells us the MAC address */
3689 int i;
3690 priv->card_type = CARD_TYPE_EEPROM;
3691 atmel_write16(dev, BSR, BSS_IRAM);
3692 atmel_copy_to_card(dev, 0, mac_reader, sizeof(mac_reader));
3693 atmel_set_gcr(dev, GCR_REMAP);
3694 atmel_clear_gcr(priv->dev, 0x0040);
3695 atmel_write16(dev, BSR, BSS_SRAM);
3696 for (i = LOOP_RETRY_LIMIT; i; i--)
3697 if (atmel_read16(dev, MR3) & MAC_BOOT_COMPLETE)
3698 break;
3699 if (i == 0) {
3700 printk(KERN_ALERT "%s: MAC failed to boot MAC address reader.\n", dev->name);
3701 } else {
3702 atmel_copy_to_host(dev, dev->dev_addr, atmel_read16(dev, MR2), 6);
3703 /* got address, now squash it again until the network
3704 interface is opened */
3705 if (priv->bus_type == BUS_TYPE_PCCARD)
3706 atmel_write16(dev, GCR, 0x0060);
3707 atmel_write16(dev, GCR, 0x0040);
3708 rc = 1;
3709 }
3710 } else if (atmel_read16(dev, MR4) == 0) {
3711 /* Mac address easy in this case. */
3712 priv->card_type = CARD_TYPE_PARALLEL_FLASH;
3713 atmel_write16(dev, BSR, 1);
3714 atmel_copy_to_host(dev, dev->dev_addr, 0xc000, 6);
3715 atmel_write16(dev, BSR, 0x200);
3716 rc = 1;
3717 } else {
3718 /* Standard firmware in flash, boot it up and ask
3719 for the Mac Address */
3720 priv->card_type = CARD_TYPE_SPI_FLASH;
3721 if (atmel_wakeup_firmware(priv)) {
3722 atmel_get_mib(priv, Mac_Address_Mib_Type, 0, dev->dev_addr, 6);
3723
3724 /* got address, now squash it again until the network
3725 interface is opened */
3726 if (priv->bus_type == BUS_TYPE_PCCARD)
3727 atmel_write16(dev, GCR, 0x0060);
3728 atmel_write16(dev, GCR, 0x0040);
3729 rc = 1;
3730 }
3731 }
3732
3733 if (rc) {
3734 if (dev->dev_addr[0] == 0xFF) {
3735 u8 default_mac[] = {0x00,0x04, 0x25, 0x00, 0x00, 0x00};
3736 printk(KERN_ALERT "%s: *** Invalid MAC address. UPGRADE Firmware ****\n", dev->name);
3737 memcpy(dev->dev_addr, default_mac, 6);
3738 }
3739 }
3740
3741 return rc;
3742 }
3743
3744 /* Move the encyption information on the MIB structure.
3745 This routine is for the pre-WPA firmware: later firmware has
3746 a different format MIB and a different routine. */
3747 static void build_wep_mib(struct atmel_private *priv)
3748 {
3749 struct { /* NB this is matched to the hardware, don't change. */
3750 u8 wep_is_on;
3751 u8 default_key; /* 0..3 */
3752 u8 reserved;
3753 u8 exclude_unencrypted;
3754
3755 u32 WEPICV_error_count;
3756 u32 WEP_excluded_count;
3757
3758 u8 wep_keys[MAX_ENCRYPTION_KEYS][13];
3759 u8 encryption_level; /* 0, 1, 2 */
3760 u8 reserved2[3];
3761 } mib;
3762 int i;
3763
3764 mib.wep_is_on = priv->wep_is_on;
3765 if (priv->wep_is_on) {
3766 if (priv->wep_key_len[priv->default_key] > 5)
3767 mib.encryption_level = 2;
3768 else
3769 mib.encryption_level = 1;
3770 } else {
3771 mib.encryption_level = 0;
3772 }
3773
3774 mib.default_key = priv->default_key;
3775 mib.exclude_unencrypted = priv->exclude_unencrypted;
3776
3777 for (i = 0; i < MAX_ENCRYPTION_KEYS; i++)
3778 memcpy(mib.wep_keys[i], priv->wep_keys[i], 13);
3779
3780 atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3781 }
3782
3783 static void build_wpa_mib(struct atmel_private *priv)
3784 {
3785 /* This is for the later (WPA enabled) firmware. */
3786
3787 struct { /* NB this is matched to the hardware, don't change. */
3788 u8 cipher_default_key_value[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
3789 u8 receiver_address[6];
3790 u8 wep_is_on;
3791 u8 default_key; /* 0..3 */
3792 u8 group_key;
3793 u8 exclude_unencrypted;
3794 u8 encryption_type;
3795 u8 reserved;
3796
3797 u32 WEPICV_error_count;
3798 u32 WEP_excluded_count;
3799
3800 u8 key_RSC[4][8];
3801 } mib;
3802
3803 int i;
3804
3805 mib.wep_is_on = priv->wep_is_on;
3806 mib.exclude_unencrypted = priv->exclude_unencrypted;
3807 memcpy(mib.receiver_address, priv->CurrentBSSID, 6);
3808
3809 /* zero all the keys before adding in valid ones. */
3810 memset(mib.cipher_default_key_value, 0, sizeof(mib.cipher_default_key_value));
3811
3812 if (priv->wep_is_on) {
3813 /* There's a comment in the Atmel code to the effect that this
3814 is only valid when still using WEP, it may need to be set to
3815 something to use WPA */
3816 memset(mib.key_RSC, 0, sizeof(mib.key_RSC));
3817
3818 mib.default_key = mib.group_key = 255;
3819 for (i = 0; i < MAX_ENCRYPTION_KEYS; i++) {
3820 if (priv->wep_key_len[i] > 0) {
3821 memcpy(mib.cipher_default_key_value[i], priv->wep_keys[i], MAX_ENCRYPTION_KEY_SIZE);
3822 if (i == priv->default_key) {
3823 mib.default_key = i;
3824 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 7;
3825 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->pairwise_cipher_suite;
3826 } else {
3827 mib.group_key = i;
3828 priv->group_cipher_suite = priv->pairwise_cipher_suite;
3829 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 1;
3830 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->group_cipher_suite;
3831 }
3832 }
3833 }
3834 if (mib.default_key == 255)
3835 mib.default_key = mib.group_key != 255 ? mib.group_key : 0;
3836 if (mib.group_key == 255)
3837 mib.group_key = mib.default_key;
3838
3839 }
3840
3841 atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3842 }
3843
3844 static int reset_atmel_card(struct net_device *dev)
3845 {
3846 /* do everything necessary to wake up the hardware, including
3847 waiting for the lightning strike and throwing the knife switch....
3848
3849 set all the Mib values which matter in the card to match
3850 their settings in the atmel_private structure. Some of these
3851 can be altered on the fly, but many (WEP, infrastucture or ad-hoc)
3852 can only be changed by tearing down the world and coming back through
3853 here.
3854
3855 This routine is also responsible for initialising some
3856 hardware-specific fields in the atmel_private structure,
3857 including a copy of the firmware's hostinfo stucture
3858 which is the route into the rest of the firmare datastructures. */
3859
3860 struct atmel_private *priv = netdev_priv(dev);
3861 u8 configuration;
3862 int old_state = priv->station_state;
3863
3864 /* data to add to the firmware names, in priority order
3865 this implemenents firmware versioning */
3866
3867 static char *firmware_modifier[] = {
3868 "-wpa",
3869 "",
3870 NULL
3871 };
3872
3873 /* reset pccard */
3874 if (priv->bus_type == BUS_TYPE_PCCARD)
3875 atmel_write16(priv->dev, GCR, 0x0060);
3876
3877 /* stop card , disable interrupts */
3878 atmel_write16(priv->dev, GCR, 0x0040);
3879
3880 if (priv->card_type == CARD_TYPE_EEPROM) {
3881 /* copy in firmware if needed */
3882 const struct firmware *fw_entry = NULL;
3883 unsigned char *fw;
3884 int len = priv->firmware_length;
3885 if (!(fw = priv->firmware)) {
3886 if (priv->firmware_type == ATMEL_FW_TYPE_NONE) {
3887 if (strlen(priv->firmware_id) == 0) {
3888 printk(KERN_INFO
3889 "%s: card type is unknown: assuming at76c502 firmware is OK.\n",
3890 dev->name);
3891 printk(KERN_INFO
3892 "%s: if not, use the firmware= module parameter.\n",
3893 dev->name);
3894 strcpy(priv->firmware_id, "atmel_at76c502.bin");
3895 }
3896 if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) != 0) {
3897 printk(KERN_ALERT
3898 "%s: firmware %s is missing, cannot continue.\n",
3899 dev->name, priv->firmware_id);
3900 return 0;
3901 }
3902 } else {
3903 int fw_index = 0;
3904 int success = 0;
3905
3906 /* get firmware filename entry based on firmware type ID */
3907 while (fw_table[fw_index].fw_type != priv->firmware_type
3908 && fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE)
3909 fw_index++;
3910
3911 /* construct the actual firmware file name */
3912 if (fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE) {
3913 int i;
3914 for (i = 0; firmware_modifier[i]; i++) {
3915 snprintf(priv->firmware_id, 32, "%s%s.%s", fw_table[fw_index].fw_file,
3916 firmware_modifier[i], fw_table[fw_index].fw_file_ext);
3917 priv->firmware_id[31] = '\0';
3918 if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) == 0) {
3919 success = 1;
3920 break;
3921 }
3922 }
3923 }
3924 if (!success) {
3925 printk(KERN_ALERT
3926 "%s: firmware %s is missing, cannot start.\n",
3927 dev->name, priv->firmware_id);
3928 priv->firmware_id[0] = '\0';
3929 return 0;
3930 }
3931 }
3932
3933 fw = fw_entry->data;
3934 len = fw_entry->size;
3935 }
3936
3937 if (len <= 0x6000) {
3938 atmel_write16(priv->dev, BSR, BSS_IRAM);
3939 atmel_copy_to_card(priv->dev, 0, fw, len);
3940 atmel_set_gcr(priv->dev, GCR_REMAP);
3941 } else {
3942 /* Remap */
3943 atmel_set_gcr(priv->dev, GCR_REMAP);
3944 atmel_write16(priv->dev, BSR, BSS_IRAM);
3945 atmel_copy_to_card(priv->dev, 0, fw, 0x6000);
3946 atmel_write16(priv->dev, BSR, 0x2ff);
3947 atmel_copy_to_card(priv->dev, 0x8000, &fw[0x6000], len - 0x6000);
3948 }
3949
3950 if (fw_entry)
3951 release_firmware(fw_entry);
3952 }
3953
3954 if (!atmel_wakeup_firmware(priv))
3955 return 0;
3956
3957 /* Check the version and set the correct flag for wpa stuff,
3958 old and new firmware is incompatible.
3959 The pre-wpa 3com firmware reports major version 5,
3960 the wpa 3com firmware is major version 4 and doesn't need
3961 the 3com broken-ness filter. */
3962 priv->use_wpa = (priv->host_info.major_version == 4);
3963 priv->radio_on_broken = (priv->host_info.major_version == 5);
3964
3965 /* unmask all irq sources */
3966 atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_MASK_OFFSET), 0xff);
3967
3968 /* int Tx system and enable Tx */
3969 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, 0), 0);
3970 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, 0), 0x80000000L);
3971 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, 0), 0);
3972 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, 0), 0);
3973
3974 priv->tx_desc_free = priv->host_info.tx_desc_count;
3975 priv->tx_desc_head = 0;
3976 priv->tx_desc_tail = 0;
3977 priv->tx_desc_previous = 0;
3978 priv->tx_free_mem = priv->host_info.tx_buff_size;
3979 priv->tx_buff_head = 0;
3980 priv->tx_buff_tail = 0;
3981
3982 configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3983 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
3984 configuration | FUNC_CTRL_TxENABLE);
3985
3986 /* init Rx system and enable */
3987 priv->rx_desc_head = 0;
3988
3989 configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3990 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
3991 configuration | FUNC_CTRL_RxENABLE);
3992
3993 if (!priv->radio_on_broken) {
3994 if (atmel_send_command_wait(priv, CMD_EnableRadio, NULL, 0) ==
3995 CMD_STATUS_REJECTED_RADIO_OFF) {
3996 printk(KERN_INFO
3997 "%s: cannot turn the radio on. (Hey radio, you're beautiful!)\n",
3998 dev->name);
3999 return 0;
4000 }
4001 }
4002
4003 /* set up enough MIB values to run. */
4004 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_AUTO_TX_RATE_POS, priv->auto_tx_rate);
4005 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_TX_PROMISCUOUS_POS, PROM_MODE_OFF);
4006 atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_RTS_THRESHOLD_POS, priv->rts_threshold);
4007 atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_FRAG_THRESHOLD_POS, priv->frag_threshold);
4008 atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_SHORT_RETRY_POS, priv->short_retry);
4009 atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_LONG_RETRY_POS, priv->long_retry);
4010 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, priv->preamble);
4011 atmel_set_mib(priv, Mac_Address_Mib_Type, MAC_ADDR_MIB_MAC_ADDR_POS,
4012 priv->dev->dev_addr, 6);
4013 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
4014 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
4015 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_BEACON_PER_POS, priv->default_beacon_period);
4016 atmel_set_mib(priv, Phy_Mib_Type, PHY_MIB_RATE_SET_POS, atmel_basic_rates, 4);
4017 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_PRIVACY_POS, priv->wep_is_on);
4018 if (priv->use_wpa)
4019 build_wpa_mib(priv);
4020 else
4021 build_wep_mib(priv);
4022
4023 if (old_state == STATION_STATE_READY)
4024 {
4025 union iwreq_data wrqu;
4026
4027 wrqu.data.length = 0;
4028 wrqu.data.flags = 0;
4029 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
4030 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
4031 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
4032 }
4033
4034 return 1;
4035 }
4036
4037 static void atmel_send_command(struct atmel_private *priv, int command,
4038 void *cmd, int cmd_size)
4039 {
4040 if (cmd)
4041 atmel_copy_to_card(priv->dev, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET),
4042 cmd, cmd_size);
4043
4044 atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET), command);
4045 atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET), 0);
4046 }
4047
4048 static int atmel_send_command_wait(struct atmel_private *priv, int command,
4049 void *cmd, int cmd_size)
4050 {
4051 int i, status;
4052
4053 atmel_send_command(priv, command, cmd, cmd_size);
4054
4055 for (i = 5000; i; i--) {
4056 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
4057 if (status != CMD_STATUS_IDLE &&
4058 status != CMD_STATUS_IN_PROGRESS)
4059 break;
4060 udelay(20);
4061 }
4062
4063 if (i == 0) {
4064 printk(KERN_ALERT "%s: failed to contact MAC.\n", priv->dev->name);
4065 status = CMD_STATUS_HOST_ERROR;
4066 } else {
4067 if (command != CMD_EnableRadio)
4068 status = CMD_STATUS_COMPLETE;
4069 }
4070
4071 return status;
4072 }
4073
4074 static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index)
4075 {
4076 struct get_set_mib m;
4077 m.type = type;
4078 m.size = 1;
4079 m.index = index;
4080
4081 atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
4082 return atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE));
4083 }
4084
4085 static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index, u8 data)
4086 {
4087 struct get_set_mib m;
4088 m.type = type;
4089 m.size = 1;
4090 m.index = index;
4091 m.data[0] = data;
4092
4093 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
4094 }
4095
4096 static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
4097 u16 data)
4098 {
4099 struct get_set_mib m;
4100 m.type = type;
4101 m.size = 2;
4102 m.index = index;
4103 m.data[0] = data;
4104 m.data[1] = data >> 8;
4105
4106 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 2);
4107 }
4108
4109 static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
4110 u8 *data, int data_len)
4111 {
4112 struct get_set_mib m;
4113 m.type = type;
4114 m.size = data_len;
4115 m.index = index;
4116
4117 if (data_len > MIB_MAX_DATA_BYTES)
4118 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4119
4120 memcpy(m.data, data, data_len);
4121 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
4122 }
4123
4124 static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
4125 u8 *data, int data_len)
4126 {
4127 struct get_set_mib m;
4128 m.type = type;
4129 m.size = data_len;
4130 m.index = index;
4131
4132 if (data_len > MIB_MAX_DATA_BYTES)
4133 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4134
4135 atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
4136 atmel_copy_to_host(priv->dev, data,
4137 atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE), data_len);
4138 }
4139
4140 static void atmel_writeAR(struct net_device *dev, u16 data)
4141 {
4142 int i;
4143 outw(data, dev->base_addr + AR);
4144 /* Address register appears to need some convincing..... */
4145 for (i = 0; data != inw(dev->base_addr + AR) && i < 10; i++)
4146 outw(data, dev->base_addr + AR);
4147 }
4148
4149 static void atmel_copy_to_card(struct net_device *dev, u16 dest,
4150 unsigned char *src, u16 len)
4151 {
4152 int i;
4153 atmel_writeAR(dev, dest);
4154 if (dest % 2) {
4155 atmel_write8(dev, DR, *src);
4156 src++; len--;
4157 }
4158 for (i = len; i > 1 ; i -= 2) {
4159 u8 lb = *src++;
4160 u8 hb = *src++;
4161 atmel_write16(dev, DR, lb | (hb << 8));
4162 }
4163 if (i)
4164 atmel_write8(dev, DR, *src);
4165 }
4166
4167 static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
4168 u16 src, u16 len)
4169 {
4170 int i;
4171 atmel_writeAR(dev, src);
4172 if (src % 2) {
4173 *dest = atmel_read8(dev, DR);
4174 dest++; len--;
4175 }
4176 for (i = len; i > 1 ; i -= 2) {
4177 u16 hw = atmel_read16(dev, DR);
4178 *dest++ = hw;
4179 *dest++ = hw >> 8;
4180 }
4181 if (i)
4182 *dest = atmel_read8(dev, DR);
4183 }
4184
4185 static void atmel_set_gcr(struct net_device *dev, u16 mask)
4186 {
4187 outw(inw(dev->base_addr + GCR) | mask, dev->base_addr + GCR);
4188 }
4189
4190 static void atmel_clear_gcr(struct net_device *dev, u16 mask)
4191 {
4192 outw(inw(dev->base_addr + GCR) & ~mask, dev->base_addr + GCR);
4193 }
4194
4195 static int atmel_lock_mac(struct atmel_private *priv)
4196 {
4197 int i, j = 20;
4198 retry:
4199 for (i = 5000; i; i--) {
4200 if (!atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET)))
4201 break;
4202 udelay(20);
4203 }
4204
4205 if (!i)
4206 return 0; /* timed out */
4207
4208 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 1);
4209 if (atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET))) {
4210 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
4211 if (!j--)
4212 return 0; /* timed out */
4213 goto retry;
4214 }
4215
4216 return 1;
4217 }
4218
4219 static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data)
4220 {
4221 atmel_writeAR(priv->dev, pos);
4222 atmel_write16(priv->dev, DR, data); /* card is little-endian */
4223 atmel_write16(priv->dev, DR, data >> 16);
4224 }
4225
4226 /***************************************************************************/
4227 /* There follows the source form of the MAC address reading firmware */
4228 /***************************************************************************/
4229 #if 0
4230
4231 /* Copyright 2003 Matthew T. Russotto */
4232 /* But derived from the Atmel 76C502 firmware written by Atmel and */
4233 /* included in "atmel wireless lan drivers" package */
4234 /**
4235 This file is part of net.russotto.AtmelMACFW, hereto referred to
4236 as AtmelMACFW
4237
4238 AtmelMACFW is free software; you can redistribute it and/or modify
4239 it under the terms of the GNU General Public License version 2
4240 as published by the Free Software Foundation.
4241
4242 AtmelMACFW is distributed in the hope that it will be useful,
4243 but WITHOUT ANY WARRANTY; without even the implied warranty of
4244 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4245 GNU General Public License for more details.
4246
4247 You should have received a copy of the GNU General Public License
4248 along with AtmelMACFW; if not, write to the Free Software
4249 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
4250
4251 ****************************************************************************/
4252 /* This firmware should work on the 76C502 RFMD, RFMD_D, and RFMD_E */
4253 /* It will probably work on the 76C504 and 76C502 RFMD_3COM */
4254 /* It only works on SPI EEPROM versions of the card. */
4255
4256 /* This firmware initializes the SPI controller and clock, reads the MAC */
4257 /* address from the EEPROM into SRAM, and puts the SRAM offset of the MAC */
4258 /* address in MR2, and sets MR3 to 0x10 to indicate it is done */
4259 /* It also puts a complete copy of the EEPROM in SRAM with the offset in */
4260 /* MR4, for investigational purposes (maybe we can determine chip type */
4261 /* from that?) */
4262
4263 .org 0
4264 .set MRBASE, 0x8000000
4265 .set CPSR_INITIAL, 0xD3 /* IRQ/FIQ disabled, ARM mode, Supervisor state */
4266 .set CPSR_USER, 0xD1 /* IRQ/FIQ disabled, ARM mode, USER state */
4267 .set SRAM_BASE, 0x02000000
4268 .set SP_BASE, 0x0F300000
4269 .set UNK_BASE, 0x0F000000 /* Some internal device, but which one? */
4270 .set SPI_CGEN_BASE, 0x0E000000 /* Some internal device, but which one? */
4271 .set UNK3_BASE, 0x02014000 /* Some internal device, but which one? */
4272 .set STACK_BASE, 0x5600
4273 .set SP_SR, 0x10
4274 .set SP_TDRE, 2 /* status register bit -- TDR empty */
4275 .set SP_RDRF, 1 /* status register bit -- RDR full */
4276 .set SP_SWRST, 0x80
4277 .set SP_SPIEN, 0x1
4278 .set SP_CR, 0 /* control register */
4279 .set SP_MR, 4 /* mode register */
4280 .set SP_RDR, 0x08 /* Read Data Register */
4281 .set SP_TDR, 0x0C /* Transmit Data Register */
4282 .set SP_CSR0, 0x30 /* chip select registers */
4283 .set SP_CSR1, 0x34
4284 .set SP_CSR2, 0x38
4285 .set SP_CSR3, 0x3C
4286 .set NVRAM_CMD_RDSR, 5 /* read status register */
4287 .set NVRAM_CMD_READ, 3 /* read data */
4288 .set NVRAM_SR_RDY, 1 /* RDY bit. This bit is inverted */
4289 .set SPI_8CLOCKS, 0xFF /* Writing this to the TDR doesn't do anything to the
4290 serial output, since SO is normally high. But it
4291 does cause 8 clock cycles and thus 8 bits to be
4292 clocked in to the chip. See Atmel's SPI
4293 controller (e.g. AT91M55800) timing and 4K
4294 SPI EEPROM manuals */
4295
4296 .set NVRAM_SCRATCH, 0x02000100 /* arbitrary area for scratchpad memory */
4297 .set NVRAM_IMAGE, 0x02000200
4298 .set NVRAM_LENGTH, 0x0200
4299 .set MAC_ADDRESS_MIB, SRAM_BASE
4300 .set MAC_ADDRESS_LENGTH, 6
4301 .set MAC_BOOT_FLAG, 0x10
4302 .set MR1, 0
4303 .set MR2, 4
4304 .set MR3, 8
4305 .set MR4, 0xC
4306 RESET_VECTOR:
4307 b RESET_HANDLER
4308 UNDEF_VECTOR:
4309 b HALT1
4310 SWI_VECTOR:
4311 b HALT1
4312 IABORT_VECTOR:
4313 b HALT1
4314 DABORT_VECTOR:
4315 RESERVED_VECTOR:
4316 b HALT1
4317 IRQ_VECTOR:
4318 b HALT1
4319 FIQ_VECTOR:
4320 b HALT1
4321 HALT1: b HALT1
4322 RESET_HANDLER:
4323 mov r0, #CPSR_INITIAL
4324 msr CPSR_c, r0 /* This is probably unnecessary */
4325
4326 /* I'm guessing this is initializing clock generator electronics for SPI */
4327 ldr r0, =SPI_CGEN_BASE
4328 mov r1, #0
4329 mov r1, r1, lsl #3
4330 orr r1,r1, #0
4331 str r1, [r0]
4332 ldr r1, [r0, #28]
4333 bic r1, r1, #16
4334 str r1, [r0, #28]
4335 mov r1, #1
4336 str r1, [r0, #8]
4337
4338 ldr r0, =MRBASE
4339 mov r1, #0
4340 strh r1, [r0, #MR1]
4341 strh r1, [r0, #MR2]
4342 strh r1, [r0, #MR3]
4343 strh r1, [r0, #MR4]
4344
4345 mov sp, #STACK_BASE
4346 bl SP_INIT
4347 mov r0, #10
4348 bl DELAY9
4349 bl GET_MAC_ADDR
4350 bl GET_WHOLE_NVRAM
4351 ldr r0, =MRBASE
4352 ldr r1, =MAC_ADDRESS_MIB
4353 strh r1, [r0, #MR2]
4354 ldr r1, =NVRAM_IMAGE
4355 strh r1, [r0, #MR4]
4356 mov r1, #MAC_BOOT_FLAG
4357 strh r1, [r0, #MR3]
4358 HALT2: b HALT2
4359 .func Get_Whole_NVRAM, GET_WHOLE_NVRAM
4360 GET_WHOLE_NVRAM:
4361 stmdb sp!, {lr}
4362 mov r2, #0 /* 0th bytes of NVRAM */
4363 mov r3, #NVRAM_LENGTH
4364 mov r1, #0 /* not used in routine */
4365 ldr r0, =NVRAM_IMAGE
4366 bl NVRAM_XFER
4367 ldmia sp!, {lr}
4368 bx lr
4369 .endfunc
4370
4371 .func Get_MAC_Addr, GET_MAC_ADDR
4372 GET_MAC_ADDR:
4373 stmdb sp!, {lr}
4374 mov r2, #0x120 /* address of MAC Address within NVRAM */
4375 mov r3, #MAC_ADDRESS_LENGTH
4376 mov r1, #0 /* not used in routine */
4377 ldr r0, =MAC_ADDRESS_MIB
4378 bl NVRAM_XFER
4379 ldmia sp!, {lr}
4380 bx lr
4381 .endfunc
4382 .ltorg
4383 .func Delay9, DELAY9
4384 DELAY9:
4385 adds r0, r0, r0, LSL #3 /* r0 = r0 * 9 */
4386 DELAYLOOP:
4387 beq DELAY9_done
4388 subs r0, r0, #1
4389 b DELAYLOOP
4390 DELAY9_done:
4391 bx lr
4392 .endfunc
4393
4394 .func SP_Init, SP_INIT
4395 SP_INIT:
4396 mov r1, #SP_SWRST
4397 ldr r0, =SP_BASE
4398 str r1, [r0, #SP_CR] /* reset the SPI */
4399 mov r1, #0
4400 str r1, [r0, #SP_CR] /* release SPI from reset state */
4401 mov r1, #SP_SPIEN
4402 str r1, [r0, #SP_MR] /* set the SPI to MASTER mode*/
4403 str r1, [r0, #SP_CR] /* enable the SPI */
4404
4405 /* My guess would be this turns on the SPI clock */
4406 ldr r3, =SPI_CGEN_BASE
4407 ldr r1, [r3, #28]
4408 orr r1, r1, #0x2000
4409 str r1, [r3, #28]
4410
4411 ldr r1, =0x2000c01
4412 str r1, [r0, #SP_CSR0]
4413 ldr r1, =0x2000201
4414 str r1, [r0, #SP_CSR1]
4415 str r1, [r0, #SP_CSR2]
4416 str r1, [r0, #SP_CSR3]
4417 ldr r1, [r0, #SP_SR]
4418 ldr r0, [r0, #SP_RDR]
4419 bx lr
4420 .endfunc
4421 .func NVRAM_Init, NVRAM_INIT
4422 NVRAM_INIT:
4423 ldr r1, =SP_BASE
4424 ldr r0, [r1, #SP_RDR]
4425 mov r0, #NVRAM_CMD_RDSR
4426 str r0, [r1, #SP_TDR]
4427 SP_loop1:
4428 ldr r0, [r1, #SP_SR]
4429 tst r0, #SP_TDRE
4430 beq SP_loop1
4431
4432 mov r0, #SPI_8CLOCKS
4433 str r0, [r1, #SP_TDR]
4434 SP_loop2:
4435 ldr r0, [r1, #SP_SR]
4436 tst r0, #SP_TDRE
4437 beq SP_loop2
4438
4439 ldr r0, [r1, #SP_RDR]
4440 SP_loop3:
4441 ldr r0, [r1, #SP_SR]
4442 tst r0, #SP_RDRF
4443 beq SP_loop3
4444
4445 ldr r0, [r1, #SP_RDR]
4446 and r0, r0, #255
4447 bx lr
4448 .endfunc
4449
4450 .func NVRAM_Xfer, NVRAM_XFER
4451 /* r0 = dest address */
4452 /* r1 = not used */
4453 /* r2 = src address within NVRAM */
4454 /* r3 = length */
4455 NVRAM_XFER:
4456 stmdb sp!, {r4, r5, lr}
4457 mov r5, r0 /* save r0 (dest address) */
4458 mov r4, r3 /* save r3 (length) */
4459 mov r0, r2, LSR #5 /* SPI memories put A8 in the command field */
4460 and r0, r0, #8
4461 add r0, r0, #NVRAM_CMD_READ
4462 ldr r1, =NVRAM_SCRATCH
4463 strb r0, [r1, #0] /* save command in NVRAM_SCRATCH[0] */
4464 strb r2, [r1, #1] /* save low byte of source address in NVRAM_SCRATCH[1] */
4465 _local1:
4466 bl NVRAM_INIT
4467 tst r0, #NVRAM_SR_RDY
4468 bne _local1
4469 mov r0, #20
4470 bl DELAY9
4471 mov r2, r4 /* length */
4472 mov r1, r5 /* dest address */
4473 mov r0, #2 /* bytes to transfer in command */
4474 bl NVRAM_XFER2
4475 ldmia sp!, {r4, r5, lr}
4476 bx lr
4477 .endfunc
4478
4479 .func NVRAM_Xfer2, NVRAM_XFER2
4480 NVRAM_XFER2:
4481 stmdb sp!, {r4, r5, r6, lr}
4482 ldr r4, =SP_BASE
4483 mov r3, #0
4484 cmp r0, #0
4485 bls _local2
4486 ldr r5, =NVRAM_SCRATCH
4487 _local4:
4488 ldrb r6, [r5, r3]
4489 str r6, [r4, #SP_TDR]
4490 _local3:
4491 ldr r6, [r4, #SP_SR]
4492 tst r6, #SP_TDRE
4493 beq _local3
4494 add r3, r3, #1
4495 cmp r3, r0 /* r0 is # of bytes to send out (command+addr) */
4496 blo _local4
4497 _local2:
4498 mov r3, #SPI_8CLOCKS
4499 str r3, [r4, #SP_TDR]
4500 ldr r0, [r4, #SP_RDR]
4501 _local5:
4502 ldr r0, [r4, #SP_SR]
4503 tst r0, #SP_RDRF
4504 beq _local5
4505 ldr r0, [r4, #SP_RDR] /* what's this byte? It's the byte read while writing the TDR -- nonsense, because the NVRAM doesn't read and write at the same time */
4506 mov r0, #0
4507 cmp r2, #0 /* r2 is # of bytes to copy in */
4508 bls _local6
4509 _local7:
4510 ldr r5, [r4, #SP_SR]
4511 tst r5, #SP_TDRE
4512 beq _local7
4513 str r3, [r4, #SP_TDR] /* r3 has SPI_8CLOCKS */
4514 _local8:
4515 ldr r5, [r4, #SP_SR]
4516 tst r5, #SP_RDRF
4517 beq _local8
4518 ldr r5, [r4, #SP_RDR] /* but didn't we read this byte above? */
4519 strb r5, [r1], #1 /* postindexed */
4520 add r0, r0, #1
4521 cmp r0, r2
4522 blo _local7 /* since we don't send another address, the NVRAM must be capable of sequential reads */
4523 _local6:
4524 mov r0, #200
4525 bl DELAY9
4526 ldmia sp!, {r4, r5, r6, lr}
4527 bx lr
4528 #endif
Linus' kernel tree