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mfd: Support 88pm80x in 80x driver
[linux-2.6.git] / drivers / staging / rtl8187se / r8180_core.c
blobfd22b75aea4f1b549bf990ed6ea94371d8efd013
1 /*
2 This is part of rtl818x pci OpenSource driver - v 0.1
3 Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
4 Released under the terms of GPL (General Public License)
5
6 Parts of this driver are based on the GPL part of the official
7 Realtek driver.
8
9 Parts of this driver are based on the rtl8180 driver skeleton
10 from Patric Schenke & Andres Salomon.
11
12 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
13
14 Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
15
16 RSSI calc function from 'The Deuce'
17
18 Some ideas borrowed from the 8139too.c driver included in linux kernel.
19
20 We (I?) want to thanks the Authors of those projecs and also the
21 Ndiswrapper's project Authors.
22
23 A big big thanks goes also to Realtek corp. for their help in my attempt to
24 add RTL8185 and RTL8225 support, and to David Young also.
25
26 Power management interface routines.
27 Written by Mariusz Matuszek.
28 */
29
30 #undef RX_DONT_PASS_UL
31 #undef DUMMY_RX
32
33 #include <linux/slab.h>
34 #include <linux/syscalls.h>
35 #include <linux/eeprom_93cx6.h>
36 #include <linux/interrupt.h>
37
38 #include "r8180_hw.h"
39 #include "r8180.h"
40 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
41 #include "r8180_93cx6.h" /* Card EEPROM */
42 #include "r8180_wx.h"
43 #include "r8180_dm.h"
44
45 #include "ieee80211/dot11d.h"
46
47 static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
48 {
49 .vendor = PCI_VENDOR_ID_REALTEK,
50 .device = 0x8199,
51 .subvendor = PCI_ANY_ID,
52 .subdevice = PCI_ANY_ID,
53 .driver_data = 0,
54 },
55 {
56 .vendor = 0,
57 .device = 0,
58 .subvendor = 0,
59 .subdevice = 0,
60 .driver_data = 0,
61 }
62 };
63
64
65 static char ifname[IFNAMSIZ] = "wlan%d";
66 static int hwseqnum = 0;
67 static int hwwep = 0;
68 static int channels = 0x3fff;
69
70 MODULE_LICENSE("GPL");
71 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
72 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
73 MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
74
75
76 module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
77 module_param(hwseqnum, int, S_IRUGO|S_IWUSR);
78 module_param(hwwep, int, S_IRUGO|S_IWUSR);
79 module_param(channels, int, S_IRUGO|S_IWUSR);
80
81 MODULE_PARM_DESC(devname, " Net interface name, wlan%d=default");
82 MODULE_PARM_DESC(hwseqnum, " Try to use hardware 802.11 header sequence numbers. Zero=default");
83 MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards");
84 MODULE_PARM_DESC(channels, " Channel bitmask for specific locales. NYI");
85
86
87 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
88 const struct pci_device_id *id);
89
90 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
91
92 static void rtl8180_shutdown(struct pci_dev *pdev)
93 {
94 struct net_device *dev = pci_get_drvdata(pdev);
95 if (dev->netdev_ops->ndo_stop)
96 dev->netdev_ops->ndo_stop(dev);
97 pci_disable_device(pdev);
98 }
99
100 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
101 {
102 struct net_device *dev = pci_get_drvdata(pdev);
103
104 if (!netif_running(dev))
105 goto out_pci_suspend;
106
107 if (dev->netdev_ops->ndo_stop)
108 dev->netdev_ops->ndo_stop(dev);
109
110 netif_device_detach(dev);
111
112 out_pci_suspend:
113 pci_save_state(pdev);
114 pci_disable_device(pdev);
115 pci_set_power_state(pdev, pci_choose_state(pdev, state));
116 return 0;
117 }
118
119 static int rtl8180_resume(struct pci_dev *pdev)
120 {
121 struct net_device *dev = pci_get_drvdata(pdev);
122 int err;
123 u32 val;
124
125 pci_set_power_state(pdev, PCI_D0);
126
127 err = pci_enable_device(pdev);
128 if (err) {
129 printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
130 dev->name);
131
132 return err;
133 }
134
135 pci_restore_state(pdev);
136
137 /*
138 * Suspend/Resume resets the PCI configuration space, so we have to
139 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
140 * from interfering with C3 CPU state. pci_restore_state won't help
141 * here since it only restores the first 64 bytes pci config header.
142 */
143 pci_read_config_dword(pdev, 0x40, &val);
144 if ((val & 0x0000ff00) != 0)
145 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
146
147 if (!netif_running(dev))
148 goto out;
149
150 if (dev->netdev_ops->ndo_open)
151 dev->netdev_ops->ndo_open(dev);
152
153 netif_device_attach(dev);
154 out:
155 return 0;
156 }
157
158 static struct pci_driver rtl8180_pci_driver = {
159 .name = RTL8180_MODULE_NAME,
160 .id_table = rtl8180_pci_id_tbl,
161 .probe = rtl8180_pci_probe,
162 .remove = __devexit_p(rtl8180_pci_remove),
163 .suspend = rtl8180_suspend,
164 .resume = rtl8180_resume,
165 .shutdown = rtl8180_shutdown,
166 };
167
168 u8 read_nic_byte(struct net_device *dev, int x)
169 {
170 return 0xff&readb((u8 *)dev->mem_start + x);
171 }
172
173 u32 read_nic_dword(struct net_device *dev, int x)
174 {
175 return readl((u8 *)dev->mem_start + x);
176 }
177
178 u16 read_nic_word(struct net_device *dev, int x)
179 {
180 return readw((u8 *)dev->mem_start + x);
181 }
182
183 void write_nic_byte(struct net_device *dev, int x, u8 y)
184 {
185 writeb(y, (u8 *)dev->mem_start + x);
186 udelay(20);
187 }
188
189 void write_nic_dword(struct net_device *dev, int x, u32 y)
190 {
191 writel(y, (u8 *)dev->mem_start + x);
192 udelay(20);
193 }
194
195 void write_nic_word(struct net_device *dev, int x, u16 y)
196 {
197 writew(y, (u8 *)dev->mem_start + x);
198 udelay(20);
199 }
200
201 inline void force_pci_posting(struct net_device *dev)
202 {
203 read_nic_byte(dev, EPROM_CMD);
204 mb();
205 }
206
207 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
208 void set_nic_rxring(struct net_device *dev);
209 void set_nic_txring(struct net_device *dev);
210 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
211 void rtl8180_commit(struct net_device *dev);
212 void rtl8180_start_tx_beacon(struct net_device *dev);
213
214 static struct proc_dir_entry *rtl8180_proc = NULL;
215
216 static int proc_get_registers(char *page, char **start,
217 off_t offset, int count,
218 int *eof, void *data)
219 {
220 struct net_device *dev = data;
221 int len = 0;
222 int i, n;
223 int max = 0xff;
224
225 /* This dump the current register page */
226 for (n = 0; n <= max;) {
227 len += snprintf(page + len, count - len, "\nD: %2x > ", n);
228
229 for (i = 0; i < 16 && n <= max; i++, n++)
230 len += snprintf(page + len, count - len, "%2x ",
231 read_nic_byte(dev, n));
232 }
233 len += snprintf(page + len, count - len, "\n");
234
235 *eof = 1;
236 return len;
237 }
238
239 int get_curr_tx_free_desc(struct net_device *dev, int priority);
240
241 static int proc_get_stats_hw(char *page, char **start,
242 off_t offset, int count,
243 int *eof, void *data)
244 {
245 int len = 0;
246
247 *eof = 1;
248 return len;
249 }
250
251 static int proc_get_stats_rx(char *page, char **start,
252 off_t offset, int count,
253 int *eof, void *data)
254 {
255 struct net_device *dev = data;
256 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
257
258 int len = 0;
259
260 len += snprintf(page + len, count - len,
261 "RX OK: %lu\n"
262 "RX Retry: %lu\n"
263 "RX CRC Error(0-500): %lu\n"
264 "RX CRC Error(500-1000): %lu\n"
265 "RX CRC Error(>1000): %lu\n"
266 "RX ICV Error: %lu\n",
267 priv->stats.rxint,
268 priv->stats.rxerr,
269 priv->stats.rxcrcerrmin,
270 priv->stats.rxcrcerrmid,
271 priv->stats.rxcrcerrmax,
272 priv->stats.rxicverr
273 );
274
275 *eof = 1;
276 return len;
277 }
278
279 static int proc_get_stats_tx(char *page, char **start,
280 off_t offset, int count,
281 int *eof, void *data)
282 {
283 struct net_device *dev = data;
284 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
285
286 int len = 0;
287 unsigned long totalOK;
288
289 totalOK = priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
290 len += snprintf(page + len, count - len,
291 "TX OK: %lu\n"
292 "TX Error: %lu\n"
293 "TX Retry: %lu\n"
294 "TX beacon OK: %lu\n"
295 "TX beacon error: %lu\n",
296 totalOK,
297 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
298 priv->stats.txretry,
299 priv->stats.txbeacon,
300 priv->stats.txbeaconerr
301 );
302
303 *eof = 1;
304 return len;
305 }
306
307 void rtl8180_proc_module_init(void)
308 {
309 DMESG("Initializing proc filesystem");
310 rtl8180_proc = proc_mkdir(RTL8180_MODULE_NAME, init_net.proc_net);
311 }
312
313 void rtl8180_proc_module_remove(void)
314 {
315 remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
316 }
317
318 void rtl8180_proc_remove_one(struct net_device *dev)
319 {
320 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
321 if (priv->dir_dev) {
322 remove_proc_entry("stats-hw", priv->dir_dev);
323 remove_proc_entry("stats-tx", priv->dir_dev);
324 remove_proc_entry("stats-rx", priv->dir_dev);
325 remove_proc_entry("registers", priv->dir_dev);
326 remove_proc_entry(dev->name, rtl8180_proc);
327 priv->dir_dev = NULL;
328 }
329 }
330
331 void rtl8180_proc_init_one(struct net_device *dev)
332 {
333 struct proc_dir_entry *e;
334 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
335
336 priv->dir_dev = rtl8180_proc;
337 if (!priv->dir_dev) {
338 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
339 dev->name);
340 return;
341 }
342
343 e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
344 priv->dir_dev, proc_get_stats_hw, dev);
345 if (!e) {
346 DMESGE("Unable to initialize "
347 "/proc/net/r8180/%s/stats-hw\n",
348 dev->name);
349 }
350
351 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
352 priv->dir_dev, proc_get_stats_rx, dev);
353 if (!e) {
354 DMESGE("Unable to initialize "
355 "/proc/net/r8180/%s/stats-rx\n",
356 dev->name);
357 }
358
359
360 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
361 priv->dir_dev, proc_get_stats_tx, dev);
362 if (!e) {
363 DMESGE("Unable to initialize "
364 "/proc/net/r8180/%s/stats-tx\n",
365 dev->name);
366 }
367
368 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
369 priv->dir_dev, proc_get_registers, dev);
370 if (!e) {
371 DMESGE("Unable to initialize "
372 "/proc/net/r8180/%s/registers\n",
373 dev->name);
374 }
375 }
376
377 /*
378 FIXME: check if we can use some standard already-existent
379 data type+functions in kernel
380 */
381
382 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
383 struct buffer **bufferhead)
384 {
385 struct buffer *tmp;
386
387 if (!*buffer) {
388
389 *buffer = kmalloc(sizeof(struct buffer), GFP_KERNEL);
390
391 if (*buffer == NULL) {
392 DMESGE("Failed to kmalloc head of TX/RX struct");
393 return -1;
394 }
395 (*buffer)->next = *buffer;
396 (*buffer)->buf = buf;
397 (*buffer)->dma = dma;
398 if (bufferhead != NULL)
399 (*bufferhead) = (*buffer);
400 return 0;
401 }
402 tmp = *buffer;
403
404 while (tmp->next != (*buffer))
405 tmp = tmp->next;
406 tmp->next = kmalloc(sizeof(struct buffer), GFP_KERNEL);
407 if (tmp->next == NULL) {
408 DMESGE("Failed to kmalloc TX/RX struct");
409 return -1;
410 }
411 tmp->next->buf = buf;
412 tmp->next->dma = dma;
413 tmp->next->next = *buffer;
414
415 return 0;
416 }
417
418 void buffer_free(struct net_device *dev, struct buffer **buffer, int len, short consistent)
419 {
420
421 struct buffer *tmp, *next;
422 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
423 struct pci_dev *pdev = priv->pdev;
424
425 if (!*buffer)
426 return;
427
428 tmp = *buffer;
429
430 do {
431 next = tmp->next;
432 if (consistent) {
433 pci_free_consistent(pdev, len,
434 tmp->buf, tmp->dma);
435 } else {
436 pci_unmap_single(pdev, tmp->dma,
437 len, PCI_DMA_FROMDEVICE);
438 kfree(tmp->buf);
439 }
440 kfree(tmp);
441 tmp = next;
442 } while (next != *buffer);
443
444 *buffer = NULL;
445 }
446
447 void print_buffer(u32 *buffer, int len)
448 {
449 int i;
450 u8 *buf = (u8 *)buffer;
451
452 printk("ASCII BUFFER DUMP (len: %x):\n", len);
453
454 for (i = 0; i < len; i++)
455 printk("%c", buf[i]);
456
457 printk("\nBINARY BUFFER DUMP (len: %x):\n", len);
458
459 for (i = 0; i < len; i++)
460 printk("%02x", buf[i]);
461
462 printk("\n");
463 }
464
465 int get_curr_tx_free_desc(struct net_device *dev, int priority)
466 {
467 struct r8180_priv *priv = ieee80211_priv(dev);
468 u32 *tail;
469 u32 *head;
470 int ret;
471
472 switch (priority) {
473 case MANAGE_PRIORITY:
474 head = priv->txmapringhead;
475 tail = priv->txmapringtail;
476 break;
477 case BK_PRIORITY:
478 head = priv->txbkpringhead;
479 tail = priv->txbkpringtail;
480 break;
481 case BE_PRIORITY:
482 head = priv->txbepringhead;
483 tail = priv->txbepringtail;
484 break;
485 case VI_PRIORITY:
486 head = priv->txvipringhead;
487 tail = priv->txvipringtail;
488 break;
489 case VO_PRIORITY:
490 head = priv->txvopringhead;
491 tail = priv->txvopringtail;
492 break;
493 case HI_PRIORITY:
494 head = priv->txhpringhead;
495 tail = priv->txhpringtail;
496 break;
497 default:
498 return -1;
499 }
500
501 if (head <= tail)
502 ret = priv->txringcount - (tail - head)/8;
503 else
504 ret = (head - tail)/8;
505
506 if (ret > priv->txringcount)
507 DMESG("BUG");
508
509 return ret;
510 }
511
512 short check_nic_enought_desc(struct net_device *dev, int priority)
513 {
514 struct r8180_priv *priv = ieee80211_priv(dev);
515 struct ieee80211_device *ieee = netdev_priv(dev);
516 int requiredbyte, required;
517
518 requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
519
520 if (ieee->current_network.QoS_Enable)
521 requiredbyte += 2;
522
523 required = requiredbyte / (priv->txbuffsize-4);
524
525 if (requiredbyte % priv->txbuffsize)
526 required++;
527
528 /* for now we keep two free descriptor as a safety boundary
529 * between the tail and the head
530 */
531
532 return (required+2 < get_curr_tx_free_desc(dev, priority));
533 }
534
535 void fix_tx_fifo(struct net_device *dev)
536 {
537 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
538 u32 *tmp;
539 int i;
540
541 for (tmp = priv->txmapring, i = 0;
542 i < priv->txringcount;
543 tmp += 8, i++) {
544 *tmp = *tmp & ~(1<<31);
545 }
546
547 for (tmp = priv->txbkpring, i = 0;
548 i < priv->txringcount;
549 tmp += 8, i++) {
550 *tmp = *tmp & ~(1<<31);
551 }
552
553 for (tmp = priv->txbepring, i = 0;
554 i < priv->txringcount;
555 tmp += 8, i++) {
556 *tmp = *tmp & ~(1<<31);
557 }
558 for (tmp = priv->txvipring, i = 0;
559 i < priv->txringcount;
560 tmp += 8, i++) {
561 *tmp = *tmp & ~(1<<31);
562 }
563
564 for (tmp = priv->txvopring, i = 0;
565 i < priv->txringcount;
566 tmp += 8, i++) {
567 *tmp = *tmp & ~(1<<31);
568 }
569
570 for (tmp = priv->txhpring, i = 0;
571 i < priv->txringcount;
572 tmp += 8, i++) {
573 *tmp = *tmp & ~(1<<31);
574 }
575
576 for (tmp = priv->txbeaconring, i = 0;
577 i < priv->txbeaconcount;
578 tmp += 8, i++) {
579 *tmp = *tmp & ~(1<<31);
580 }
581
582 priv->txmapringtail = priv->txmapring;
583 priv->txmapringhead = priv->txmapring;
584 priv->txmapbufstail = priv->txmapbufs;
585
586 priv->txbkpringtail = priv->txbkpring;
587 priv->txbkpringhead = priv->txbkpring;
588 priv->txbkpbufstail = priv->txbkpbufs;
589
590 priv->txbepringtail = priv->txbepring;
591 priv->txbepringhead = priv->txbepring;
592 priv->txbepbufstail = priv->txbepbufs;
593
594 priv->txvipringtail = priv->txvipring;
595 priv->txvipringhead = priv->txvipring;
596 priv->txvipbufstail = priv->txvipbufs;
597
598 priv->txvopringtail = priv->txvopring;
599 priv->txvopringhead = priv->txvopring;
600 priv->txvopbufstail = priv->txvopbufs;
601
602 priv->txhpringtail = priv->txhpring;
603 priv->txhpringhead = priv->txhpring;
604 priv->txhpbufstail = priv->txhpbufs;
605
606 priv->txbeaconringtail = priv->txbeaconring;
607 priv->txbeaconbufstail = priv->txbeaconbufs;
608 set_nic_txring(dev);
609
610 ieee80211_reset_queue(priv->ieee80211);
611 priv->ack_tx_to_ieee = 0;
612 }
613
614 void fix_rx_fifo(struct net_device *dev)
615 {
616 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
617 u32 *tmp;
618 struct buffer *rxbuf;
619 u8 rx_desc_size;
620
621 rx_desc_size = 8; /* 4*8 = 32 bytes */
622
623 for (tmp = priv->rxring, rxbuf = priv->rxbufferhead;
624 (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
625 tmp += rx_desc_size, rxbuf = rxbuf->next) {
626 *(tmp+2) = rxbuf->dma;
627 *tmp = *tmp & ~0xfff;
628 *tmp = *tmp | priv->rxbuffersize;
629 *tmp |= (1<<31);
630 }
631
632 priv->rxringtail = priv->rxring;
633 priv->rxbuffer = priv->rxbufferhead;
634 priv->rx_skb_complete = 1;
635 set_nic_rxring(dev);
636 }
637
638 unsigned char QUALITY_MAP[] = {
639 0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
640 0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
641 0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
642 0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
643 0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
644 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
645 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
646 0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
647 0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
648 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
649 };
650
651 unsigned char STRENGTH_MAP[] = {
652 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
653 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
654 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
655 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
656 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
657 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
658 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
659 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
660 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
661 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
662 };
663
664 void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual)
665 {
666 u32 temp;
667 u32 temp2;
668 u32 q;
669 u32 orig_qual;
670 u8 _rssi;
671
672 q = *qual;
673 orig_qual = *qual;
674 _rssi = 0; /* avoid gcc complains.. */
675
676 if (q <= 0x4e) {
677 temp = QUALITY_MAP[q];
678 } else {
679 if (q & 0x80)
680 temp = 0x32;
681 else
682 temp = 1;
683 }
684
685 *qual = temp;
686 temp2 = *rssi;
687
688 if (_rssi < 0x64) {
689 if (_rssi == 0)
690 *rssi = 1;
691 } else {
692 *rssi = 0x64;
693 }
694
695 return;
696 }
697
698 void rtl8180_irq_enable(struct net_device *dev)
699 {
700 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
701
702 priv->irq_enabled = 1;
703 write_nic_word(dev, INTA_MASK, priv->irq_mask);
704 }
705
706 void rtl8180_irq_disable(struct net_device *dev)
707 {
708 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
709
710 write_nic_dword(dev, IMR, 0);
711 force_pci_posting(dev);
712 priv->irq_enabled = 0;
713 }
714
715 void rtl8180_set_mode(struct net_device *dev, int mode)
716 {
717 u8 ecmd;
718
719 ecmd = read_nic_byte(dev, EPROM_CMD);
720 ecmd = ecmd & ~EPROM_CMD_OPERATING_MODE_MASK;
721 ecmd = ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
722 ecmd = ecmd & ~(1<<EPROM_CS_SHIFT);
723 ecmd = ecmd & ~(1<<EPROM_CK_SHIFT);
724 write_nic_byte(dev, EPROM_CMD, ecmd);
725 }
726
727 void rtl8180_adapter_start(struct net_device *dev);
728 void rtl8180_beacon_tx_enable(struct net_device *dev);
729
730 void rtl8180_update_msr(struct net_device *dev)
731 {
732 struct r8180_priv *priv = ieee80211_priv(dev);
733 u8 msr;
734 u32 rxconf;
735
736 msr = read_nic_byte(dev, MSR);
737 msr &= ~MSR_LINK_MASK;
738
739 rxconf = read_nic_dword(dev, RX_CONF);
740
741 if (priv->ieee80211->state == IEEE80211_LINKED) {
742 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
743 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
744 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
745 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
746 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
747 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
748 else
749 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
750 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
751
752 } else {
753 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
754 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
755 }
756
757 write_nic_byte(dev, MSR, msr);
758 write_nic_dword(dev, RX_CONF, rxconf);
759 }
760
761 void rtl8180_set_chan(struct net_device *dev, short ch)
762 {
763 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
764
765 if ((ch > 14) || (ch < 1)) {
766 printk("In %s: Invalid chnanel %d\n", __func__, ch);
767 return;
768 }
769
770 priv->chan = ch;
771 priv->rf_set_chan(dev, priv->chan);
772 }
773
774 void rtl8180_rx_enable(struct net_device *dev)
775 {
776 u8 cmd;
777 u32 rxconf;
778 /* for now we accept data, management & ctl frame*/
779 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
780
781 rxconf = read_nic_dword(dev, RX_CONF);
782 rxconf = rxconf & ~MAC_FILTER_MASK;
783 rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
784 rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
785 rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
786 rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
787 if (dev->flags & IFF_PROMISC)
788 DMESG("NIC in promisc mode");
789
790 if (priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
791 dev->flags & IFF_PROMISC) {
792 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
793 } else {
794 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
795 }
796
797 if (priv->ieee80211->iw_mode == IW_MODE_MONITOR) {
798 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
799 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
800 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
801 }
802
803 if (priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
804 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
805
806 rxconf = rxconf & ~RX_FIFO_THRESHOLD_MASK;
807 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE << RX_FIFO_THRESHOLD_SHIFT);
808
809 rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
810 rxconf = rxconf & ~MAX_RX_DMA_MASK;
811 rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
812
813 rxconf = rxconf | RCR_ONLYERLPKT;
814
815 rxconf = rxconf & ~RCR_CS_MASK;
816
817 write_nic_dword(dev, RX_CONF, rxconf);
818
819 fix_rx_fifo(dev);
820
821 cmd = read_nic_byte(dev, CMD);
822 write_nic_byte(dev, CMD, cmd | (1<<CMD_RX_ENABLE_SHIFT));
823 }
824
825 void set_nic_txring(struct net_device *dev)
826 {
827 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
828
829 write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
830 write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
831 write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
832 write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
833 write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
834 write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
835 write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
836 }
837
838 void rtl8180_conttx_enable(struct net_device *dev)
839 {
840 u32 txconf;
841
842 txconf = read_nic_dword(dev, TX_CONF);
843 txconf = txconf & ~TX_LOOPBACK_MASK;
844 txconf = txconf | (TX_LOOPBACK_CONTINUE<<TX_LOOPBACK_SHIFT);
845 write_nic_dword(dev, TX_CONF, txconf);
846 }
847
848 void rtl8180_conttx_disable(struct net_device *dev)
849 {
850 u32 txconf;
851
852 txconf = read_nic_dword(dev, TX_CONF);
853 txconf = txconf & ~TX_LOOPBACK_MASK;
854 txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
855 write_nic_dword(dev, TX_CONF, txconf);
856 }
857
858 void rtl8180_tx_enable(struct net_device *dev)
859 {
860 u8 cmd;
861 u8 tx_agc_ctl;
862 u8 byte;
863 u32 txconf;
864 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
865
866 txconf = read_nic_dword(dev, TX_CONF);
867
868 byte = read_nic_byte(dev, CW_CONF);
869 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
870 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
871 write_nic_byte(dev, CW_CONF, byte);
872
873 tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
874 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
875 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
876 tx_agc_ctl |= (1<<TX_AGC_CTL_FEEDBACK_ANT);
877 write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
878 write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
879
880 txconf = txconf & ~(1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
881
882 txconf = txconf & ~TX_LOOPBACK_MASK;
883 txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
884 txconf = txconf & ~TCR_DPRETRY_MASK;
885 txconf = txconf & ~TCR_RTSRETRY_MASK;
886 txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
887 txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
888 txconf = txconf & ~(1<<TX_NOCRC_SHIFT);
889
890 if (priv->hw_plcp_len)
891 txconf = txconf & ~TCR_PLCP_LEN;
892 else
893 txconf = txconf | TCR_PLCP_LEN;
894
895 txconf = txconf & ~TCR_MXDMA_MASK;
896 txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
897 txconf = txconf | TCR_CWMIN;
898 txconf = txconf | TCR_DISCW;
899
900 txconf = txconf | (1 << TX_NOICV_SHIFT);
901
902 write_nic_dword(dev, TX_CONF, txconf);
903
904 fix_tx_fifo(dev);
905
906 cmd = read_nic_byte(dev, CMD);
907 write_nic_byte(dev, CMD, cmd | (1<<CMD_TX_ENABLE_SHIFT));
908
909 write_nic_dword(dev, TX_CONF, txconf);
910 }
911
912 void rtl8180_beacon_tx_enable(struct net_device *dev)
913 {
914 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
915
916 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
917 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
918 write_nic_byte(dev, TPPollStop, priv->dma_poll_mask);
919 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
920 }
921
922 void rtl8180_beacon_tx_disable(struct net_device *dev)
923 {
924 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
925
926 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
927 priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
928 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
929 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
930
931 }
932
933 void rtl8180_rtx_disable(struct net_device *dev)
934 {
935 u8 cmd;
936 struct r8180_priv *priv = ieee80211_priv(dev);
937
938 cmd = read_nic_byte(dev, CMD);
939 write_nic_byte(dev, CMD, cmd & ~\
940 ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
941 force_pci_posting(dev);
942 mdelay(10);
943
944 if (!priv->rx_skb_complete)
945 dev_kfree_skb_any(priv->rx_skb);
946 }
947
948 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
949 int addr)
950 {
951 int i;
952 u32 *desc;
953 u32 *tmp;
954 dma_addr_t dma_desc, dma_tmp;
955 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
956 struct pci_dev *pdev = priv->pdev;
957 void *buf;
958
959 if ((bufsize & 0xfff) != bufsize) {
960 DMESGE("TX buffer allocation too large");
961 return 0;
962 }
963 desc = (u32 *)pci_alloc_consistent(pdev,
964 sizeof(u32)*8*count+256, &dma_desc);
965 if (desc == NULL)
966 return -1;
967
968 if (dma_desc & 0xff)
969 /*
970 * descriptor's buffer must be 256 byte aligned
971 * we shouldn't be here, since we set DMA mask !
972 */
973 WARN(1, "DMA buffer is not aligned\n");
974
975 tmp = desc;
976
977 for (i = 0; i < count; i++) {
978 buf = (void *)pci_alloc_consistent(pdev, bufsize, &dma_tmp);
979 if (buf == NULL)
980 return -ENOMEM;
981
982 switch (addr) {
983 case TX_MANAGEPRIORITY_RING_ADDR:
984 if (-1 == buffer_add(&(priv->txmapbufs), buf, dma_tmp, NULL)) {
985 DMESGE("Unable to allocate mem for buffer NP");
986 return -ENOMEM;
987 }
988 break;
989 case TX_BKPRIORITY_RING_ADDR:
990 if (-1 == buffer_add(&(priv->txbkpbufs), buf, dma_tmp, NULL)) {
991 DMESGE("Unable to allocate mem for buffer LP");
992 return -ENOMEM;
993 }
994 break;
995 case TX_BEPRIORITY_RING_ADDR:
996 if (-1 == buffer_add(&(priv->txbepbufs), buf, dma_tmp, NULL)) {
997 DMESGE("Unable to allocate mem for buffer NP");
998 return -ENOMEM;
999 }
1000 break;
1001 case TX_VIPRIORITY_RING_ADDR:
1002 if (-1 == buffer_add(&(priv->txvipbufs), buf, dma_tmp, NULL)) {
1003 DMESGE("Unable to allocate mem for buffer LP");
1004 return -ENOMEM;
1005 }
1006 break;
1007 case TX_VOPRIORITY_RING_ADDR:
1008 if (-1 == buffer_add(&(priv->txvopbufs), buf, dma_tmp, NULL)) {
1009 DMESGE("Unable to allocate mem for buffer NP");
1010 return -ENOMEM;
1011 }
1012 break;
1013 case TX_HIGHPRIORITY_RING_ADDR:
1014 if (-1 == buffer_add(&(priv->txhpbufs), buf, dma_tmp, NULL)) {
1015 DMESGE("Unable to allocate mem for buffer HP");
1016 return -ENOMEM;
1017 }
1018 break;
1019 case TX_BEACON_RING_ADDR:
1020 if (-1 == buffer_add(&(priv->txbeaconbufs), buf, dma_tmp, NULL)) {
1021 DMESGE("Unable to allocate mem for buffer BP");
1022 return -ENOMEM;
1023 }
1024 break;
1025 }
1026 *tmp = *tmp & ~(1<<31); /* descriptor empty, owned by the drv */
1027 *(tmp+2) = (u32)dma_tmp;
1028 *(tmp+3) = bufsize;
1029
1030 if (i+1 < count)
1031 *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1032 else
1033 *(tmp+4) = (u32)dma_desc;
1034
1035 tmp = tmp+8;
1036 }
1037
1038 switch (addr) {
1039 case TX_MANAGEPRIORITY_RING_ADDR:
1040 priv->txmapringdma = dma_desc;
1041 priv->txmapring = desc;
1042 break;
1043 case TX_BKPRIORITY_RING_ADDR:
1044 priv->txbkpringdma = dma_desc;
1045 priv->txbkpring = desc;
1046 break;
1047 case TX_BEPRIORITY_RING_ADDR:
1048 priv->txbepringdma = dma_desc;
1049 priv->txbepring = desc;
1050 break;
1051 case TX_VIPRIORITY_RING_ADDR:
1052 priv->txvipringdma = dma_desc;
1053 priv->txvipring = desc;
1054 break;
1055 case TX_VOPRIORITY_RING_ADDR:
1056 priv->txvopringdma = dma_desc;
1057 priv->txvopring = desc;
1058 break;
1059 case TX_HIGHPRIORITY_RING_ADDR:
1060 priv->txhpringdma = dma_desc;
1061 priv->txhpring = desc;
1062 break;
1063 case TX_BEACON_RING_ADDR:
1064 priv->txbeaconringdma = dma_desc;
1065 priv->txbeaconring = desc;
1066 break;
1067
1068 }
1069
1070 return 0;
1071 }
1072
1073 void free_tx_desc_rings(struct net_device *dev)
1074 {
1075 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1076 struct pci_dev *pdev = priv->pdev;
1077 int count = priv->txringcount;
1078
1079 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1080 priv->txmapring, priv->txmapringdma);
1081 buffer_free(dev, &(priv->txmapbufs), priv->txbuffsize, 1);
1082
1083 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1084 priv->txbkpring, priv->txbkpringdma);
1085 buffer_free(dev, &(priv->txbkpbufs), priv->txbuffsize, 1);
1086
1087 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1088 priv->txbepring, priv->txbepringdma);
1089 buffer_free(dev, &(priv->txbepbufs), priv->txbuffsize, 1);
1090
1091 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1092 priv->txvipring, priv->txvipringdma);
1093 buffer_free(dev, &(priv->txvipbufs), priv->txbuffsize, 1);
1094
1095 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1096 priv->txvopring, priv->txvopringdma);
1097 buffer_free(dev, &(priv->txvopbufs), priv->txbuffsize, 1);
1098
1099 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1100 priv->txhpring, priv->txhpringdma);
1101 buffer_free(dev, &(priv->txhpbufs), priv->txbuffsize, 1);
1102
1103 count = priv->txbeaconcount;
1104 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1105 priv->txbeaconring, priv->txbeaconringdma);
1106 buffer_free(dev, &(priv->txbeaconbufs), priv->txbuffsize, 1);
1107 }
1108
1109 void free_rx_desc_ring(struct net_device *dev)
1110 {
1111 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1112 struct pci_dev *pdev = priv->pdev;
1113 int count = priv->rxringcount;
1114
1115 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1116 priv->rxring, priv->rxringdma);
1117
1118 buffer_free(dev, &(priv->rxbuffer), priv->rxbuffersize, 0);
1119 }
1120
1121 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1122 {
1123 int i;
1124 u32 *desc;
1125 u32 *tmp;
1126 dma_addr_t dma_desc, dma_tmp;
1127 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1128 struct pci_dev *pdev = priv->pdev;
1129 void *buf;
1130 u8 rx_desc_size;
1131
1132 rx_desc_size = 8; /* 4*8 = 32 bytes */
1133
1134 if ((bufsize & 0xfff) != bufsize) {
1135 DMESGE("RX buffer allocation too large");
1136 return -1;
1137 }
1138
1139 desc = (u32 *)pci_alloc_consistent(pdev, sizeof(u32)*rx_desc_size*count+256,
1140 &dma_desc);
1141
1142 if (dma_desc & 0xff)
1143 /*
1144 * descriptor's buffer must be 256 byte aligned
1145 * should never happen since we specify the DMA mask
1146 */
1147 WARN(1, "DMA buffer is not aligned\n");
1148
1149 priv->rxring = desc;
1150 priv->rxringdma = dma_desc;
1151 tmp = desc;
1152
1153 for (i = 0; i < count; i++) {
1154 buf = kmalloc(bufsize * sizeof(u8), GFP_ATOMIC);
1155 if (buf == NULL) {
1156 DMESGE("Failed to kmalloc RX buffer");
1157 return -1;
1158 }
1159
1160 dma_tmp = pci_map_single(pdev, buf, bufsize * sizeof(u8),
1161 PCI_DMA_FROMDEVICE);
1162
1163 if (-1 == buffer_add(&(priv->rxbuffer), buf, dma_tmp,
1164 &(priv->rxbufferhead))) {
1165 DMESGE("Unable to allocate mem RX buf");
1166 return -1;
1167 }
1168 *tmp = 0; /* zero pads the header of the descriptor */
1169 *tmp = *tmp | (bufsize&0xfff);
1170 *(tmp+2) = (u32)dma_tmp;
1171 *tmp = *tmp | (1<<31); /* descriptor void, owned by the NIC */
1172
1173 tmp = tmp+rx_desc_size;
1174 }
1175
1176 *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); /* this is the last descriptor */
1177
1178 return 0;
1179 }
1180
1181
1182 void set_nic_rxring(struct net_device *dev)
1183 {
1184 u8 pgreg;
1185 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1186
1187 pgreg = read_nic_byte(dev, PGSELECT);
1188 write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
1189
1190 write_nic_dword(dev, RXRING_ADDR, priv->rxringdma);
1191 }
1192
1193 void rtl8180_reset(struct net_device *dev)
1194 {
1195 u8 cr;
1196
1197 rtl8180_irq_disable(dev);
1198
1199 cr = read_nic_byte(dev, CMD);
1200 cr = cr & 2;
1201 cr = cr | (1<<CMD_RST_SHIFT);
1202 write_nic_byte(dev, CMD, cr);
1203
1204 force_pci_posting(dev);
1205
1206 mdelay(200);
1207
1208 if (read_nic_byte(dev, CMD) & (1<<CMD_RST_SHIFT))
1209 DMESGW("Card reset timeout!");
1210 else
1211 DMESG("Card successfully reset");
1212
1213 rtl8180_set_mode(dev, EPROM_CMD_LOAD);
1214 force_pci_posting(dev);
1215 mdelay(200);
1216 }
1217
1218 inline u16 ieeerate2rtlrate(int rate)
1219 {
1220 switch (rate) {
1221 case 10:
1222 return 0;
1223 case 20:
1224 return 1;
1225 case 55:
1226 return 2;
1227 case 110:
1228 return 3;
1229 case 60:
1230 return 4;
1231 case 90:
1232 return 5;
1233 case 120:
1234 return 6;
1235 case 180:
1236 return 7;
1237 case 240:
1238 return 8;
1239 case 360:
1240 return 9;
1241 case 480:
1242 return 10;
1243 case 540:
1244 return 11;
1245 default:
1246 return 3;
1247 }
1248 }
1249
1250 static u16 rtl_rate[] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540, 720};
1251
1252 inline u16 rtl8180_rate2rate(short rate)
1253 {
1254 if (rate > 12)
1255 return 10;
1256 return rtl_rate[rate];
1257 }
1258
1259 inline u8 rtl8180_IsWirelessBMode(u16 rate)
1260 {
1261 if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
1262 return 1;
1263 else
1264 return 0;
1265 }
1266
1267 u16 N_DBPSOfRate(u16 DataRate);
1268
1269 u16 ComputeTxTime(u16 FrameLength, u16 DataRate, u8 bManagementFrame,
1270 u8 bShortPreamble)
1271 {
1272 u16 FrameTime;
1273 u16 N_DBPS;
1274 u16 Ceiling;
1275
1276 if (rtl8180_IsWirelessBMode(DataRate)) {
1277 if (bManagementFrame || !bShortPreamble || DataRate == 10)
1278 /* long preamble */
1279 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1280 else
1281 /* short preamble */
1282 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1283
1284 if ((FrameLength*8 % (DataRate/10)) != 0) /* get the ceilling */
1285 FrameTime++;
1286 } else { /* 802.11g DSSS-OFDM PLCP length field calculation. */
1287 N_DBPS = N_DBPSOfRate(DataRate);
1288 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1289 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1290 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1291 }
1292 return FrameTime;
1293 }
1294
1295 u16 N_DBPSOfRate(u16 DataRate)
1296 {
1297 u16 N_DBPS = 24;
1298
1299 switch (DataRate) {
1300 case 60:
1301 N_DBPS = 24;
1302 break;
1303 case 90:
1304 N_DBPS = 36;
1305 break;
1306 case 120:
1307 N_DBPS = 48;
1308 break;
1309 case 180:
1310 N_DBPS = 72;
1311 break;
1312 case 240:
1313 N_DBPS = 96;
1314 break;
1315 case 360:
1316 N_DBPS = 144;
1317 break;
1318 case 480:
1319 N_DBPS = 192;
1320 break;
1321 case 540:
1322 N_DBPS = 216;
1323 break;
1324 default:
1325 break;
1326 }
1327
1328 return N_DBPS;
1329 }
1330
1331 /*
1332 * For Netgear case, they want good-looking signal strength.
1333 */
1334 long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1335 {
1336 long RetSS;
1337
1338 /* Step 1. Scale mapping. */
1339 if (CurrSS >= 71 && CurrSS <= 100)
1340 RetSS = 90 + ((CurrSS - 70) / 3);
1341 else if (CurrSS >= 41 && CurrSS <= 70)
1342 RetSS = 78 + ((CurrSS - 40) / 3);
1343 else if (CurrSS >= 31 && CurrSS <= 40)
1344 RetSS = 66 + (CurrSS - 30);
1345 else if (CurrSS >= 21 && CurrSS <= 30)
1346 RetSS = 54 + (CurrSS - 20);
1347 else if (CurrSS >= 5 && CurrSS <= 20)
1348 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1349 else if (CurrSS == 4)
1350 RetSS = 36;
1351 else if (CurrSS == 3)
1352 RetSS = 27;
1353 else if (CurrSS == 2)
1354 RetSS = 18;
1355 else if (CurrSS == 1)
1356 RetSS = 9;
1357 else
1358 RetSS = CurrSS;
1359
1360 /* Step 2. Smoothing. */
1361 if (LastSS > 0)
1362 RetSS = ((LastSS * 5) + (RetSS) + 5) / 6;
1363
1364 return RetSS;
1365 }
1366
1367 /*
1368 * Translate 0-100 signal strength index into dBm.
1369 */
1370 long TranslateToDbm8185(u8 SignalStrengthIndex)
1371 {
1372 long SignalPower;
1373
1374 /* Translate to dBm (x=0.5y-95). */
1375 SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1376 SignalPower -= 95;
1377
1378 return SignalPower;
1379 }
1380
1381 /*
1382 * Perform signal smoothing for dynamic mechanism.
1383 * This is different with PerformSignalSmoothing8185 in smoothing formula.
1384 * No dramatic adjustion is apply because dynamic mechanism need some degree
1385 * of correctness. Ported from 8187B.
1386 */
1387 void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1388 bool bCckRate)
1389 {
1390 /* Determin the current packet is CCK rate. */
1391 priv->bCurCCKPkt = bCckRate;
1392
1393 if (priv->UndecoratedSmoothedSS >= 0)
1394 priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 5) +
1395 (priv->SignalStrength * 10)) / 6;
1396 else
1397 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
1398
1399 priv->UndercorateSmoothedRxPower = ((priv->UndercorateSmoothedRxPower * 50) +
1400 (priv->RxPower * 11)) / 60;
1401
1402 if (bCckRate)
1403 priv->CurCCKRSSI = priv->RSSI;
1404 else
1405 priv->CurCCKRSSI = 0;
1406 }
1407
1408
1409 /*
1410 * This is rough RX isr handling routine
1411 */
1412 void rtl8180_rx(struct net_device *dev)
1413 {
1414 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1415 struct sk_buff *tmp_skb;
1416 short first, last;
1417 u32 len;
1418 int lastlen;
1419 unsigned char quality, signal;
1420 u8 rate;
1421 u32 *tmp, *tmp2;
1422 u8 rx_desc_size;
1423 u8 padding;
1424 char rxpower = 0;
1425 u32 RXAGC = 0;
1426 long RxAGC_dBm = 0;
1427 u8 LNA = 0, BB = 0;
1428 u8 LNA_gain[4] = {02, 17, 29, 39};
1429 u8 Antenna = 0;
1430 struct ieee80211_hdr_4addr *hdr;
1431 u16 fc, type;
1432 u8 bHwError = 0, bCRC = 0, bICV = 0;
1433 bool bCckRate = false;
1434 u8 RSSI = 0;
1435 long SignalStrengthIndex = 0;
1436 struct ieee80211_rx_stats stats = {
1437 .signal = 0,
1438 .noise = -98,
1439 .rate = 0,
1440 .freq = IEEE80211_24GHZ_BAND,
1441 };
1442
1443 stats.nic_type = NIC_8185B;
1444 rx_desc_size = 8;
1445
1446 if ((*(priv->rxringtail)) & (1<<31)) {
1447 /* we have got an RX int, but the descriptor
1448 * we are pointing is empty */
1449
1450 priv->stats.rxnodata++;
1451 priv->ieee80211->stats.rx_errors++;
1452
1453 tmp2 = NULL;
1454 tmp = priv->rxringtail;
1455 do {
1456 if (tmp == priv->rxring)
1457 tmp = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
1458 else
1459 tmp -= rx_desc_size;
1460
1461 if (!(*tmp & (1<<31)))
1462 tmp2 = tmp;
1463 } while (tmp != priv->rxring);
1464
1465 if (tmp2)
1466 priv->rxringtail = tmp2;
1467 }
1468
1469 /* while there are filled descriptors */
1470 while (!(*(priv->rxringtail) & (1<<31))) {
1471 if (*(priv->rxringtail) & (1<<26))
1472 DMESGW("RX buffer overflow");
1473 if (*(priv->rxringtail) & (1<<12))
1474 priv->stats.rxicverr++;
1475
1476 if (*(priv->rxringtail) & (1<<27)) {
1477 priv->stats.rxdmafail++;
1478 /* DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail); */
1479 goto drop;
1480 }
1481
1482 pci_dma_sync_single_for_cpu(priv->pdev,
1483 priv->rxbuffer->dma,
1484 priv->rxbuffersize * \
1485 sizeof(u8),
1486 PCI_DMA_FROMDEVICE);
1487
1488 first = *(priv->rxringtail) & (1<<29) ? 1 : 0;
1489 if (first)
1490 priv->rx_prevlen = 0;
1491
1492 last = *(priv->rxringtail) & (1<<28) ? 1 : 0;
1493 if (last) {
1494 lastlen = ((*priv->rxringtail) & 0xfff);
1495
1496 /* if the last descriptor (that should
1497 * tell us the total packet len) tell
1498 * us something less than the descriptors
1499 * len we had until now, then there is some
1500 * problem..
1501 * workaround to prevent kernel panic
1502 */
1503 if (lastlen < priv->rx_prevlen)
1504 len = 0;
1505 else
1506 len = lastlen-priv->rx_prevlen;
1507
1508 if (*(priv->rxringtail) & (1<<13)) {
1509 if ((*(priv->rxringtail) & 0xfff) < 500)
1510 priv->stats.rxcrcerrmin++;
1511 else if ((*(priv->rxringtail) & 0x0fff) > 1000)
1512 priv->stats.rxcrcerrmax++;
1513 else
1514 priv->stats.rxcrcerrmid++;
1515
1516 }
1517
1518 } else {
1519 len = priv->rxbuffersize;
1520 }
1521
1522 if (first && last) {
1523 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1524 } else if (first) {
1525 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1526 if (padding)
1527 len -= 2;
1528 } else {
1529 padding = 0;
1530 }
1531 padding = 0;
1532 priv->rx_prevlen += len;
1533
1534 if (priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100) {
1535 /* HW is probably passing several buggy frames
1536 * without FD or LD flag set.
1537 * Throw this garbage away to prevent skb
1538 * memory exhausting
1539 */
1540 if (!priv->rx_skb_complete)
1541 dev_kfree_skb_any(priv->rx_skb);
1542 priv->rx_skb_complete = 1;
1543 }
1544
1545 signal = (unsigned char)(((*(priv->rxringtail+3)) & (0x00ff0000))>>16);
1546 signal = (signal & 0xfe) >> 1;
1547
1548 quality = (unsigned char)((*(priv->rxringtail+3)) & (0xff));
1549
1550 stats.mac_time[0] = *(priv->rxringtail+1);
1551 stats.mac_time[1] = *(priv->rxringtail+2);
1552 rxpower = ((char)(((*(priv->rxringtail+4)) & (0x00ff0000))>>16))/2 - 42;
1553 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>>8)) & (0x7f);
1554
1555 rate = ((*(priv->rxringtail)) &
1556 ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1557
1558 stats.rate = rtl8180_rate2rate(rate);
1559 Antenna = (((*(priv->rxringtail+3)) & (0x00008000)) == 0) ? 0 : 1;
1560 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1561 RxAGC_dBm = rxpower+1; /* bias */
1562 } else { /* CCK rate. */
1563 RxAGC_dBm = signal; /* bit 0 discard */
1564
1565 LNA = (u8) (RxAGC_dBm & 0x60) >> 5; /* bit 6~ bit 5 */
1566 BB = (u8) (RxAGC_dBm & 0x1F); /* bit 4 ~ bit 0 */
1567
1568 RxAGC_dBm = -(LNA_gain[LNA] + (BB*2)); /* Pin_11b=-(LNA_gain+BB_gain) (dBm) */
1569
1570 RxAGC_dBm += 4; /* bias */
1571 }
1572
1573 if (RxAGC_dBm & 0x80) /* absolute value */
1574 RXAGC = ~(RxAGC_dBm)+1;
1575 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
1576 /* Translate RXAGC into 1-100. */
1577 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1578 if (RXAGC > 90)
1579 RXAGC = 90;
1580 else if (RXAGC < 25)
1581 RXAGC = 25;
1582 RXAGC = (90-RXAGC)*100/65;
1583 } else { /* CCK rate. */
1584 if (RXAGC > 95)
1585 RXAGC = 95;
1586 else if (RXAGC < 30)
1587 RXAGC = 30;
1588 RXAGC = (95-RXAGC)*100/65;
1589 }
1590 priv->SignalStrength = (u8)RXAGC;
1591 priv->RecvSignalPower = RxAGC_dBm;
1592 priv->RxPower = rxpower;
1593 priv->RSSI = RSSI;
1594 /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
1595 if (quality >= 127)
1596 quality = 1; /*0; */ /* 0 will cause epc to show signal zero , walk around now; */
1597 else if (quality < 27)
1598 quality = 100;
1599 else
1600 quality = 127 - quality;
1601 priv->SignalQuality = quality;
1602
1603 stats.signal = (u8)quality; /*priv->wstats.qual.level = priv->SignalStrength; */
1604 stats.signalstrength = RXAGC;
1605 if (stats.signalstrength > 100)
1606 stats.signalstrength = 100;
1607 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
1608 /* printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); */
1609 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
1610 stats.noise = priv->wstats.qual.noise = 100 - priv->wstats.qual.qual;
1611 bHwError = (((*(priv->rxringtail)) & (0x00000fff)) == 4080) |
1612 (((*(priv->rxringtail)) & (0x04000000)) != 0) |
1613 (((*(priv->rxringtail)) & (0x08000000)) != 0) |
1614 (((~(*(priv->rxringtail))) & (0x10000000)) != 0) |
1615 (((~(*(priv->rxringtail))) & (0x20000000)) != 0);
1616 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
1617 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
1618 hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf;
1619 fc = le16_to_cpu(hdr->frame_ctl);
1620 type = WLAN_FC_GET_TYPE(fc);
1621
1622 if (IEEE80211_FTYPE_CTL != type &&
1623 !bHwError && !bCRC && !bICV &&
1624 eqMacAddr(priv->ieee80211->current_network.bssid,
1625 fc & IEEE80211_FCTL_TODS ? hdr->addr1 :
1626 fc & IEEE80211_FCTL_FROMDS ? hdr->addr2 :
1627 hdr->addr3)) {
1628
1629 /* Perform signal smoothing for dynamic
1630 * mechanism on demand. This is different
1631 * with PerformSignalSmoothing8185 in smoothing
1632 * fomula. No dramatic adjustion is apply
1633 * because dynamic mechanism need some degree
1634 * of correctness. */
1635 PerformUndecoratedSignalSmoothing8185(priv, bCckRate);
1636
1637 /* For good-looking singal strength. */
1638 SignalStrengthIndex = NetgearSignalStrengthTranslate(
1639 priv->LastSignalStrengthInPercent,
1640 priv->SignalStrength);
1641
1642 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
1643 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
1644 /*
1645 * We need more correct power of received packets and the "SignalStrength" of RxStats is beautified,
1646 * so we record the correct power here.
1647 */
1648 priv->Stats_SignalQuality = (long)(priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
1649 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower - 1) / 6;
1650
1651 /* Figure out which antenna that received the last packet. */
1652 priv->LastRxPktAntenna = Antenna ? 1 : 0; /* 0: aux, 1: main. */
1653 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
1654 }
1655
1656 if (first) {
1657 if (!priv->rx_skb_complete) {
1658 /* seems that HW sometimes fails to receive and
1659 doesn't provide the last descriptor */
1660 dev_kfree_skb_any(priv->rx_skb);
1661 priv->stats.rxnolast++;
1662 }
1663 /* support for prism header has been originally added by Christian */
1664 if (priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR) {
1665
1666 } else {
1667 priv->rx_skb = dev_alloc_skb(len+2);
1668 if (!priv->rx_skb)
1669 goto drop;
1670 }
1671
1672 priv->rx_skb_complete = 0;
1673 priv->rx_skb->dev = dev;
1674 } else {
1675 /* if we are here we should have already RXed
1676 * the first frame.
1677 * If we get here and the skb is not allocated then
1678 * we have just throw out garbage (skb not allocated)
1679 * and we are still rxing garbage....
1680 */
1681 if (!priv->rx_skb_complete) {
1682
1683 tmp_skb = dev_alloc_skb(priv->rx_skb->len+len+2);
1684
1685 if (!tmp_skb)
1686 goto drop;
1687
1688 tmp_skb->dev = dev;
1689
1690 memcpy(skb_put(tmp_skb, priv->rx_skb->len),
1691 priv->rx_skb->data,
1692 priv->rx_skb->len);
1693
1694 dev_kfree_skb_any(priv->rx_skb);
1695
1696 priv->rx_skb = tmp_skb;
1697 }
1698 }
1699
1700 if (!priv->rx_skb_complete) {
1701 if (padding) {
1702 memcpy(skb_put(priv->rx_skb, len),
1703 (((unsigned char *)priv->rxbuffer->buf) + 2), len);
1704 } else {
1705 memcpy(skb_put(priv->rx_skb, len),
1706 priv->rxbuffer->buf, len);
1707 }
1708 }
1709
1710 if (last && !priv->rx_skb_complete) {
1711 if (priv->rx_skb->len > 4)
1712 skb_trim(priv->rx_skb, priv->rx_skb->len-4);
1713 if (!ieee80211_rtl_rx(priv->ieee80211,
1714 priv->rx_skb, &stats))
1715 dev_kfree_skb_any(priv->rx_skb);
1716 priv->rx_skb_complete = 1;
1717 }
1718
1719 pci_dma_sync_single_for_device(priv->pdev,
1720 priv->rxbuffer->dma,
1721 priv->rxbuffersize * \
1722 sizeof(u8),
1723 PCI_DMA_FROMDEVICE);
1724
1725 drop: /* this is used when we have not enough mem */
1726 /* restore the descriptor */
1727 *(priv->rxringtail+2) = priv->rxbuffer->dma;
1728 *(priv->rxringtail) = *(priv->rxringtail) & ~0xfff;
1729 *(priv->rxringtail) =
1730 *(priv->rxringtail) | priv->rxbuffersize;
1731
1732 *(priv->rxringtail) =
1733 *(priv->rxringtail) | (1<<31);
1734
1735 priv->rxringtail += rx_desc_size;
1736 if (priv->rxringtail >=
1737 (priv->rxring)+(priv->rxringcount)*rx_desc_size)
1738 priv->rxringtail = priv->rxring;
1739
1740 priv->rxbuffer = (priv->rxbuffer->next);
1741 }
1742 }
1743
1744
1745 void rtl8180_dma_kick(struct net_device *dev, int priority)
1746 {
1747 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1748
1749 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1750 write_nic_byte(dev, TX_DMA_POLLING,
1751 (1 << (priority + 1)) | priv->dma_poll_mask);
1752 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1753
1754 force_pci_posting(dev);
1755 }
1756
1757 void rtl8180_data_hard_stop(struct net_device *dev)
1758 {
1759 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1760
1761 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1762 priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
1763 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1764 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1765 }
1766
1767 void rtl8180_data_hard_resume(struct net_device *dev)
1768 {
1769 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1770
1771 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1772 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
1773 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1774 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1775 }
1776
1777 /*
1778 * This function TX data frames when the ieee80211 stack requires this.
1779 * It checks also if we need to stop the ieee tx queue, eventually do it
1780 */
1781 void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int
1782 rate) {
1783 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1784 int mode;
1785 struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
1786 short morefrag = (h->frame_control) & IEEE80211_FCTL_MOREFRAGS;
1787 unsigned long flags;
1788 int priority;
1789
1790 mode = priv->ieee80211->iw_mode;
1791
1792 rate = ieeerate2rtlrate(rate);
1793 /*
1794 * This function doesn't require lock because we make
1795 * sure it's called with the tx_lock already acquired.
1796 * this come from the kernel's hard_xmit callback (through
1797 * the ieee stack, or from the try_wake_queue (again through
1798 * the ieee stack.
1799 */
1800 priority = AC2Q(skb->priority);
1801 spin_lock_irqsave(&priv->tx_lock, flags);
1802
1803 if (priv->ieee80211->bHwRadioOff) {
1804 spin_unlock_irqrestore(&priv->tx_lock, flags);
1805
1806 return;
1807 }
1808
1809 if (!check_nic_enought_desc(dev, priority)) {
1810 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
1811 get_curr_tx_free_desc(dev, priority));
1812 ieee80211_rtl_stop_queue(priv->ieee80211);
1813 }
1814 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag, 0, rate);
1815 if (!check_nic_enought_desc(dev, priority))
1816 ieee80211_rtl_stop_queue(priv->ieee80211);
1817
1818 spin_unlock_irqrestore(&priv->tx_lock, flags);
1819 }
1820
1821 /*
1822 * This is a rough attempt to TX a frame
1823 * This is called by the ieee 80211 stack to TX management frames.
1824 * If the ring is full packets are dropped (for data frame the queue
1825 * is stopped before this can happen). For this reason it is better
1826 * if the descriptors are larger than the largest management frame
1827 * we intend to TX: i'm unsure what the HW does if it will not find
1828 * the last fragment of a frame because it has been dropped...
1829 * Since queues for Management and Data frames are different we
1830 * might use a different lock than tx_lock (for example mgmt_tx_lock)
1831 */
1832 /* these function may loop if invoked with 0 descriptors or 0 len buffer */
1833 int rtl8180_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1834 {
1835 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1836 unsigned long flags;
1837 int priority;
1838
1839 priority = MANAGE_PRIORITY;
1840
1841 spin_lock_irqsave(&priv->tx_lock, flags);
1842
1843 if (priv->ieee80211->bHwRadioOff) {
1844 spin_unlock_irqrestore(&priv->tx_lock, flags);
1845 dev_kfree_skb_any(skb);
1846 return NETDEV_TX_OK;
1847 }
1848
1849 rtl8180_tx(dev, skb->data, skb->len, priority,
1850 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1851
1852 priv->ieee80211->stats.tx_bytes += skb->len;
1853 priv->ieee80211->stats.tx_packets++;
1854 spin_unlock_irqrestore(&priv->tx_lock, flags);
1855
1856 dev_kfree_skb_any(skb);
1857 return NETDEV_TX_OK;
1858 }
1859
1860 /* longpre 144+48 shortpre 72+24 */
1861 u16 rtl8180_len2duration(u32 len, short rate, short *ext)
1862 {
1863 u16 duration;
1864 u16 drift;
1865 *ext = 0;
1866
1867 switch (rate) {
1868 case 0: /* 1mbps */
1869 *ext = 0;
1870 duration = ((len+4)<<4) / 0x2;
1871 drift = ((len+4)<<4) % 0x2;
1872 if (drift == 0)
1873 break;
1874 duration++;
1875 break;
1876 case 1: /* 2mbps */
1877 *ext = 0;
1878 duration = ((len+4)<<4) / 0x4;
1879 drift = ((len+4)<<4) % 0x4;
1880 if (drift == 0)
1881 break;
1882 duration++;
1883 break;
1884 case 2: /* 5.5mbps */
1885 *ext = 0;
1886 duration = ((len+4)<<4) / 0xb;
1887 drift = ((len+4)<<4) % 0xb;
1888 if (drift == 0)
1889 break;
1890 duration++;
1891 break;
1892 default:
1893 case 3: /* 11mbps */
1894 *ext = 0;
1895 duration = ((len+4)<<4) / 0x16;
1896 drift = ((len+4)<<4) % 0x16;
1897 if (drift == 0)
1898 break;
1899 duration++;
1900 if (drift > 6)
1901 break;
1902 *ext = 1;
1903 break;
1904 }
1905
1906 return duration;
1907 }
1908
1909 void rtl8180_prepare_beacon(struct net_device *dev)
1910 {
1911 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1912 struct sk_buff *skb;
1913
1914 u16 word = read_nic_word(dev, BcnItv);
1915 word &= ~BcnItv_BcnItv; /* clear Bcn_Itv */
1916 word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval); /* 0x64; */
1917 write_nic_word(dev, BcnItv, word);
1918
1919 skb = ieee80211_get_beacon(priv->ieee80211);
1920 if (skb) {
1921 rtl8180_tx(dev, skb->data, skb->len, BEACON_PRIORITY,
1922 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1923 dev_kfree_skb_any(skb);
1924 }
1925 }
1926
1927 /*
1928 * This function do the real dirty work: it enqueues a TX command
1929 * descriptor in the ring buffer, copyes the frame in a TX buffer
1930 * and kicks the NIC to ensure it does the DMA transfer.
1931 */
1932 short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
1933 short morefrag, short descfrag, int rate)
1934 {
1935 struct r8180_priv *priv = ieee80211_priv(dev);
1936 u32 *tail, *temp_tail;
1937 u32 *begin;
1938 u32 *buf;
1939 int i;
1940 int remain;
1941 int buflen;
1942 int count;
1943 u16 duration;
1944 short ext;
1945 struct buffer *buflist;
1946 struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
1947 u8 dest[ETH_ALEN];
1948 u8 bUseShortPreamble = 0;
1949 u8 bCTSEnable = 0;
1950 u8 bRTSEnable = 0;
1951 u16 Duration = 0;
1952 u16 RtsDur = 0;
1953 u16 ThisFrameTime = 0;
1954 u16 TxDescDuration = 0;
1955 u8 ownbit_flag = false;
1956
1957 switch (priority) {
1958 case MANAGE_PRIORITY:
1959 tail = priv->txmapringtail;
1960 begin = priv->txmapring;
1961 buflist = priv->txmapbufstail;
1962 count = priv->txringcount;
1963 break;
1964 case BK_PRIORITY:
1965 tail = priv->txbkpringtail;
1966 begin = priv->txbkpring;
1967 buflist = priv->txbkpbufstail;
1968 count = priv->txringcount;
1969 break;
1970 case BE_PRIORITY:
1971 tail = priv->txbepringtail;
1972 begin = priv->txbepring;
1973 buflist = priv->txbepbufstail;
1974 count = priv->txringcount;
1975 break;
1976 case VI_PRIORITY:
1977 tail = priv->txvipringtail;
1978 begin = priv->txvipring;
1979 buflist = priv->txvipbufstail;
1980 count = priv->txringcount;
1981 break;
1982 case VO_PRIORITY:
1983 tail = priv->txvopringtail;
1984 begin = priv->txvopring;
1985 buflist = priv->txvopbufstail;
1986 count = priv->txringcount;
1987 break;
1988 case HI_PRIORITY:
1989 tail = priv->txhpringtail;
1990 begin = priv->txhpring;
1991 buflist = priv->txhpbufstail;
1992 count = priv->txringcount;
1993 break;
1994 case BEACON_PRIORITY:
1995 tail = priv->txbeaconringtail;
1996 begin = priv->txbeaconring;
1997 buflist = priv->txbeaconbufstail;
1998 count = priv->txbeaconcount;
1999 break;
2000 default:
2001 return -1;
2002 break;
2003 }
2004
2005 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
2006 if (is_multicast_ether_addr(dest)) {
2007 Duration = 0;
2008 RtsDur = 0;
2009 bRTSEnable = 0;
2010 bCTSEnable = 0;
2011
2012 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate),
2013 0, bUseShortPreamble);
2014 TxDescDuration = ThisFrameTime;
2015 } else { /* Unicast packet */
2016 u16 AckTime;
2017
2018 /* YJ,add,080828,for Keep alive */
2019 priv->NumTxUnicast++;
2020
2021 /* Figure out ACK rate according to BSS basic rate
2022 * and Tx rate. */
2023 AckTime = ComputeTxTime(14, 10, 0, 0); /* AckCTSLng = 14 use 1M bps send */
2024
2025 if (((len + sCrcLng) > priv->rts) && priv->rts) { /* RTS/CTS. */
2026 u16 RtsTime, CtsTime;
2027 /* u16 CtsRate; */
2028 bRTSEnable = 1;
2029 bCTSEnable = 0;
2030
2031 /* Rate and time required for RTS. */
2032 RtsTime = ComputeTxTime(sAckCtsLng/8, priv->ieee80211->basic_rate, 0, 0);
2033 /* Rate and time required for CTS. */
2034 CtsTime = ComputeTxTime(14, 10, 0, 0); /* AckCTSLng = 14 use 1M bps send */
2035
2036 /* Figure out time required to transmit this frame. */
2037 ThisFrameTime = ComputeTxTime(len + sCrcLng,
2038 rtl8180_rate2rate(rate),
2039 0,
2040 bUseShortPreamble);
2041
2042 /* RTS-CTS-ThisFrame-ACK. */
2043 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
2044
2045 TxDescDuration = RtsTime + RtsDur;
2046 } else { /* Normal case. */
2047 bCTSEnable = 0;
2048 bRTSEnable = 0;
2049 RtsDur = 0;
2050
2051 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate),
2052 0, bUseShortPreamble);
2053 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
2054 }
2055
2056 if (!(frag_hdr->frame_control & IEEE80211_FCTL_MOREFRAGS)) {
2057 /* ThisFrame-ACK. */
2058 Duration = aSifsTime + AckTime;
2059 } else { /* One or more fragments remained. */
2060 u16 NextFragTime;
2061 NextFragTime = ComputeTxTime(len + sCrcLng, /* pretend following packet length equal current packet */
2062 rtl8180_rate2rate(rate),
2063 0,
2064 bUseShortPreamble);
2065
2066 /* ThisFrag-ACk-NextFrag-ACK. */
2067 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
2068 }
2069
2070 } /* End of Unicast packet */
2071
2072 frag_hdr->duration_id = Duration;
2073
2074 buflen = priv->txbuffsize;
2075 remain = len;
2076 temp_tail = tail;
2077
2078 while (remain != 0) {
2079 mb();
2080 if (!buflist) {
2081 DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
2082 return -1;
2083 }
2084 buf = buflist->buf;
2085
2086 if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) {
2087 DMESGW("No more TX desc, returning %x of %x",
2088 remain, len);
2089 priv->stats.txrdu++;
2090 return remain;
2091 }
2092
2093 *tail = 0; /* zeroes header */
2094 *(tail+1) = 0;
2095 *(tail+3) = 0;
2096 *(tail+5) = 0;
2097 *(tail+6) = 0;
2098 *(tail+7) = 0;
2099
2100 /* FIXME: this should be triggered by HW encryption parameters.*/
2101 *tail |= (1<<15); /* no encrypt */
2102
2103 if (remain == len && !descfrag) {
2104 ownbit_flag = false;
2105 *tail = *tail | (1<<29) ; /* fist segment of the packet */
2106 *tail = *tail | (len);
2107 } else {
2108 ownbit_flag = true;
2109 }
2110
2111 for (i = 0; i < buflen && remain > 0; i++, remain--) {
2112 ((u8 *)buf)[i] = txbuf[i]; /* copy data into descriptor pointed DMAble buffer */
2113 if (remain == 4 && i+4 >= buflen)
2114 break;
2115 /* ensure the last desc has at least 4 bytes payload */
2116
2117 }
2118 txbuf = txbuf + i;
2119 *(tail+3) = *(tail+3) & ~0xfff;
2120 *(tail+3) = *(tail+3) | i; /* buffer length */
2121 /* Use short preamble or not */
2122 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
2123 if (priv->plcp_preamble_mode == 1 && rate != 0) /* short mode now, not long! */
2124 ; /* *tail |= (1<<16); */ /* enable short preamble mode. */
2125
2126 if (bCTSEnable)
2127 *tail |= (1<<18);
2128
2129 if (bRTSEnable) { /* rts enable */
2130 *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19); /* RTS RATE */
2131 *tail |= (1<<23); /* rts enable */
2132 *(tail+1) |= (RtsDur&0xffff); /* RTS Duration */
2133 }
2134 *(tail+3) |= ((TxDescDuration&0xffff)<<16); /* DURATION */
2135 /* *(tail+3) |= (0xe6<<16); */
2136 *(tail+5) |= (11<<8); /* (priv->retry_data<<8); */ /* retry lim; */
2137
2138 *tail = *tail | ((rate&0xf) << 24);
2139
2140 /* hw_plcp_len is not used for rtl8180 chip */
2141 /* FIXME */
2142 if (!priv->hw_plcp_len) {
2143 duration = rtl8180_len2duration(len, rate, &ext);
2144 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
2145 if (ext)
2146 *(tail+1) = *(tail+1) | (1<<31); /* plcp length extension */
2147 }
2148
2149 if (morefrag)
2150 *tail = (*tail) | (1<<17); /* more fragment */
2151 if (!remain)
2152 *tail = (*tail) | (1<<28); /* last segment of frame */
2153
2154 *(tail+5) = *(tail+5)|(2<<27);
2155 *(tail+7) = *(tail+7)|(1<<4);
2156
2157 wmb();
2158 if (ownbit_flag)
2159 *tail = *tail | (1<<31); /* descriptor ready to be txed */
2160
2161 if ((tail - begin)/8 == count-1)
2162 tail = begin;
2163 else
2164 tail = tail+8;
2165
2166 buflist = buflist->next;
2167
2168 mb();
2169
2170 switch (priority) {
2171 case MANAGE_PRIORITY:
2172 priv->txmapringtail = tail;
2173 priv->txmapbufstail = buflist;
2174 break;
2175 case BK_PRIORITY:
2176 priv->txbkpringtail = tail;
2177 priv->txbkpbufstail = buflist;
2178 break;
2179 case BE_PRIORITY:
2180 priv->txbepringtail = tail;
2181 priv->txbepbufstail = buflist;
2182 break;
2183 case VI_PRIORITY:
2184 priv->txvipringtail = tail;
2185 priv->txvipbufstail = buflist;
2186 break;
2187 case VO_PRIORITY:
2188 priv->txvopringtail = tail;
2189 priv->txvopbufstail = buflist;
2190 break;
2191 case HI_PRIORITY:
2192 priv->txhpringtail = tail;
2193 priv->txhpbufstail = buflist;
2194 break;
2195 case BEACON_PRIORITY:
2196 /*
2197 * The HW seems to be happy with the 1st
2198 * descriptor filled and the 2nd empty...
2199 * So always update descriptor 1 and never
2200 * touch 2nd
2201 */
2202 break;
2203 }
2204 }
2205 *temp_tail = *temp_tail | (1<<31); /* descriptor ready to be txed */
2206 rtl8180_dma_kick(dev, priority);
2207
2208 return 0;
2209 }
2210
2211 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
2212
2213 void rtl8180_link_change(struct net_device *dev)
2214 {
2215 struct r8180_priv *priv = ieee80211_priv(dev);
2216 u16 beacon_interval;
2217 struct ieee80211_network *net = &priv->ieee80211->current_network;
2218
2219 rtl8180_update_msr(dev);
2220
2221 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2222
2223 write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]);
2224 write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]);
2225
2226 beacon_interval = read_nic_dword(dev, BEACON_INTERVAL);
2227 beacon_interval &= ~BEACON_INTERVAL_MASK;
2228 beacon_interval |= net->beacon_interval;
2229 write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
2230
2231 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2232
2233 rtl8180_set_chan(dev, priv->chan);
2234 }
2235
2236 void rtl8180_rq_tx_ack(struct net_device *dev)
2237 {
2238
2239 struct r8180_priv *priv = ieee80211_priv(dev);
2240
2241 write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) | CONFIG4_PWRMGT);
2242 priv->ack_tx_to_ieee = 1;
2243 }
2244
2245 short rtl8180_is_tx_queue_empty(struct net_device *dev)
2246 {
2247
2248 struct r8180_priv *priv = ieee80211_priv(dev);
2249 u32 *d;
2250
2251 for (d = priv->txmapring;
2252 d < priv->txmapring + priv->txringcount; d += 8)
2253 if (*d & (1<<31))
2254 return 0;
2255
2256 for (d = priv->txbkpring;
2257 d < priv->txbkpring + priv->txringcount; d += 8)
2258 if (*d & (1<<31))
2259 return 0;
2260
2261 for (d = priv->txbepring;
2262 d < priv->txbepring + priv->txringcount; d += 8)
2263 if (*d & (1<<31))
2264 return 0;
2265
2266 for (d = priv->txvipring;
2267 d < priv->txvipring + priv->txringcount; d += 8)
2268 if (*d & (1<<31))
2269 return 0;
2270
2271 for (d = priv->txvopring;
2272 d < priv->txvopring + priv->txringcount; d += 8)
2273 if (*d & (1<<31))
2274 return 0;
2275
2276 for (d = priv->txhpring;
2277 d < priv->txhpring + priv->txringcount; d += 8)
2278 if (*d & (1<<31))
2279 return 0;
2280 return 1;
2281 }
2282 /* FIXME FIXME 5msecs is random */
2283 #define HW_WAKE_DELAY 5
2284
2285 void rtl8180_hw_wakeup(struct net_device *dev)
2286 {
2287 unsigned long flags;
2288 struct r8180_priv *priv = ieee80211_priv(dev);
2289
2290 spin_lock_irqsave(&priv->ps_lock, flags);
2291 write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) & ~CONFIG4_PWRMGT);
2292 if (priv->rf_wakeup)
2293 priv->rf_wakeup(dev);
2294 spin_unlock_irqrestore(&priv->ps_lock, flags);
2295 }
2296
2297 void rtl8180_hw_sleep_down(struct net_device *dev)
2298 {
2299 unsigned long flags;
2300 struct r8180_priv *priv = ieee80211_priv(dev);
2301
2302 spin_lock_irqsave(&priv->ps_lock, flags);
2303 if (priv->rf_sleep)
2304 priv->rf_sleep(dev);
2305 spin_unlock_irqrestore(&priv->ps_lock, flags);
2306 }
2307
2308 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
2309 {
2310 struct r8180_priv *priv = ieee80211_priv(dev);
2311 u32 rb = jiffies;
2312 unsigned long flags;
2313
2314 spin_lock_irqsave(&priv->ps_lock, flags);
2315
2316 /*
2317 * Writing HW register with 0 equals to disable
2318 * the timer, that is not really what we want
2319 */
2320 tl -= MSECS(4+16+7);
2321
2322 /*
2323 * If the interval in witch we are requested to sleep is too
2324 * short then give up and remain awake
2325 */
2326 if (((tl >= rb) && (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2327 || ((rb > tl) && (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2328 spin_unlock_irqrestore(&priv->ps_lock, flags);
2329 printk("too short to sleep\n");
2330 return;
2331 }
2332
2333 {
2334 u32 tmp = (tl > rb) ? (tl-rb) : (rb-tl);
2335
2336 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
2337 /* as tl may be less than rb */
2338 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp);
2339 }
2340 /*
2341 * If we suspect the TimerInt is gone beyond tl
2342 * while setting it, then give up
2343 */
2344
2345 if (((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME))) ||
2346 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2347 spin_unlock_irqrestore(&priv->ps_lock, flags);
2348 return;
2349 }
2350
2351 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
2352 spin_unlock_irqrestore(&priv->ps_lock, flags);
2353 }
2354
2355 void rtl8180_wmm_param_update(struct work_struct *work)
2356 {
2357 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wmm_param_update_wq);
2358 struct net_device *dev = ieee->dev;
2359 u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
2360 u8 mode = ieee->current_network.mode;
2361 AC_CODING eACI;
2362 AC_PARAM AcParam;
2363 PAC_PARAM pAcParam;
2364 u8 i;
2365
2366 if (!ieee->current_network.QoS_Enable) {
2367 /* legacy ac_xx_param update */
2368 AcParam.longData = 0;
2369 AcParam.f.AciAifsn.f.AIFSN = 2; /* Follow 802.11 DIFS. */
2370 AcParam.f.AciAifsn.f.ACM = 0;
2371 AcParam.f.Ecw.f.ECWmin = 3; /* Follow 802.11 CWmin. */
2372 AcParam.f.Ecw.f.ECWmax = 7; /* Follow 802.11 CWmax. */
2373 AcParam.f.TXOPLimit = 0;
2374 for (eACI = 0; eACI < AC_MAX; eACI++) {
2375 AcParam.f.AciAifsn.f.ACI = (u8)eACI;
2376 {
2377 u8 u1bAIFS;
2378 u32 u4bAcParam;
2379 pAcParam = (PAC_PARAM)(&AcParam);
2380 /* Retrieve paramters to update. */
2381 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2382 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
2383 (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
2384 (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
2385 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2386 switch (eACI) {
2387 case AC1_BK:
2388 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2389 break;
2390 case AC0_BE:
2391 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2392 break;
2393 case AC2_VI:
2394 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2395 break;
2396 case AC3_VO:
2397 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2398 break;
2399 default:
2400 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
2401 break;
2402 }
2403 }
2404 }
2405 return;
2406 }
2407
2408 for (i = 0; i < AC_MAX; i++) {
2409 /* AcParam.longData = 0; */
2410 pAcParam = (AC_PARAM *)ac_param;
2411 {
2412 AC_CODING eACI;
2413 u8 u1bAIFS;
2414 u32 u4bAcParam;
2415
2416 /* Retrieve paramters to update. */
2417 eACI = pAcParam->f.AciAifsn.f.ACI;
2418 /* Mode G/A: slotTimeTimer = 9; Mode B: 20 */
2419 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2420 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) |
2421 (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) |
2422 (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) |
2423 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2424
2425 switch (eACI) {
2426 case AC1_BK:
2427 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2428 break;
2429 case AC0_BE:
2430 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2431 break;
2432 case AC2_VI:
2433 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2434 break;
2435 case AC3_VO:
2436 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2437 break;
2438 default:
2439 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
2440 break;
2441 }
2442 }
2443 ac_param += (sizeof(AC_PARAM));
2444 }
2445 }
2446
2447 void rtl8180_tx_irq_wq(struct work_struct *work);
2448 void rtl8180_restart_wq(struct work_struct *work);
2449 /* void rtl8180_rq_tx_ack(struct work_struct *work); */
2450 void rtl8180_watch_dog_wq(struct work_struct *work);
2451 void rtl8180_hw_wakeup_wq(struct work_struct *work);
2452 void rtl8180_hw_sleep_wq(struct work_struct *work);
2453 void rtl8180_sw_antenna_wq(struct work_struct *work);
2454 void rtl8180_watch_dog(struct net_device *dev);
2455
2456 void watch_dog_adaptive(unsigned long data)
2457 {
2458 struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
2459
2460 if (!priv->up) {
2461 DMESG("<----watch_dog_adaptive():driver is not up!\n");
2462 return;
2463 }
2464
2465 /* Tx High Power Mechanism. */
2466 if (CheckHighPower((struct net_device *)data))
2467 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
2468
2469 /* Tx Power Tracking on 87SE. */
2470 if (CheckTxPwrTracking((struct net_device *)data))
2471 TxPwrTracking87SE((struct net_device *)data);
2472
2473 /* Perform DIG immediately. */
2474 if (CheckDig((struct net_device *)data) == true)
2475 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
2476 rtl8180_watch_dog((struct net_device *)data);
2477
2478 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
2479
2480 priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
2481 add_timer(&priv->watch_dog_timer);
2482 }
2483
2484 static CHANNEL_LIST ChannelPlan[] = {
2485 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, /* FCC */
2486 {{1,2,3,4,5,6,7,8,9,10,11},11}, /* IC */
2487 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* ETSI */
2488 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* Spain. Change to ETSI. */
2489 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* France. Change to ETSI. */
2490 {{14,36,40,44,48,52,56,60,64},9}, /* MKK */
2491 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},/* MKK1 */
2492 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* Israel. */
2493 {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17}, /* For 11a , TELEC */
2494 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, /* For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 */
2495 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} /* world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826 */
2496 };
2497
2498 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
2499 {
2500 int i;
2501
2502 /* lzm add 080826 */
2503 ieee->MinPassiveChnlNum = MAX_CHANNEL_NUMBER+1;
2504 ieee->IbssStartChnl = 0;
2505
2506 switch (channel_plan) {
2507 case COUNTRY_CODE_FCC:
2508 case COUNTRY_CODE_IC:
2509 case COUNTRY_CODE_ETSI:
2510 case COUNTRY_CODE_SPAIN:
2511 case COUNTRY_CODE_FRANCE:
2512 case COUNTRY_CODE_MKK:
2513 case COUNTRY_CODE_MKK1:
2514 case COUNTRY_CODE_ISRAEL:
2515 case COUNTRY_CODE_TELEC:
2516 {
2517 Dot11d_Init(ieee);
2518 ieee->bGlobalDomain = false;
2519 if (ChannelPlan[channel_plan].Len != 0) {
2520 /* Clear old channel map */
2521 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2522 /* Set new channel map */
2523 for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
2524 if (ChannelPlan[channel_plan].Channel[i] <= 14)
2525 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
2526 }
2527 }
2528 break;
2529 }
2530 case COUNTRY_CODE_GLOBAL_DOMAIN:
2531 {
2532 GET_DOT11D_INFO(ieee)->bEnabled = 0;
2533 Dot11d_Reset(ieee);
2534 ieee->bGlobalDomain = true;
2535 break;
2536 }
2537 case COUNTRY_CODE_WORLD_WIDE_13_INDEX:/* lzm add 080826 */
2538 {
2539 ieee->MinPassiveChnlNum = 12;
2540 ieee->IbssStartChnl = 10;
2541 break;
2542 }
2543 default:
2544 {
2545 Dot11d_Init(ieee);
2546 ieee->bGlobalDomain = false;
2547 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2548 for (i = 1; i <= 14; i++)
2549 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
2550 break;
2551 }
2552 }
2553 }
2554
2555 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
2556
2557 /* YJ,add,080828 */
2558 static void rtl8180_statistics_init(struct Stats *pstats)
2559 {
2560 memset(pstats, 0, sizeof(struct Stats));
2561 }
2562
2563 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
2564 {
2565 memset(plink_detect, 0, sizeof(link_detect_t));
2566 plink_detect->SlotNum = DEFAULT_SLOT_NUM;
2567 }
2568
2569 /* YJ,add,080828,end */
2570 static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
2571 {
2572 struct net_device *dev = eeprom->data;
2573 u8 reg = read_nic_byte(dev, EPROM_CMD);
2574
2575 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
2576 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
2577 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
2578 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
2579 }
2580
2581 static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom)
2582 {
2583 struct net_device *dev = eeprom->data;
2584 u8 reg = 2 << 6;
2585
2586 if (eeprom->reg_data_in)
2587 reg |= RTL818X_EEPROM_CMD_WRITE;
2588 if (eeprom->reg_data_out)
2589 reg |= RTL818X_EEPROM_CMD_READ;
2590 if (eeprom->reg_data_clock)
2591 reg |= RTL818X_EEPROM_CMD_CK;
2592 if (eeprom->reg_chip_select)
2593 reg |= RTL818X_EEPROM_CMD_CS;
2594
2595 write_nic_byte(dev, EPROM_CMD, reg);
2596 read_nic_byte(dev, EPROM_CMD);
2597 udelay(10);
2598 }
2599
2600 short rtl8180_init(struct net_device *dev)
2601 {
2602 struct r8180_priv *priv = ieee80211_priv(dev);
2603 u16 word;
2604 u16 version;
2605 u32 usValue;
2606 u16 tmpu16;
2607 int i, j;
2608 struct eeprom_93cx6 eeprom;
2609 u16 eeprom_val;
2610
2611 eeprom.data = dev;
2612 eeprom.register_read = rtl8187se_eeprom_register_read;
2613 eeprom.register_write = rtl8187se_eeprom_register_write;
2614 eeprom.width = PCI_EEPROM_WIDTH_93C46;
2615
2616 eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
2617 priv->channel_plan = eeprom_val & 0xFF;
2618 if (priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN) {
2619 printk("rtl8180_init:Error channel plan! Set to default.\n");
2620 priv->channel_plan = 0;
2621 }
2622
2623 DMESG("Channel plan is %d\n", priv->channel_plan);
2624 rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
2625
2626 /* FIXME: these constants are placed in a bad pleace. */
2627 priv->txbuffsize = 2048; /* 1024; */
2628 priv->txringcount = 32; /* 32; */
2629 priv->rxbuffersize = 2048; /* 1024; */
2630 priv->rxringcount = 64; /* 32; */
2631 priv->txbeaconcount = 2;
2632 priv->rx_skb_complete = 1;
2633
2634 priv->RFChangeInProgress = false;
2635 priv->SetRFPowerStateInProgress = false;
2636 priv->RFProgType = 0;
2637 priv->bInHctTest = false;
2638
2639 priv->irq_enabled = 0;
2640
2641 rtl8180_statistics_init(&priv->stats);
2642 rtl8180_link_detect_init(&priv->link_detect);
2643
2644 priv->ack_tx_to_ieee = 0;
2645 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2646 priv->ieee80211->iw_mode = IW_MODE_INFRA;
2647 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
2648 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2649 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
2650 priv->ieee80211->active_scan = 1;
2651 priv->ieee80211->rate = 110; /* 11 mbps */
2652 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
2653 priv->ieee80211->host_encrypt = 1;
2654 priv->ieee80211->host_decrypt = 1;
2655 priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
2656 priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
2657 priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
2658 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
2659
2660 priv->hw_wep = hwwep;
2661 priv->prism_hdr = 0;
2662 priv->dev = dev;
2663 priv->retry_rts = DEFAULT_RETRY_RTS;
2664 priv->retry_data = DEFAULT_RETRY_DATA;
2665 priv->RFChangeInProgress = false;
2666 priv->SetRFPowerStateInProgress = false;
2667 priv->RFProgType = 0;
2668 priv->bInHctTest = false;
2669 priv->bInactivePs = true; /* false; */
2670 priv->ieee80211->bInactivePs = priv->bInactivePs;
2671 priv->bSwRfProcessing = false;
2672 priv->eRFPowerState = eRfOff;
2673 priv->RfOffReason = 0;
2674 priv->LedStrategy = SW_LED_MODE0;
2675 priv->TxPollingTimes = 0; /* lzm add 080826 */
2676 priv->bLeisurePs = true;
2677 priv->dot11PowerSaveMode = eActive;
2678 priv->AdMinCheckPeriod = 5;
2679 priv->AdMaxCheckPeriod = 10;
2680 priv->AdMaxRxSsThreshold = 30; /* 60->30 */
2681 priv->AdRxSsThreshold = 20; /* 50->20 */
2682 priv->AdCheckPeriod = priv->AdMinCheckPeriod;
2683 priv->AdTickCount = 0;
2684 priv->AdRxSignalStrength = -1;
2685 priv->RegSwAntennaDiversityMechanism = 0;
2686 priv->RegDefaultAntenna = 0;
2687 priv->SignalStrength = 0;
2688 priv->AdRxOkCnt = 0;
2689 priv->CurrAntennaIndex = 0;
2690 priv->AdRxSsBeforeSwitched = 0;
2691 init_timer(&priv->SwAntennaDiversityTimer);
2692 priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
2693 priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
2694 priv->bDigMechanism = 1;
2695 priv->InitialGain = 6;
2696 priv->bXtalCalibration = false;
2697 priv->XtalCal_Xin = 0;
2698 priv->XtalCal_Xout = 0;
2699 priv->bTxPowerTrack = false;
2700 priv->ThermalMeter = 0;
2701 priv->FalseAlarmRegValue = 0;
2702 priv->RegDigOfdmFaUpTh = 0xc; /* Upper threshold of OFDM false alarm, which is used in DIG. */
2703 priv->DIG_NumberFallbackVote = 0;
2704 priv->DIG_NumberUpgradeVote = 0;
2705 priv->LastSignalStrengthInPercent = 0;
2706 priv->Stats_SignalStrength = 0;
2707 priv->LastRxPktAntenna = 0;
2708 priv->SignalQuality = 0; /* in 0-100 index. */
2709 priv->Stats_SignalQuality = 0;
2710 priv->RecvSignalPower = 0; /* in dBm. */
2711 priv->Stats_RecvSignalPower = 0;
2712 priv->AdMainAntennaRxOkCnt = 0;
2713 priv->AdAuxAntennaRxOkCnt = 0;
2714 priv->bHWAdSwitched = false;
2715 priv->bRegHighPowerMechanism = true;
2716 priv->RegHiPwrUpperTh = 77;
2717 priv->RegHiPwrLowerTh = 75;
2718 priv->RegRSSIHiPwrUpperTh = 70;
2719 priv->RegRSSIHiPwrLowerTh = 20;
2720 priv->bCurCCKPkt = false;
2721 priv->UndecoratedSmoothedSS = -1;
2722 priv->bToUpdateTxPwr = false;
2723 priv->CurCCKRSSI = 0;
2724 priv->RxPower = 0;
2725 priv->RSSI = 0;
2726 priv->NumTxOkTotal = 0;
2727 priv->NumTxUnicast = 0;
2728 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
2729 priv->PowerProfile = POWER_PROFILE_AC;
2730 priv->CurrRetryCnt = 0;
2731 priv->LastRetryCnt = 0;
2732 priv->LastTxokCnt = 0;
2733 priv->LastRxokCnt = 0;
2734 priv->LastRetryRate = 0;
2735 priv->bTryuping = 0;
2736 priv->CurrTxRate = 0;
2737 priv->CurrRetryRate = 0;
2738 priv->TryupingCount = 0;
2739 priv->TryupingCountNoData = 0;
2740 priv->TryDownCountLowData = 0;
2741 priv->LastTxOKBytes = 0;
2742 priv->LastFailTxRate = 0;
2743 priv->LastFailTxRateSS = 0;
2744 priv->FailTxRateCount = 0;
2745 priv->LastTxThroughput = 0;
2746 priv->NumTxOkBytesTotal = 0;
2747 priv->ForcedDataRate = 0;
2748 priv->RegBModeGainStage = 1;
2749
2750 priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
2751 spin_lock_init(&priv->irq_lock);
2752 spin_lock_init(&priv->irq_th_lock);
2753 spin_lock_init(&priv->tx_lock);
2754 spin_lock_init(&priv->ps_lock);
2755 spin_lock_init(&priv->rf_ps_lock);
2756 sema_init(&priv->wx_sem, 1);
2757 sema_init(&priv->rf_state, 1);
2758 INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
2759 INIT_WORK(&priv->tx_irq_wq, (void *)rtl8180_tx_irq_wq);
2760 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
2761 (void *)rtl8180_hw_wakeup_wq);
2762 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
2763 (void *)rtl8180_hw_sleep_wq);
2764 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,
2765 (void *)rtl8180_wmm_param_update);
2766 INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,
2767 (void *)rtl8180_rate_adapter);
2768 INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,
2769 (void *)rtl8180_hw_dig_wq);
2770 INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,
2771 (void *)rtl8180_tx_pw_wq);
2772 INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,
2773 (void *) GPIOChangeRFWorkItemCallBack);
2774 tasklet_init(&priv->irq_rx_tasklet,
2775 (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
2776 (unsigned long)priv);
2777
2778 init_timer(&priv->watch_dog_timer);
2779 priv->watch_dog_timer.data = (unsigned long)dev;
2780 priv->watch_dog_timer.function = watch_dog_adaptive;
2781
2782 init_timer(&priv->rateadapter_timer);
2783 priv->rateadapter_timer.data = (unsigned long)dev;
2784 priv->rateadapter_timer.function = timer_rate_adaptive;
2785 priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
2786 priv->bEnhanceTxPwr = false;
2787
2788 priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
2789 priv->ieee80211->set_chan = rtl8180_set_chan;
2790 priv->ieee80211->link_change = rtl8180_link_change;
2791 priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
2792 priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
2793 priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
2794
2795 priv->ieee80211->init_wmmparam_flag = 0;
2796
2797 priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
2798 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
2799 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2800
2801 priv->MWIEnable = 0;
2802
2803 priv->ShortRetryLimit = 7;
2804 priv->LongRetryLimit = 7;
2805 priv->EarlyRxThreshold = 7;
2806
2807 priv->CSMethod = (0x01 << 29);
2808
2809 priv->TransmitConfig = TCR_DurProcMode_OFFSET |
2810 (7<<TCR_MXDMA_OFFSET) |
2811 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
2812 (priv->LongRetryLimit<<TCR_LRL_OFFSET) |
2813 (0 ? TCR_SAT : 0);
2814
2815 priv->ReceiveConfig = RCR_AMF | RCR_ADF | RCR_ACF |
2816 RCR_AB | RCR_AM | RCR_APM |
2817 (7<<RCR_MXDMA_OFFSET) |
2818 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) |
2819 (priv->EarlyRxThreshold == 7 ?
2820 RCR_ONLYERLPKT : 0);
2821
2822 priv->IntrMask = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
2823 IMR_THPDER | IMR_THPDOK |
2824 IMR_TVODER | IMR_TVODOK |
2825 IMR_TVIDER | IMR_TVIDOK |
2826 IMR_TBEDER | IMR_TBEDOK |
2827 IMR_TBKDER | IMR_TBKDOK |
2828 IMR_RDU |
2829 IMR_RER | IMR_ROK |
2830 IMR_RQoSOK;
2831
2832 priv->InitialGain = 6;
2833
2834 DMESG("MAC controller is a RTL8187SE b/g");
2835 priv->phy_ver = 2;
2836
2837 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
2838 priv->ieee80211->short_slot = 1;
2839
2840 /* just for sync 85 */
2841 priv->enable_gpio0 = 0;
2842
2843 eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &eeprom_val);
2844 usValue = eeprom_val;
2845 DMESG("usValue is 0x%x\n", usValue);
2846 /* 3Read AntennaDiversity */
2847
2848 /* SW Antenna Diversity. */
2849 if ((usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE)
2850 priv->EEPROMSwAntennaDiversity = false;
2851 else
2852 priv->EEPROMSwAntennaDiversity = true;
2853
2854 /* Default Antenna to use. */
2855 if ((usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1)
2856 priv->EEPROMDefaultAntenna1 = false;
2857 else
2858 priv->EEPROMDefaultAntenna1 = true;
2859
2860 if (priv->RegSwAntennaDiversityMechanism == 0) /* Auto */
2861 /* 0: default from EEPROM. */
2862 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2863 else
2864 /* 1:disable antenna diversity, 2: enable antenna diversity. */
2865 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1) ? false : true);
2866
2867 if (priv->RegDefaultAntenna == 0)
2868 /* 0: default from EEPROM. */
2869 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2870 else
2871 /* 1: main, 2: aux. */
2872 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna == 2) ? true : false);
2873
2874 /* rtl8185 can calc plcp len in HW. */
2875 priv->hw_plcp_len = 1;
2876
2877 priv->plcp_preamble_mode = 2;
2878 /* the eeprom type is stored in RCR register bit #6 */
2879 if (RCR_9356SEL & read_nic_dword(dev, RCR))
2880 priv->epromtype = EPROM_93c56;
2881 else
2882 priv->epromtype = EPROM_93c46;
2883
2884 eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
2885 dev->dev_addr, 3);
2886
2887 for (i = 1, j = 0; i < 14; i += 2, j++) {
2888 eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
2889 priv->chtxpwr[i] = word & 0xff;
2890 priv->chtxpwr[i+1] = (word & 0xff00)>>8;
2891 }
2892 for (i = 1, j = 0; i < 14; i += 2, j++) {
2893 eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
2894 priv->chtxpwr_ofdm[i] = word & 0xff;
2895 priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
2896 }
2897
2898 /* 3Read crystal calibration and thermal meter indication on 87SE. */
2899 eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16);
2900
2901 /* Crystal calibration for Xin and Xout resp. */
2902 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
2903 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
2904 if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12)
2905 priv->bXtalCalibration = true;
2906
2907 /* Thermal meter reference indication. */
2908 priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8);
2909 if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
2910 priv->bTxPowerTrack = true;
2911
2912 eeprom_93cx6_read(&eeprom, EPROM_TXPW_BASE, &word);
2913 priv->cck_txpwr_base = word & 0xf;
2914 priv->ofdm_txpwr_base = (word>>4) & 0xf;
2915
2916 eeprom_93cx6_read(&eeprom, EPROM_VERSION, &version);
2917 DMESG("EEPROM version %x", version);
2918 priv->rcr_csense = 3;
2919
2920 eeprom_93cx6_read(&eeprom, ENERGY_TRESHOLD, &eeprom_val);
2921 priv->cs_treshold = (eeprom_val & 0xff00) >> 8;
2922
2923 eeprom_93cx6_read(&eeprom, RFCHIPID, &eeprom_val);
2924 priv->rf_sleep = rtl8225z4_rf_sleep;
2925 priv->rf_wakeup = rtl8225z4_rf_wakeup;
2926 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
2927
2928 priv->rf_close = rtl8225z2_rf_close;
2929 priv->rf_init = rtl8225z2_rf_init;
2930 priv->rf_set_chan = rtl8225z2_rf_set_chan;
2931 priv->rf_set_sens = NULL;
2932
2933 if (0 != alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
2934 return -ENOMEM;
2935
2936 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2937 TX_MANAGEPRIORITY_RING_ADDR))
2938 return -ENOMEM;
2939
2940 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2941 TX_BKPRIORITY_RING_ADDR))
2942 return -ENOMEM;
2943
2944 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2945 TX_BEPRIORITY_RING_ADDR))
2946 return -ENOMEM;
2947
2948 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2949 TX_VIPRIORITY_RING_ADDR))
2950 return -ENOMEM;
2951
2952 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2953 TX_VOPRIORITY_RING_ADDR))
2954 return -ENOMEM;
2955
2956 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2957 TX_HIGHPRIORITY_RING_ADDR))
2958 return -ENOMEM;
2959
2960 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
2961 TX_BEACON_RING_ADDR))
2962 return -ENOMEM;
2963
2964 if (request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)) {
2965 DMESGE("Error allocating IRQ %d", dev->irq);
2966 return -1;
2967 } else {
2968 priv->irq = dev->irq;
2969 DMESG("IRQ %d", dev->irq);
2970 }
2971
2972 return 0;
2973 }
2974
2975 void rtl8180_no_hw_wep(struct net_device *dev)
2976 {
2977 }
2978
2979 void rtl8180_set_hw_wep(struct net_device *dev)
2980 {
2981 struct r8180_priv *priv = ieee80211_priv(dev);
2982 u8 pgreg;
2983 u8 security;
2984 u32 key0_word4;
2985
2986 pgreg = read_nic_byte(dev, PGSELECT);
2987 write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
2988
2989 key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
2990 key0_word4 &= ~0xff;
2991 key0_word4 |= priv->key0[3] & 0xff;
2992 write_nic_dword(dev, KEY0, (priv->key0[0]));
2993 write_nic_dword(dev, KEY0+4, (priv->key0[1]));
2994 write_nic_dword(dev, KEY0+4+4, (priv->key0[2]));
2995 write_nic_dword(dev, KEY0+4+4+4, (key0_word4));
2996
2997 security = read_nic_byte(dev, SECURITY);
2998 security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
2999 security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
3000 security &= ~SECURITY_ENCRYP_MASK;
3001 security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
3002
3003 write_nic_byte(dev, SECURITY, security);
3004
3005 DMESG("key %x %x %x %x", read_nic_dword(dev, KEY0+4+4+4),
3006 read_nic_dword(dev, KEY0+4+4), read_nic_dword(dev, KEY0+4),
3007 read_nic_dword(dev, KEY0));
3008 }
3009
3010
3011 void rtl8185_rf_pins_enable(struct net_device *dev)
3012 {
3013 /* u16 tmp; */
3014 /* tmp = read_nic_word(dev, RFPinsEnable); */
3015 write_nic_word(dev, RFPinsEnable, 0x1fff); /* | tmp); */
3016 }
3017
3018 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
3019 {
3020 u8 conf3;
3021
3022 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3023
3024 conf3 = read_nic_byte(dev, CONFIG3);
3025 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
3026 write_nic_dword(dev, ANAPARAM2, a);
3027
3028 conf3 = read_nic_byte(dev, CONFIG3);
3029 write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3030 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3031 }
3032
3033 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
3034 {
3035 u8 conf3;
3036
3037 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3038
3039 conf3 = read_nic_byte(dev, CONFIG3);
3040 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
3041 write_nic_dword(dev, ANAPARAM, a);
3042
3043 conf3 = read_nic_byte(dev, CONFIG3);
3044 write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3045 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3046 }
3047
3048 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
3049 {
3050 write_nic_byte(dev, TX_ANTENNA, ant);
3051 force_pci_posting(dev);
3052 mdelay(1);
3053 }
3054
3055 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
3056 {
3057 u32 phyw;
3058
3059 adr |= 0x80;
3060
3061 phyw = ((data<<8) | adr);
3062
3063 /* Note that, we must write 0xff7c after 0x7d-0x7f to write BB register. */
3064 write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
3065 write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
3066 write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
3067 write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff)));
3068
3069 /* this is ok to fail when we write AGC table. check for AGC table might be
3070 * done by masking with 0x7f instead of 0xff
3071 */
3072 /* if (phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data, adr); */
3073 }
3074
3075 inline void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data)
3076 {
3077 data = data & 0xff;
3078 rtl8185_write_phy(dev, adr, data);
3079 }
3080
3081 void write_phy_cck(struct net_device *dev, u8 adr, u32 data)
3082 {
3083 data = data & 0xff;
3084 rtl8185_write_phy(dev, adr, data | 0x10000);
3085 }
3086
3087 void rtl8185_set_rate(struct net_device *dev)
3088 {
3089 int i;
3090 u16 word;
3091 int basic_rate, min_rr_rate, max_rr_rate;
3092
3093 basic_rate = ieeerate2rtlrate(240);
3094 min_rr_rate = ieeerate2rtlrate(60);
3095 max_rr_rate = ieeerate2rtlrate(240);
3096
3097 write_nic_byte(dev, RESP_RATE,
3098 max_rr_rate<<MAX_RESP_RATE_SHIFT |
3099 min_rr_rate<<MIN_RESP_RATE_SHIFT);
3100
3101 word = read_nic_word(dev, BRSR);
3102 word &= ~BRSR_MBR_8185;
3103
3104 for (i = 0; i <= basic_rate; i++)
3105 word |= (1<<i);
3106
3107 write_nic_word(dev, BRSR, word);
3108 }
3109
3110 void rtl8180_adapter_start(struct net_device *dev)
3111 {
3112 struct r8180_priv *priv = ieee80211_priv(dev);
3113
3114 rtl8180_rtx_disable(dev);
3115 rtl8180_reset(dev);
3116
3117 /* enable beacon timeout, beacon TX ok and err
3118 * LP tx ok and err, HP TX ok and err, NP TX ok and err,
3119 * RX ok and ERR, and GP timer
3120 */
3121 priv->irq_mask = 0x6fcf;
3122
3123 priv->dma_poll_mask = 0;
3124
3125 rtl8180_beacon_tx_disable(dev);
3126
3127 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3128 write_nic_dword(dev, MAC0, ((u32 *)dev->dev_addr)[0]);
3129 write_nic_word(dev, MAC4, ((u32 *)dev->dev_addr)[1] & 0xffff);
3130 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3131
3132 rtl8180_update_msr(dev);
3133
3134 /* These might be unnecessary since we do in rx_enable / tx_enable */
3135 fix_rx_fifo(dev);
3136 fix_tx_fifo(dev);
3137
3138 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3139
3140 /*
3141 * The following is very strange. seems to be that 1 means test mode,
3142 * but we need to acknowledges the nic when a packet is ready
3143 * although we set it to 0
3144 */
3145
3146 write_nic_byte(dev,
3147 CONFIG2, read_nic_byte(dev, CONFIG2) & ~\
3148 (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
3149 /* ^the nic isn't in test mode */
3150 write_nic_byte(dev,
3151 CONFIG2, read_nic_byte(dev, CONFIG2)|(1<<4));
3152
3153 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3154
3155 write_nic_dword(dev, INT_TIMEOUT, 0);
3156
3157 write_nic_byte(dev, WPA_CONFIG, 0);
3158
3159 rtl8180_no_hw_wep(dev);
3160
3161 rtl8185_set_rate(dev);
3162 write_nic_byte(dev, RATE_FALLBACK, 0x81);
3163
3164 write_nic_byte(dev, GP_ENABLE, read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
3165
3166 /* FIXME cfg 3 ClkRun enable - isn't it ReadOnly ? */
3167 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3168 write_nic_byte(dev, CONFIG3, read_nic_byte(dev, CONFIG3)
3169 | (1 << CONFIG3_CLKRUN_SHIFT));
3170 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3171
3172 priv->rf_init(dev);
3173
3174 if (priv->rf_set_sens != NULL)
3175 priv->rf_set_sens(dev, priv->sens);
3176 rtl8180_irq_enable(dev);
3177
3178 netif_start_queue(dev);
3179 }
3180
3181 /*
3182 * This configures registers for beacon tx and enables it via
3183 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
3184 * be used to stop beacon transmission
3185 */
3186 void rtl8180_start_tx_beacon(struct net_device *dev)
3187 {
3188 u16 word;
3189
3190 DMESG("Enabling beacon TX");
3191 rtl8180_prepare_beacon(dev);
3192 rtl8180_irq_disable(dev);
3193 rtl8180_beacon_tx_enable(dev);
3194
3195 word = read_nic_word(dev, AtimWnd) & ~AtimWnd_AtimWnd;
3196 write_nic_word(dev, AtimWnd, word); /* word |= */
3197
3198 word = read_nic_word(dev, BintrItv);
3199 word &= ~BintrItv_BintrItv;
3200 word |= 1000; /* priv->ieee80211->current_network.beacon_interval *
3201 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
3202 // FIXME: check if correct ^^ worked with 0x3e8;
3203 */
3204 write_nic_word(dev, BintrItv, word);
3205
3206 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3207
3208 rtl8185b_irq_enable(dev);
3209 }
3210
3211 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
3212 {
3213 struct r8180_priv *priv = ieee80211_priv(dev);
3214
3215 return &priv->ieee80211->stats;
3216 }
3217
3218 /*
3219 * Change current and default preamble mode.
3220 */
3221 bool
3222 MgntActSet_802_11_PowerSaveMode(
3223 struct r8180_priv *priv,
3224 RT_PS_MODE rtPsMode
3225 )
3226 {
3227 /* Currently, we do not change power save mode on IBSS mode. */
3228 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3229 return false;
3230
3231 priv->ieee80211->ps = rtPsMode;
3232
3233 return true;
3234 }
3235
3236 void LeisurePSEnter(struct r8180_priv *priv)
3237 {
3238 if (priv->bLeisurePs) {
3239 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
3240 /* IEEE80211_PS_ENABLE */
3241 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
3242 }
3243 }
3244
3245 void LeisurePSLeave(struct r8180_priv *priv)
3246 {
3247 if (priv->bLeisurePs) {
3248 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
3249 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
3250 }
3251 }
3252
3253 void rtl8180_hw_wakeup_wq(struct work_struct *work)
3254 {
3255 struct delayed_work *dwork = to_delayed_work(work);
3256 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_wakeup_wq);
3257 struct net_device *dev = ieee->dev;
3258
3259 rtl8180_hw_wakeup(dev);
3260 }
3261
3262 void rtl8180_hw_sleep_wq(struct work_struct *work)
3263 {
3264 struct delayed_work *dwork = to_delayed_work(work);
3265 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_sleep_wq);
3266 struct net_device *dev = ieee->dev;
3267
3268 rtl8180_hw_sleep_down(dev);
3269 }
3270
3271 static void MgntLinkKeepAlive(struct r8180_priv *priv)
3272 {
3273 if (priv->keepAliveLevel == 0)
3274 return;
3275
3276 if (priv->ieee80211->state == IEEE80211_LINKED) {
3277 /*
3278 * Keep-Alive.
3279 */
3280
3281 if ((priv->keepAliveLevel == 2) ||
3282 (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
3283 priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast)
3284 ) {
3285 priv->link_detect.IdleCount++;
3286
3287 /*
3288 * Send a Keep-Alive packet packet to AP if we had been idle for a while.
3289 */
3290 if (priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1)) {
3291 priv->link_detect.IdleCount = 0;
3292 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
3293 }
3294 } else {
3295 priv->link_detect.IdleCount = 0;
3296 }
3297 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
3298 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
3299 }
3300 }
3301
3302 static u8 read_acadapter_file(char *filename);
3303
3304 void rtl8180_watch_dog(struct net_device *dev)
3305 {
3306 struct r8180_priv *priv = ieee80211_priv(dev);
3307 bool bEnterPS = false;
3308 bool bBusyTraffic = false;
3309 u32 TotalRxNum = 0;
3310 u16 SlotIndex = 0;
3311 u16 i = 0;
3312 if (priv->ieee80211->actscanning == false) {
3313 if ((priv->ieee80211->iw_mode != IW_MODE_ADHOC) &&
3314 (priv->ieee80211->state == IEEE80211_NOLINK) &&
3315 (priv->ieee80211->beinretry == false) &&
3316 (priv->eRFPowerState == eRfOn))
3317 IPSEnter(dev);
3318 }
3319 /* YJ,add,080828,for link state check */
3320 if ((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)) {
3321 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
3322 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
3323 for (i = 0; i < priv->link_detect.SlotNum; i++)
3324 TotalRxNum += priv->link_detect.RxFrameNum[i];
3325
3326 if (TotalRxNum == 0) {
3327 priv->ieee80211->state = IEEE80211_ASSOCIATING;
3328 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
3329 }
3330 }
3331
3332 /* YJ,add,080828,for KeepAlive */
3333 MgntLinkKeepAlive(priv);
3334
3335 /* YJ,add,080828,for LPS */
3336 if (priv->PowerProfile == POWER_PROFILE_BATTERY)
3337 priv->bLeisurePs = true;
3338 else if (priv->PowerProfile == POWER_PROFILE_AC) {
3339 LeisurePSLeave(priv);
3340 priv->bLeisurePs = false;
3341 }
3342
3343 if (priv->ieee80211->state == IEEE80211_LINKED) {
3344 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
3345 if (priv->link_detect.NumRxOkInPeriod > 666 ||
3346 priv->link_detect.NumTxOkInPeriod > 666) {
3347 bBusyTraffic = true;
3348 }
3349 if (((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
3350 || (priv->link_detect.NumRxOkInPeriod > 2)) {
3351 bEnterPS = false;
3352 } else
3353 bEnterPS = true;
3354
3355 if (bEnterPS)
3356 LeisurePSEnter(priv);
3357 else
3358 LeisurePSLeave(priv);
3359 } else
3360 LeisurePSLeave(priv);
3361 priv->link_detect.bBusyTraffic = bBusyTraffic;
3362 priv->link_detect.NumRxOkInPeriod = 0;
3363 priv->link_detect.NumTxOkInPeriod = 0;
3364 priv->ieee80211->NumRxDataInPeriod = 0;
3365 priv->ieee80211->NumRxBcnInPeriod = 0;
3366 }
3367
3368 int _rtl8180_up(struct net_device *dev)
3369 {
3370 struct r8180_priv *priv = ieee80211_priv(dev);
3371
3372 priv->up = 1;
3373
3374 DMESG("Bringing up iface");
3375 rtl8185b_adapter_start(dev);
3376 rtl8185b_rx_enable(dev);
3377 rtl8185b_tx_enable(dev);
3378 if (priv->bInactivePs) {
3379 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3380 IPSLeave(dev);
3381 }
3382 timer_rate_adaptive((unsigned long)dev);
3383 watch_dog_adaptive((unsigned long)dev);
3384 if (priv->bSwAntennaDiverity)
3385 SwAntennaDiversityTimerCallback(dev);
3386 ieee80211_softmac_start_protocol(priv->ieee80211);
3387 return 0;
3388 }
3389
3390 int rtl8180_open(struct net_device *dev)
3391 {
3392 struct r8180_priv *priv = ieee80211_priv(dev);
3393 int ret;
3394
3395 down(&priv->wx_sem);
3396 ret = rtl8180_up(dev);
3397 up(&priv->wx_sem);
3398 return ret;
3399 }
3400
3401 int rtl8180_up(struct net_device *dev)
3402 {
3403 struct r8180_priv *priv = ieee80211_priv(dev);
3404
3405 if (priv->up == 1)
3406 return -1;
3407
3408 return _rtl8180_up(dev);
3409 }
3410
3411 int rtl8180_close(struct net_device *dev)
3412 {
3413 struct r8180_priv *priv = ieee80211_priv(dev);
3414 int ret;
3415
3416 down(&priv->wx_sem);
3417 ret = rtl8180_down(dev);
3418 up(&priv->wx_sem);
3419
3420 return ret;
3421 }
3422
3423 int rtl8180_down(struct net_device *dev)
3424 {
3425 struct r8180_priv *priv = ieee80211_priv(dev);
3426
3427 if (priv->up == 0)
3428 return -1;
3429
3430 priv->up = 0;
3431
3432 ieee80211_softmac_stop_protocol(priv->ieee80211);
3433 /* FIXME */
3434 if (!netif_queue_stopped(dev))
3435 netif_stop_queue(dev);
3436 rtl8180_rtx_disable(dev);
3437 rtl8180_irq_disable(dev);
3438 del_timer_sync(&priv->watch_dog_timer);
3439 del_timer_sync(&priv->rateadapter_timer);
3440 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3441 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3442 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3443 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3444 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3445 del_timer_sync(&priv->SwAntennaDiversityTimer);
3446 SetZebraRFPowerState8185(dev, eRfOff);
3447 memset(&(priv->ieee80211->current_network), 0, sizeof(struct ieee80211_network));
3448 priv->ieee80211->state = IEEE80211_NOLINK;
3449 return 0;
3450 }
3451
3452 void rtl8180_restart_wq(struct work_struct *work)
3453 {
3454 struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
3455 struct net_device *dev = priv->dev;
3456
3457 down(&priv->wx_sem);
3458
3459 rtl8180_commit(dev);
3460
3461 up(&priv->wx_sem);
3462 }
3463
3464 void rtl8180_restart(struct net_device *dev)
3465 {
3466 struct r8180_priv *priv = ieee80211_priv(dev);
3467
3468 schedule_work(&priv->reset_wq);
3469 }
3470
3471 void rtl8180_commit(struct net_device *dev)
3472 {
3473 struct r8180_priv *priv = ieee80211_priv(dev);
3474
3475 if (priv->up == 0)
3476 return ;
3477
3478 del_timer_sync(&priv->watch_dog_timer);
3479 del_timer_sync(&priv->rateadapter_timer);
3480 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3481 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3482 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3483 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3484 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3485 del_timer_sync(&priv->SwAntennaDiversityTimer);
3486 ieee80211_softmac_stop_protocol(priv->ieee80211);
3487 rtl8180_irq_disable(dev);
3488 rtl8180_rtx_disable(dev);
3489 _rtl8180_up(dev);
3490 }
3491
3492 static void r8180_set_multicast(struct net_device *dev)
3493 {
3494 struct r8180_priv *priv = ieee80211_priv(dev);
3495 short promisc;
3496
3497 promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
3498
3499 if (promisc != priv->promisc)
3500 rtl8180_restart(dev);
3501
3502 priv->promisc = promisc;
3503 }
3504
3505 int r8180_set_mac_adr(struct net_device *dev, void *mac)
3506 {
3507 struct r8180_priv *priv = ieee80211_priv(dev);
3508 struct sockaddr *addr = mac;
3509
3510 down(&priv->wx_sem);
3511
3512 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3513
3514 if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
3515 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
3516
3517 if (priv->up) {
3518 rtl8180_down(dev);
3519 rtl8180_up(dev);
3520 }
3521
3522 up(&priv->wx_sem);
3523
3524 return 0;
3525 }
3526
3527 /* based on ipw2200 driver */
3528 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3529 {
3530 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3531 struct iwreq *wrq = (struct iwreq *) rq;
3532 int ret = -1;
3533
3534 switch (cmd) {
3535 case RTL_IOCTL_WPA_SUPPLICANT:
3536 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3537 return ret;
3538 default:
3539 return -EOPNOTSUPP;
3540 }
3541
3542 return -EOPNOTSUPP;
3543 }
3544
3545 static const struct net_device_ops rtl8180_netdev_ops = {
3546 .ndo_open = rtl8180_open,
3547 .ndo_stop = rtl8180_close,
3548 .ndo_get_stats = rtl8180_stats,
3549 .ndo_tx_timeout = rtl8180_restart,
3550 .ndo_do_ioctl = rtl8180_ioctl,
3551 .ndo_set_rx_mode = r8180_set_multicast,
3552 .ndo_set_mac_address = r8180_set_mac_adr,
3553 .ndo_validate_addr = eth_validate_addr,
3554 .ndo_change_mtu = eth_change_mtu,
3555 .ndo_start_xmit = ieee80211_rtl_xmit,
3556 };
3557
3558 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
3559 const struct pci_device_id *id)
3560 {
3561 unsigned long ioaddr = 0;
3562 struct net_device *dev = NULL;
3563 struct r8180_priv *priv = NULL;
3564 u8 unit = 0;
3565 int ret = -ENODEV;
3566
3567 unsigned long pmem_start, pmem_len, pmem_flags;
3568
3569 DMESG("Configuring chip resources");
3570
3571 if (pci_enable_device(pdev)) {
3572 DMESG("Failed to enable PCI device");
3573 return -EIO;
3574 }
3575
3576 pci_set_master(pdev);
3577 pci_set_dma_mask(pdev, 0xffffff00ULL);
3578 pci_set_consistent_dma_mask(pdev, 0xffffff00ULL);
3579 dev = alloc_ieee80211(sizeof(struct r8180_priv));
3580 if (!dev) {
3581 ret = -ENOMEM;
3582 goto fail_free;
3583 }
3584 priv = ieee80211_priv(dev);
3585 priv->ieee80211 = netdev_priv(dev);
3586
3587 pci_set_drvdata(pdev, dev);
3588 SET_NETDEV_DEV(dev, &pdev->dev);
3589
3590 priv = ieee80211_priv(dev);
3591 priv->pdev = pdev;
3592
3593 pmem_start = pci_resource_start(pdev, 1);
3594 pmem_len = pci_resource_len(pdev, 1);
3595 pmem_flags = pci_resource_flags(pdev, 1);
3596
3597 if (!(pmem_flags & IORESOURCE_MEM)) {
3598 DMESG("region #1 not a MMIO resource, aborting");
3599 goto fail;
3600 }
3601
3602 if (!request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
3603 DMESG("request_mem_region failed!");
3604 goto fail;
3605 }
3606
3607 ioaddr = (unsigned long)ioremap_nocache(pmem_start, pmem_len);
3608 if (ioaddr == (unsigned long)NULL) {
3609 DMESG("ioremap failed!");
3610 goto fail1;
3611 }
3612
3613 dev->mem_start = ioaddr; /* shared mem start */
3614 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); /* shared mem end */
3615
3616 pci_read_config_byte(pdev, 0x05, &unit);
3617 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
3618
3619 dev->irq = pdev->irq;
3620 priv->irq = 0;
3621
3622 dev->netdev_ops = &rtl8180_netdev_ops;
3623 dev->wireless_handlers = &r8180_wx_handlers_def;
3624
3625 dev->type = ARPHRD_ETHER;
3626 dev->watchdog_timeo = HZ*3;
3627
3628 if (dev_alloc_name(dev, ifname) < 0) {
3629 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
3630 strcpy(ifname, "wlan%d");
3631 dev_alloc_name(dev, ifname);
3632 }
3633
3634 if (rtl8180_init(dev) != 0) {
3635 DMESG("Initialization failed");
3636 goto fail1;
3637 }
3638
3639 netif_carrier_off(dev);
3640
3641 register_netdev(dev);
3642
3643 rtl8180_proc_init_one(dev);
3644
3645 DMESG("Driver probe completed\n");
3646 return 0;
3647 fail1:
3648 if (dev->mem_start != (unsigned long)NULL) {
3649 iounmap((void *)dev->mem_start);
3650 release_mem_region(pci_resource_start(pdev, 1),
3651 pci_resource_len(pdev, 1));
3652 }
3653 fail:
3654 if (dev) {
3655 if (priv->irq) {
3656 free_irq(dev->irq, dev);
3657 dev->irq = 0;
3658 }
3659 free_ieee80211(dev);
3660 }
3661
3662 fail_free:
3663 pci_disable_device(pdev);
3664
3665 DMESG("wlan driver load failed\n");
3666 pci_set_drvdata(pdev, NULL);
3667 return ret;
3668 }
3669
3670 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
3671 {
3672 struct r8180_priv *priv;
3673 struct net_device *dev = pci_get_drvdata(pdev);
3674
3675 if (dev) {
3676 unregister_netdev(dev);
3677
3678 priv = ieee80211_priv(dev);
3679
3680 rtl8180_proc_remove_one(dev);
3681 rtl8180_down(dev);
3682 priv->rf_close(dev);
3683 rtl8180_reset(dev);
3684 mdelay(10);
3685
3686 if (priv->irq) {
3687 DMESG("Freeing irq %d", dev->irq);
3688 free_irq(dev->irq, dev);
3689 priv->irq = 0;
3690 }
3691
3692 free_rx_desc_ring(dev);
3693 free_tx_desc_rings(dev);
3694
3695 if (dev->mem_start != (unsigned long)NULL) {
3696 iounmap((void *)dev->mem_start);
3697 release_mem_region(pci_resource_start(pdev, 1),
3698 pci_resource_len(pdev, 1));
3699 }
3700
3701 free_ieee80211(dev);
3702 }
3703 pci_disable_device(pdev);
3704
3705 DMESG("wlan driver removed\n");
3706 }
3707
3708 /* fun with the built-in ieee80211 stack... */
3709 extern int ieee80211_crypto_init(void);
3710 extern void ieee80211_crypto_deinit(void);
3711 extern int ieee80211_crypto_tkip_init(void);
3712 extern void ieee80211_crypto_tkip_exit(void);
3713 extern int ieee80211_crypto_ccmp_init(void);
3714 extern void ieee80211_crypto_ccmp_exit(void);
3715 extern int ieee80211_crypto_wep_init(void);
3716 extern void ieee80211_crypto_wep_exit(void);
3717
3718 static int __init rtl8180_pci_module_init(void)
3719 {
3720 int ret;
3721
3722 ret = ieee80211_crypto_init();
3723 if (ret) {
3724 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
3725 return ret;
3726 }
3727 ret = ieee80211_crypto_tkip_init();
3728 if (ret) {
3729 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
3730 return ret;
3731 }
3732 ret = ieee80211_crypto_ccmp_init();
3733 if (ret) {
3734 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
3735 return ret;
3736 }
3737 ret = ieee80211_crypto_wep_init();
3738 if (ret) {
3739 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
3740 return ret;
3741 }
3742
3743 printk(KERN_INFO "\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3744 printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
3745 DMESG("Initializing module");
3746 DMESG("Wireless extensions version %d", WIRELESS_EXT);
3747 rtl8180_proc_module_init();
3748
3749 if (pci_register_driver(&rtl8180_pci_driver)) {
3750 DMESG("No device found");
3751 return -ENODEV;
3752 }
3753 return 0;
3754 }
3755
3756 static void __exit rtl8180_pci_module_exit(void)
3757 {
3758 pci_unregister_driver(&rtl8180_pci_driver);
3759 rtl8180_proc_module_remove();
3760 ieee80211_crypto_tkip_exit();
3761 ieee80211_crypto_ccmp_exit();
3762 ieee80211_crypto_wep_exit();
3763 ieee80211_crypto_deinit();
3764 DMESG("Exiting");
3765 }
3766
3767 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
3768 {
3769 unsigned long flags;
3770 short enough_desc;
3771 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3772
3773 spin_lock_irqsave(&priv->tx_lock, flags);
3774 enough_desc = check_nic_enought_desc(dev, pri);
3775 spin_unlock_irqrestore(&priv->tx_lock, flags);
3776
3777 if (enough_desc)
3778 ieee80211_rtl_wake_queue(priv->ieee80211);
3779 }
3780
3781 void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
3782 {
3783 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3784 u32 *tail; /* tail virtual addr */
3785 u32 *head; /* head virtual addr */
3786 u32 *begin; /* start of ring virtual addr */
3787 u32 *nicv; /* nic pointer virtual addr */
3788 u32 nic; /* nic pointer physical addr */
3789 u32 nicbegin; /* start of ring physical addr */
3790 unsigned long flag;
3791 /* physical addr are ok on 32 bits since we set DMA mask */
3792 int offs;
3793 int j, i;
3794 int hd;
3795 if (error)
3796 priv->stats.txretry++; /* tony 20060601 */
3797 spin_lock_irqsave(&priv->tx_lock, flag);
3798 switch (pri) {
3799 case MANAGE_PRIORITY:
3800 tail = priv->txmapringtail;
3801 begin = priv->txmapring;
3802 head = priv->txmapringhead;
3803 nic = read_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR);
3804 nicbegin = priv->txmapringdma;
3805 break;
3806 case BK_PRIORITY:
3807 tail = priv->txbkpringtail;
3808 begin = priv->txbkpring;
3809 head = priv->txbkpringhead;
3810 nic = read_nic_dword(dev, TX_BKPRIORITY_RING_ADDR);
3811 nicbegin = priv->txbkpringdma;
3812 break;
3813 case BE_PRIORITY:
3814 tail = priv->txbepringtail;
3815 begin = priv->txbepring;
3816 head = priv->txbepringhead;
3817 nic = read_nic_dword(dev, TX_BEPRIORITY_RING_ADDR);
3818 nicbegin = priv->txbepringdma;
3819 break;
3820 case VI_PRIORITY:
3821 tail = priv->txvipringtail;
3822 begin = priv->txvipring;
3823 head = priv->txvipringhead;
3824 nic = read_nic_dword(dev, TX_VIPRIORITY_RING_ADDR);
3825 nicbegin = priv->txvipringdma;
3826 break;
3827 case VO_PRIORITY:
3828 tail = priv->txvopringtail;
3829 begin = priv->txvopring;
3830 head = priv->txvopringhead;
3831 nic = read_nic_dword(dev, TX_VOPRIORITY_RING_ADDR);
3832 nicbegin = priv->txvopringdma;
3833 break;
3834 case HI_PRIORITY:
3835 tail = priv->txhpringtail;
3836 begin = priv->txhpring;
3837 head = priv->txhpringhead;
3838 nic = read_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR);
3839 nicbegin = priv->txhpringdma;
3840 break;
3841
3842 default:
3843 spin_unlock_irqrestore(&priv->tx_lock, flag);
3844 return ;
3845 }
3846
3847 nicv = (u32 *)((nic - nicbegin) + (u8*)begin);
3848 if ((head <= tail && (nicv > tail || nicv < head)) ||
3849 (head > tail && (nicv > tail && nicv < head))) {
3850 DMESGW("nic has lost pointer");
3851 spin_unlock_irqrestore(&priv->tx_lock, flag);
3852 rtl8180_restart(dev);
3853 return;
3854 }
3855
3856 /*
3857 * We check all the descriptors between the head and the nic,
3858 * but not the currently pointed by the nic (the next to be txed)
3859 * and the previous of the pointed (might be in process ??)
3860 */
3861 offs = (nic - nicbegin);
3862 offs = offs / 8 / 4;
3863 hd = (head - begin) / 8;
3864
3865 if (offs >= hd)
3866 j = offs - hd;
3867 else
3868 j = offs + (priv->txringcount-1-hd);
3869
3870 j -= 2;
3871 if (j < 0)
3872 j = 0;
3873
3874 for (i = 0; i < j; i++) {
3875 if ((*head) & (1<<31))
3876 break;
3877 if (((*head)&(0x10000000)) != 0) {
3878 priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
3879 if (!error)
3880 priv->NumTxOkTotal++;
3881 }
3882
3883 if (!error)
3884 priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
3885
3886 *head = *head & ~(1<<31);
3887
3888 if ((head - begin)/8 == priv->txringcount-1)
3889 head = begin;
3890 else
3891 head += 8;
3892 }
3893
3894 /*
3895 * The head has been moved to the last certainly TXed
3896 * (or at least processed by the nic) packet.
3897 * The driver take forcefully owning of all these packets
3898 * If the packet previous of the nic pointer has been
3899 * processed this doesn't matter: it will be checked
3900 * here at the next round. Anyway if no more packet are
3901 * TXed no memory leak occur at all.
3902 */
3903
3904 switch (pri) {
3905 case MANAGE_PRIORITY:
3906 priv->txmapringhead = head;
3907
3908 if (priv->ack_tx_to_ieee) {
3909 if (rtl8180_is_tx_queue_empty(dev)) {
3910 priv->ack_tx_to_ieee = 0;
3911 ieee80211_ps_tx_ack(priv->ieee80211, !error);
3912 }
3913 }
3914 break;
3915 case BK_PRIORITY:
3916 priv->txbkpringhead = head;
3917 break;
3918 case BE_PRIORITY:
3919 priv->txbepringhead = head;
3920 break;
3921 case VI_PRIORITY:
3922 priv->txvipringhead = head;
3923 break;
3924 case VO_PRIORITY:
3925 priv->txvopringhead = head;
3926 break;
3927 case HI_PRIORITY:
3928 priv->txhpringhead = head;
3929 break;
3930 }
3931
3932 spin_unlock_irqrestore(&priv->tx_lock, flag);
3933 }
3934
3935 void rtl8180_tx_irq_wq(struct work_struct *work)
3936 {
3937 struct delayed_work *dwork = to_delayed_work(work);
3938 struct ieee80211_device * ieee = (struct ieee80211_device *)
3939 container_of(dwork, struct ieee80211_device, watch_dog_wq);
3940 struct net_device *dev = ieee->dev;
3941
3942 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3943 }
3944 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
3945 {
3946 struct net_device *dev = (struct net_device *) netdev;
3947 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3948 unsigned long flags;
3949 u32 inta;
3950
3951 /* We should return IRQ_NONE, but for now let me keep this */
3952 if (priv->irq_enabled == 0)
3953 return IRQ_HANDLED;
3954
3955 spin_lock_irqsave(&priv->irq_th_lock, flags);
3956
3957 /* ISR: 4bytes */
3958 inta = read_nic_dword(dev, ISR); /* & priv->IntrMask; */
3959 write_nic_dword(dev, ISR, inta); /* reset int situation */
3960
3961 priv->stats.shints++;
3962
3963 if (!inta) {
3964 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3965 return IRQ_HANDLED;
3966 /*
3967 * most probably we can safely return IRQ_NONE,
3968 * but for now is better to avoid problems
3969 */
3970 }
3971
3972 if (inta == 0xffff) {
3973 /* HW disappeared */
3974 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3975 return IRQ_HANDLED;
3976 }
3977
3978 priv->stats.ints++;
3979
3980 if (!netif_running(dev)) {
3981 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3982 return IRQ_HANDLED;
3983 }
3984
3985 if (inta & ISR_TimeOut)
3986 write_nic_dword(dev, TimerInt, 0);
3987
3988 if (inta & ISR_TBDOK)
3989 priv->stats.txbeacon++;
3990
3991 if (inta & ISR_TBDER)
3992 priv->stats.txbeaconerr++;
3993
3994 if (inta & IMR_TMGDOK)
3995 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3996
3997 if (inta & ISR_THPDER) {
3998 priv->stats.txhperr++;
3999 rtl8180_tx_isr(dev, HI_PRIORITY, 1);
4000 priv->ieee80211->stats.tx_errors++;
4001 }
4002
4003 if (inta & ISR_THPDOK) { /* High priority tx ok */
4004 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4005 priv->stats.txhpokint++;
4006 rtl8180_tx_isr(dev, HI_PRIORITY, 0);
4007 }
4008
4009 if (inta & ISR_RER)
4010 priv->stats.rxerr++;
4011
4012 if (inta & ISR_TBKDER) { /* corresponding to BK_PRIORITY */
4013 priv->stats.txbkperr++;
4014 priv->ieee80211->stats.tx_errors++;
4015 rtl8180_tx_isr(dev, BK_PRIORITY, 1);
4016 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4017 }
4018
4019 if (inta & ISR_TBEDER) { /* corresponding to BE_PRIORITY */
4020 priv->stats.txbeperr++;
4021 priv->ieee80211->stats.tx_errors++;
4022 rtl8180_tx_isr(dev, BE_PRIORITY, 1);
4023 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4024 }
4025 if (inta & ISR_TNPDER) { /* corresponding to VO_PRIORITY */
4026 priv->stats.txnperr++;
4027 priv->ieee80211->stats.tx_errors++;
4028 rtl8180_tx_isr(dev, NORM_PRIORITY, 1);
4029 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
4030 }
4031
4032 if (inta & ISR_TLPDER) { /* corresponding to VI_PRIORITY */
4033 priv->stats.txlperr++;
4034 priv->ieee80211->stats.tx_errors++;
4035 rtl8180_tx_isr(dev, LOW_PRIORITY, 1);
4036 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
4037 }
4038
4039 if (inta & ISR_ROK) {
4040 priv->stats.rxint++;
4041 tasklet_schedule(&priv->irq_rx_tasklet);
4042 }
4043
4044 if (inta & ISR_RQoSOK) {
4045 priv->stats.rxint++;
4046 tasklet_schedule(&priv->irq_rx_tasklet);
4047 }
4048
4049 if (inta & ISR_BcnInt)
4050 rtl8180_prepare_beacon(dev);
4051
4052 if (inta & ISR_RDU) {
4053 DMESGW("No RX descriptor available");
4054 priv->stats.rxrdu++;
4055 tasklet_schedule(&priv->irq_rx_tasklet);
4056 }
4057
4058 if (inta & ISR_RXFOVW) {
4059 priv->stats.rxoverflow++;
4060 tasklet_schedule(&priv->irq_rx_tasklet);
4061 }
4062
4063 if (inta & ISR_TXFOVW)
4064 priv->stats.txoverflow++;
4065
4066 if (inta & ISR_TNPDOK) { /* Normal priority tx ok */
4067 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4068 priv->stats.txnpokint++;
4069 rtl8180_tx_isr(dev, NORM_PRIORITY, 0);
4070 }
4071
4072 if (inta & ISR_TLPDOK) { /* Low priority tx ok */
4073 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4074 priv->stats.txlpokint++;
4075 rtl8180_tx_isr(dev, LOW_PRIORITY, 0);
4076 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
4077 }
4078
4079 if (inta & ISR_TBKDOK) { /* corresponding to BK_PRIORITY */
4080 priv->stats.txbkpokint++;
4081 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4082 rtl8180_tx_isr(dev, BK_PRIORITY, 0);
4083 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4084 }
4085
4086 if (inta & ISR_TBEDOK) { /* corresponding to BE_PRIORITY */
4087 priv->stats.txbeperr++;
4088 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4089 rtl8180_tx_isr(dev, BE_PRIORITY, 0);
4090 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4091 }
4092 force_pci_posting(dev);
4093 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4094
4095 return IRQ_HANDLED;
4096 }
4097
4098 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
4099 {
4100 rtl8180_rx(priv->dev);
4101 }
4102
4103 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
4104 {
4105 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
4106 struct net_device *dev = ieee->dev;
4107 struct r8180_priv *priv = ieee80211_priv(dev);
4108 u8 btPSR;
4109 u8 btConfig0;
4110 RT_RF_POWER_STATE eRfPowerStateToSet;
4111 bool bActuallySet = false;
4112
4113 char *argv[3];
4114 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
4115 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
4116 static int readf_count = 0;
4117
4118 if (readf_count % 10 == 0)
4119 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
4120
4121 readf_count = (readf_count+1)%0xffff;
4122 /* We should turn off LED before polling FF51[4]. */
4123
4124 /* Turn off LED. */
4125 btPSR = read_nic_byte(dev, PSR);
4126 write_nic_byte(dev, PSR, (btPSR & ~BIT3));
4127
4128 /* It need to delay 4us suggested by Jong, 2008-01-16 */
4129 udelay(4);
4130
4131 /* HW radio On/Off according to the value of FF51[4](config0) */
4132 btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
4133
4134 eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff;
4135
4136 /* Turn LED back on when radio enabled */
4137 if (eRfPowerStateToSet == eRfOn)
4138 write_nic_byte(dev, PSR, btPSR | BIT3);
4139
4140 if ((priv->ieee80211->bHwRadioOff == true) &&
4141 (eRfPowerStateToSet == eRfOn)) {
4142 priv->ieee80211->bHwRadioOff = false;
4143 bActuallySet = true;
4144 } else if ((priv->ieee80211->bHwRadioOff == false) &&
4145 (eRfPowerStateToSet == eRfOff)) {
4146 priv->ieee80211->bHwRadioOff = true;
4147 bActuallySet = true;
4148 }
4149
4150 if (bActuallySet) {
4151 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
4152
4153 /* To update the UI status for Power status changed */
4154 if (priv->ieee80211->bHwRadioOff == true)
4155 argv[1] = "RFOFF";
4156 else
4157 argv[1] = "RFON";
4158 argv[0] = RadioPowerPath;
4159 argv[2] = NULL;
4160
4161 call_usermodehelper(RadioPowerPath, argv, envp, UMH_WAIT_PROC);
4162 }
4163 }
4164
4165 static u8 read_acadapter_file(char *filename)
4166 {
4167 return 0;
4168 }
4169
4170 module_init(rtl8180_pci_module_init);
4171 module_exit(rtl8180_pci_module_exit);
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