| blob | 6329679c6920ea1d995da9a88603b20a435d5c83 |
1 /*
2 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2012 Joachim Eastwood <manabian@gmail.com>
7 *
8 * Based on at91sam9260.dtsi
9 *
10 * Licensed under GPLv2 or later.
11 */
13 #include "skeleton.dtsi"
15 / {
16 model = "Atmel AT91RM9200 family SoC";
17 compatible = "atmel,at91rm9200";
18 interrupt-parent = <&aic>;
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 serial4 = &usart3;
26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
29 gpio3 = &pioD;
30 tcb0 = &tcb0;
31 tcb1 = &tcb1;
32 i2c0 = &i2c0;
33 ssc0 = &ssc0;
34 ssc1 = &ssc1;
35 ssc2 = &ssc2;
36 };
37 cpus {
38 cpu@0 {
39 compatible = "arm,arm920t";
40 };
41 };
43 memory {
44 reg = <0x20000000 0x04000000>;
45 };
47 ahb {
48 compatible = "simple-bus";
49 #address-cells = <1>;
50 #size-cells = <1>;
51 ranges;
53 apb {
54 compatible = "simple-bus";
55 #address-cells = <1>;
56 #size-cells = <1>;
57 ranges;
59 aic: interrupt-controller@fffff000 {
60 #interrupt-cells = <3>;
61 compatible = "atmel,at91rm9200-aic";
62 interrupt-controller;
63 reg = <0xfffff000 0x200>;
64 atmel,external-irqs = <25 26 27 28 29 30 31>;
65 };
67 ramc0: ramc@ffffff00 {
68 compatible = "atmel,at91rm9200-sdramc";
69 reg = <0xffffff00 0x100>;
70 };
72 pmc: pmc@fffffc00 {
73 compatible = "atmel,at91rm9200-pmc";
74 reg = <0xfffffc00 0x100>;
75 };
77 st: timer@fffffd00 {
78 compatible = "atmel,at91rm9200-st";
79 reg = <0xfffffd00 0x100>;
80 interrupts = <1 4 7>;
81 };
83 tcb0: timer@fffa0000 {
84 compatible = "atmel,at91rm9200-tcb";
85 reg = <0xfffa0000 0x100>;
86 interrupts = <17 4 0 18 4 0 19 4 0>;
87 };
89 tcb1: timer@fffa4000 {
90 compatible = "atmel,at91rm9200-tcb";
91 reg = <0xfffa4000 0x100>;
92 interrupts = <20 4 0 21 4 0 22 4 0>;
93 };
95 i2c0: i2c@fffb8000 {
96 compatible = "atmel,at91rm9200-i2c";
97 reg = <0xfffb8000 0x4000>;
98 interrupts = <12 4 6>;
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_twi>;
101 #address-cells = <1>;
102 #size-cells = <0>;
103 status = "disabled";
104 };
106 mmc0: mmc@fffb4000 {
107 compatible = "atmel,hsmci";
108 reg = <0xfffb4000 0x4000>;
109 interrupts = <10 4 0>;
110 #address-cells = <1>;
111 #size-cells = <0>;
112 status = "disabled";
113 };
115 ssc0: ssc@fffd0000 {
116 compatible = "atmel,at91rm9200-ssc";
117 reg = <0xfffd0000 0x4000>;
118 interrupts = <14 4 5>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
121 status = "disable";
122 };
124 ssc1: ssc@fffd4000 {
125 compatible = "atmel,at91rm9200-ssc";
126 reg = <0xfffd4000 0x4000>;
127 interrupts = <15 4 5>;
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
130 status = "disable";
131 };
133 ssc2: ssc@fffd8000 {
134 compatible = "atmel,at91rm9200-ssc";
135 reg = <0xfffd8000 0x4000>;
136 interrupts = <16 4 5>;
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
139 status = "disable";
140 };
142 macb0: ethernet@fffbc000 {
143 compatible = "cdns,at91rm9200-emac", "cdns,emac";
144 reg = <0xfffbc000 0x4000>;
145 interrupts = <24 4 3>;
146 phy-mode = "rmii";
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_macb_rmii>;
149 status = "disabled";
150 };
152 pinctrl@fffff400 {
153 #address-cells = <1>;
154 #size-cells = <1>;
155 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
156 ranges = <0xfffff400 0xfffff400 0x800>;
158 atmel,mux-mask = <
159 /* A B */
160 0xffffffff 0xffffffff /* pioA */
161 0xffffffff 0x083fffff /* pioB */
162 0xffff3fff 0x00000000 /* pioC */
163 0x03ff87ff 0x0fffff80 /* pioD */
164 >;
166 /* shared pinctrl settings */
167 dbgu {
168 pinctrl_dbgu: dbgu-0 {
169 atmel,pins =
170 <0 30 0x1 0x0 /* PA30 periph A */
171 0 31 0x1 0x1>; /* PA31 periph with pullup */
172 };
173 };
175 uart0 {
176 pinctrl_uart0: uart0-0 {
177 atmel,pins =
178 <0 17 0x1 0x0 /* PA17 periph A */
179 0 18 0x1 0x0>; /* PA18 periph A */
180 };
182 pinctrl_uart0_rts: uart0_rts-0 {
183 atmel,pins =
184 <0 20 0x1 0x0>; /* PA20 periph A */
185 };
187 pinctrl_uart0_cts: uart0_cts-0 {
188 atmel,pins =
189 <0 21 0x1 0x0>; /* PA21 periph A */
190 };
191 };
193 uart1 {
194 pinctrl_uart1: uart1-0 {
195 atmel,pins =
196 <1 20 0x1 0x1 /* PB20 periph A with pullup */
197 1 21 0x1 0x0>; /* PB21 periph A */
198 };
200 pinctrl_uart1_rts: uart1_rts-0 {
201 atmel,pins =
202 <1 24 0x1 0x0>; /* PB24 periph A */
203 };
205 pinctrl_uart1_cts: uart1_cts-0 {
206 atmel,pins =
207 <1 26 0x1 0x0>; /* PB26 periph A */
208 };
210 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
211 atmel,pins =
212 <1 19 0x1 0x0 /* PB19 periph A */
213 1 25 0x1 0x0>; /* PB25 periph A */
214 };
216 pinctrl_uart1_dcd: uart1_dcd-0 {
217 atmel,pins =
218 <1 23 0x1 0x0>; /* PB23 periph A */
219 };
221 pinctrl_uart1_ri: uart1_ri-0 {
222 atmel,pins =
223 <1 18 0x1 0x0>; /* PB18 periph A */
224 };
225 };
227 uart2 {
228 pinctrl_uart2: uart2-0 {
229 atmel,pins =
230 <0 22 0x1 0x0 /* PA22 periph A */
231 0 23 0x1 0x1>; /* PA23 periph A with pullup */
232 };
234 pinctrl_uart2_rts: uart2_rts-0 {
235 atmel,pins =
236 <0 30 0x2 0x0>; /* PA30 periph B */
237 };
239 pinctrl_uart2_cts: uart2_cts-0 {
240 atmel,pins =
241 <0 31 0x2 0x0>; /* PA31 periph B */
242 };
243 };
245 uart3 {
246 pinctrl_uart3: uart3-0 {
247 atmel,pins =
248 <0 5 0x2 0x1 /* PA5 periph B with pullup */
249 0 6 0x2 0x0>; /* PA6 periph B */
250 };
252 pinctrl_uart3_rts: uart3_rts-0 {
253 atmel,pins =
254 <1 0 0x2 0x0>; /* PB0 periph B */
255 };
257 pinctrl_uart3_cts: uart3_cts-0 {
258 atmel,pins =
259 <1 1 0x2 0x0>; /* PB1 periph B */
260 };
261 };
263 nand {
264 pinctrl_nand: nand-0 {
265 atmel,pins =
266 <2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */
267 1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */
268 };
269 };
271 macb {
272 pinctrl_macb_rmii: macb_rmii-0 {
273 atmel,pins =
274 <0 7 0x1 0x0 /* PA7 periph A */
275 0 8 0x1 0x0 /* PA8 periph A */
276 0 9 0x1 0x0 /* PA9 periph A */
277 0 10 0x1 0x0 /* PA10 periph A */
278 0 11 0x1 0x0 /* PA11 periph A */
279 0 12 0x1 0x0 /* PA12 periph A */
280 0 13 0x1 0x0 /* PA13 periph A */
281 0 14 0x1 0x0 /* PA14 periph A */
282 0 15 0x1 0x0 /* PA15 periph A */
283 0 16 0x1 0x0>; /* PA16 periph A */
284 };
286 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
287 atmel,pins =
288 <1 12 0x2 0x0 /* PB12 periph B */
289 1 13 0x2 0x0 /* PB13 periph B */
290 1 14 0x2 0x0 /* PB14 periph B */
291 1 15 0x2 0x0 /* PB15 periph B */
292 1 16 0x2 0x0 /* PB16 periph B */
293 1 17 0x2 0x0 /* PB17 periph B */
294 1 18 0x2 0x0 /* PB18 periph B */
295 1 19 0x2 0x0>; /* PB19 periph B */
296 };
297 };
299 mmc0 {
300 pinctrl_mmc0_clk: mmc0_clk-0 {
301 atmel,pins =
302 <0 27 0x1 0x0>; /* PA27 periph A */
303 };
305 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
306 atmel,pins =
307 <0 28 0x1 0x1 /* PA28 periph A with pullup */
308 0 29 0x1 0x1>; /* PA29 periph A with pullup */
309 };
311 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
312 atmel,pins =
313 <1 3 0x2 0x1 /* PB3 periph B with pullup */
314 1 4 0x2 0x1 /* PB4 periph B with pullup */
315 1 5 0x2 0x1>; /* PB5 periph B with pullup */
316 };
318 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
319 atmel,pins =
320 <0 8 0x2 0x1 /* PA8 periph B with pullup */
321 0 9 0x2 0x1>; /* PA9 periph B with pullup */
322 };
324 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
325 atmel,pins =
326 <0 10 0x2 0x1 /* PA10 periph B with pullup */
327 0 11 0x2 0x1 /* PA11 periph B with pullup */
328 0 12 0x2 0x1>; /* PA12 periph B with pullup */
329 };
330 };
332 ssc0 {
333 pinctrl_ssc0_tx: ssc0_tx-0 {
334 atmel,pins =
335 <1 0 0x1 0x0 /* PB0 periph A */
336 1 1 0x1 0x0 /* PB1 periph A */
337 1 2 0x1 0x0>; /* PB2 periph A */
338 };
340 pinctrl_ssc0_rx: ssc0_rx-0 {
341 atmel,pins =
342 <1 3 0x1 0x0 /* PB3 periph A */
343 1 4 0x1 0x0 /* PB4 periph A */
344 1 5 0x1 0x0>; /* PB5 periph A */
345 };
346 };
348 ssc1 {
349 pinctrl_ssc1_tx: ssc1_tx-0 {
350 atmel,pins =
351 <1 6 0x1 0x0 /* PB6 periph A */
352 1 7 0x1 0x0 /* PB7 periph A */
353 1 8 0x1 0x0>; /* PB8 periph A */
354 };
356 pinctrl_ssc1_rx: ssc1_rx-0 {
357 atmel,pins =
358 <1 9 0x1 0x0 /* PB9 periph A */
359 1 10 0x1 0x0 /* PB10 periph A */
360 1 11 0x1 0x0>; /* PB11 periph A */
361 };
362 };
364 ssc2 {
365 pinctrl_ssc2_tx: ssc2_tx-0 {
366 atmel,pins =
367 <1 12 0x1 0x0 /* PB12 periph A */
368 1 13 0x1 0x0 /* PB13 periph A */
369 1 14 0x1 0x0>; /* PB14 periph A */
370 };
372 pinctrl_ssc2_rx: ssc2_rx-0 {
373 atmel,pins =
374 <1 15 0x1 0x0 /* PB15 periph A */
375 1 16 0x1 0x0 /* PB16 periph A */
376 1 17 0x1 0x0>; /* PB17 periph A */
377 };
378 };
380 twi {
381 pinctrl_twi: twi-0 {
382 atmel,pins =
383 <0 25 0x1 0x2 /* PA25 periph A with multi drive */
384 0 26 0x1 0x2>; /* PA26 periph A with multi drive */
385 };
387 pinctrl_twi_gpio: twi_gpio-0 {
388 atmel,pins =
389 <0 25 0x0 0x2 /* PA25 GPIO with multi drive */
390 0 26 0x0 0x2>; /* PA26 GPIO with multi drive */
391 };
392 };
394 pioA: gpio@fffff400 {
395 compatible = "atmel,at91rm9200-gpio";
396 reg = <0xfffff400 0x200>;
397 interrupts = <2 4 1>;
398 #gpio-cells = <2>;
399 gpio-controller;
400 interrupt-controller;
401 #interrupt-cells = <2>;
402 };
404 pioB: gpio@fffff600 {
405 compatible = "atmel,at91rm9200-gpio";
406 reg = <0xfffff600 0x200>;
407 interrupts = <3 4 1>;
408 #gpio-cells = <2>;
409 gpio-controller;
410 interrupt-controller;
411 #interrupt-cells = <2>;
412 };
414 pioC: gpio@fffff800 {
415 compatible = "atmel,at91rm9200-gpio";
416 reg = <0xfffff800 0x200>;
417 interrupts = <4 4 1>;
418 #gpio-cells = <2>;
419 gpio-controller;
420 interrupt-controller;
421 #interrupt-cells = <2>;
422 };
424 pioD: gpio@fffffa00 {
425 compatible = "atmel,at91rm9200-gpio";
426 reg = <0xfffffa00 0x200>;
427 interrupts = <5 4 1>;
428 #gpio-cells = <2>;
429 gpio-controller;
430 interrupt-controller;
431 #interrupt-cells = <2>;
432 };
433 };
435 dbgu: serial@fffff200 {
436 compatible = "atmel,at91rm9200-usart";
437 reg = <0xfffff200 0x200>;
438 interrupts = <1 4 7>;
439 pinctrl-names = "default";
440 pinctrl-0 = <&pinctrl_dbgu>;
441 status = "disabled";
442 };
444 usart0: serial@fffc0000 {
445 compatible = "atmel,at91rm9200-usart";
446 reg = <0xfffc0000 0x200>;
447 interrupts = <6 4 5>;
448 atmel,use-dma-rx;
449 atmel,use-dma-tx;
450 pinctrl-names = "default";
451 pinctrl-0 = <&pinctrl_uart0>;
452 status = "disabled";
453 };
455 usart1: serial@fffc4000 {
456 compatible = "atmel,at91rm9200-usart";
457 reg = <0xfffc4000 0x200>;
458 interrupts = <7 4 5>;
459 atmel,use-dma-rx;
460 atmel,use-dma-tx;
461 pinctrl-names = "default";
462 pinctrl-0 = <&pinctrl_uart1>;
463 status = "disabled";
464 };
466 usart2: serial@fffc8000 {
467 compatible = "atmel,at91rm9200-usart";
468 reg = <0xfffc8000 0x200>;
469 interrupts = <8 4 5>;
470 atmel,use-dma-rx;
471 atmel,use-dma-tx;
472 pinctrl-names = "default";
473 pinctrl-0 = <&pinctrl_uart2>;
474 status = "disabled";
475 };
477 usart3: serial@fffcc000 {
478 compatible = "atmel,at91rm9200-usart";
479 reg = <0xfffcc000 0x200>;
480 interrupts = <23 4 5>;
481 atmel,use-dma-rx;
482 atmel,use-dma-tx;
483 pinctrl-names = "default";
484 pinctrl-0 = <&pinctrl_uart3>;
485 status = "disabled";
486 };
488 usb1: gadget@fffb0000 {
489 compatible = "atmel,at91rm9200-udc";
490 reg = <0xfffb0000 0x4000>;
491 interrupts = <11 4 2>;
492 status = "disabled";
493 };
494 };
496 nand0: nand@40000000 {
497 compatible = "atmel,at91rm9200-nand";
498 #address-cells = <1>;
499 #size-cells = <1>;
500 reg = <0x40000000 0x10000000>;
501 atmel,nand-addr-offset = <21>;
502 atmel,nand-cmd-offset = <22>;
503 pinctrl-names = "default";
504 pinctrl-0 = <&pinctrl_nand>;
505 nand-ecc-mode = "soft";
506 gpios = <&pioC 2 0
507 0
508 &pioB 1 0
509 >;
510 status = "disabled";
511 };
513 usb0: ohci@00300000 {
514 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
515 reg = <0x00300000 0x100000>;
516 interrupts = <23 4 2>;
517 status = "disabled";
518 };
519 };
521 i2c@0 {
522 compatible = "i2c-gpio";
523 gpios = <&pioA 25 0 /* sda */
524 &pioA 26 0 /* scl */
525 >;
526 i2c-gpio,sda-open-drain;
527 i2c-gpio,scl-open-drain;
528 i2c-gpio,delay-us = <2>; /* ~100 kHz */
529 pinctrl-names = "default";
530 pinctrl-0 = <&pinctrl_twi_gpio>;
531 #address-cells = <1>;
532 #size-cells = <0>;
533 status = "disabled";
534 };
535 };