2 * DTS file for all SPEAr13xx SoCs
4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
14 /include/ "skeleton.dtsi"
17 interrupt-parent = <&gic>;
24 compatible = "arm,cortex-a9";
26 next-level-cache = <&L2>;
30 compatible = "arm,cortex-a9";
32 next-level-cache = <&L2>;
36 gic: interrupt-controller@ec801000 {
37 compatible = "arm,cortex-a9-gic";
39 #interrupt-cells = <3>;
40 reg = < 0xec801000 0x1000 >,
41 < 0xec800100 0x0100 >;
45 compatible = "arm,cortex-a9-pmu";
46 interrupts = <0 6 0x04
51 compatible = "arm,pl310-cache";
52 reg = <0xed000000 0x1000>;
59 device_type = "memory";
64 bootargs = "console=ttyAMA0,115200";
70 compatible = "simple-bus";
71 ranges = <0x50000000 0x50000000 0x10000000
72 0xb0000000 0xb0000000 0x10000000
73 0xe0000000 0xe0000000 0x10000000>;
76 compatible = "st,sdhci-spear";
77 reg = <0xb3000000 0x100>;
78 interrupts = <0 28 0x4>;
83 compatible = "arasan,cf-spear1340";
84 reg = <0xb2800000 0x100>;
85 interrupts = <0 29 0x4>;
90 compatible = "snps,dma-spear1340";
91 reg = <0xea800000 0x1000>;
92 interrupts = <0 19 0x4>;
97 compatible = "snps,dma-spear1340";
98 reg = <0xeb000000 0x1000>;
99 interrupts = <0 59 0x4>;
103 fsmc: flash@b0000000 {
104 compatible = "st,spear600-fsmc-nand";
105 #address-cells = <1>;
107 reg = <0xb0000000 0x1000 /* FSMC Register*/
108 0xb0800000 0x0010 /* NAND Base DATA */
109 0xb0820000 0x0010 /* NAND Base ADDR */
110 0xb0810000 0x0010>; /* NAND Base CMD */
111 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
112 interrupts = <0 20 0x4
119 gmac0: eth@e2000000 {
120 compatible = "st,spear600-gmac";
121 reg = <0xe2000000 0x8000>;
122 interrupts = <0 33 0x4
124 interrupt-names = "macirq", "eth_wake_irq";
128 smi: flash@ea000000 {
129 compatible = "st,spear600-smi";
130 #address-cells = <1>;
132 reg = <0xea000000 0x1000>;
133 interrupts = <0 30 0x4>;
138 compatible = "arm,pl022", "arm,primecell";
139 reg = <0xe0100000 0x1000>;
140 interrupts = <0 31 0x4>;
145 compatible = "st,spear600-ehci", "usb-ehci";
146 reg = <0xe4800000 0x1000>;
147 interrupts = <0 64 0x4>;
152 compatible = "st,spear600-ehci", "usb-ehci";
153 reg = <0xe5800000 0x1000>;
154 interrupts = <0 66 0x4>;
159 compatible = "st,spear600-ohci", "usb-ohci";
160 reg = <0xe4000000 0x1000>;
161 interrupts = <0 65 0x4>;
166 compatible = "st,spear600-ohci", "usb-ohci";
167 reg = <0xe5000000 0x1000>;
168 interrupts = <0 67 0x4>;
173 #address-cells = <1>;
175 compatible = "simple-bus";
176 ranges = <0x50000000 0x50000000 0x10000000
177 0xb0000000 0xb0000000 0x10000000
178 0xe0000000 0xe0000000 0x10000000>;
180 gpio0: gpio@e0600000 {
181 compatible = "arm,pl061", "arm,primecell";
182 reg = <0xe0600000 0x1000>;
183 interrupts = <0 24 0x4>;
186 interrupt-controller;
187 #interrupt-cells = <2>;
191 gpio1: gpio@e0680000 {
192 compatible = "arm,pl061", "arm,primecell";
193 reg = <0xe0680000 0x1000>;
194 interrupts = <0 25 0x4>;
197 interrupt-controller;
198 #interrupt-cells = <2>;
203 compatible = "st,spear300-kbd";
204 reg = <0xe0300000 0x1000>;
205 interrupts = <0 52 0x4>;
210 #address-cells = <1>;
212 compatible = "snps,designware-i2c";
213 reg = <0xe0280000 0x1000>;
214 interrupts = <0 41 0x4>;
219 compatible = "st,spear-rtc";
220 reg = <0xe0580000 0x1000>;
221 interrupts = <0 36 0x4>;
226 compatible = "arm,pl011", "arm,primecell";
227 reg = <0xe0000000 0x1000>;
228 interrupts = <0 35 0x4>;
233 compatible = "st,spear600-adc";
234 reg = <0xe0080000 0x1000>;
235 interrupts = <0 44 0x4>;
240 compatible = "st,spear-timer";
241 reg = <0xe0380000 0x400>;
242 interrupts = <0 37 0x4>;
246 compatible = "arm,cortex-a9-twd-timer";
247 reg = <0xec800600 0x20>;
248 interrupts = <1 13 0x301>;
252 compatible = "arm,cortex-a9-twd-wdt";
253 reg = <0xec800620 0x20>;
258 compatible = "st,thermal-spear1340";
259 reg = <0xe07008c4 0x4>;