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altera_uart: Add support for getting mapbase and IRQ from resources
[linux-2.6.git] / drivers / serial / altera_uart.c
blob1dfeffae52317ac92a53bc03e09fc5b46d029d3e
1 /*
2 * altera_uart.c -- Altera UART driver
3 *
4 * Based on mcf.c -- Freescale ColdFire UART driver
5 *
6 * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
7 * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
8 * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/timer.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/console.h>
22 #include <linux/tty.h>
23 #include <linux/tty_flip.h>
24 #include <linux/serial.h>
25 #include <linux/serial_core.h>
26 #include <linux/platform_device.h>
27 #include <linux/io.h>
28 #include <linux/altera_uart.h>
29
30 #define DRV_NAME "altera_uart"
31
32 /*
33 * Altera UART register definitions according to the Nios UART datasheet:
34 * http://www.altera.com/literature/ds/ds_nios_uart.pdf
35 */
36
37 #define ALTERA_UART_SIZE 32
38
39 #define ALTERA_UART_RXDATA_REG 0
40 #define ALTERA_UART_TXDATA_REG 4
41 #define ALTERA_UART_STATUS_REG 8
42 #define ALTERA_UART_CONTROL_REG 12
43 #define ALTERA_UART_DIVISOR_REG 16
44 #define ALTERA_UART_EOP_REG 20
45
46 #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
47 #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
48 #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
49 #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
50 #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
51 #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
52 #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
53 #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
54 #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
55 #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
56 #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
57 #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
58
59 /* Enable interrupt on... */
60 #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
61 #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
62 #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
63 #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
64 #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
65 #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
66 #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
67 #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
68 #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
69
70 #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
71 #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
72 #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
73 #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
74
75 /*
76 * Local per-uart structure.
77 */
78 struct altera_uart {
79 struct uart_port port;
80 struct timer_list tmr;
81 unsigned int sigs; /* Local copy of line sigs */
82 unsigned short imr; /* Local IMR mirror */
83 };
84
85 static unsigned int altera_uart_tx_empty(struct uart_port *port)
86 {
87 return (readl(port->membase + ALTERA_UART_STATUS_REG) &
88 ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
89 }
90
91 static unsigned int altera_uart_get_mctrl(struct uart_port *port)
92 {
93 struct altera_uart *pp = container_of(port, struct altera_uart, port);
94 unsigned int sigs;
95
96 sigs =
97 (readl(port->membase + ALTERA_UART_STATUS_REG) &
98 ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
99 sigs |= (pp->sigs & TIOCM_RTS);
100
101 return sigs;
102 }
103
104 static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
105 {
106 struct altera_uart *pp = container_of(port, struct altera_uart, port);
107
108 pp->sigs = sigs;
109 if (sigs & TIOCM_RTS)
110 pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
111 else
112 pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
113 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
114 }
115
116 static void altera_uart_start_tx(struct uart_port *port)
117 {
118 struct altera_uart *pp = container_of(port, struct altera_uart, port);
119
120 pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
121 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
122 }
123
124 static void altera_uart_stop_tx(struct uart_port *port)
125 {
126 struct altera_uart *pp = container_of(port, struct altera_uart, port);
127
128 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
129 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
130 }
131
132 static void altera_uart_stop_rx(struct uart_port *port)
133 {
134 struct altera_uart *pp = container_of(port, struct altera_uart, port);
135
136 pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
137 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
138 }
139
140 static void altera_uart_break_ctl(struct uart_port *port, int break_state)
141 {
142 struct altera_uart *pp = container_of(port, struct altera_uart, port);
143 unsigned long flags;
144
145 spin_lock_irqsave(&port->lock, flags);
146 if (break_state == -1)
147 pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
148 else
149 pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
150 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
151 spin_unlock_irqrestore(&port->lock, flags);
152 }
153
154 static void altera_uart_enable_ms(struct uart_port *port)
155 {
156 }
157
158 static void altera_uart_set_termios(struct uart_port *port,
159 struct ktermios *termios,
160 struct ktermios *old)
161 {
162 unsigned long flags;
163 unsigned int baud, baudclk;
164
165 baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
166 baudclk = port->uartclk / baud;
167
168 if (old)
169 tty_termios_copy_hw(termios, old);
170 tty_termios_encode_baud_rate(termios, baud, baud);
171
172 spin_lock_irqsave(&port->lock, flags);
173 uart_update_timeout(port, termios->c_cflag, baud);
174 writel(baudclk, port->membase + ALTERA_UART_DIVISOR_REG);
175 spin_unlock_irqrestore(&port->lock, flags);
176 }
177
178 static void altera_uart_rx_chars(struct altera_uart *pp)
179 {
180 struct uart_port *port = &pp->port;
181 unsigned char ch, flag;
182 unsigned short status;
183
184 while ((status = readl(port->membase + ALTERA_UART_STATUS_REG)) &
185 ALTERA_UART_STATUS_RRDY_MSK) {
186 ch = readl(port->membase + ALTERA_UART_RXDATA_REG);
187 flag = TTY_NORMAL;
188 port->icount.rx++;
189
190 if (status & ALTERA_UART_STATUS_E_MSK) {
191 writel(status, port->membase + ALTERA_UART_STATUS_REG);
192
193 if (status & ALTERA_UART_STATUS_BRK_MSK) {
194 port->icount.brk++;
195 if (uart_handle_break(port))
196 continue;
197 } else if (status & ALTERA_UART_STATUS_PE_MSK) {
198 port->icount.parity++;
199 } else if (status & ALTERA_UART_STATUS_ROE_MSK) {
200 port->icount.overrun++;
201 } else if (status & ALTERA_UART_STATUS_FE_MSK) {
202 port->icount.frame++;
203 }
204
205 status &= port->read_status_mask;
206
207 if (status & ALTERA_UART_STATUS_BRK_MSK)
208 flag = TTY_BREAK;
209 else if (status & ALTERA_UART_STATUS_PE_MSK)
210 flag = TTY_PARITY;
211 else if (status & ALTERA_UART_STATUS_FE_MSK)
212 flag = TTY_FRAME;
213 }
214
215 if (uart_handle_sysrq_char(port, ch))
216 continue;
217 uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
218 flag);
219 }
220
221 tty_flip_buffer_push(port->state->port.tty);
222 }
223
224 static void altera_uart_tx_chars(struct altera_uart *pp)
225 {
226 struct uart_port *port = &pp->port;
227 struct circ_buf *xmit = &port->state->xmit;
228
229 if (port->x_char) {
230 /* Send special char - probably flow control */
231 writel(port->x_char, port->membase + ALTERA_UART_TXDATA_REG);
232 port->x_char = 0;
233 port->icount.tx++;
234 return;
235 }
236
237 while (readl(port->membase + ALTERA_UART_STATUS_REG) &
238 ALTERA_UART_STATUS_TRDY_MSK) {
239 if (xmit->head == xmit->tail)
240 break;
241 writel(xmit->buf[xmit->tail],
242 port->membase + ALTERA_UART_TXDATA_REG);
243 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
244 port->icount.tx++;
245 }
246
247 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
248 uart_write_wakeup(port);
249
250 if (xmit->head == xmit->tail) {
251 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
252 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
253 }
254 }
255
256 static irqreturn_t altera_uart_interrupt(int irq, void *data)
257 {
258 struct uart_port *port = data;
259 struct altera_uart *pp = container_of(port, struct altera_uart, port);
260 unsigned int isr;
261
262 isr = readl(port->membase + ALTERA_UART_STATUS_REG) & pp->imr;
263
264 spin_lock(&port->lock);
265 if (isr & ALTERA_UART_STATUS_RRDY_MSK)
266 altera_uart_rx_chars(pp);
267 if (isr & ALTERA_UART_STATUS_TRDY_MSK)
268 altera_uart_tx_chars(pp);
269 spin_unlock(&port->lock);
270
271 return IRQ_RETVAL(isr);
272 }
273
274 static void altera_uart_timer(unsigned long data)
275 {
276 struct uart_port *port = (void *)data;
277 struct altera_uart *pp = container_of(port, struct altera_uart, port);
278
279 altera_uart_interrupt(0, port);
280 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
281 }
282
283 static void altera_uart_config_port(struct uart_port *port, int flags)
284 {
285 port->type = PORT_ALTERA_UART;
286
287 /* Clear mask, so no surprise interrupts. */
288 writel(0, port->membase + ALTERA_UART_CONTROL_REG);
289 /* Clear status register */
290 writel(0, port->membase + ALTERA_UART_STATUS_REG);
291 }
292
293 static int altera_uart_startup(struct uart_port *port)
294 {
295 struct altera_uart *pp = container_of(port, struct altera_uart, port);
296 unsigned long flags;
297 int ret;
298
299 if (!port->irq) {
300 setup_timer(&pp->tmr, altera_uart_timer, (unsigned long)port);
301 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
302 return 0;
303 }
304
305 ret = request_irq(port->irq, altera_uart_interrupt, IRQF_DISABLED,
306 DRV_NAME, port);
307 if (ret) {
308 pr_err(DRV_NAME ": unable to attach Altera UART %d "
309 "interrupt vector=%d\n", port->line, port->irq);
310 return ret;
311 }
312
313 spin_lock_irqsave(&port->lock, flags);
314
315 /* Enable RX interrupts now */
316 pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
317 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
318
319 spin_unlock_irqrestore(&port->lock, flags);
320
321 return 0;
322 }
323
324 static void altera_uart_shutdown(struct uart_port *port)
325 {
326 struct altera_uart *pp = container_of(port, struct altera_uart, port);
327 unsigned long flags;
328
329 spin_lock_irqsave(&port->lock, flags);
330
331 /* Disable all interrupts now */
332 pp->imr = 0;
333 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
334
335 spin_unlock_irqrestore(&port->lock, flags);
336
337 if (port->irq)
338 free_irq(port->irq, port);
339 else
340 del_timer_sync(&pp->tmr);
341 }
342
343 static const char *altera_uart_type(struct uart_port *port)
344 {
345 return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
346 }
347
348 static int altera_uart_request_port(struct uart_port *port)
349 {
350 /* UARTs always present */
351 return 0;
352 }
353
354 static void altera_uart_release_port(struct uart_port *port)
355 {
356 /* Nothing to release... */
357 }
358
359 static int altera_uart_verify_port(struct uart_port *port,
360 struct serial_struct *ser)
361 {
362 if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
363 return -EINVAL;
364 return 0;
365 }
366
367 /*
368 * Define the basic serial functions we support.
369 */
370 static struct uart_ops altera_uart_ops = {
371 .tx_empty = altera_uart_tx_empty,
372 .get_mctrl = altera_uart_get_mctrl,
373 .set_mctrl = altera_uart_set_mctrl,
374 .start_tx = altera_uart_start_tx,
375 .stop_tx = altera_uart_stop_tx,
376 .stop_rx = altera_uart_stop_rx,
377 .enable_ms = altera_uart_enable_ms,
378 .break_ctl = altera_uart_break_ctl,
379 .startup = altera_uart_startup,
380 .shutdown = altera_uart_shutdown,
381 .set_termios = altera_uart_set_termios,
382 .type = altera_uart_type,
383 .request_port = altera_uart_request_port,
384 .release_port = altera_uart_release_port,
385 .config_port = altera_uart_config_port,
386 .verify_port = altera_uart_verify_port,
387 };
388
389 static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
390
391 #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
392
393 int __init early_altera_uart_setup(struct altera_uart_platform_uart *platp)
394 {
395 struct uart_port *port;
396 int i;
397
398 for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS && platp[i].mapbase; i++) {
399 port = &altera_uart_ports[i].port;
400
401 port->line = i;
402 port->type = PORT_ALTERA_UART;
403 port->mapbase = platp[i].mapbase;
404 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
405 port->iotype = SERIAL_IO_MEM;
406 port->irq = platp[i].irq;
407 port->uartclk = platp[i].uartclk;
408 port->flags = ASYNC_BOOT_AUTOCONF;
409 port->ops = &altera_uart_ops;
410 }
411
412 return 0;
413 }
414
415 static void altera_uart_console_putc(struct uart_port *port, const char c)
416 {
417 while (!(readl(port->membase + ALTERA_UART_STATUS_REG) &
418 ALTERA_UART_STATUS_TRDY_MSK))
419 cpu_relax();
420
421 writel(c, port->membase + ALTERA_UART_TXDATA_REG);
422 }
423
424 static void altera_uart_console_write(struct console *co, const char *s,
425 unsigned int count)
426 {
427 struct uart_port *port = &(altera_uart_ports + co->index)->port;
428
429 for (; count; count--, s++) {
430 altera_uart_console_putc(port, *s);
431 if (*s == '\n')
432 altera_uart_console_putc(port, '\r');
433 }
434 }
435
436 static int __init altera_uart_console_setup(struct console *co, char *options)
437 {
438 struct uart_port *port;
439 int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
440 int bits = 8;
441 int parity = 'n';
442 int flow = 'n';
443
444 if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
445 return -EINVAL;
446 port = &altera_uart_ports[co->index].port;
447 if (port->membase == 0)
448 return -ENODEV;
449
450 if (options)
451 uart_parse_options(options, &baud, &parity, &bits, &flow);
452
453 return uart_set_options(port, co, baud, parity, bits, flow);
454 }
455
456 static struct uart_driver altera_uart_driver;
457
458 static struct console altera_uart_console = {
459 .name = "ttyS",
460 .write = altera_uart_console_write,
461 .device = uart_console_device,
462 .setup = altera_uart_console_setup,
463 .flags = CON_PRINTBUFFER,
464 .index = -1,
465 .data = &altera_uart_driver,
466 };
467
468 static int __init altera_uart_console_init(void)
469 {
470 register_console(&altera_uart_console);
471 return 0;
472 }
473
474 console_initcall(altera_uart_console_init);
475
476 #define ALTERA_UART_CONSOLE (&altera_uart_console)
477
478 #else
479
480 #define ALTERA_UART_CONSOLE NULL
481
482 #endif /* CONFIG_ALTERA_UART_CONSOLE */
483
484 /*
485 * Define the altera_uart UART driver structure.
486 */
487 static struct uart_driver altera_uart_driver = {
488 .owner = THIS_MODULE,
489 .driver_name = DRV_NAME,
490 .dev_name = "ttyS",
491 .major = TTY_MAJOR,
492 .minor = 64,
493 .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
494 .cons = ALTERA_UART_CONSOLE,
495 };
496
497 static int __devinit altera_uart_probe(struct platform_device *pdev)
498 {
499 struct altera_uart_platform_uart *platp = pdev->dev.platform_data;
500 struct uart_port *port;
501 struct resource *res_mem;
502 struct resource *res_irq;
503 int i = pdev->id;
504
505 /* -1 emphasizes that the platform must have one port, no .N suffix */
506 if (i == -1)
507 i = 0;
508
509 if (i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
510 return -EINVAL;
511
512 port = &altera_uart_ports[i].port;
513
514 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
515 if (res_mem)
516 port->mapbase = res_mem->start;
517 else if (platp->mapbase)
518 port->mapbase = platp->mapbase;
519 else
520 return -EINVAL;
521
522 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
523 if (res_irq)
524 port->irq = res_irq->start;
525 else if (platp->irq)
526 port->irq = platp->irq;
527
528 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
529 if (!port->membase)
530 return -ENOMEM;
531
532 port->line = i;
533 port->type = PORT_ALTERA_UART;
534 port->iotype = SERIAL_IO_MEM;
535 port->uartclk = platp->uartclk;
536 port->ops = &altera_uart_ops;
537 port->flags = ASYNC_BOOT_AUTOCONF;
538
539 uart_add_one_port(&altera_uart_driver, port);
540
541 return 0;
542 }
543
544 static int __devexit altera_uart_remove(struct platform_device *pdev)
545 {
546 struct uart_port *port = &altera_uart_ports[pdev->id].port;
547
548 uart_remove_one_port(&altera_uart_driver, port);
549 return 0;
550 }
551
552 static struct platform_driver altera_uart_platform_driver = {
553 .probe = altera_uart_probe,
554 .remove = __devexit_p(altera_uart_remove),
555 .driver = {
556 .name = DRV_NAME,
557 .owner = THIS_MODULE,
558 .pm = NULL,
559 },
560 };
561
562 static int __init altera_uart_init(void)
563 {
564 int rc;
565
566 rc = uart_register_driver(&altera_uart_driver);
567 if (rc)
568 return rc;
569 rc = platform_driver_register(&altera_uart_platform_driver);
570 if (rc) {
571 uart_unregister_driver(&altera_uart_driver);
572 return rc;
573 }
574 return 0;
575 }
576
577 static void __exit altera_uart_exit(void)
578 {
579 platform_driver_unregister(&altera_uart_platform_driver);
580 uart_unregister_driver(&altera_uart_driver);
581 }
582
583 module_init(altera_uart_init);
584 module_exit(altera_uart_exit);
585
586 MODULE_DESCRIPTION("Altera UART driver");
587 MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
588 MODULE_LICENSE("GPL");
589 MODULE_ALIAS("platform:" DRV_NAME);
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