2 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59
16 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 * The full GNU General Public License is included in this distribution in the
19 * file called COPYING.
23 * This code implements the DMA subsystem. It provides a HW-neutral interface
24 * for other kernel code to use asynchronous memory copy capabilities,
25 * if present, and allows different HW DMA drivers to register as providing
28 * Due to the fact we are accelerating what is already a relatively fast
29 * operation, the code goes to great lengths to avoid additional overhead,
34 * The subsystem keeps a global list of dma_device structs it is protected by a
35 * mutex, dma_list_mutex.
37 * A subsystem can get access to a channel by calling dmaengine_get() followed
38 * by dma_find_channel(), or if it has need for an exclusive channel it can call
39 * dma_request_channel(). Once a channel is allocated a reference is taken
40 * against its corresponding driver to disable removal.
42 * Each device has a channels list, which runs unlocked but is never modified
43 * once the device is registered, it's just setup by the driver.
45 * See Documentation/dmaengine.txt for more details
48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
50 #include <linux/dma-mapping.h>
51 #include <linux/init.h>
52 #include <linux/module.h>
54 #include <linux/device.h>
55 #include <linux/dmaengine.h>
56 #include <linux/hardirq.h>
57 #include <linux/spinlock.h>
58 #include <linux/percpu.h>
59 #include <linux/rcupdate.h>
60 #include <linux/mutex.h>
61 #include <linux/jiffies.h>
62 #include <linux/rculist.h>
63 #include <linux/idr.h>
64 #include <linux/slab.h>
66 static DEFINE_MUTEX(dma_list_mutex
);
67 static DEFINE_IDR(dma_idr
);
68 static LIST_HEAD(dma_device_list
);
69 static long dmaengine_ref_count
;
71 /* --- sysfs implementation --- */
74 * dev_to_dma_chan - convert a device pointer to the its sysfs container object
77 * Must be called under dma_list_mutex
79 static struct dma_chan
*dev_to_dma_chan(struct device
*dev
)
81 struct dma_chan_dev
*chan_dev
;
83 chan_dev
= container_of(dev
, typeof(*chan_dev
), device
);
84 return chan_dev
->chan
;
87 static ssize_t
show_memcpy_count(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
89 struct dma_chan
*chan
;
90 unsigned long count
= 0;
94 mutex_lock(&dma_list_mutex
);
95 chan
= dev_to_dma_chan(dev
);
97 for_each_possible_cpu(i
)
98 count
+= per_cpu_ptr(chan
->local
, i
)->memcpy_count
;
99 err
= sprintf(buf
, "%lu\n", count
);
102 mutex_unlock(&dma_list_mutex
);
107 static ssize_t
show_bytes_transferred(struct device
*dev
, struct device_attribute
*attr
,
110 struct dma_chan
*chan
;
111 unsigned long count
= 0;
115 mutex_lock(&dma_list_mutex
);
116 chan
= dev_to_dma_chan(dev
);
118 for_each_possible_cpu(i
)
119 count
+= per_cpu_ptr(chan
->local
, i
)->bytes_transferred
;
120 err
= sprintf(buf
, "%lu\n", count
);
123 mutex_unlock(&dma_list_mutex
);
128 static ssize_t
show_in_use(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
130 struct dma_chan
*chan
;
133 mutex_lock(&dma_list_mutex
);
134 chan
= dev_to_dma_chan(dev
);
136 err
= sprintf(buf
, "%d\n", chan
->client_count
);
139 mutex_unlock(&dma_list_mutex
);
144 static struct device_attribute dma_attrs
[] = {
145 __ATTR(memcpy_count
, S_IRUGO
, show_memcpy_count
, NULL
),
146 __ATTR(bytes_transferred
, S_IRUGO
, show_bytes_transferred
, NULL
),
147 __ATTR(in_use
, S_IRUGO
, show_in_use
, NULL
),
151 static void chan_dev_release(struct device
*dev
)
153 struct dma_chan_dev
*chan_dev
;
155 chan_dev
= container_of(dev
, typeof(*chan_dev
), device
);
156 if (atomic_dec_and_test(chan_dev
->idr_ref
)) {
157 mutex_lock(&dma_list_mutex
);
158 idr_remove(&dma_idr
, chan_dev
->dev_id
);
159 mutex_unlock(&dma_list_mutex
);
160 kfree(chan_dev
->idr_ref
);
165 static struct class dma_devclass
= {
167 .dev_attrs
= dma_attrs
,
168 .dev_release
= chan_dev_release
,
171 /* --- client and device registration --- */
173 #define dma_device_satisfies_mask(device, mask) \
174 __dma_device_satisfies_mask((device), &(mask))
176 __dma_device_satisfies_mask(struct dma_device
*device
, dma_cap_mask_t
*want
)
180 bitmap_and(has
.bits
, want
->bits
, device
->cap_mask
.bits
,
182 return bitmap_equal(want
->bits
, has
.bits
, DMA_TX_TYPE_END
);
185 static struct module
*dma_chan_to_owner(struct dma_chan
*chan
)
187 return chan
->device
->dev
->driver
->owner
;
191 * balance_ref_count - catch up the channel reference count
192 * @chan - channel to balance ->client_count versus dmaengine_ref_count
194 * balance_ref_count must be called under dma_list_mutex
196 static void balance_ref_count(struct dma_chan
*chan
)
198 struct module
*owner
= dma_chan_to_owner(chan
);
200 while (chan
->client_count
< dmaengine_ref_count
) {
202 chan
->client_count
++;
207 * dma_chan_get - try to grab a dma channel's parent driver module
208 * @chan - channel to grab
210 * Must be called under dma_list_mutex
212 static int dma_chan_get(struct dma_chan
*chan
)
215 struct module
*owner
= dma_chan_to_owner(chan
);
217 if (chan
->client_count
) {
220 } else if (try_module_get(owner
))
224 chan
->client_count
++;
226 /* allocate upon first client reference */
227 if (chan
->client_count
== 1 && err
== 0) {
228 int desc_cnt
= chan
->device
->device_alloc_chan_resources(chan
);
232 chan
->client_count
= 0;
234 } else if (!dma_has_cap(DMA_PRIVATE
, chan
->device
->cap_mask
))
235 balance_ref_count(chan
);
242 * dma_chan_put - drop a reference to a dma channel's parent driver module
243 * @chan - channel to release
245 * Must be called under dma_list_mutex
247 static void dma_chan_put(struct dma_chan
*chan
)
249 if (!chan
->client_count
)
250 return; /* this channel failed alloc_chan_resources */
251 chan
->client_count
--;
252 module_put(dma_chan_to_owner(chan
));
253 if (chan
->client_count
== 0)
254 chan
->device
->device_free_chan_resources(chan
);
257 enum dma_status
dma_sync_wait(struct dma_chan
*chan
, dma_cookie_t cookie
)
259 enum dma_status status
;
260 unsigned long dma_sync_wait_timeout
= jiffies
+ msecs_to_jiffies(5000);
262 dma_async_issue_pending(chan
);
264 status
= dma_async_is_tx_complete(chan
, cookie
, NULL
, NULL
);
265 if (time_after_eq(jiffies
, dma_sync_wait_timeout
)) {
266 pr_err("%s: timeout!\n", __func__
);
269 } while (status
== DMA_IN_PROGRESS
);
273 EXPORT_SYMBOL(dma_sync_wait
);
276 * dma_cap_mask_all - enable iteration over all operation types
278 static dma_cap_mask_t dma_cap_mask_all
;
281 * dma_chan_tbl_ent - tracks channel allocations per core/operation
282 * @chan - associated channel for this entry
284 struct dma_chan_tbl_ent
{
285 struct dma_chan
*chan
;
289 * channel_table - percpu lookup table for memory-to-memory offload providers
291 static struct dma_chan_tbl_ent __percpu
*channel_table
[DMA_TX_TYPE_END
];
293 static int __init
dma_channel_table_init(void)
295 enum dma_transaction_type cap
;
298 bitmap_fill(dma_cap_mask_all
.bits
, DMA_TX_TYPE_END
);
300 /* 'interrupt', 'private', and 'slave' are channel capabilities,
301 * but are not associated with an operation so they do not need
302 * an entry in the channel_table
304 clear_bit(DMA_INTERRUPT
, dma_cap_mask_all
.bits
);
305 clear_bit(DMA_PRIVATE
, dma_cap_mask_all
.bits
);
306 clear_bit(DMA_SLAVE
, dma_cap_mask_all
.bits
);
308 for_each_dma_cap_mask(cap
, dma_cap_mask_all
) {
309 channel_table
[cap
] = alloc_percpu(struct dma_chan_tbl_ent
);
310 if (!channel_table
[cap
]) {
317 pr_err("initialization failure\n");
318 for_each_dma_cap_mask(cap
, dma_cap_mask_all
)
319 if (channel_table
[cap
])
320 free_percpu(channel_table
[cap
]);
325 arch_initcall(dma_channel_table_init
);
328 * dma_find_channel - find a channel to carry out the operation
329 * @tx_type: transaction type
331 struct dma_chan
*dma_find_channel(enum dma_transaction_type tx_type
)
333 return this_cpu_read(channel_table
[tx_type
]->chan
);
335 EXPORT_SYMBOL(dma_find_channel
);
338 * net_dma_find_channel - find a channel for net_dma
339 * net_dma has alignment requirements
341 struct dma_chan
*net_dma_find_channel(void)
343 struct dma_chan
*chan
= dma_find_channel(DMA_MEMCPY
);
344 if (chan
&& !is_dma_copy_aligned(chan
->device
, 1, 1, 1))
349 EXPORT_SYMBOL(net_dma_find_channel
);
352 * dma_issue_pending_all - flush all pending operations across all channels
354 void dma_issue_pending_all(void)
356 struct dma_device
*device
;
357 struct dma_chan
*chan
;
360 list_for_each_entry_rcu(device
, &dma_device_list
, global_node
) {
361 if (dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
363 list_for_each_entry(chan
, &device
->channels
, device_node
)
364 if (chan
->client_count
)
365 device
->device_issue_pending(chan
);
369 EXPORT_SYMBOL(dma_issue_pending_all
);
372 * nth_chan - returns the nth channel of the given capability
373 * @cap: capability to match
374 * @n: nth channel desired
376 * Defaults to returning the channel with the desired capability and the
377 * lowest reference count when 'n' cannot be satisfied. Must be called
378 * under dma_list_mutex.
380 static struct dma_chan
*nth_chan(enum dma_transaction_type cap
, int n
)
382 struct dma_device
*device
;
383 struct dma_chan
*chan
;
384 struct dma_chan
*ret
= NULL
;
385 struct dma_chan
*min
= NULL
;
387 list_for_each_entry(device
, &dma_device_list
, global_node
) {
388 if (!dma_has_cap(cap
, device
->cap_mask
) ||
389 dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
391 list_for_each_entry(chan
, &device
->channels
, device_node
) {
392 if (!chan
->client_count
)
396 else if (chan
->table_count
< min
->table_count
)
418 * dma_channel_rebalance - redistribute the available channels
420 * Optimize for cpu isolation (each cpu gets a dedicated channel for an
421 * operation type) in the SMP case, and operation isolation (avoid
422 * multi-tasking channels) in the non-SMP case. Must be called under
425 static void dma_channel_rebalance(void)
427 struct dma_chan
*chan
;
428 struct dma_device
*device
;
433 /* undo the last distribution */
434 for_each_dma_cap_mask(cap
, dma_cap_mask_all
)
435 for_each_possible_cpu(cpu
)
436 per_cpu_ptr(channel_table
[cap
], cpu
)->chan
= NULL
;
438 list_for_each_entry(device
, &dma_device_list
, global_node
) {
439 if (dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
441 list_for_each_entry(chan
, &device
->channels
, device_node
)
442 chan
->table_count
= 0;
445 /* don't populate the channel_table if no clients are available */
446 if (!dmaengine_ref_count
)
449 /* redistribute available channels */
451 for_each_dma_cap_mask(cap
, dma_cap_mask_all
)
452 for_each_online_cpu(cpu
) {
453 if (num_possible_cpus() > 1)
454 chan
= nth_chan(cap
, n
++);
456 chan
= nth_chan(cap
, -1);
458 per_cpu_ptr(channel_table
[cap
], cpu
)->chan
= chan
;
462 static struct dma_chan
*private_candidate(dma_cap_mask_t
*mask
, struct dma_device
*dev
,
463 dma_filter_fn fn
, void *fn_param
)
465 struct dma_chan
*chan
;
467 if (!__dma_device_satisfies_mask(dev
, mask
)) {
468 pr_debug("%s: wrong capabilities\n", __func__
);
471 /* devices with multiple channels need special handling as we need to
472 * ensure that all channels are either private or public.
474 if (dev
->chancnt
> 1 && !dma_has_cap(DMA_PRIVATE
, dev
->cap_mask
))
475 list_for_each_entry(chan
, &dev
->channels
, device_node
) {
476 /* some channels are already publicly allocated */
477 if (chan
->client_count
)
481 list_for_each_entry(chan
, &dev
->channels
, device_node
) {
482 if (chan
->client_count
) {
483 pr_debug("%s: %s busy\n",
484 __func__
, dma_chan_name(chan
));
487 if (fn
&& !fn(chan
, fn_param
)) {
488 pr_debug("%s: %s filter said false\n",
489 __func__
, dma_chan_name(chan
));
499 * dma_request_channel - try to allocate an exclusive channel
500 * @mask: capabilities that the channel must satisfy
501 * @fn: optional callback to disposition available channels
502 * @fn_param: opaque parameter to pass to dma_filter_fn
504 struct dma_chan
*__dma_request_channel(dma_cap_mask_t
*mask
, dma_filter_fn fn
, void *fn_param
)
506 struct dma_device
*device
, *_d
;
507 struct dma_chan
*chan
= NULL
;
511 mutex_lock(&dma_list_mutex
);
512 list_for_each_entry_safe(device
, _d
, &dma_device_list
, global_node
) {
513 chan
= private_candidate(mask
, device
, fn
, fn_param
);
515 /* Found a suitable channel, try to grab, prep, and
516 * return it. We first set DMA_PRIVATE to disable
517 * balance_ref_count as this channel will not be
518 * published in the general-purpose allocator
520 dma_cap_set(DMA_PRIVATE
, device
->cap_mask
);
521 device
->privatecnt
++;
522 err
= dma_chan_get(chan
);
524 if (err
== -ENODEV
) {
525 pr_debug("%s: %s module removed\n",
526 __func__
, dma_chan_name(chan
));
527 list_del_rcu(&device
->global_node
);
529 pr_debug("%s: failed to get %s: (%d)\n",
530 __func__
, dma_chan_name(chan
), err
);
533 if (--device
->privatecnt
== 0)
534 dma_cap_clear(DMA_PRIVATE
, device
->cap_mask
);
538 mutex_unlock(&dma_list_mutex
);
540 pr_debug("%s: %s (%s)\n",
542 chan
? "success" : "fail",
543 chan
? dma_chan_name(chan
) : NULL
);
547 EXPORT_SYMBOL_GPL(__dma_request_channel
);
549 void dma_release_channel(struct dma_chan
*chan
)
551 mutex_lock(&dma_list_mutex
);
552 WARN_ONCE(chan
->client_count
!= 1,
553 "chan reference count %d != 1\n", chan
->client_count
);
555 /* drop PRIVATE cap enabled by __dma_request_channel() */
556 if (--chan
->device
->privatecnt
== 0)
557 dma_cap_clear(DMA_PRIVATE
, chan
->device
->cap_mask
);
558 mutex_unlock(&dma_list_mutex
);
560 EXPORT_SYMBOL_GPL(dma_release_channel
);
563 * dmaengine_get - register interest in dma_channels
565 void dmaengine_get(void)
567 struct dma_device
*device
, *_d
;
568 struct dma_chan
*chan
;
571 mutex_lock(&dma_list_mutex
);
572 dmaengine_ref_count
++;
574 /* try to grab channels */
575 list_for_each_entry_safe(device
, _d
, &dma_device_list
, global_node
) {
576 if (dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
578 list_for_each_entry(chan
, &device
->channels
, device_node
) {
579 err
= dma_chan_get(chan
);
580 if (err
== -ENODEV
) {
581 /* module removed before we could use it */
582 list_del_rcu(&device
->global_node
);
585 pr_err("%s: failed to get %s: (%d)\n",
586 __func__
, dma_chan_name(chan
), err
);
590 /* if this is the first reference and there were channels
591 * waiting we need to rebalance to get those channels
592 * incorporated into the channel table
594 if (dmaengine_ref_count
== 1)
595 dma_channel_rebalance();
596 mutex_unlock(&dma_list_mutex
);
598 EXPORT_SYMBOL(dmaengine_get
);
601 * dmaengine_put - let dma drivers be removed when ref_count == 0
603 void dmaengine_put(void)
605 struct dma_device
*device
;
606 struct dma_chan
*chan
;
608 mutex_lock(&dma_list_mutex
);
609 dmaengine_ref_count
--;
610 BUG_ON(dmaengine_ref_count
< 0);
611 /* drop channel references */
612 list_for_each_entry(device
, &dma_device_list
, global_node
) {
613 if (dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
615 list_for_each_entry(chan
, &device
->channels
, device_node
)
618 mutex_unlock(&dma_list_mutex
);
620 EXPORT_SYMBOL(dmaengine_put
);
622 static bool device_has_all_tx_types(struct dma_device
*device
)
624 /* A device that satisfies this test has channels that will never cause
625 * an async_tx channel switch event as all possible operation types can
628 #ifdef CONFIG_ASYNC_TX_DMA
629 if (!dma_has_cap(DMA_INTERRUPT
, device
->cap_mask
))
633 #if defined(CONFIG_ASYNC_MEMCPY) || defined(CONFIG_ASYNC_MEMCPY_MODULE)
634 if (!dma_has_cap(DMA_MEMCPY
, device
->cap_mask
))
638 #if defined(CONFIG_ASYNC_MEMSET) || defined(CONFIG_ASYNC_MEMSET_MODULE)
639 if (!dma_has_cap(DMA_MEMSET
, device
->cap_mask
))
643 #if defined(CONFIG_ASYNC_XOR) || defined(CONFIG_ASYNC_XOR_MODULE)
644 if (!dma_has_cap(DMA_XOR
, device
->cap_mask
))
647 #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
648 if (!dma_has_cap(DMA_XOR_VAL
, device
->cap_mask
))
653 #if defined(CONFIG_ASYNC_PQ) || defined(CONFIG_ASYNC_PQ_MODULE)
654 if (!dma_has_cap(DMA_PQ
, device
->cap_mask
))
657 #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
658 if (!dma_has_cap(DMA_PQ_VAL
, device
->cap_mask
))
666 static int get_dma_id(struct dma_device
*device
)
671 if (!idr_pre_get(&dma_idr
, GFP_KERNEL
))
673 mutex_lock(&dma_list_mutex
);
674 rc
= idr_get_new(&dma_idr
, NULL
, &device
->dev_id
);
675 mutex_unlock(&dma_list_mutex
);
685 * dma_async_device_register - registers DMA devices found
686 * @device: &dma_device
688 int dma_async_device_register(struct dma_device
*device
)
691 struct dma_chan
* chan
;
697 /* validate device routines */
698 BUG_ON(dma_has_cap(DMA_MEMCPY
, device
->cap_mask
) &&
699 !device
->device_prep_dma_memcpy
);
700 BUG_ON(dma_has_cap(DMA_XOR
, device
->cap_mask
) &&
701 !device
->device_prep_dma_xor
);
702 BUG_ON(dma_has_cap(DMA_XOR_VAL
, device
->cap_mask
) &&
703 !device
->device_prep_dma_xor_val
);
704 BUG_ON(dma_has_cap(DMA_PQ
, device
->cap_mask
) &&
705 !device
->device_prep_dma_pq
);
706 BUG_ON(dma_has_cap(DMA_PQ_VAL
, device
->cap_mask
) &&
707 !device
->device_prep_dma_pq_val
);
708 BUG_ON(dma_has_cap(DMA_MEMSET
, device
->cap_mask
) &&
709 !device
->device_prep_dma_memset
);
710 BUG_ON(dma_has_cap(DMA_INTERRUPT
, device
->cap_mask
) &&
711 !device
->device_prep_dma_interrupt
);
712 BUG_ON(dma_has_cap(DMA_SG
, device
->cap_mask
) &&
713 !device
->device_prep_dma_sg
);
714 BUG_ON(dma_has_cap(DMA_CYCLIC
, device
->cap_mask
) &&
715 !device
->device_prep_dma_cyclic
);
716 BUG_ON(dma_has_cap(DMA_SLAVE
, device
->cap_mask
) &&
717 !device
->device_control
);
718 BUG_ON(dma_has_cap(DMA_INTERLEAVE
, device
->cap_mask
) &&
719 !device
->device_prep_interleaved_dma
);
721 BUG_ON(!device
->device_alloc_chan_resources
);
722 BUG_ON(!device
->device_free_chan_resources
);
723 BUG_ON(!device
->device_tx_status
);
724 BUG_ON(!device
->device_issue_pending
);
725 BUG_ON(!device
->dev
);
727 /* note: this only matters in the
728 * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case
730 if (device_has_all_tx_types(device
))
731 dma_cap_set(DMA_ASYNC_TX
, device
->cap_mask
);
733 idr_ref
= kmalloc(sizeof(*idr_ref
), GFP_KERNEL
);
736 rc
= get_dma_id(device
);
742 atomic_set(idr_ref
, 0);
744 /* represent channels in sysfs. Probably want devs too */
745 list_for_each_entry(chan
, &device
->channels
, device_node
) {
747 chan
->local
= alloc_percpu(typeof(*chan
->local
));
748 if (chan
->local
== NULL
)
750 chan
->dev
= kzalloc(sizeof(*chan
->dev
), GFP_KERNEL
);
751 if (chan
->dev
== NULL
) {
752 free_percpu(chan
->local
);
757 chan
->chan_id
= chancnt
++;
758 chan
->dev
->device
.class = &dma_devclass
;
759 chan
->dev
->device
.parent
= device
->dev
;
760 chan
->dev
->chan
= chan
;
761 chan
->dev
->idr_ref
= idr_ref
;
762 chan
->dev
->dev_id
= device
->dev_id
;
764 dev_set_name(&chan
->dev
->device
, "dma%dchan%d",
765 device
->dev_id
, chan
->chan_id
);
767 rc
= device_register(&chan
->dev
->device
);
769 free_percpu(chan
->local
);
775 chan
->client_count
= 0;
777 device
->chancnt
= chancnt
;
779 mutex_lock(&dma_list_mutex
);
780 /* take references on public channels */
781 if (dmaengine_ref_count
&& !dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
782 list_for_each_entry(chan
, &device
->channels
, device_node
) {
783 /* if clients are already waiting for channels we need
784 * to take references on their behalf
786 if (dma_chan_get(chan
) == -ENODEV
) {
787 /* note we can only get here for the first
788 * channel as the remaining channels are
789 * guaranteed to get a reference
792 mutex_unlock(&dma_list_mutex
);
796 list_add_tail_rcu(&device
->global_node
, &dma_device_list
);
797 if (dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
798 device
->privatecnt
++; /* Always private */
799 dma_channel_rebalance();
800 mutex_unlock(&dma_list_mutex
);
805 /* if we never registered a channel just release the idr */
806 if (atomic_read(idr_ref
) == 0) {
807 mutex_lock(&dma_list_mutex
);
808 idr_remove(&dma_idr
, device
->dev_id
);
809 mutex_unlock(&dma_list_mutex
);
814 list_for_each_entry(chan
, &device
->channels
, device_node
) {
815 if (chan
->local
== NULL
)
817 mutex_lock(&dma_list_mutex
);
818 chan
->dev
->chan
= NULL
;
819 mutex_unlock(&dma_list_mutex
);
820 device_unregister(&chan
->dev
->device
);
821 free_percpu(chan
->local
);
825 EXPORT_SYMBOL(dma_async_device_register
);
828 * dma_async_device_unregister - unregister a DMA device
829 * @device: &dma_device
831 * This routine is called by dma driver exit routines, dmaengine holds module
832 * references to prevent it being called while channels are in use.
834 void dma_async_device_unregister(struct dma_device
*device
)
836 struct dma_chan
*chan
;
838 mutex_lock(&dma_list_mutex
);
839 list_del_rcu(&device
->global_node
);
840 dma_channel_rebalance();
841 mutex_unlock(&dma_list_mutex
);
843 list_for_each_entry(chan
, &device
->channels
, device_node
) {
844 WARN_ONCE(chan
->client_count
,
845 "%s called while %d clients hold a reference\n",
846 __func__
, chan
->client_count
);
847 mutex_lock(&dma_list_mutex
);
848 chan
->dev
->chan
= NULL
;
849 mutex_unlock(&dma_list_mutex
);
850 device_unregister(&chan
->dev
->device
);
851 free_percpu(chan
->local
);
854 EXPORT_SYMBOL(dma_async_device_unregister
);
857 * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses
858 * @chan: DMA channel to offload copy to
859 * @dest: destination address (virtual)
860 * @src: source address (virtual)
863 * Both @dest and @src must be mappable to a bus address according to the
864 * DMA mapping API rules for streaming mappings.
865 * Both @dest and @src must stay memory resident (kernel memory or locked
869 dma_async_memcpy_buf_to_buf(struct dma_chan
*chan
, void *dest
,
870 void *src
, size_t len
)
872 struct dma_device
*dev
= chan
->device
;
873 struct dma_async_tx_descriptor
*tx
;
874 dma_addr_t dma_dest
, dma_src
;
878 dma_src
= dma_map_single(dev
->dev
, src
, len
, DMA_TO_DEVICE
);
879 dma_dest
= dma_map_single(dev
->dev
, dest
, len
, DMA_FROM_DEVICE
);
880 flags
= DMA_CTRL_ACK
|
881 DMA_COMPL_SRC_UNMAP_SINGLE
|
882 DMA_COMPL_DEST_UNMAP_SINGLE
;
883 tx
= dev
->device_prep_dma_memcpy(chan
, dma_dest
, dma_src
, len
, flags
);
886 dma_unmap_single(dev
->dev
, dma_src
, len
, DMA_TO_DEVICE
);
887 dma_unmap_single(dev
->dev
, dma_dest
, len
, DMA_FROM_DEVICE
);
892 cookie
= tx
->tx_submit(tx
);
895 __this_cpu_add(chan
->local
->bytes_transferred
, len
);
896 __this_cpu_inc(chan
->local
->memcpy_count
);
901 EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf
);
904 * dma_async_memcpy_buf_to_pg - offloaded copy from address to page
905 * @chan: DMA channel to offload copy to
906 * @page: destination page
907 * @offset: offset in page to copy to
908 * @kdata: source address (virtual)
911 * Both @page/@offset and @kdata must be mappable to a bus address according
912 * to the DMA mapping API rules for streaming mappings.
913 * Both @page/@offset and @kdata must stay memory resident (kernel memory or
914 * locked user space pages)
917 dma_async_memcpy_buf_to_pg(struct dma_chan
*chan
, struct page
*page
,
918 unsigned int offset
, void *kdata
, size_t len
)
920 struct dma_device
*dev
= chan
->device
;
921 struct dma_async_tx_descriptor
*tx
;
922 dma_addr_t dma_dest
, dma_src
;
926 dma_src
= dma_map_single(dev
->dev
, kdata
, len
, DMA_TO_DEVICE
);
927 dma_dest
= dma_map_page(dev
->dev
, page
, offset
, len
, DMA_FROM_DEVICE
);
928 flags
= DMA_CTRL_ACK
| DMA_COMPL_SRC_UNMAP_SINGLE
;
929 tx
= dev
->device_prep_dma_memcpy(chan
, dma_dest
, dma_src
, len
, flags
);
932 dma_unmap_single(dev
->dev
, dma_src
, len
, DMA_TO_DEVICE
);
933 dma_unmap_page(dev
->dev
, dma_dest
, len
, DMA_FROM_DEVICE
);
938 cookie
= tx
->tx_submit(tx
);
941 __this_cpu_add(chan
->local
->bytes_transferred
, len
);
942 __this_cpu_inc(chan
->local
->memcpy_count
);
947 EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg
);
950 * dma_async_memcpy_pg_to_pg - offloaded copy from page to page
951 * @chan: DMA channel to offload copy to
952 * @dest_pg: destination page
953 * @dest_off: offset in page to copy to
954 * @src_pg: source page
955 * @src_off: offset in page to copy from
958 * Both @dest_page/@dest_off and @src_page/@src_off must be mappable to a bus
959 * address according to the DMA mapping API rules for streaming mappings.
960 * Both @dest_page/@dest_off and @src_page/@src_off must stay memory resident
961 * (kernel memory or locked user space pages).
964 dma_async_memcpy_pg_to_pg(struct dma_chan
*chan
, struct page
*dest_pg
,
965 unsigned int dest_off
, struct page
*src_pg
, unsigned int src_off
,
968 struct dma_device
*dev
= chan
->device
;
969 struct dma_async_tx_descriptor
*tx
;
970 dma_addr_t dma_dest
, dma_src
;
974 dma_src
= dma_map_page(dev
->dev
, src_pg
, src_off
, len
, DMA_TO_DEVICE
);
975 dma_dest
= dma_map_page(dev
->dev
, dest_pg
, dest_off
, len
,
977 flags
= DMA_CTRL_ACK
;
978 tx
= dev
->device_prep_dma_memcpy(chan
, dma_dest
, dma_src
, len
, flags
);
981 dma_unmap_page(dev
->dev
, dma_src
, len
, DMA_TO_DEVICE
);
982 dma_unmap_page(dev
->dev
, dma_dest
, len
, DMA_FROM_DEVICE
);
987 cookie
= tx
->tx_submit(tx
);
990 __this_cpu_add(chan
->local
->bytes_transferred
, len
);
991 __this_cpu_inc(chan
->local
->memcpy_count
);
996 EXPORT_SYMBOL(dma_async_memcpy_pg_to_pg
);
998 void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor
*tx
,
999 struct dma_chan
*chan
)
1002 #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
1003 spin_lock_init(&tx
->lock
);
1006 EXPORT_SYMBOL(dma_async_tx_descriptor_init
);
1008 /* dma_wait_for_async_tx - spin wait for a transaction to complete
1009 * @tx: in-flight transaction to wait on
1012 dma_wait_for_async_tx(struct dma_async_tx_descriptor
*tx
)
1014 unsigned long dma_sync_wait_timeout
= jiffies
+ msecs_to_jiffies(5000);
1019 while (tx
->cookie
== -EBUSY
) {
1020 if (time_after_eq(jiffies
, dma_sync_wait_timeout
)) {
1021 pr_err("%s timeout waiting for descriptor submission\n",
1027 return dma_sync_wait(tx
->chan
, tx
->cookie
);
1029 EXPORT_SYMBOL_GPL(dma_wait_for_async_tx
);
1031 /* dma_run_dependencies - helper routine for dma drivers to process
1032 * (start) dependent operations on their target channel
1033 * @tx: transaction with dependencies
1035 void dma_run_dependencies(struct dma_async_tx_descriptor
*tx
)
1037 struct dma_async_tx_descriptor
*dep
= txd_next(tx
);
1038 struct dma_async_tx_descriptor
*dep_next
;
1039 struct dma_chan
*chan
;
1044 /* we'll submit tx->next now, so clear the link */
1048 /* keep submitting up until a channel switch is detected
1049 * in that case we will be called again as a result of
1050 * processing the interrupt from async_tx_channel_switch
1052 for (; dep
; dep
= dep_next
) {
1054 txd_clear_parent(dep
);
1055 dep_next
= txd_next(dep
);
1056 if (dep_next
&& dep_next
->chan
== chan
)
1057 txd_clear_next(dep
); /* ->next will be submitted */
1059 dep_next
= NULL
; /* submit current dep and terminate */
1062 dep
->tx_submit(dep
);
1065 chan
->device
->device_issue_pending(chan
);
1067 EXPORT_SYMBOL_GPL(dma_run_dependencies
);
1069 static int __init
dma_bus_init(void)
1071 return class_register(&dma_devclass
);
1073 arch_initcall(dma_bus_init
);