2 * Driver for the IDT RC32434 (Korina) on-chip ethernet controller.
4 * Copyright 2004 IDT Inc. (rischelp@idt.com)
5 * Copyright 2006 Felix Fietkau <nbd@openwrt.org>
6 * Copyright 2008 Florian Fainelli <florian@openwrt.org>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 * Writing to a DMA status register:
30 * When writing to the status register, you should mask the bit you have
31 * been testing the status register with. Both Tx and Rx DMA registers
32 * should stick to this procedure.
35 #include <linux/module.h>
36 #include <linux/kernel.h>
37 #include <linux/moduleparam.h>
38 #include <linux/sched.h>
39 #include <linux/ctype.h>
40 #include <linux/types.h>
41 #include <linux/interrupt.h>
42 #include <linux/init.h>
43 #include <linux/ioport.h>
45 #include <linux/slab.h>
46 #include <linux/string.h>
47 #include <linux/delay.h>
48 #include <linux/netdevice.h>
49 #include <linux/etherdevice.h>
50 #include <linux/skbuff.h>
51 #include <linux/errno.h>
52 #include <linux/platform_device.h>
53 #include <linux/mii.h>
54 #include <linux/ethtool.h>
55 #include <linux/crc32.h>
57 #include <asm/bootinfo.h>
58 #include <asm/system.h>
59 #include <asm/bitops.h>
60 #include <asm/pgtable.h>
61 #include <asm/segment.h>
65 #include <asm/mach-rc32434/rb.h>
66 #include <asm/mach-rc32434/rc32434.h>
67 #include <asm/mach-rc32434/eth.h>
68 #include <asm/mach-rc32434/dma_v.h>
70 #define DRV_NAME "korina"
71 #define DRV_VERSION "0.10"
72 #define DRV_RELDATE "04Mar2008"
74 #define STATION_ADDRESS_HIGH(dev) (((dev)->dev_addr[0] << 8) | \
76 #define STATION_ADDRESS_LOW(dev) (((dev)->dev_addr[2] << 24) | \
77 ((dev)->dev_addr[3] << 16) | \
78 ((dev)->dev_addr[4] << 8) | \
81 #define MII_CLOCK 1250000 /* no more than 2.5MHz */
83 /* the following must be powers of two */
84 #define KORINA_NUM_RDS 64 /* number of receive descriptors */
85 #define KORINA_NUM_TDS 64 /* number of transmit descriptors */
87 /* KORINA_RBSIZE is the hardware's default maximum receive
88 * frame size in bytes. Having this hardcoded means that there
89 * is no support for MTU sizes greater than 1500. */
90 #define KORINA_RBSIZE 1536 /* size of one resource buffer = Ether MTU */
91 #define KORINA_RDS_MASK (KORINA_NUM_RDS - 1)
92 #define KORINA_TDS_MASK (KORINA_NUM_TDS - 1)
93 #define RD_RING_SIZE (KORINA_NUM_RDS * sizeof(struct dma_desc))
94 #define TD_RING_SIZE (KORINA_NUM_TDS * sizeof(struct dma_desc))
96 #define TX_TIMEOUT (6000 * HZ / 1000)
98 enum chain_status
{ desc_filled
, desc_empty
};
99 #define IS_DMA_FINISHED(X) (((X) & (DMA_DESC_FINI)) != 0)
100 #define IS_DMA_DONE(X) (((X) & (DMA_DESC_DONE)) != 0)
101 #define RCVPKT_LENGTH(X) (((X) & ETH_RX_LEN) >> ETH_RX_LEN_BIT)
103 /* Information that need to be kept for each board. */
104 struct korina_private
{
105 struct eth_regs
*eth_regs
;
106 struct dma_reg
*rx_dma_regs
;
107 struct dma_reg
*tx_dma_regs
;
108 struct dma_desc
*td_ring
; /* transmit descriptor ring */
109 struct dma_desc
*rd_ring
; /* receive descriptor ring */
111 struct sk_buff
*tx_skb
[KORINA_NUM_TDS
];
112 struct sk_buff
*rx_skb
[KORINA_NUM_RDS
];
117 enum chain_status rx_chain_status
;
122 enum chain_status tx_chain_status
;
131 spinlock_t lock
; /* NIC xmit lock */
135 struct napi_struct napi
;
136 struct mii_if_info mii_if
;
137 struct net_device
*dev
;
141 extern unsigned int idt_cpu_freq
;
143 static inline void korina_start_dma(struct dma_reg
*ch
, u32 dma_addr
)
145 writel(0, &ch
->dmandptr
);
146 writel(dma_addr
, &ch
->dmadptr
);
149 static inline void korina_abort_dma(struct net_device
*dev
,
152 if (readl(&ch
->dmac
) & DMA_CHAN_RUN_BIT
) {
153 writel(0x10, &ch
->dmac
);
155 while (!(readl(&ch
->dmas
) & DMA_STAT_HALT
))
156 dev
->trans_start
= jiffies
;
158 writel(0, &ch
->dmas
);
161 writel(0, &ch
->dmadptr
);
162 writel(0, &ch
->dmandptr
);
165 static inline void korina_chain_dma(struct dma_reg
*ch
, u32 dma_addr
)
167 writel(dma_addr
, &ch
->dmandptr
);
170 static void korina_abort_tx(struct net_device
*dev
)
172 struct korina_private
*lp
= netdev_priv(dev
);
174 korina_abort_dma(dev
, lp
->tx_dma_regs
);
177 static void korina_abort_rx(struct net_device
*dev
)
179 struct korina_private
*lp
= netdev_priv(dev
);
181 korina_abort_dma(dev
, lp
->rx_dma_regs
);
184 static void korina_start_rx(struct korina_private
*lp
,
187 korina_start_dma(lp
->rx_dma_regs
, CPHYSADDR(rd
));
190 static void korina_chain_rx(struct korina_private
*lp
,
193 korina_chain_dma(lp
->rx_dma_regs
, CPHYSADDR(rd
));
196 /* transmit packet */
197 static int korina_send_packet(struct sk_buff
*skb
, struct net_device
*dev
)
199 struct korina_private
*lp
= netdev_priv(dev
);
202 u32 chain_prev
, chain_next
;
205 spin_lock_irqsave(&lp
->lock
, flags
);
207 td
= &lp
->td_ring
[lp
->tx_chain_tail
];
209 /* stop queue when full, drop pkts if queue already full */
210 if (lp
->tx_count
>= (KORINA_NUM_TDS
- 2)) {
213 if (lp
->tx_count
== (KORINA_NUM_TDS
- 2))
214 netif_stop_queue(dev
);
216 dev
->stats
.tx_dropped
++;
217 dev_kfree_skb_any(skb
);
218 spin_unlock_irqrestore(&lp
->lock
, flags
);
220 return NETDEV_TX_BUSY
;
226 lp
->tx_skb
[lp
->tx_chain_tail
] = skb
;
229 dma_cache_wback((u32
)skb
->data
, skb
->len
);
231 /* Setup the transmit descriptor. */
232 dma_cache_inv((u32
) td
, sizeof(*td
));
233 td
->ca
= CPHYSADDR(skb
->data
);
234 chain_prev
= (lp
->tx_chain_tail
- 1) & KORINA_TDS_MASK
;
235 chain_next
= (lp
->tx_chain_tail
+ 1) & KORINA_TDS_MASK
;
237 if (readl(&(lp
->tx_dma_regs
->dmandptr
)) == 0) {
238 if (lp
->tx_chain_status
== desc_empty
) {
240 td
->control
= DMA_COUNT(length
) |
241 DMA_DESC_COF
| DMA_DESC_IOF
;
243 lp
->tx_chain_tail
= chain_next
;
245 writel(CPHYSADDR(&lp
->td_ring
[lp
->tx_chain_head
]),
246 &lp
->tx_dma_regs
->dmandptr
);
247 /* Move head to tail */
248 lp
->tx_chain_head
= lp
->tx_chain_tail
;
251 td
->control
= DMA_COUNT(length
) |
252 DMA_DESC_COF
| DMA_DESC_IOF
;
254 lp
->td_ring
[chain_prev
].control
&=
257 lp
->td_ring
[chain_prev
].link
= CPHYSADDR(td
);
259 lp
->tx_chain_tail
= chain_next
;
261 writel(CPHYSADDR(&lp
->td_ring
[lp
->tx_chain_head
]),
262 &(lp
->tx_dma_regs
->dmandptr
));
263 /* Move head to tail */
264 lp
->tx_chain_head
= lp
->tx_chain_tail
;
265 lp
->tx_chain_status
= desc_empty
;
268 if (lp
->tx_chain_status
== desc_empty
) {
270 td
->control
= DMA_COUNT(length
) |
271 DMA_DESC_COF
| DMA_DESC_IOF
;
273 lp
->tx_chain_tail
= chain_next
;
274 lp
->tx_chain_status
= desc_filled
;
277 td
->control
= DMA_COUNT(length
) |
278 DMA_DESC_COF
| DMA_DESC_IOF
;
279 lp
->td_ring
[chain_prev
].control
&=
281 lp
->td_ring
[chain_prev
].link
= CPHYSADDR(td
);
282 lp
->tx_chain_tail
= chain_next
;
285 dma_cache_wback((u32
) td
, sizeof(*td
));
287 dev
->trans_start
= jiffies
;
288 spin_unlock_irqrestore(&lp
->lock
, flags
);
293 static int mdio_read(struct net_device
*dev
, int mii_id
, int reg
)
295 struct korina_private
*lp
= netdev_priv(dev
);
298 mii_id
= ((lp
->rx_irq
== 0x2c ? 1 : 0) << 8);
300 writel(0, &lp
->eth_regs
->miimcfg
);
301 writel(0, &lp
->eth_regs
->miimcmd
);
302 writel(mii_id
| reg
, &lp
->eth_regs
->miimaddr
);
303 writel(ETH_MII_CMD_SCN
, &lp
->eth_regs
->miimcmd
);
305 ret
= (int)(readl(&lp
->eth_regs
->miimrdd
));
309 static void mdio_write(struct net_device
*dev
, int mii_id
, int reg
, int val
)
311 struct korina_private
*lp
= netdev_priv(dev
);
313 mii_id
= ((lp
->rx_irq
== 0x2c ? 1 : 0) << 8);
315 writel(0, &lp
->eth_regs
->miimcfg
);
316 writel(1, &lp
->eth_regs
->miimcmd
);
317 writel(mii_id
| reg
, &lp
->eth_regs
->miimaddr
);
318 writel(ETH_MII_CMD_SCN
, &lp
->eth_regs
->miimcmd
);
319 writel(val
, &lp
->eth_regs
->miimwtd
);
322 /* Ethernet Rx DMA interrupt */
323 static irqreturn_t
korina_rx_dma_interrupt(int irq
, void *dev_id
)
325 struct net_device
*dev
= dev_id
;
326 struct korina_private
*lp
= netdev_priv(dev
);
330 dmas
= readl(&lp
->rx_dma_regs
->dmas
);
331 if (dmas
& (DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
)) {
332 dmasm
= readl(&lp
->rx_dma_regs
->dmasm
);
333 writel(dmasm
| (DMA_STAT_DONE
|
334 DMA_STAT_HALT
| DMA_STAT_ERR
),
335 &lp
->rx_dma_regs
->dmasm
);
337 netif_rx_schedule(&lp
->napi
);
339 if (dmas
& DMA_STAT_ERR
)
340 printk(KERN_ERR DRV_NAME
"%s: DMA error\n", dev
->name
);
342 retval
= IRQ_HANDLED
;
349 static int korina_rx(struct net_device
*dev
, int limit
)
351 struct korina_private
*lp
= netdev_priv(dev
);
352 struct dma_desc
*rd
= &lp
->rd_ring
[lp
->rx_next_done
];
353 struct sk_buff
*skb
, *skb_new
;
355 u32 devcs
, pkt_len
, dmas
;
358 dma_cache_inv((u32
)rd
, sizeof(*rd
));
360 for (count
= 0; count
< limit
; count
++) {
361 skb
= lp
->rx_skb
[lp
->rx_next_done
];
366 if ((KORINA_RBSIZE
- (u32
)DMA_COUNT(rd
->control
)) == 0)
369 /* Update statistics counters */
370 if (devcs
& ETH_RX_CRC
)
371 dev
->stats
.rx_crc_errors
++;
372 if (devcs
& ETH_RX_LOR
)
373 dev
->stats
.rx_length_errors
++;
374 if (devcs
& ETH_RX_LE
)
375 dev
->stats
.rx_length_errors
++;
376 if (devcs
& ETH_RX_OVR
)
377 dev
->stats
.rx_over_errors
++;
378 if (devcs
& ETH_RX_CV
)
379 dev
->stats
.rx_frame_errors
++;
380 if (devcs
& ETH_RX_CES
)
381 dev
->stats
.rx_length_errors
++;
382 if (devcs
& ETH_RX_MP
)
383 dev
->stats
.multicast
++;
385 if ((devcs
& ETH_RX_LD
) != ETH_RX_LD
) {
386 /* check that this is a whole packet
387 * WARNING: DMA_FD bit incorrectly set
388 * in Rc32434 (errata ref #077) */
389 dev
->stats
.rx_errors
++;
390 dev
->stats
.rx_dropped
++;
391 } else if ((devcs
& ETH_RX_ROK
)) {
392 pkt_len
= RCVPKT_LENGTH(devcs
);
394 /* must be the (first and) last
396 pkt_buf
= (u8
*)lp
->rx_skb
[lp
->rx_next_done
]->data
;
398 /* invalidate the cache */
399 dma_cache_inv((unsigned long)pkt_buf
, pkt_len
- 4);
401 /* Malloc up new buffer. */
402 skb_new
= netdev_alloc_skb(dev
, KORINA_RBSIZE
+ 2);
406 /* Do not count the CRC */
407 skb_put(skb
, pkt_len
- 4);
408 skb
->protocol
= eth_type_trans(skb
, dev
);
410 /* Pass the packet to upper layers */
411 netif_receive_skb(skb
);
412 dev
->stats
.rx_packets
++;
413 dev
->stats
.rx_bytes
+= pkt_len
;
415 /* Update the mcast stats */
416 if (devcs
& ETH_RX_MP
)
417 dev
->stats
.multicast
++;
419 lp
->rx_skb
[lp
->rx_next_done
] = skb_new
;
424 /* Restore descriptor's curr_addr */
426 rd
->ca
= CPHYSADDR(skb_new
->data
);
428 rd
->ca
= CPHYSADDR(skb
->data
);
430 rd
->control
= DMA_COUNT(KORINA_RBSIZE
) |
431 DMA_DESC_COD
| DMA_DESC_IOD
;
432 lp
->rd_ring
[(lp
->rx_next_done
- 1) &
433 KORINA_RDS_MASK
].control
&=
436 lp
->rx_next_done
= (lp
->rx_next_done
+ 1) & KORINA_RDS_MASK
;
437 dma_cache_wback((u32
)rd
, sizeof(*rd
));
438 rd
= &lp
->rd_ring
[lp
->rx_next_done
];
439 writel(~DMA_STAT_DONE
, &lp
->rx_dma_regs
->dmas
);
442 dmas
= readl(&lp
->rx_dma_regs
->dmas
);
444 if (dmas
& DMA_STAT_HALT
) {
445 writel(~(DMA_STAT_HALT
| DMA_STAT_ERR
),
446 &lp
->rx_dma_regs
->dmas
);
450 skb
= lp
->rx_skb
[lp
->rx_next_done
];
451 rd
->ca
= CPHYSADDR(skb
->data
);
452 dma_cache_wback((u32
)rd
, sizeof(*rd
));
453 korina_chain_rx(lp
, rd
);
459 static int korina_poll(struct napi_struct
*napi
, int budget
)
461 struct korina_private
*lp
=
462 container_of(napi
, struct korina_private
, napi
);
463 struct net_device
*dev
= lp
->dev
;
466 work_done
= korina_rx(dev
, budget
);
467 if (work_done
< budget
) {
468 netif_rx_complete(napi
);
470 writel(readl(&lp
->rx_dma_regs
->dmasm
) &
471 ~(DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
),
472 &lp
->rx_dma_regs
->dmasm
);
478 * Set or clear the multicast filter for this adaptor.
480 static void korina_multicast_list(struct net_device
*dev
)
482 struct korina_private
*lp
= netdev_priv(dev
);
484 struct dev_mc_list
*dmi
= dev
->mc_list
;
485 u32 recognise
= ETH_ARC_AB
; /* always accept broadcasts */
488 /* Set promiscuous mode */
489 if (dev
->flags
& IFF_PROMISC
)
490 recognise
|= ETH_ARC_PRO
;
492 else if ((dev
->flags
& IFF_ALLMULTI
) || (dev
->mc_count
> 4))
493 /* All multicast and broadcast */
494 recognise
|= ETH_ARC_AM
;
496 /* Build the hash table */
497 if (dev
->mc_count
> 4) {
501 for (i
= 0; i
< 4; i
++)
504 for (i
= 0; i
< dev
->mc_count
; i
++) {
505 char *addrs
= dmi
->dmi_addr
;
512 crc
= ether_crc_le(6, addrs
);
514 hash_table
[crc
>> 4] |= 1 << (15 - (crc
& 0xf));
516 /* Accept filtered multicast */
517 recognise
|= ETH_ARC_AFM
;
519 /* Fill the MAC hash tables with their values */
520 writel((u32
)(hash_table
[1] << 16 | hash_table
[0]),
521 &lp
->eth_regs
->ethhash0
);
522 writel((u32
)(hash_table
[3] << 16 | hash_table
[2]),
523 &lp
->eth_regs
->ethhash1
);
526 spin_lock_irqsave(&lp
->lock
, flags
);
527 writel(recognise
, &lp
->eth_regs
->etharc
);
528 spin_unlock_irqrestore(&lp
->lock
, flags
);
531 static void korina_tx(struct net_device
*dev
)
533 struct korina_private
*lp
= netdev_priv(dev
);
534 struct dma_desc
*td
= &lp
->td_ring
[lp
->tx_next_done
];
538 spin_lock(&lp
->lock
);
540 /* Process all desc that are done */
541 while (IS_DMA_FINISHED(td
->control
)) {
542 if (lp
->tx_full
== 1) {
543 netif_wake_queue(dev
);
547 devcs
= lp
->td_ring
[lp
->tx_next_done
].devcs
;
548 if ((devcs
& (ETH_TX_FD
| ETH_TX_LD
)) !=
549 (ETH_TX_FD
| ETH_TX_LD
)) {
550 dev
->stats
.tx_errors
++;
551 dev
->stats
.tx_dropped
++;
553 /* Should never happen */
554 printk(KERN_ERR DRV_NAME
"%s: split tx ignored\n",
556 } else if (devcs
& ETH_TX_TOK
) {
557 dev
->stats
.tx_packets
++;
558 dev
->stats
.tx_bytes
+=
559 lp
->tx_skb
[lp
->tx_next_done
]->len
;
561 dev
->stats
.tx_errors
++;
562 dev
->stats
.tx_dropped
++;
565 if (devcs
& ETH_TX_UND
)
566 dev
->stats
.tx_fifo_errors
++;
568 /* Oversized frame */
569 if (devcs
& ETH_TX_OF
)
570 dev
->stats
.tx_aborted_errors
++;
572 /* Excessive deferrals */
573 if (devcs
& ETH_TX_ED
)
574 dev
->stats
.tx_carrier_errors
++;
576 /* Collisions: medium busy */
577 if (devcs
& ETH_TX_EC
)
578 dev
->stats
.collisions
++;
581 if (devcs
& ETH_TX_LC
)
582 dev
->stats
.tx_window_errors
++;
585 /* We must always free the original skb */
586 if (lp
->tx_skb
[lp
->tx_next_done
]) {
587 dev_kfree_skb_any(lp
->tx_skb
[lp
->tx_next_done
]);
588 lp
->tx_skb
[lp
->tx_next_done
] = NULL
;
591 lp
->td_ring
[lp
->tx_next_done
].control
= DMA_DESC_IOF
;
592 lp
->td_ring
[lp
->tx_next_done
].devcs
= ETH_TX_FD
| ETH_TX_LD
;
593 lp
->td_ring
[lp
->tx_next_done
].link
= 0;
594 lp
->td_ring
[lp
->tx_next_done
].ca
= 0;
597 /* Go on to next transmission */
598 lp
->tx_next_done
= (lp
->tx_next_done
+ 1) & KORINA_TDS_MASK
;
599 td
= &lp
->td_ring
[lp
->tx_next_done
];
603 /* Clear the DMA status register */
604 dmas
= readl(&lp
->tx_dma_regs
->dmas
);
605 writel(~dmas
, &lp
->tx_dma_regs
->dmas
);
607 writel(readl(&lp
->tx_dma_regs
->dmasm
) &
608 ~(DMA_STAT_FINI
| DMA_STAT_ERR
),
609 &lp
->tx_dma_regs
->dmasm
);
611 spin_unlock(&lp
->lock
);
615 korina_tx_dma_interrupt(int irq
, void *dev_id
)
617 struct net_device
*dev
= dev_id
;
618 struct korina_private
*lp
= netdev_priv(dev
);
622 dmas
= readl(&lp
->tx_dma_regs
->dmas
);
624 if (dmas
& (DMA_STAT_FINI
| DMA_STAT_ERR
)) {
625 dmasm
= readl(&lp
->tx_dma_regs
->dmasm
);
626 writel(dmasm
| (DMA_STAT_FINI
| DMA_STAT_ERR
),
627 &lp
->tx_dma_regs
->dmasm
);
631 if (lp
->tx_chain_status
== desc_filled
&&
632 (readl(&(lp
->tx_dma_regs
->dmandptr
)) == 0)) {
633 writel(CPHYSADDR(&lp
->td_ring
[lp
->tx_chain_head
]),
634 &(lp
->tx_dma_regs
->dmandptr
));
635 lp
->tx_chain_status
= desc_empty
;
636 lp
->tx_chain_head
= lp
->tx_chain_tail
;
637 dev
->trans_start
= jiffies
;
639 if (dmas
& DMA_STAT_ERR
)
640 printk(KERN_ERR DRV_NAME
"%s: DMA error\n", dev
->name
);
642 retval
= IRQ_HANDLED
;
650 static void korina_check_media(struct net_device
*dev
, unsigned int init_media
)
652 struct korina_private
*lp
= netdev_priv(dev
);
654 mii_check_media(&lp
->mii_if
, 0, init_media
);
656 if (lp
->mii_if
.full_duplex
)
657 writel(readl(&lp
->eth_regs
->ethmac2
) | ETH_MAC2_FD
,
658 &lp
->eth_regs
->ethmac2
);
660 writel(readl(&lp
->eth_regs
->ethmac2
) & ~ETH_MAC2_FD
,
661 &lp
->eth_regs
->ethmac2
);
664 static void korina_set_carrier(struct mii_if_info
*mii
)
666 if (mii
->force_media
) {
667 /* autoneg is off: Link is always assumed to be up */
668 if (!netif_carrier_ok(mii
->dev
))
669 netif_carrier_on(mii
->dev
);
670 } else /* Let MMI library update carrier status */
671 korina_check_media(mii
->dev
, 0);
674 static int korina_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
676 struct korina_private
*lp
= netdev_priv(dev
);
677 struct mii_ioctl_data
*data
= if_mii(rq
);
680 if (!netif_running(dev
))
682 spin_lock_irq(&lp
->lock
);
683 rc
= generic_mii_ioctl(&lp
->mii_if
, data
, cmd
, NULL
);
684 spin_unlock_irq(&lp
->lock
);
685 korina_set_carrier(&lp
->mii_if
);
690 /* ethtool helpers */
691 static void netdev_get_drvinfo(struct net_device
*dev
,
692 struct ethtool_drvinfo
*info
)
694 struct korina_private
*lp
= netdev_priv(dev
);
696 strcpy(info
->driver
, DRV_NAME
);
697 strcpy(info
->version
, DRV_VERSION
);
698 strcpy(info
->bus_info
, lp
->dev
->name
);
701 static int netdev_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
703 struct korina_private
*lp
= netdev_priv(dev
);
706 spin_lock_irq(&lp
->lock
);
707 rc
= mii_ethtool_gset(&lp
->mii_if
, cmd
);
708 spin_unlock_irq(&lp
->lock
);
713 static int netdev_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
715 struct korina_private
*lp
= netdev_priv(dev
);
718 spin_lock_irq(&lp
->lock
);
719 rc
= mii_ethtool_sset(&lp
->mii_if
, cmd
);
720 spin_unlock_irq(&lp
->lock
);
721 korina_set_carrier(&lp
->mii_if
);
726 static u32
netdev_get_link(struct net_device
*dev
)
728 struct korina_private
*lp
= netdev_priv(dev
);
730 return mii_link_ok(&lp
->mii_if
);
733 static struct ethtool_ops netdev_ethtool_ops
= {
734 .get_drvinfo
= netdev_get_drvinfo
,
735 .get_settings
= netdev_get_settings
,
736 .set_settings
= netdev_set_settings
,
737 .get_link
= netdev_get_link
,
740 static void korina_alloc_ring(struct net_device
*dev
)
742 struct korina_private
*lp
= netdev_priv(dev
);
745 /* Initialize the transmit descriptors */
746 for (i
= 0; i
< KORINA_NUM_TDS
; i
++) {
747 lp
->td_ring
[i
].control
= DMA_DESC_IOF
;
748 lp
->td_ring
[i
].devcs
= ETH_TX_FD
| ETH_TX_LD
;
749 lp
->td_ring
[i
].ca
= 0;
750 lp
->td_ring
[i
].link
= 0;
752 lp
->tx_next_done
= lp
->tx_chain_head
= lp
->tx_chain_tail
=
753 lp
->tx_full
= lp
->tx_count
= 0;
754 lp
->tx_chain_status
= desc_empty
;
756 /* Initialize the receive descriptors */
757 for (i
= 0; i
< KORINA_NUM_RDS
; i
++) {
758 struct sk_buff
*skb
= lp
->rx_skb
[i
];
760 skb
= dev_alloc_skb(KORINA_RBSIZE
+ 2);
765 lp
->rd_ring
[i
].control
= DMA_DESC_IOD
|
766 DMA_COUNT(KORINA_RBSIZE
);
767 lp
->rd_ring
[i
].devcs
= 0;
768 lp
->rd_ring
[i
].ca
= CPHYSADDR(skb
->data
);
769 lp
->rd_ring
[i
].link
= CPHYSADDR(&lp
->rd_ring
[i
+1]);
772 /* loop back receive descriptors, so the last
773 * descriptor points to the first one */
774 lp
->rd_ring
[i
- 1].link
= CPHYSADDR(&lp
->rd_ring
[0]);
775 lp
->rd_ring
[i
- 1].control
|= DMA_DESC_COD
;
777 lp
->rx_next_done
= 0;
778 lp
->rx_chain_head
= 0;
779 lp
->rx_chain_tail
= 0;
780 lp
->rx_chain_status
= desc_empty
;
783 static void korina_free_ring(struct net_device
*dev
)
785 struct korina_private
*lp
= netdev_priv(dev
);
788 for (i
= 0; i
< KORINA_NUM_RDS
; i
++) {
789 lp
->rd_ring
[i
].control
= 0;
791 dev_kfree_skb_any(lp
->rx_skb
[i
]);
792 lp
->rx_skb
[i
] = NULL
;
795 for (i
= 0; i
< KORINA_NUM_TDS
; i
++) {
796 lp
->td_ring
[i
].control
= 0;
798 dev_kfree_skb_any(lp
->tx_skb
[i
]);
799 lp
->tx_skb
[i
] = NULL
;
804 * Initialize the RC32434 ethernet controller.
806 static int korina_init(struct net_device
*dev
)
808 struct korina_private
*lp
= netdev_priv(dev
);
811 korina_abort_tx(dev
);
812 korina_abort_rx(dev
);
814 /* reset ethernet logic */
815 writel(0, &lp
->eth_regs
->ethintfc
);
816 while ((readl(&lp
->eth_regs
->ethintfc
) & ETH_INT_FC_RIP
))
817 dev
->trans_start
= jiffies
;
819 /* Enable Ethernet Interface */
820 writel(ETH_INT_FC_EN
, &lp
->eth_regs
->ethintfc
);
823 korina_alloc_ring(dev
);
825 writel(0, &lp
->rx_dma_regs
->dmas
);
827 korina_start_rx(lp
, &lp
->rd_ring
[0]);
829 writel(readl(&lp
->tx_dma_regs
->dmasm
) &
830 ~(DMA_STAT_FINI
| DMA_STAT_ERR
),
831 &lp
->tx_dma_regs
->dmasm
);
832 writel(readl(&lp
->rx_dma_regs
->dmasm
) &
833 ~(DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
),
834 &lp
->rx_dma_regs
->dmasm
);
836 /* Accept only packets destined for this Ethernet device address */
837 writel(ETH_ARC_AB
, &lp
->eth_regs
->etharc
);
839 /* Set all Ether station address registers to their initial values */
840 writel(STATION_ADDRESS_LOW(dev
), &lp
->eth_regs
->ethsal0
);
841 writel(STATION_ADDRESS_HIGH(dev
), &lp
->eth_regs
->ethsah0
);
843 writel(STATION_ADDRESS_LOW(dev
), &lp
->eth_regs
->ethsal1
);
844 writel(STATION_ADDRESS_HIGH(dev
), &lp
->eth_regs
->ethsah1
);
846 writel(STATION_ADDRESS_LOW(dev
), &lp
->eth_regs
->ethsal2
);
847 writel(STATION_ADDRESS_HIGH(dev
), &lp
->eth_regs
->ethsah2
);
849 writel(STATION_ADDRESS_LOW(dev
), &lp
->eth_regs
->ethsal3
);
850 writel(STATION_ADDRESS_HIGH(dev
), &lp
->eth_regs
->ethsah3
);
853 /* Frame Length Checking, Pad Enable, CRC Enable, Full Duplex set */
854 writel(ETH_MAC2_PE
| ETH_MAC2_CEN
| ETH_MAC2_FD
,
855 &lp
->eth_regs
->ethmac2
);
857 /* Back to back inter-packet-gap */
858 writel(0x15, &lp
->eth_regs
->ethipgt
);
859 /* Non - Back to back inter-packet-gap */
860 writel(0x12, &lp
->eth_regs
->ethipgr
);
862 /* Management Clock Prescaler Divisor
863 * Clock independent setting */
864 writel(((idt_cpu_freq
) / MII_CLOCK
+ 1) & ~1,
865 &lp
->eth_regs
->ethmcp
);
867 /* don't transmit until fifo contains 48b */
868 writel(48, &lp
->eth_regs
->ethfifott
);
870 writel(ETH_MAC1_RE
, &lp
->eth_regs
->ethmac1
);
872 napi_enable(&lp
->napi
);
873 netif_start_queue(dev
);
879 * Restart the RC32434 ethernet controller.
880 * FIXME: check the return status where we call it
882 static int korina_restart(struct net_device
*dev
)
884 struct korina_private
*lp
= netdev_priv(dev
);
890 disable_irq(lp
->rx_irq
);
891 disable_irq(lp
->tx_irq
);
892 disable_irq(lp
->ovr_irq
);
893 disable_irq(lp
->und_irq
);
895 writel(readl(&lp
->tx_dma_regs
->dmasm
) |
896 DMA_STAT_FINI
| DMA_STAT_ERR
,
897 &lp
->tx_dma_regs
->dmasm
);
898 writel(readl(&lp
->rx_dma_regs
->dmasm
) |
899 DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
,
900 &lp
->rx_dma_regs
->dmasm
);
902 korina_free_ring(dev
);
904 napi_disable(&lp
->napi
);
906 ret
= korina_init(dev
);
908 printk(KERN_ERR DRV_NAME
"%s: cannot restart device\n",
912 korina_multicast_list(dev
);
914 enable_irq(lp
->und_irq
);
915 enable_irq(lp
->ovr_irq
);
916 enable_irq(lp
->tx_irq
);
917 enable_irq(lp
->rx_irq
);
922 static void korina_clear_and_restart(struct net_device
*dev
, u32 value
)
924 struct korina_private
*lp
= netdev_priv(dev
);
926 netif_stop_queue(dev
);
927 writel(value
, &lp
->eth_regs
->ethintfc
);
931 /* Ethernet Tx Underflow interrupt */
932 static irqreturn_t
korina_und_interrupt(int irq
, void *dev_id
)
934 struct net_device
*dev
= dev_id
;
935 struct korina_private
*lp
= netdev_priv(dev
);
938 spin_lock(&lp
->lock
);
940 und
= readl(&lp
->eth_regs
->ethintfc
);
942 if (und
& ETH_INT_FC_UND
)
943 korina_clear_and_restart(dev
, und
& ~ETH_INT_FC_UND
);
945 spin_unlock(&lp
->lock
);
950 static void korina_tx_timeout(struct net_device
*dev
)
952 struct korina_private
*lp
= netdev_priv(dev
);
955 spin_lock_irqsave(&lp
->lock
, flags
);
957 spin_unlock_irqrestore(&lp
->lock
, flags
);
960 /* Ethernet Rx Overflow interrupt */
962 korina_ovr_interrupt(int irq
, void *dev_id
)
964 struct net_device
*dev
= dev_id
;
965 struct korina_private
*lp
= netdev_priv(dev
);
968 spin_lock(&lp
->lock
);
969 ovr
= readl(&lp
->eth_regs
->ethintfc
);
971 if (ovr
& ETH_INT_FC_OVR
)
972 korina_clear_and_restart(dev
, ovr
& ~ETH_INT_FC_OVR
);
974 spin_unlock(&lp
->lock
);
979 #ifdef CONFIG_NET_POLL_CONTROLLER
980 static void korina_poll_controller(struct net_device
*dev
)
982 disable_irq(dev
->irq
);
983 korina_tx_dma_interrupt(dev
->irq
, dev
);
984 enable_irq(dev
->irq
);
988 static int korina_open(struct net_device
*dev
)
990 struct korina_private
*lp
= netdev_priv(dev
);
994 ret
= korina_init(dev
);
996 printk(KERN_ERR DRV_NAME
"%s: cannot open device\n", dev
->name
);
1000 /* Install the interrupt handler
1001 * that handles the Done Finished
1002 * Ovr and Und Events */
1003 ret
= request_irq(lp
->rx_irq
, &korina_rx_dma_interrupt
,
1004 IRQF_DISABLED
, "Korina ethernet Rx", dev
);
1006 printk(KERN_ERR DRV_NAME
"%s: unable to get Rx DMA IRQ %d\n",
1007 dev
->name
, lp
->rx_irq
);
1010 ret
= request_irq(lp
->tx_irq
, &korina_tx_dma_interrupt
,
1011 IRQF_DISABLED
, "Korina ethernet Tx", dev
);
1013 printk(KERN_ERR DRV_NAME
"%s: unable to get Tx DMA IRQ %d\n",
1014 dev
->name
, lp
->tx_irq
);
1015 goto err_free_rx_irq
;
1018 /* Install handler for overrun error. */
1019 ret
= request_irq(lp
->ovr_irq
, &korina_ovr_interrupt
,
1020 IRQF_DISABLED
, "Ethernet Overflow", dev
);
1022 printk(KERN_ERR DRV_NAME
"%s: unable to get OVR IRQ %d\n",
1023 dev
->name
, lp
->ovr_irq
);
1024 goto err_free_tx_irq
;
1027 /* Install handler for underflow error. */
1028 ret
= request_irq(lp
->und_irq
, &korina_und_interrupt
,
1029 IRQF_DISABLED
, "Ethernet Underflow", dev
);
1031 printk(KERN_ERR DRV_NAME
"%s: unable to get UND IRQ %d\n",
1032 dev
->name
, lp
->und_irq
);
1033 goto err_free_ovr_irq
;
1039 free_irq(lp
->ovr_irq
, dev
);
1041 free_irq(lp
->tx_irq
, dev
);
1043 free_irq(lp
->rx_irq
, dev
);
1045 korina_free_ring(dev
);
1049 static int korina_close(struct net_device
*dev
)
1051 struct korina_private
*lp
= netdev_priv(dev
);
1054 /* Disable interrupts */
1055 disable_irq(lp
->rx_irq
);
1056 disable_irq(lp
->tx_irq
);
1057 disable_irq(lp
->ovr_irq
);
1058 disable_irq(lp
->und_irq
);
1060 korina_abort_tx(dev
);
1061 tmp
= readl(&lp
->tx_dma_regs
->dmasm
);
1062 tmp
= tmp
| DMA_STAT_FINI
| DMA_STAT_ERR
;
1063 writel(tmp
, &lp
->tx_dma_regs
->dmasm
);
1065 korina_abort_rx(dev
);
1066 tmp
= readl(&lp
->rx_dma_regs
->dmasm
);
1067 tmp
= tmp
| DMA_STAT_DONE
| DMA_STAT_HALT
| DMA_STAT_ERR
;
1068 writel(tmp
, &lp
->rx_dma_regs
->dmasm
);
1070 korina_free_ring(dev
);
1072 napi_disable(&lp
->napi
);
1074 free_irq(lp
->rx_irq
, dev
);
1075 free_irq(lp
->tx_irq
, dev
);
1076 free_irq(lp
->ovr_irq
, dev
);
1077 free_irq(lp
->und_irq
, dev
);
1082 static int korina_probe(struct platform_device
*pdev
)
1084 struct korina_device
*bif
= platform_get_drvdata(pdev
);
1085 struct korina_private
*lp
;
1086 struct net_device
*dev
;
1090 dev
= alloc_etherdev(sizeof(struct korina_private
));
1092 printk(KERN_ERR DRV_NAME
": alloc_etherdev failed\n");
1095 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1096 lp
= netdev_priv(dev
);
1099 memcpy(dev
->dev_addr
, bif
->mac
, 6);
1101 lp
->rx_irq
= platform_get_irq_byname(pdev
, "korina_rx");
1102 lp
->tx_irq
= platform_get_irq_byname(pdev
, "korina_tx");
1103 lp
->ovr_irq
= platform_get_irq_byname(pdev
, "korina_ovr");
1104 lp
->und_irq
= platform_get_irq_byname(pdev
, "korina_und");
1106 r
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "korina_regs");
1107 dev
->base_addr
= r
->start
;
1108 lp
->eth_regs
= ioremap_nocache(r
->start
, r
->end
- r
->start
);
1109 if (!lp
->eth_regs
) {
1110 printk(KERN_ERR DRV_NAME
"cannot remap registers\n");
1115 r
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "korina_dma_rx");
1116 lp
->rx_dma_regs
= ioremap_nocache(r
->start
, r
->end
- r
->start
);
1117 if (!lp
->rx_dma_regs
) {
1118 printk(KERN_ERR DRV_NAME
"cannot remap Rx DMA registers\n");
1120 goto probe_err_dma_rx
;
1123 r
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "korina_dma_tx");
1124 lp
->tx_dma_regs
= ioremap_nocache(r
->start
, r
->end
- r
->start
);
1125 if (!lp
->tx_dma_regs
) {
1126 printk(KERN_ERR DRV_NAME
"cannot remap Tx DMA registers\n");
1128 goto probe_err_dma_tx
;
1131 lp
->td_ring
= kmalloc(TD_RING_SIZE
+ RD_RING_SIZE
, GFP_KERNEL
);
1133 printk(KERN_ERR DRV_NAME
"cannot allocate descriptors\n");
1135 goto probe_err_td_ring
;
1138 dma_cache_inv((unsigned long)(lp
->td_ring
),
1139 TD_RING_SIZE
+ RD_RING_SIZE
);
1141 /* now convert TD_RING pointer to KSEG1 */
1142 lp
->td_ring
= (struct dma_desc
*)KSEG1ADDR(lp
->td_ring
);
1143 lp
->rd_ring
= &lp
->td_ring
[KORINA_NUM_TDS
];
1145 spin_lock_init(&lp
->lock
);
1146 /* just use the rx dma irq */
1147 dev
->irq
= lp
->rx_irq
;
1150 dev
->open
= korina_open
;
1151 dev
->stop
= korina_close
;
1152 dev
->hard_start_xmit
= korina_send_packet
;
1153 dev
->set_multicast_list
= &korina_multicast_list
;
1154 dev
->ethtool_ops
= &netdev_ethtool_ops
;
1155 dev
->tx_timeout
= korina_tx_timeout
;
1156 dev
->watchdog_timeo
= TX_TIMEOUT
;
1157 dev
->do_ioctl
= &korina_ioctl
;
1158 #ifdef CONFIG_NET_POLL_CONTROLLER
1159 dev
->poll_controller
= korina_poll_controller
;
1161 netif_napi_add(dev
, &lp
->napi
, korina_poll
, 64);
1163 lp
->phy_addr
= (((lp
->rx_irq
== 0x2c? 1:0) << 8) | 0x05);
1164 lp
->mii_if
.dev
= dev
;
1165 lp
->mii_if
.mdio_read
= mdio_read
;
1166 lp
->mii_if
.mdio_write
= mdio_write
;
1167 lp
->mii_if
.phy_id
= lp
->phy_addr
;
1168 lp
->mii_if
.phy_id_mask
= 0x1f;
1169 lp
->mii_if
.reg_num_mask
= 0x1f;
1171 rc
= register_netdev(dev
);
1173 printk(KERN_ERR DRV_NAME
1174 ": cannot register net device %d\n", rc
);
1175 goto probe_err_register
;
1183 iounmap(lp
->tx_dma_regs
);
1185 iounmap(lp
->rx_dma_regs
);
1187 iounmap(lp
->eth_regs
);
1193 static int korina_remove(struct platform_device
*pdev
)
1195 struct korina_device
*bif
= platform_get_drvdata(pdev
);
1196 struct korina_private
*lp
= netdev_priv(bif
->dev
);
1198 iounmap(lp
->eth_regs
);
1199 iounmap(lp
->rx_dma_regs
);
1200 iounmap(lp
->tx_dma_regs
);
1202 platform_set_drvdata(pdev
, NULL
);
1203 unregister_netdev(bif
->dev
);
1204 free_netdev(bif
->dev
);
1209 static struct platform_driver korina_driver
= {
1210 .driver
.name
= "korina",
1211 .probe
= korina_probe
,
1212 .remove
= korina_remove
,
1215 static int __init
korina_init_module(void)
1217 return platform_driver_register(&korina_driver
);
1220 static void korina_cleanup_module(void)
1222 return platform_driver_unregister(&korina_driver
);
1225 module_init(korina_init_module
);
1226 module_exit(korina_cleanup_module
);
1228 MODULE_AUTHOR("Philip Rischel <rischelp@idt.com>");
1229 MODULE_AUTHOR("Felix Fietkau <nbd@openwrt.org>");
1230 MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
1231 MODULE_DESCRIPTION("IDT RC32434 (Korina) Ethernet driver");
1232 MODULE_LICENSE("GPL");