include/asm-generic/pgtable.h

   1 #ifndef _ASM_GENERIC_PGTABLE_H
   2 #define _ASM_GENERIC_PGTABLE_H
   3
   4 #ifndef __ASSEMBLY__
   5 #ifdef CONFIG_MMU
   6
   7 #include <linux/mm_types.h>
   8 #include <linux/bug.h>
   9
  10 /*
  11  * On almost all architectures and configurations, 0 can be used as the
  12  * upper ceiling to free_pgtables(): on many architectures it has the same
  13  * effect as using TASK_SIZE.  However, there is one configuration which
  14  * must impose a more careful limit, to avoid freeing kernel pgtables.
  15  */
  16 #ifndef USER_PGTABLES_CEILING
  17 #define USER_PGTABLES_CEILING   0UL
  18 #endif
  19
  20 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
  21 extern int ptep_set_access_flags(struct vm_area_struct *vma,
  22                                  unsigned long address, pte_t *ptep,
  23                                  pte_t entry, int dirty);
  24 #endif
  25
  26 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
  27 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
  28                                  unsigned long address, pmd_t *pmdp,
  29                                  pmd_t entry, int dirty);
  30 #endif
  31
  32 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
  33 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
  34                                             unsigned long address,
  35                                             pte_t *ptep)
  36 {
  37         pte_t pte = *ptep;
  38         int r = 1;
  39         if (!pte_young(pte))
  40                 r = 0;
  41         else
  42                 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
  43         return r;
  44 }
  45 #endif
  46
  47 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
  48 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  49 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
  50                                             unsigned long address,
  51                                             pmd_t *pmdp)
  52 {
  53         pmd_t pmd = *pmdp;
  54         int r = 1;
  55         if (!pmd_young(pmd))
  56                 r = 0;
  57         else
  58                 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
  59         return r;
  60 }
  61 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
  62 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
  63                                             unsigned long address,
  64                                             pmd_t *pmdp)
  65 {
  66         BUG();
  67         return 0;
  68 }
  69 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
  70 #endif
  71
  72 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
  73 int ptep_clear_flush_young(struct vm_area_struct *vma,
  74                            unsigned long address, pte_t *ptep);
  75 #endif
  76
  77 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
  78 int pmdp_clear_flush_young(struct vm_area_struct *vma,
  79                            unsigned long address, pmd_t *pmdp);
  80 #endif
  81
  82 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
  83 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
  84                                        unsigned long address,
  85                                        pte_t *ptep)
  86 {
  87         pte_t pte = *ptep;
  88         pte_clear(mm, address, ptep);
  89         return pte;
  90 }
  91 #endif
  92
  93 #ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR
  94 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  95 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
  96                                        unsigned long address,
  97                                        pmd_t *pmdp)
  98 {
  99         pmd_t pmd = *pmdp;
 100         pmd_clear(pmdp);
 101         return pmd;
 102 }
 103 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 104 #endif
 105
 106 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
 107 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
 108                                             unsigned long address, pte_t *ptep,
 109                                             int full)
 110 {
 111         pte_t pte;
 112         pte = ptep_get_and_clear(mm, address, ptep);
 113         return pte;
 114 }
 115 #endif
 116
 117 /*
 118  * Some architectures may be able to avoid expensive synchronization
 119  * primitives when modifications are made to PTE's which are already
 120  * not present, or in the process of an address space destruction.
 121  */
 122 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
 123 static inline void pte_clear_not_present_full(struct mm_struct *mm,
 124                                               unsigned long address,
 125                                               pte_t *ptep,
 126                                               int full)
 127 {
 128         pte_clear(mm, address, ptep);
 129 }
 130 #endif
 131
 132 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
 133 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
 134                               unsigned long address,
 135                               pte_t *ptep);
 136 #endif
 137
 138 #ifndef __HAVE_ARCH_PMDP_CLEAR_FLUSH
 139 extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
 140                               unsigned long address,
 141                               pmd_t *pmdp);
 142 #endif
 143
 144 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
 145 struct mm_struct;
 146 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
 147 {
 148         pte_t old_pte = *ptep;
 149         set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
 150 }
 151 #endif
 152
 153 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
 154 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 155 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
 156                                       unsigned long address, pmd_t *pmdp)
 157 {
 158         pmd_t old_pmd = *pmdp;
 159         set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
 160 }
 161 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
 162 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
 163                                       unsigned long address, pmd_t *pmdp)
 164 {
 165         BUG();
 166 }
 167 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 168 #endif
 169
 170 #ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH
 171 extern void pmdp_splitting_flush(struct vm_area_struct *vma,
 172                                  unsigned long address, pmd_t *pmdp);
 173 #endif
 174
 175 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
 176 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);
 177 #endif
 178
 179 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
 180 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm);
 181 #endif
 182
 183 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
 184 extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
 185                             pmd_t *pmdp);
 186 #endif
 187
 188 #ifndef __HAVE_ARCH_PTE_SAME
 189 static inline int pte_same(pte_t pte_a, pte_t pte_b)
 190 {
 191         return pte_val(pte_a) == pte_val(pte_b);
 192 }
 193 #endif
 194
 195 #ifndef __HAVE_ARCH_PMD_SAME
 196 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 197 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
 198 {
 199         return pmd_val(pmd_a) == pmd_val(pmd_b);
 200 }
 201 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
 202 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
 203 {
 204         BUG();
 205         return 0;
 206 }
 207 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 208 #endif
 209
 210 #ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
 211 #define page_test_and_clear_young(pfn) (0)
 212 #endif
 213
 214 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
 215 #define pgd_offset_gate(mm, addr)       pgd_offset(mm, addr)
 216 #endif
 217
 218 #ifndef __HAVE_ARCH_MOVE_PTE
 219 #define move_pte(pte, prot, old_addr, new_addr) (pte)
 220 #endif
 221
 222 #ifndef pte_accessible
 223 # define pte_accessible(pte)            ((void)(pte),1)
 224 #endif
 225
 226 #ifndef flush_tlb_fix_spurious_fault
 227 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
 228 #endif
 229
 230 #ifndef pgprot_noncached
 231 #define pgprot_noncached(prot)  (prot)
 232 #endif
 233
 234 #ifndef pgprot_writecombine
 235 #define pgprot_writecombine pgprot_noncached
 236 #endif
 237
 238 /*
 239  * When walking page tables, get the address of the next boundary,
 240  * or the end address of the range if that comes earlier.  Although no
 241  * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
 242  */
 243
 244 #define pgd_addr_end(addr, end)                                         \
 245 ({      unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK;  \
 246         (__boundary - 1 < (end) - 1)? __boundary: (end);                \
 247 })
 248
 249 #ifndef pud_addr_end
 250 #define pud_addr_end(addr, end)                                         \
 251 ({      unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK;      \
 252         (__boundary - 1 < (end) - 1)? __boundary: (end);                \
 253 })
 254 #endif
 255
 256 #ifndef pmd_addr_end
 257 #define pmd_addr_end(addr, end)                                         \
 258 ({      unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK;      \
 259         (__boundary - 1 < (end) - 1)? __boundary: (end);                \
 260 })
 261 #endif
 262
 263 /*
 264  * When walking page tables, we usually want to skip any p?d_none entries;
 265  * and any p?d_bad entries - reporting the error before resetting to none.
 266  * Do the tests inline, but report and clear the bad entry in mm/memory.c.
 267  */
 268 void pgd_clear_bad(pgd_t *);
 269 void pud_clear_bad(pud_t *);
 270 void pmd_clear_bad(pmd_t *);
 271
 272 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
 273 {
 274         if (pgd_none(*pgd))
 275                 return 1;
 276         if (unlikely(pgd_bad(*pgd))) {
 277                 pgd_clear_bad(pgd);
 278                 return 1;
 279         }
 280         return 0;
 281 }
 282
 283 static inline int pud_none_or_clear_bad(pud_t *pud)
 284 {
 285         if (pud_none(*pud))
 286                 return 1;
 287         if (unlikely(pud_bad(*pud))) {
 288                 pud_clear_bad(pud);
 289                 return 1;
 290         }
 291         return 0;
 292 }
 293
 294 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
 295 {
 296         if (pmd_none(*pmd))
 297                 return 1;
 298         if (unlikely(pmd_bad(*pmd))) {
 299                 pmd_clear_bad(pmd);
 300                 return 1;
 301         }
 302         return 0;
 303 }
 304
 305 static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
 306                                              unsigned long addr,
 307                                              pte_t *ptep)
 308 {
 309         /*
 310          * Get the current pte state, but zero it out to make it
 311          * non-present, preventing the hardware from asynchronously
 312          * updating it.
 313          */
 314         return ptep_get_and_clear(mm, addr, ptep);
 315 }
 316
 317 static inline void __ptep_modify_prot_commit(struct mm_struct *mm,
 318                                              unsigned long addr,
 319                                              pte_t *ptep, pte_t pte)
 320 {
 321         /*
 322          * The pte is non-present, so there's no hardware state to
 323          * preserve.
 324          */
 325         set_pte_at(mm, addr, ptep, pte);
 326 }
 327
 328 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
 329 /*
 330  * Start a pte protection read-modify-write transaction, which
 331  * protects against asynchronous hardware modifications to the pte.
 332  * The intention is not to prevent the hardware from making pte
 333  * updates, but to prevent any updates it may make from being lost.
 334  *
 335  * This does not protect against other software modifications of the
 336  * pte; the appropriate pte lock must be held over the transation.
 337  *
 338  * Note that this interface is intended to be batchable, meaning that
 339  * ptep_modify_prot_commit may not actually update the pte, but merely
 340  * queue the update to be done at some later time.  The update must be
 341  * actually committed before the pte lock is released, however.
 342  */
 343 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
 344                                            unsigned long addr,
 345                                            pte_t *ptep)
 346 {
 347         return __ptep_modify_prot_start(mm, addr, ptep);
 348 }
 349
 350 /*
 351  * Commit an update to a pte, leaving any hardware-controlled bits in
 352  * the PTE unmodified.
 353  */
 354 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
 355                                            unsigned long addr,
 356                                            pte_t *ptep, pte_t pte)
 357 {
 358         __ptep_modify_prot_commit(mm, addr, ptep, pte);
 359 }
 360 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
 361 #endif /* CONFIG_MMU */
 362
 363 /*
 364  * A facility to provide lazy MMU batching.  This allows PTE updates and
 365  * page invalidations to be delayed until a call to leave lazy MMU mode
 366  * is issued.  Some architectures may benefit from doing this, and it is
 367  * beneficial for both shadow and direct mode hypervisors, which may batch
 368  * the PTE updates which happen during this window.  Note that using this
 369  * interface requires that read hazards be removed from the code.  A read
 370  * hazard could result in the direct mode hypervisor case, since the actual
 371  * write to the page tables may not yet have taken place, so reads though
 372  * a raw PTE pointer after it has been modified are not guaranteed to be
 373  * up to date.  This mode can only be entered and left under the protection of
 374  * the page table locks for all page tables which may be modified.  In the UP
 375  * case, this is required so that preemption is disabled, and in the SMP case,
 376  * it must synchronize the delayed page table writes properly on other CPUs.
 377  */
 378 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
 379 #define arch_enter_lazy_mmu_mode()      do {} while (0)
 380 #define arch_leave_lazy_mmu_mode()      do {} while (0)
 381 #define arch_flush_lazy_mmu_mode()      do {} while (0)
 382 #endif
 383
 384 /*
 385  * A facility to provide batching of the reload of page tables and
 386  * other process state with the actual context switch code for
 387  * paravirtualized guests.  By convention, only one of the batched
 388  * update (lazy) modes (CPU, MMU) should be active at any given time,
 389  * entry should never be nested, and entry and exits should always be
 390  * paired.  This is for sanity of maintaining and reasoning about the
 391  * kernel code.  In this case, the exit (end of the context switch) is
 392  * in architecture-specific code, and so doesn't need a generic
 393  * definition.
 394  */
 395 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
 396 #define arch_start_context_switch(prev) do {} while (0)
 397 #endif
 398
 399 #ifndef __HAVE_PFNMAP_TRACKING
 400 /*
 401  * Interfaces that can be used by architecture code to keep track of
 402  * memory type of pfn mappings specified by the remap_pfn_range,
 403  * vm_insert_pfn.
 404  */
 405
 406 /*
 407  * track_pfn_remap is called when a _new_ pfn mapping is being established
 408  * by remap_pfn_range() for physical range indicated by pfn and size.
 409  */
 410 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
 411                                   unsigned long pfn, unsigned long addr,
 412                                   unsigned long size)
 413 {
 414         return 0;
 415 }
 416
 417 /*
 418  * track_pfn_insert is called when a _new_ single pfn is established
 419  * by vm_insert_pfn().
 420  */
 421 static inline int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
 422                                    unsigned long pfn)
 423 {
 424         return 0;
 425 }
 426
 427 /*
 428  * track_pfn_copy is called when vma that is covering the pfnmap gets
 429  * copied through copy_page_range().
 430  */
 431 static inline int track_pfn_copy(struct vm_area_struct *vma)
 432 {
 433         return 0;
 434 }
 435
 436 /*
 437  * untrack_pfn_vma is called while unmapping a pfnmap for a region.
 438  * untrack can be called for a specific region indicated by pfn and size or
 439  * can be for the entire vma (in which case pfn, size are zero).
 440  */
 441 static inline void untrack_pfn(struct vm_area_struct *vma,
 442                                unsigned long pfn, unsigned long size)
 443 {
 444 }
 445 #else
 446 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
 447                            unsigned long pfn, unsigned long addr,
 448                            unsigned long size);
 449 extern int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
 450                             unsigned long pfn);
 451 extern int track_pfn_copy(struct vm_area_struct *vma);
 452 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
 453                         unsigned long size);
 454 #endif
 455
 456 #ifdef __HAVE_COLOR_ZERO_PAGE
 457 static inline int is_zero_pfn(unsigned long pfn)
 458 {
 459         extern unsigned long zero_pfn;
 460         unsigned long offset_from_zero_pfn = pfn - zero_pfn;
 461         return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
 462 }
 463
 464 #define my_zero_pfn(addr)       page_to_pfn(ZERO_PAGE(addr))
 465
 466 #else
 467 static inline int is_zero_pfn(unsigned long pfn)
 468 {
 469         extern unsigned long zero_pfn;
 470         return pfn == zero_pfn;
 471 }
 472
 473 static inline unsigned long my_zero_pfn(unsigned long addr)
 474 {
 475         extern unsigned long zero_pfn;
 476         return zero_pfn;
 477 }
 478 #endif
 479
 480 #ifdef CONFIG_MMU
 481
 482 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
 483 static inline int pmd_trans_huge(pmd_t pmd)
 484 {
 485         return 0;
 486 }
 487 static inline int pmd_trans_splitting(pmd_t pmd)
 488 {
 489         return 0;
 490 }
 491 #ifndef __HAVE_ARCH_PMD_WRITE
 492 static inline int pmd_write(pmd_t pmd)
 493 {
 494         BUG();
 495         return 0;
 496 }
 497 #endif /* __HAVE_ARCH_PMD_WRITE */
 498 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 499
 500 #ifndef pmd_read_atomic
 501 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
 502 {
 503         /*
 504          * Depend on compiler for an atomic pmd read. NOTE: this is
 505          * only going to work, if the pmdval_t isn't larger than
 506          * an unsigned long.
 507          */
 508         return *pmdp;
 509 }
 510 #endif
 511
 512 /*
 513  * This function is meant to be used by sites walking pagetables with
 514  * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
 515  * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
 516  * into a null pmd and the transhuge page fault can convert a null pmd
 517  * into an hugepmd or into a regular pmd (if the hugepage allocation
 518  * fails). While holding the mmap_sem in read mode the pmd becomes
 519  * stable and stops changing under us only if it's not null and not a
 520  * transhuge pmd. When those races occurs and this function makes a
 521  * difference vs the standard pmd_none_or_clear_bad, the result is
 522  * undefined so behaving like if the pmd was none is safe (because it
 523  * can return none anyway). The compiler level barrier() is critically
 524  * important to compute the two checks atomically on the same pmdval.
 525  *
 526  * For 32bit kernels with a 64bit large pmd_t this automatically takes
 527  * care of reading the pmd atomically to avoid SMP race conditions
 528  * against pmd_populate() when the mmap_sem is hold for reading by the
 529  * caller (a special atomic read not done by "gcc" as in the generic
 530  * version above, is also needed when THP is disabled because the page
 531  * fault can populate the pmd from under us).
 532  */
 533 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
 534 {
 535         pmd_t pmdval = pmd_read_atomic(pmd);
 536         /*
 537          * The barrier will stabilize the pmdval in a register or on
 538          * the stack so that it will stop changing under the code.
 539          *
 540          * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
 541          * pmd_read_atomic is allowed to return a not atomic pmdval
 542          * (for example pointing to an hugepage that has never been
 543          * mapped in the pmd). The below checks will only care about
 544          * the low part of the pmd with 32bit PAE x86 anyway, with the
 545          * exception of pmd_none(). So the important thing is that if
 546          * the low part of the pmd is found null, the high part will
 547          * be also null or the pmd_none() check below would be
 548          * confused.
 549          */
 550 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 551         barrier();
 552 #endif
 553         if (pmd_none(pmdval))
 554                 return 1;
 555         if (unlikely(pmd_bad(pmdval))) {
 556                 if (!pmd_trans_huge(pmdval))
 557                         pmd_clear_bad(pmd);
 558                 return 1;
 559         }
 560         return 0;
 561 }
 562
 563 /*
 564  * This is a noop if Transparent Hugepage Support is not built into
 565  * the kernel. Otherwise it is equivalent to
 566  * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
 567  * places that already verified the pmd is not none and they want to
 568  * walk ptes while holding the mmap sem in read mode (write mode don't
 569  * need this). If THP is not enabled, the pmd can't go away under the
 570  * code even if MADV_DONTNEED runs, but if THP is enabled we need to
 571  * run a pmd_trans_unstable before walking the ptes after
 572  * split_huge_page_pmd returns (because it may have run when the pmd
 573  * become null, but then a page fault can map in a THP and not a
 574  * regular page).
 575  */
 576 static inline int pmd_trans_unstable(pmd_t *pmd)
 577 {
 578 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 579         return pmd_none_or_trans_huge_or_clear_bad(pmd);
 580 #else
 581         return 0;
 582 #endif
 583 }
 584
 585 #ifdef CONFIG_NUMA_BALANCING
 586 #ifdef CONFIG_ARCH_USES_NUMA_PROT_NONE
 587 /*
 588  * _PAGE_NUMA works identical to _PAGE_PROTNONE (it's actually the
 589  * same bit too). It's set only when _PAGE_PRESET is not set and it's
 590  * never set if _PAGE_PRESENT is set.
 591  *
 592  * pte/pmd_present() returns true if pte/pmd_numa returns true. Page
 593  * fault triggers on those regions if pte/pmd_numa returns true
 594  * (because _PAGE_PRESENT is not set).
 595  */
 596 #ifndef pte_numa
 597 static inline int pte_numa(pte_t pte)
 598 {
 599         return (pte_flags(pte) &
 600                 (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA;
 601 }
 602 #endif
 603
 604 #ifndef pmd_numa
 605 static inline int pmd_numa(pmd_t pmd)
 606 {
 607         return (pmd_flags(pmd) &
 608                 (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA;
 609 }
 610 #endif
 611
 612 /*
 613  * pte/pmd_mknuma sets the _PAGE_ACCESSED bitflag automatically
 614  * because they're called by the NUMA hinting minor page fault. If we
 615  * wouldn't set the _PAGE_ACCESSED bitflag here, the TLB miss handler
 616  * would be forced to set it later while filling the TLB after we
 617  * return to userland. That would trigger a second write to memory
 618  * that we optimize away by setting _PAGE_ACCESSED here.
 619  */
 620 #ifndef pte_mknonnuma
 621 static inline pte_t pte_mknonnuma(pte_t pte)
 622 {
 623         pte = pte_clear_flags(pte, _PAGE_NUMA);
 624         return pte_set_flags(pte, _PAGE_PRESENT|_PAGE_ACCESSED);
 625 }
 626 #endif
 627
 628 #ifndef pmd_mknonnuma
 629 static inline pmd_t pmd_mknonnuma(pmd_t pmd)
 630 {
 631         pmd = pmd_clear_flags(pmd, _PAGE_NUMA);
 632         return pmd_set_flags(pmd, _PAGE_PRESENT|_PAGE_ACCESSED);
 633 }
 634 #endif
 635
 636 #ifndef pte_mknuma
 637 static inline pte_t pte_mknuma(pte_t pte)
 638 {
 639         pte = pte_set_flags(pte, _PAGE_NUMA);
 640         return pte_clear_flags(pte, _PAGE_PRESENT);
 641 }
 642 #endif
 643
 644 #ifndef pmd_mknuma
 645 static inline pmd_t pmd_mknuma(pmd_t pmd)
 646 {
 647         pmd = pmd_set_flags(pmd, _PAGE_NUMA);
 648         return pmd_clear_flags(pmd, _PAGE_PRESENT);
 649 }
 650 #endif
 651 #else
 652 extern int pte_numa(pte_t pte);
 653 extern int pmd_numa(pmd_t pmd);
 654 extern pte_t pte_mknonnuma(pte_t pte);
 655 extern pmd_t pmd_mknonnuma(pmd_t pmd);
 656 extern pte_t pte_mknuma(pte_t pte);
 657 extern pmd_t pmd_mknuma(pmd_t pmd);
 658 #endif /* CONFIG_ARCH_USES_NUMA_PROT_NONE */
 659 #else
 660 static inline int pmd_numa(pmd_t pmd)
 661 {
 662         return 0;
 663 }
 664
 665 static inline int pte_numa(pte_t pte)
 666 {
 667         return 0;
 668 }
 669
 670 static inline pte_t pte_mknonnuma(pte_t pte)
 671 {
 672         return pte;
 673 }
 674
 675 static inline pmd_t pmd_mknonnuma(pmd_t pmd)
 676 {
 677         return pmd;
 678 }
 679
 680 static inline pte_t pte_mknuma(pte_t pte)
 681 {
 682         return pte;
 683 }
 684
 685 static inline pmd_t pmd_mknuma(pmd_t pmd)
 686 {
 687         return pmd;
 688 }
 689 #endif /* CONFIG_NUMA_BALANCING */
 690
 691 #endif /* CONFIG_MMU */
 692
 693 #endif /* !__ASSEMBLY__ */
 694
 695 #endif /* _ASM_GENERIC_PGTABLE_H */