2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 * Based on EP93xx wdt driver
10 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12 #include <linux/module.h>
14 #include <linux/miscdevice.h>
15 #include <linux/watchdog.h>
16 #include <linux/platform_device.h>
17 #include <linux/uaccess.h>
18 #include <linux/clk.h>
23 /* Section 3.4 of the datasheet
24 * The password sequence protects the WDT control register from unintended
25 * write actions, which might cause malfunction of the WDT.
27 * essentially the following two magic passwords need to be written to allow
28 * IO access to the WDT core
30 #define LTQ_WDT_PW1 0x00BE0000
31 #define LTQ_WDT_PW2 0x00DC0000
33 #define LTQ_WDT_CR 0x0 /* watchdog control register */
34 #define LTQ_WDT_SR 0x8 /* watchdog status register */
36 #define LTQ_WDT_SR_EN (0x1 << 31) /* enable bit */
37 #define LTQ_WDT_SR_PWD (0x3 << 26) /* turn on power */
38 #define LTQ_WDT_SR_CLKDIV (0x3 << 24) /* turn on clock and set */
39 /* divider to 0x40000 */
40 #define LTQ_WDT_DIVIDER 0x40000
41 #define LTQ_MAX_TIMEOUT ((1 << 16) - 1) /* the reload field is 16 bit */
43 static bool nowayout
= WATCHDOG_NOWAYOUT
;
45 static void __iomem
*ltq_wdt_membase
;
46 static unsigned long ltq_io_region_clk_rate
;
48 static unsigned long ltq_wdt_bootstatus
;
49 static unsigned long ltq_wdt_in_use
;
50 static int ltq_wdt_timeout
= 30;
51 static int ltq_wdt_ok_to_close
;
56 unsigned long int timeout
= ltq_wdt_timeout
*
57 (ltq_io_region_clk_rate
/ LTQ_WDT_DIVIDER
) + 0x1000;
58 if (timeout
> LTQ_MAX_TIMEOUT
)
59 timeout
= LTQ_MAX_TIMEOUT
;
61 /* write the first password magic */
62 ltq_w32(LTQ_WDT_PW1
, ltq_wdt_membase
+ LTQ_WDT_CR
);
63 /* write the second magic plus the configuration and new timeout */
64 ltq_w32(LTQ_WDT_SR_EN
| LTQ_WDT_SR_PWD
| LTQ_WDT_SR_CLKDIV
|
65 LTQ_WDT_PW2
| timeout
, ltq_wdt_membase
+ LTQ_WDT_CR
);
71 /* write the first password magic */
72 ltq_w32(LTQ_WDT_PW1
, ltq_wdt_membase
+ LTQ_WDT_CR
);
73 /* write the second password magic with no config
74 * this turns the watchdog off
76 ltq_w32(LTQ_WDT_PW2
, ltq_wdt_membase
+ LTQ_WDT_CR
);
80 ltq_wdt_write(struct file
*file
, const char __user
*data
,
81 size_t len
, loff_t
*ppos
)
87 ltq_wdt_ok_to_close
= 0;
88 for (i
= 0; i
!= len
; i
++) {
91 if (get_user(c
, data
+ i
))
94 ltq_wdt_ok_to_close
= 1;
96 ltq_wdt_ok_to_close
= 0;
105 static struct watchdog_info ident
= {
106 .options
= WDIOF_MAGICCLOSE
| WDIOF_SETTIMEOUT
| WDIOF_KEEPALIVEPING
|
108 .identity
= "ltq_wdt",
112 ltq_wdt_ioctl(struct file
*file
,
113 unsigned int cmd
, unsigned long arg
)
118 case WDIOC_GETSUPPORT
:
119 ret
= copy_to_user((struct watchdog_info __user
*)arg
, &ident
,
120 sizeof(ident
)) ? -EFAULT
: 0;
123 case WDIOC_GETBOOTSTATUS
:
124 ret
= put_user(ltq_wdt_bootstatus
, (int __user
*)arg
);
127 case WDIOC_GETSTATUS
:
128 ret
= put_user(0, (int __user
*)arg
);
131 case WDIOC_SETTIMEOUT
:
132 ret
= get_user(ltq_wdt_timeout
, (int __user
*)arg
);
135 /* intentional drop through */
136 case WDIOC_GETTIMEOUT
:
137 ret
= put_user(ltq_wdt_timeout
, (int __user
*)arg
);
140 case WDIOC_KEEPALIVE
:
149 ltq_wdt_open(struct inode
*inode
, struct file
*file
)
151 if (test_and_set_bit(0, <q_wdt_in_use
))
156 return nonseekable_open(inode
, file
);
160 ltq_wdt_release(struct inode
*inode
, struct file
*file
)
162 if (ltq_wdt_ok_to_close
)
165 pr_err("watchdog closed without warning\n");
166 ltq_wdt_ok_to_close
= 0;
167 clear_bit(0, <q_wdt_in_use
);
172 static const struct file_operations ltq_wdt_fops
= {
173 .owner
= THIS_MODULE
,
174 .write
= ltq_wdt_write
,
175 .unlocked_ioctl
= ltq_wdt_ioctl
,
176 .open
= ltq_wdt_open
,
177 .release
= ltq_wdt_release
,
181 static struct miscdevice ltq_wdt_miscdev
= {
182 .minor
= WATCHDOG_MINOR
,
184 .fops
= <q_wdt_fops
,
188 ltq_wdt_probe(struct platform_device
*pdev
)
190 struct resource
*res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
194 dev_err(&pdev
->dev
, "cannot obtain I/O memory region");
197 res
= devm_request_mem_region(&pdev
->dev
, res
->start
,
198 resource_size(res
), dev_name(&pdev
->dev
));
200 dev_err(&pdev
->dev
, "cannot request I/O memory region");
203 ltq_wdt_membase
= devm_ioremap_nocache(&pdev
->dev
, res
->start
,
205 if (!ltq_wdt_membase
) {
206 dev_err(&pdev
->dev
, "cannot remap I/O memory region\n");
210 /* we do not need to enable the clock as it is always running */
211 clk
= clk_get(&pdev
->dev
, "io");
213 ltq_io_region_clk_rate
= clk_get_rate(clk
);
216 if (ltq_reset_cause() == LTQ_RST_CAUSE_WDTRST
)
217 ltq_wdt_bootstatus
= WDIOF_CARDRESET
;
219 return misc_register(<q_wdt_miscdev
);
223 ltq_wdt_remove(struct platform_device
*pdev
)
225 misc_deregister(<q_wdt_miscdev
);
231 static struct platform_driver ltq_wdt_driver
= {
232 .remove
= __devexit_p(ltq_wdt_remove
),
235 .owner
= THIS_MODULE
,
242 return platform_driver_probe(<q_wdt_driver
, ltq_wdt_probe
);
248 return platform_driver_unregister(<q_wdt_driver
);
251 module_init(init_ltq_wdt
);
252 module_exit(exit_ltq_wdt
);
254 module_param(nowayout
, bool, 0);
255 MODULE_PARM_DESC(nowayout
, "Watchdog cannot be stopped once started");
257 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
258 MODULE_DESCRIPTION("Lantiq SoC Watchdog");
259 MODULE_LICENSE("GPL");
260 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR
);