2 * TUSB6010 USB 2.0 OTG Dual Role controller
4 * Copyright (C) 2006 Nokia Corporation
5 * Tony Lindgren <tony@atomide.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 * - Driver assumes that interface to external host (main CPU) is
13 * configured for NOR FLASH interface instead of VLYNQ serial
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/errno.h>
20 #include <linux/init.h>
21 #include <linux/prefetch.h>
22 #include <linux/usb.h>
23 #include <linux/irq.h>
24 #include <linux/platform_device.h>
25 #include <linux/dma-mapping.h>
27 #include "musb_core.h"
29 struct tusb6010_glue
{
31 struct platform_device
*musb
;
34 static void tusb_musb_set_vbus(struct musb
*musb
, int is_on
);
36 #define TUSB_REV_MAJOR(reg_val) ((reg_val >> 4) & 0xf)
37 #define TUSB_REV_MINOR(reg_val) (reg_val & 0xf)
40 * Checks the revision. We need to use the DMA register as 3.0 does not
41 * have correct versions for TUSB_PRCM_REV or TUSB_INT_CTRL_REV.
43 u8
tusb_get_revision(struct musb
*musb
)
45 void __iomem
*tbase
= musb
->ctrl_base
;
49 rev
= musb_readl(tbase
, TUSB_DMA_CTRL_REV
) & 0xff;
50 if (TUSB_REV_MAJOR(rev
) == 3) {
51 die_id
= TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase
,
53 if (die_id
>= TUSB_DIDR1_HI_REV_31
)
59 EXPORT_SYMBOL_GPL(tusb_get_revision
);
61 static int tusb_print_revision(struct musb
*musb
)
63 void __iomem
*tbase
= musb
->ctrl_base
;
66 rev
= tusb_get_revision(musb
);
68 pr_info("tusb: %s%i.%i %s%i.%i %s%i.%i %s%i.%i %s%i %s%i.%i\n",
70 TUSB_REV_MAJOR(musb_readl(tbase
, TUSB_PRCM_REV
)),
71 TUSB_REV_MINOR(musb_readl(tbase
, TUSB_PRCM_REV
)),
73 TUSB_REV_MAJOR(musb_readl(tbase
, TUSB_INT_CTRL_REV
)),
74 TUSB_REV_MINOR(musb_readl(tbase
, TUSB_INT_CTRL_REV
)),
76 TUSB_REV_MAJOR(musb_readl(tbase
, TUSB_GPIO_REV
)),
77 TUSB_REV_MINOR(musb_readl(tbase
, TUSB_GPIO_REV
)),
79 TUSB_REV_MAJOR(musb_readl(tbase
, TUSB_DMA_CTRL_REV
)),
80 TUSB_REV_MINOR(musb_readl(tbase
, TUSB_DMA_CTRL_REV
)),
82 TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase
, TUSB_DIDR1_HI
)),
84 TUSB_REV_MAJOR(rev
), TUSB_REV_MINOR(rev
));
86 return tusb_get_revision(musb
);
89 #define WBUS_QUIRK_MASK (TUSB_PHY_OTG_CTRL_TESTM2 | TUSB_PHY_OTG_CTRL_TESTM1 \
90 | TUSB_PHY_OTG_CTRL_TESTM0)
93 * Workaround for spontaneous WBUS wake-up issue #2 for tusb3.0.
94 * Disables power detection in PHY for the duration of idle.
96 static void tusb_wbus_quirk(struct musb
*musb
, int enabled
)
98 void __iomem
*tbase
= musb
->ctrl_base
;
99 static u32 phy_otg_ctrl
, phy_otg_ena
;
103 phy_otg_ctrl
= musb_readl(tbase
, TUSB_PHY_OTG_CTRL
);
104 phy_otg_ena
= musb_readl(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
);
105 tmp
= TUSB_PHY_OTG_CTRL_WRPROTECT
106 | phy_otg_ena
| WBUS_QUIRK_MASK
;
107 musb_writel(tbase
, TUSB_PHY_OTG_CTRL
, tmp
);
108 tmp
= phy_otg_ena
& ~WBUS_QUIRK_MASK
;
109 tmp
|= TUSB_PHY_OTG_CTRL_WRPROTECT
| TUSB_PHY_OTG_CTRL_TESTM2
;
110 musb_writel(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
, tmp
);
111 dev_dbg(musb
->controller
, "Enabled tusb wbus quirk ctrl %08x ena %08x\n",
112 musb_readl(tbase
, TUSB_PHY_OTG_CTRL
),
113 musb_readl(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
));
114 } else if (musb_readl(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
)
115 & TUSB_PHY_OTG_CTRL_TESTM2
) {
116 tmp
= TUSB_PHY_OTG_CTRL_WRPROTECT
| phy_otg_ctrl
;
117 musb_writel(tbase
, TUSB_PHY_OTG_CTRL
, tmp
);
118 tmp
= TUSB_PHY_OTG_CTRL_WRPROTECT
| phy_otg_ena
;
119 musb_writel(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
, tmp
);
120 dev_dbg(musb
->controller
, "Disabled tusb wbus quirk ctrl %08x ena %08x\n",
121 musb_readl(tbase
, TUSB_PHY_OTG_CTRL
),
122 musb_readl(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
));
129 * TUSB 6010 may use a parallel bus that doesn't support byte ops;
130 * so both loading and unloading FIFOs need explicit byte counts.
134 tusb_fifo_write_unaligned(void __iomem
*fifo
, const u8
*buf
, u16 len
)
140 for (i
= 0; i
< (len
>> 2); i
++) {
141 memcpy(&val
, buf
, 4);
142 musb_writel(fifo
, 0, val
);
148 /* Write the rest 1 - 3 bytes to FIFO */
149 memcpy(&val
, buf
, len
);
150 musb_writel(fifo
, 0, val
);
154 static inline void tusb_fifo_read_unaligned(void __iomem
*fifo
,
155 void __iomem
*buf
, u16 len
)
161 for (i
= 0; i
< (len
>> 2); i
++) {
162 val
= musb_readl(fifo
, 0);
163 memcpy(buf
, &val
, 4);
169 /* Read the rest 1 - 3 bytes from FIFO */
170 val
= musb_readl(fifo
, 0);
171 memcpy(buf
, &val
, len
);
175 void musb_write_fifo(struct musb_hw_ep
*hw_ep
, u16 len
, const u8
*buf
)
177 struct musb
*musb
= hw_ep
->musb
;
178 void __iomem
*ep_conf
= hw_ep
->conf
;
179 void __iomem
*fifo
= hw_ep
->fifo
;
180 u8 epnum
= hw_ep
->epnum
;
184 dev_dbg(musb
->controller
, "%cX ep%d fifo %p count %d buf %p\n",
185 'T', epnum
, fifo
, len
, buf
);
188 musb_writel(ep_conf
, TUSB_EP_TX_OFFSET
,
189 TUSB_EP_CONFIG_XFR_SIZE(len
));
191 musb_writel(ep_conf
, 0, TUSB_EP0_CONFIG_DIR_TX
|
192 TUSB_EP0_CONFIG_XFR_SIZE(len
));
194 if (likely((0x01 & (unsigned long) buf
) == 0)) {
196 /* Best case is 32bit-aligned destination address */
197 if ((0x02 & (unsigned long) buf
) == 0) {
199 writesl(fifo
, buf
, len
>> 2);
200 buf
+= (len
& ~0x03);
208 /* Cannot use writesw, fifo is 32-bit */
209 for (i
= 0; i
< (len
>> 2); i
++) {
210 val
= (u32
)(*(u16
*)buf
);
212 val
|= (*(u16
*)buf
) << 16;
214 musb_writel(fifo
, 0, val
);
222 tusb_fifo_write_unaligned(fifo
, buf
, len
);
225 void musb_read_fifo(struct musb_hw_ep
*hw_ep
, u16 len
, u8
*buf
)
227 struct musb
*musb
= hw_ep
->musb
;
228 void __iomem
*ep_conf
= hw_ep
->conf
;
229 void __iomem
*fifo
= hw_ep
->fifo
;
230 u8 epnum
= hw_ep
->epnum
;
232 dev_dbg(musb
->controller
, "%cX ep%d fifo %p count %d buf %p\n",
233 'R', epnum
, fifo
, len
, buf
);
236 musb_writel(ep_conf
, TUSB_EP_RX_OFFSET
,
237 TUSB_EP_CONFIG_XFR_SIZE(len
));
239 musb_writel(ep_conf
, 0, TUSB_EP0_CONFIG_XFR_SIZE(len
));
241 if (likely((0x01 & (unsigned long) buf
) == 0)) {
243 /* Best case is 32bit-aligned destination address */
244 if ((0x02 & (unsigned long) buf
) == 0) {
246 readsl(fifo
, buf
, len
>> 2);
247 buf
+= (len
& ~0x03);
255 /* Cannot use readsw, fifo is 32-bit */
256 for (i
= 0; i
< (len
>> 2); i
++) {
257 val
= musb_readl(fifo
, 0);
258 *(u16
*)buf
= (u16
)(val
& 0xffff);
260 *(u16
*)buf
= (u16
)(val
>> 16);
269 tusb_fifo_read_unaligned(fifo
, buf
, len
);
272 static struct musb
*the_musb
;
274 /* This is used by gadget drivers, and OTG transceiver logic, allowing
275 * at most mA current to be drawn from VBUS during a Default-B session
276 * (that is, while VBUS exceeds 4.4V). In Default-A (including pure host
277 * mode), or low power Default-B sessions, something else supplies power.
278 * Caller must take care of locking.
280 static int tusb_draw_power(struct usb_phy
*x
, unsigned mA
)
282 struct musb
*musb
= the_musb
;
283 void __iomem
*tbase
= musb
->ctrl_base
;
286 /* tps65030 seems to consume max 100mA, with maybe 60mA available
287 * (measured on one board) for things other than tps and tusb.
289 * Boards sharing the CPU clock with CLKIN will need to prevent
290 * certain idle sleep states while the USB link is active.
292 * REVISIT we could use VBUS to supply only _one_ of { 1.5V, 3.3V }.
293 * The actual current usage would be very board-specific. For now,
294 * it's simpler to just use an aggregate (also board-specific).
296 if (x
->otg
->default_a
|| mA
< (musb
->min_power
<< 1))
299 reg
= musb_readl(tbase
, TUSB_PRCM_MNGMT
);
301 musb
->is_bus_powered
= 1;
302 reg
|= TUSB_PRCM_MNGMT_15_SW_EN
| TUSB_PRCM_MNGMT_33_SW_EN
;
304 musb
->is_bus_powered
= 0;
305 reg
&= ~(TUSB_PRCM_MNGMT_15_SW_EN
| TUSB_PRCM_MNGMT_33_SW_EN
);
307 musb_writel(tbase
, TUSB_PRCM_MNGMT
, reg
);
309 dev_dbg(musb
->controller
, "draw max %d mA VBUS\n", mA
);
313 /* workaround for issue 13: change clock during chip idle
314 * (to be fixed in rev3 silicon) ... symptoms include disconnect
315 * or looping suspend/resume cycles
317 static void tusb_set_clock_source(struct musb
*musb
, unsigned mode
)
319 void __iomem
*tbase
= musb
->ctrl_base
;
322 reg
= musb_readl(tbase
, TUSB_PRCM_CONF
);
323 reg
&= ~TUSB_PRCM_CONF_SYS_CLKSEL(0x3);
325 /* 0 = refclk (clkin, XI)
326 * 1 = PHY 60 MHz (internal PLL)
331 reg
|= TUSB_PRCM_CONF_SYS_CLKSEL(mode
& 0x3);
333 musb_writel(tbase
, TUSB_PRCM_CONF
, reg
);
335 /* FIXME tusb6010_platform_retime(mode == 0); */
339 * Idle TUSB6010 until next wake-up event; NOR access always wakes.
340 * Other code ensures that we idle unless we're connected _and_ the
341 * USB link is not suspended ... and tells us the relevant wakeup
342 * events. SW_EN for voltage is handled separately.
344 static void tusb_allow_idle(struct musb
*musb
, u32 wakeup_enables
)
346 void __iomem
*tbase
= musb
->ctrl_base
;
349 if ((wakeup_enables
& TUSB_PRCM_WBUS
)
350 && (tusb_get_revision(musb
) == TUSB_REV_30
))
351 tusb_wbus_quirk(musb
, 1);
353 tusb_set_clock_source(musb
, 0);
355 wakeup_enables
|= TUSB_PRCM_WNORCS
;
356 musb_writel(tbase
, TUSB_PRCM_WAKEUP_MASK
, ~wakeup_enables
);
358 /* REVISIT writeup of WID implies that if WID set and ID is grounded,
359 * TUSB_PHY_OTG_CTRL.TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP must be cleared.
360 * Presumably that's mostly to save power, hence WID is immaterial ...
363 reg
= musb_readl(tbase
, TUSB_PRCM_MNGMT
);
364 /* issue 4: when driving vbus, use hipower (vbus_det) comparator */
365 if (is_host_active(musb
)) {
366 reg
|= TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN
;
367 reg
&= ~TUSB_PRCM_MNGMT_OTG_SESS_END_EN
;
369 reg
|= TUSB_PRCM_MNGMT_OTG_SESS_END_EN
;
370 reg
&= ~TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN
;
372 reg
|= TUSB_PRCM_MNGMT_PM_IDLE
| TUSB_PRCM_MNGMT_DEV_IDLE
;
373 musb_writel(tbase
, TUSB_PRCM_MNGMT
, reg
);
375 dev_dbg(musb
->controller
, "idle, wake on %02x\n", wakeup_enables
);
379 * Updates cable VBUS status. Caller must take care of locking.
381 static int tusb_musb_vbus_status(struct musb
*musb
)
383 void __iomem
*tbase
= musb
->ctrl_base
;
384 u32 otg_stat
, prcm_mngmt
;
387 otg_stat
= musb_readl(tbase
, TUSB_DEV_OTG_STAT
);
388 prcm_mngmt
= musb_readl(tbase
, TUSB_PRCM_MNGMT
);
390 /* Temporarily enable VBUS detection if it was disabled for
391 * suspend mode. Unless it's enabled otg_stat and devctl will
392 * not show correct VBUS state.
394 if (!(prcm_mngmt
& TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN
)) {
395 u32 tmp
= prcm_mngmt
;
396 tmp
|= TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN
;
397 musb_writel(tbase
, TUSB_PRCM_MNGMT
, tmp
);
398 otg_stat
= musb_readl(tbase
, TUSB_DEV_OTG_STAT
);
399 musb_writel(tbase
, TUSB_PRCM_MNGMT
, prcm_mngmt
);
402 if (otg_stat
& TUSB_DEV_OTG_STAT_VBUS_VALID
)
408 static struct timer_list musb_idle_timer
;
410 static void musb_do_idle(unsigned long _musb
)
412 struct musb
*musb
= (void *)_musb
;
415 spin_lock_irqsave(&musb
->lock
, flags
);
417 switch (musb
->xceiv
->state
) {
418 case OTG_STATE_A_WAIT_BCON
:
419 if ((musb
->a_wait_bcon
!= 0)
420 && (musb
->idle_timeout
== 0
421 || time_after(jiffies
, musb
->idle_timeout
))) {
422 dev_dbg(musb
->controller
, "Nothing connected %s, turning off VBUS\n",
423 otg_state_string(musb
->xceiv
->state
));
426 case OTG_STATE_A_IDLE
:
427 tusb_musb_set_vbus(musb
, 0);
432 if (!musb
->is_active
) {
435 /* wait until khubd handles port change status */
436 if (is_host_active(musb
) && (musb
->port1_status
>> 16))
439 if (is_peripheral_enabled(musb
) && !musb
->gadget_driver
) {
442 wakeups
= TUSB_PRCM_WHOSTDISCON
445 if (is_otg_enabled(musb
))
446 wakeups
|= TUSB_PRCM_WID
;
448 tusb_allow_idle(musb
, wakeups
);
451 spin_unlock_irqrestore(&musb
->lock
, flags
);
455 * Maybe put TUSB6010 into idle mode mode depending on USB link status,
456 * like "disconnected" or "suspended". We'll be woken out of it by
457 * connect, resume, or disconnect.
459 * Needs to be called as the last function everywhere where there is
460 * register access to TUSB6010 because of NOR flash wake-up.
461 * Caller should own controller spinlock.
463 * Delay because peripheral enables D+ pullup 3msec after SE0, and
464 * we don't want to treat that full speed J as a wakeup event.
465 * ... peripherals must draw only suspend current after 10 msec.
467 static void tusb_musb_try_idle(struct musb
*musb
, unsigned long timeout
)
469 unsigned long default_timeout
= jiffies
+ msecs_to_jiffies(3);
470 static unsigned long last_timer
;
473 timeout
= default_timeout
;
475 /* Never idle if active, or when VBUS timeout is not set as host */
476 if (musb
->is_active
|| ((musb
->a_wait_bcon
== 0)
477 && (musb
->xceiv
->state
== OTG_STATE_A_WAIT_BCON
))) {
478 dev_dbg(musb
->controller
, "%s active, deleting timer\n",
479 otg_state_string(musb
->xceiv
->state
));
480 del_timer(&musb_idle_timer
);
481 last_timer
= jiffies
;
485 if (time_after(last_timer
, timeout
)) {
486 if (!timer_pending(&musb_idle_timer
))
487 last_timer
= timeout
;
489 dev_dbg(musb
->controller
, "Longer idle timer already pending, ignoring\n");
493 last_timer
= timeout
;
495 dev_dbg(musb
->controller
, "%s inactive, for idle timer for %lu ms\n",
496 otg_state_string(musb
->xceiv
->state
),
497 (unsigned long)jiffies_to_msecs(timeout
- jiffies
));
498 mod_timer(&musb_idle_timer
, timeout
);
501 /* ticks of 60 MHz clock */
502 #define DEVCLOCK 60000000
503 #define OTG_TIMER_MS(msecs) ((msecs) \
504 ? (TUSB_DEV_OTG_TIMER_VAL((DEVCLOCK/1000)*(msecs)) \
505 | TUSB_DEV_OTG_TIMER_ENABLE) \
508 static void tusb_musb_set_vbus(struct musb
*musb
, int is_on
)
510 void __iomem
*tbase
= musb
->ctrl_base
;
511 u32 conf
, prcm
, timer
;
513 struct usb_otg
*otg
= musb
->xceiv
->otg
;
515 /* HDRC controls CPEN, but beware current surges during device
516 * connect. They can trigger transient overcurrent conditions
517 * that must be ignored.
520 prcm
= musb_readl(tbase
, TUSB_PRCM_MNGMT
);
521 conf
= musb_readl(tbase
, TUSB_DEV_CONF
);
522 devctl
= musb_readb(musb
->mregs
, MUSB_DEVCTL
);
525 timer
= OTG_TIMER_MS(OTG_TIME_A_WAIT_VRISE
);
527 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VRISE
;
528 devctl
|= MUSB_DEVCTL_SESSION
;
530 conf
|= TUSB_DEV_CONF_USB_HOST_MODE
;
537 /* If ID pin is grounded, we want to be a_idle */
538 otg_stat
= musb_readl(tbase
, TUSB_DEV_OTG_STAT
);
539 if (!(otg_stat
& TUSB_DEV_OTG_STAT_ID_STATUS
)) {
540 switch (musb
->xceiv
->state
) {
541 case OTG_STATE_A_WAIT_VRISE
:
542 case OTG_STATE_A_WAIT_BCON
:
543 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VFALL
;
545 case OTG_STATE_A_WAIT_VFALL
:
546 musb
->xceiv
->state
= OTG_STATE_A_IDLE
;
549 musb
->xceiv
->state
= OTG_STATE_A_IDLE
;
557 musb
->xceiv
->state
= OTG_STATE_B_IDLE
;
561 devctl
&= ~MUSB_DEVCTL_SESSION
;
562 conf
&= ~TUSB_DEV_CONF_USB_HOST_MODE
;
564 prcm
&= ~(TUSB_PRCM_MNGMT_15_SW_EN
| TUSB_PRCM_MNGMT_33_SW_EN
);
566 musb_writel(tbase
, TUSB_PRCM_MNGMT
, prcm
);
567 musb_writel(tbase
, TUSB_DEV_OTG_TIMER
, timer
);
568 musb_writel(tbase
, TUSB_DEV_CONF
, conf
);
569 musb_writeb(musb
->mregs
, MUSB_DEVCTL
, devctl
);
571 dev_dbg(musb
->controller
, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n",
572 otg_state_string(musb
->xceiv
->state
),
573 musb_readb(musb
->mregs
, MUSB_DEVCTL
),
574 musb_readl(tbase
, TUSB_DEV_OTG_STAT
),
579 * Sets the mode to OTG, peripheral or host by changing the ID detection.
580 * Caller must take care of locking.
582 * Note that if a mini-A cable is plugged in the ID line will stay down as
583 * the weak ID pull-up is not able to pull the ID up.
585 * REVISIT: It would be possible to add support for changing between host
586 * and peripheral modes in non-OTG configurations by reconfiguring hardware
587 * and then setting musb->board_mode. For now, only support OTG mode.
589 static int tusb_musb_set_mode(struct musb
*musb
, u8 musb_mode
)
591 void __iomem
*tbase
= musb
->ctrl_base
;
592 u32 otg_stat
, phy_otg_ctrl
, phy_otg_ena
, dev_conf
;
594 if (musb
->board_mode
!= MUSB_OTG
) {
595 ERR("Changing mode currently only supported in OTG mode\n");
599 otg_stat
= musb_readl(tbase
, TUSB_DEV_OTG_STAT
);
600 phy_otg_ctrl
= musb_readl(tbase
, TUSB_PHY_OTG_CTRL
);
601 phy_otg_ena
= musb_readl(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
);
602 dev_conf
= musb_readl(tbase
, TUSB_DEV_CONF
);
606 case MUSB_HOST
: /* Disable PHY ID detect, ground ID */
607 phy_otg_ctrl
&= ~TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
608 phy_otg_ena
|= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
609 dev_conf
|= TUSB_DEV_CONF_ID_SEL
;
610 dev_conf
&= ~TUSB_DEV_CONF_SOFT_ID
;
612 case MUSB_PERIPHERAL
: /* Disable PHY ID detect, keep ID pull-up on */
613 phy_otg_ctrl
|= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
614 phy_otg_ena
|= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
615 dev_conf
|= (TUSB_DEV_CONF_ID_SEL
| TUSB_DEV_CONF_SOFT_ID
);
617 case MUSB_OTG
: /* Use PHY ID detection */
618 phy_otg_ctrl
|= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
619 phy_otg_ena
|= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
620 dev_conf
&= ~(TUSB_DEV_CONF_ID_SEL
| TUSB_DEV_CONF_SOFT_ID
);
624 dev_dbg(musb
->controller
, "Trying to set mode %i\n", musb_mode
);
628 musb_writel(tbase
, TUSB_PHY_OTG_CTRL
,
629 TUSB_PHY_OTG_CTRL_WRPROTECT
| phy_otg_ctrl
);
630 musb_writel(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
,
631 TUSB_PHY_OTG_CTRL_WRPROTECT
| phy_otg_ena
);
632 musb_writel(tbase
, TUSB_DEV_CONF
, dev_conf
);
634 otg_stat
= musb_readl(tbase
, TUSB_DEV_OTG_STAT
);
635 if ((musb_mode
== MUSB_PERIPHERAL
) &&
636 !(otg_stat
& TUSB_DEV_OTG_STAT_ID_STATUS
))
637 INFO("Cannot be peripheral with mini-A cable "
638 "otg_stat: %08x\n", otg_stat
);
643 static inline unsigned long
644 tusb_otg_ints(struct musb
*musb
, u32 int_src
, void __iomem
*tbase
)
646 u32 otg_stat
= musb_readl(tbase
, TUSB_DEV_OTG_STAT
);
647 unsigned long idle_timeout
= 0;
648 struct usb_otg
*otg
= musb
->xceiv
->otg
;
651 if ((int_src
& TUSB_INT_SRC_ID_STATUS_CHNG
)) {
654 if (is_otg_enabled(musb
))
655 default_a
= !(otg_stat
& TUSB_DEV_OTG_STAT_ID_STATUS
);
657 default_a
= is_host_enabled(musb
);
658 dev_dbg(musb
->controller
, "Default-%c\n", default_a
? 'A' : 'B');
659 otg
->default_a
= default_a
;
660 tusb_musb_set_vbus(musb
, default_a
);
662 /* Don't allow idling immediately */
664 idle_timeout
= jiffies
+ (HZ
* 3);
667 /* VBUS state change */
668 if (int_src
& TUSB_INT_SRC_VBUS_SENSE_CHNG
) {
670 /* B-dev state machine: no vbus ~= disconnect */
671 if ((is_otg_enabled(musb
) && !otg
->default_a
)
672 || !is_host_enabled(musb
)) {
673 /* ? musb_root_disconnect(musb); */
674 musb
->port1_status
&=
675 ~(USB_PORT_STAT_CONNECTION
676 | USB_PORT_STAT_ENABLE
677 | USB_PORT_STAT_LOW_SPEED
678 | USB_PORT_STAT_HIGH_SPEED
682 if (otg_stat
& TUSB_DEV_OTG_STAT_SESS_END
) {
683 dev_dbg(musb
->controller
, "Forcing disconnect (no interrupt)\n");
684 if (musb
->xceiv
->state
!= OTG_STATE_B_IDLE
) {
685 /* INTR_DISCONNECT can hide... */
686 musb
->xceiv
->state
= OTG_STATE_B_IDLE
;
687 musb
->int_usb
|= MUSB_INTR_DISCONNECT
;
691 dev_dbg(musb
->controller
, "vbus change, %s, otg %03x\n",
692 otg_state_string(musb
->xceiv
->state
), otg_stat
);
693 idle_timeout
= jiffies
+ (1 * HZ
);
694 schedule_work(&musb
->irq_work
);
696 } else /* A-dev state machine */ {
697 dev_dbg(musb
->controller
, "vbus change, %s, otg %03x\n",
698 otg_state_string(musb
->xceiv
->state
), otg_stat
);
700 switch (musb
->xceiv
->state
) {
701 case OTG_STATE_A_IDLE
:
702 dev_dbg(musb
->controller
, "Got SRP, turning on VBUS\n");
703 musb_platform_set_vbus(musb
, 1);
705 /* CONNECT can wake if a_wait_bcon is set */
706 if (musb
->a_wait_bcon
!= 0)
712 * OPT FS A TD.4.6 needs few seconds for
715 idle_timeout
= jiffies
+ (2 * HZ
);
718 case OTG_STATE_A_WAIT_VRISE
:
719 /* ignore; A-session-valid < VBUS_VALID/2,
720 * we monitor this with the timer
723 case OTG_STATE_A_WAIT_VFALL
:
724 /* REVISIT this irq triggers during short
725 * spikes caused by enumeration ...
727 if (musb
->vbuserr_retry
) {
728 musb
->vbuserr_retry
--;
729 tusb_musb_set_vbus(musb
, 1);
732 = VBUSERR_RETRY_COUNT
;
733 tusb_musb_set_vbus(musb
, 0);
742 /* OTG timer expiration */
743 if (int_src
& TUSB_INT_SRC_OTG_TIMEOUT
) {
746 dev_dbg(musb
->controller
, "%s timer, %03x\n",
747 otg_state_string(musb
->xceiv
->state
), otg_stat
);
749 switch (musb
->xceiv
->state
) {
750 case OTG_STATE_A_WAIT_VRISE
:
751 /* VBUS has probably been valid for a while now,
752 * but may well have bounced out of range a bit
754 devctl
= musb_readb(musb
->mregs
, MUSB_DEVCTL
);
755 if (otg_stat
& TUSB_DEV_OTG_STAT_VBUS_VALID
) {
756 if ((devctl
& MUSB_DEVCTL_VBUS
)
757 != MUSB_DEVCTL_VBUS
) {
758 dev_dbg(musb
->controller
, "devctl %02x\n", devctl
);
761 musb
->xceiv
->state
= OTG_STATE_A_WAIT_BCON
;
763 idle_timeout
= jiffies
764 + msecs_to_jiffies(musb
->a_wait_bcon
);
766 /* REVISIT report overcurrent to hub? */
767 ERR("vbus too slow, devctl %02x\n", devctl
);
768 tusb_musb_set_vbus(musb
, 0);
771 case OTG_STATE_A_WAIT_BCON
:
772 if (musb
->a_wait_bcon
!= 0)
773 idle_timeout
= jiffies
774 + msecs_to_jiffies(musb
->a_wait_bcon
);
776 case OTG_STATE_A_SUSPEND
:
778 case OTG_STATE_B_WAIT_ACON
:
784 schedule_work(&musb
->irq_work
);
789 static irqreturn_t
tusb_musb_interrupt(int irq
, void *__hci
)
791 struct musb
*musb
= __hci
;
792 void __iomem
*tbase
= musb
->ctrl_base
;
793 unsigned long flags
, idle_timeout
= 0;
794 u32 int_mask
, int_src
;
796 spin_lock_irqsave(&musb
->lock
, flags
);
798 /* Mask all interrupts to allow using both edge and level GPIO irq */
799 int_mask
= musb_readl(tbase
, TUSB_INT_MASK
);
800 musb_writel(tbase
, TUSB_INT_MASK
, ~TUSB_INT_MASK_RESERVED_BITS
);
802 int_src
= musb_readl(tbase
, TUSB_INT_SRC
) & ~TUSB_INT_SRC_RESERVED_BITS
;
803 dev_dbg(musb
->controller
, "TUSB IRQ %08x\n", int_src
);
805 musb
->int_usb
= (u8
) int_src
;
807 /* Acknowledge wake-up source interrupts */
808 if (int_src
& TUSB_INT_SRC_DEV_WAKEUP
) {
812 if (tusb_get_revision(musb
) == TUSB_REV_30
)
813 tusb_wbus_quirk(musb
, 0);
815 /* there are issues re-locking the PLL on wakeup ... */
817 /* work around issue 8 */
818 for (i
= 0xf7f7f7; i
> 0xf7f7f7 - 1000; i
--) {
819 musb_writel(tbase
, TUSB_SCRATCH_PAD
, 0);
820 musb_writel(tbase
, TUSB_SCRATCH_PAD
, i
);
821 reg
= musb_readl(tbase
, TUSB_SCRATCH_PAD
);
824 dev_dbg(musb
->controller
, "TUSB NOR not ready\n");
827 /* work around issue 13 (2nd half) */
828 tusb_set_clock_source(musb
, 1);
830 reg
= musb_readl(tbase
, TUSB_PRCM_WAKEUP_SOURCE
);
831 musb_writel(tbase
, TUSB_PRCM_WAKEUP_CLEAR
, reg
);
832 if (reg
& ~TUSB_PRCM_WNORCS
) {
834 schedule_work(&musb
->irq_work
);
836 dev_dbg(musb
->controller
, "wake %sactive %02x\n",
837 musb
->is_active
? "" : "in", reg
);
839 /* REVISIT host side TUSB_PRCM_WHOSTDISCON, TUSB_PRCM_WBUS */
842 if (int_src
& TUSB_INT_SRC_USB_IP_CONN
)
843 del_timer(&musb_idle_timer
);
845 /* OTG state change reports (annoyingly) not issued by Mentor core */
846 if (int_src
& (TUSB_INT_SRC_VBUS_SENSE_CHNG
847 | TUSB_INT_SRC_OTG_TIMEOUT
848 | TUSB_INT_SRC_ID_STATUS_CHNG
))
849 idle_timeout
= tusb_otg_ints(musb
, int_src
, tbase
);
851 /* TX dma callback must be handled here, RX dma callback is
852 * handled in tusb_omap_dma_cb.
854 if ((int_src
& TUSB_INT_SRC_TXRX_DMA_DONE
)) {
855 u32 dma_src
= musb_readl(tbase
, TUSB_DMA_INT_SRC
);
856 u32 real_dma_src
= musb_readl(tbase
, TUSB_DMA_INT_MASK
);
858 dev_dbg(musb
->controller
, "DMA IRQ %08x\n", dma_src
);
859 real_dma_src
= ~real_dma_src
& dma_src
;
860 if (tusb_dma_omap() && real_dma_src
) {
861 int tx_source
= (real_dma_src
& 0xffff);
864 for (i
= 1; i
<= 15; i
++) {
865 if (tx_source
& (1 << i
)) {
866 dev_dbg(musb
->controller
, "completing ep%i %s\n", i
, "tx");
867 musb_dma_completion(musb
, i
, 1);
871 musb_writel(tbase
, TUSB_DMA_INT_CLEAR
, dma_src
);
874 /* EP interrupts. In OCP mode tusb6010 mirrors the MUSB interrupts */
875 if (int_src
& (TUSB_INT_SRC_USB_IP_TX
| TUSB_INT_SRC_USB_IP_RX
)) {
876 u32 musb_src
= musb_readl(tbase
, TUSB_USBIP_INT_SRC
);
878 musb_writel(tbase
, TUSB_USBIP_INT_CLEAR
, musb_src
);
879 musb
->int_rx
= (((musb_src
>> 16) & 0xffff) << 1);
880 musb
->int_tx
= (musb_src
& 0xffff);
886 if (int_src
& (TUSB_INT_SRC_USB_IP_TX
| TUSB_INT_SRC_USB_IP_RX
| 0xff))
887 musb_interrupt(musb
);
889 /* Acknowledge TUSB interrupts. Clear only non-reserved bits */
890 musb_writel(tbase
, TUSB_INT_SRC_CLEAR
,
891 int_src
& ~TUSB_INT_MASK_RESERVED_BITS
);
893 tusb_musb_try_idle(musb
, idle_timeout
);
895 musb_writel(tbase
, TUSB_INT_MASK
, int_mask
);
896 spin_unlock_irqrestore(&musb
->lock
, flags
);
904 * Enables TUSB6010. Caller must take care of locking.
906 * - Check what is unnecessary in MGC_HdrcStart()
908 static void tusb_musb_enable(struct musb
*musb
)
910 void __iomem
*tbase
= musb
->ctrl_base
;
912 /* Setup TUSB6010 main interrupt mask. Enable all interrupts except SOF.
913 * REVISIT: Enable and deal with TUSB_INT_SRC_USB_IP_SOF */
914 musb_writel(tbase
, TUSB_INT_MASK
, TUSB_INT_SRC_USB_IP_SOF
);
916 /* Setup TUSB interrupt, disable DMA and GPIO interrupts */
917 musb_writel(tbase
, TUSB_USBIP_INT_MASK
, 0);
918 musb_writel(tbase
, TUSB_DMA_INT_MASK
, 0x7fffffff);
919 musb_writel(tbase
, TUSB_GPIO_INT_MASK
, 0x1ff);
921 /* Clear all subsystem interrups */
922 musb_writel(tbase
, TUSB_USBIP_INT_CLEAR
, 0x7fffffff);
923 musb_writel(tbase
, TUSB_DMA_INT_CLEAR
, 0x7fffffff);
924 musb_writel(tbase
, TUSB_GPIO_INT_CLEAR
, 0x1ff);
926 /* Acknowledge pending interrupt(s) */
927 musb_writel(tbase
, TUSB_INT_SRC_CLEAR
, ~TUSB_INT_MASK_RESERVED_BITS
);
929 /* Only 0 clock cycles for minimum interrupt de-assertion time and
930 * interrupt polarity active low seems to work reliably here */
931 musb_writel(tbase
, TUSB_INT_CTRL_CONF
,
932 TUSB_INT_CTRL_CONF_INT_RELCYC(0));
934 irq_set_irq_type(musb
->nIrq
, IRQ_TYPE_LEVEL_LOW
);
936 /* maybe force into the Default-A OTG state machine */
937 if (!(musb_readl(tbase
, TUSB_DEV_OTG_STAT
)
938 & TUSB_DEV_OTG_STAT_ID_STATUS
))
939 musb_writel(tbase
, TUSB_INT_SRC_SET
,
940 TUSB_INT_SRC_ID_STATUS_CHNG
);
942 if (is_dma_capable() && dma_off
)
943 printk(KERN_WARNING
"%s %s: dma not reactivated\n",
950 * Disables TUSB6010. Caller must take care of locking.
952 static void tusb_musb_disable(struct musb
*musb
)
954 void __iomem
*tbase
= musb
->ctrl_base
;
956 /* FIXME stop DMA, IRQs, timers, ... */
958 /* disable all IRQs */
959 musb_writel(tbase
, TUSB_INT_MASK
, ~TUSB_INT_MASK_RESERVED_BITS
);
960 musb_writel(tbase
, TUSB_USBIP_INT_MASK
, 0x7fffffff);
961 musb_writel(tbase
, TUSB_DMA_INT_MASK
, 0x7fffffff);
962 musb_writel(tbase
, TUSB_GPIO_INT_MASK
, 0x1ff);
964 del_timer(&musb_idle_timer
);
966 if (is_dma_capable() && !dma_off
) {
967 printk(KERN_WARNING
"%s %s: dma still active\n",
974 * Sets up TUSB6010 CPU interface specific signals and registers
975 * Note: Settings optimized for OMAP24xx
977 static void tusb_setup_cpu_interface(struct musb
*musb
)
979 void __iomem
*tbase
= musb
->ctrl_base
;
982 * Disable GPIO[5:0] pullups (used as output DMA requests)
983 * Don't disable GPIO[7:6] as they are needed for wake-up.
985 musb_writel(tbase
, TUSB_PULLUP_1_CTRL
, 0x0000003F);
987 /* Disable all pullups on NOR IF, DMAREQ0 and DMAREQ1 */
988 musb_writel(tbase
, TUSB_PULLUP_2_CTRL
, 0x01FFFFFF);
990 /* Turn GPIO[5:0] to DMAREQ[5:0] signals */
991 musb_writel(tbase
, TUSB_GPIO_CONF
, TUSB_GPIO_CONF_DMAREQ(0x3f));
993 /* Burst size 16x16 bits, all six DMA requests enabled, DMA request
994 * de-assertion time 2 system clocks p 62 */
995 musb_writel(tbase
, TUSB_DMA_REQ_CONF
,
996 TUSB_DMA_REQ_CONF_BURST_SIZE(2) |
997 TUSB_DMA_REQ_CONF_DMA_REQ_EN(0x3f) |
998 TUSB_DMA_REQ_CONF_DMA_REQ_ASSER(2));
1000 /* Set 0 wait count for synchronous burst access */
1001 musb_writel(tbase
, TUSB_WAIT_COUNT
, 1);
1004 static int tusb_musb_start(struct musb
*musb
)
1006 void __iomem
*tbase
= musb
->ctrl_base
;
1008 unsigned long flags
;
1011 if (musb
->board_set_power
)
1012 ret
= musb
->board_set_power(1);
1014 printk(KERN_ERR
"tusb: Cannot enable TUSB6010\n");
1018 spin_lock_irqsave(&musb
->lock
, flags
);
1020 if (musb_readl(tbase
, TUSB_PROD_TEST_RESET
) !=
1021 TUSB_PROD_TEST_RESET_VAL
) {
1022 printk(KERN_ERR
"tusb: Unable to detect TUSB6010\n");
1026 ret
= tusb_print_revision(musb
);
1028 printk(KERN_ERR
"tusb: Unsupported TUSB6010 revision %i\n",
1033 /* The uint bit for "USB non-PDR interrupt enable" has to be 1 when
1034 * NOR FLASH interface is used */
1035 musb_writel(tbase
, TUSB_VLYNQ_CTRL
, 8);
1037 /* Select PHY free running 60MHz as a system clock */
1038 tusb_set_clock_source(musb
, 1);
1040 /* VBus valid timer 1us, disable DFT/Debug and VLYNQ clocks for
1041 * power saving, enable VBus detect and session end comparators,
1042 * enable IDpullup, enable VBus charging */
1043 musb_writel(tbase
, TUSB_PRCM_MNGMT
,
1044 TUSB_PRCM_MNGMT_VBUS_VALID_TIMER(0xa) |
1045 TUSB_PRCM_MNGMT_VBUS_VALID_FLT_EN
|
1046 TUSB_PRCM_MNGMT_OTG_SESS_END_EN
|
1047 TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN
|
1048 TUSB_PRCM_MNGMT_OTG_ID_PULLUP
);
1049 tusb_setup_cpu_interface(musb
);
1051 /* simplify: always sense/pullup ID pins, as if in OTG mode */
1052 reg
= musb_readl(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
);
1053 reg
|= TUSB_PHY_OTG_CTRL_WRPROTECT
| TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
1054 musb_writel(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
, reg
);
1056 reg
= musb_readl(tbase
, TUSB_PHY_OTG_CTRL
);
1057 reg
|= TUSB_PHY_OTG_CTRL_WRPROTECT
| TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
1058 musb_writel(tbase
, TUSB_PHY_OTG_CTRL
, reg
);
1060 spin_unlock_irqrestore(&musb
->lock
, flags
);
1065 spin_unlock_irqrestore(&musb
->lock
, flags
);
1067 if (musb
->board_set_power
)
1068 musb
->board_set_power(0);
1073 static int tusb_musb_init(struct musb
*musb
)
1075 struct platform_device
*pdev
;
1076 struct resource
*mem
;
1077 void __iomem
*sync
= NULL
;
1080 usb_nop_xceiv_register();
1081 musb
->xceiv
= usb_get_phy(USB_PHY_TYPE_USB2
);
1085 pdev
= to_platform_device(musb
->controller
);
1087 /* dma address for async dma */
1088 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1089 musb
->async
= mem
->start
;
1091 /* dma address for sync dma */
1092 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
1094 pr_debug("no sync dma resource?\n");
1098 musb
->sync
= mem
->start
;
1100 sync
= ioremap(mem
->start
, resource_size(mem
));
1102 pr_debug("ioremap for sync failed\n");
1106 musb
->sync_va
= sync
;
1108 /* Offsets from base: VLYNQ at 0x000, MUSB regs at 0x400,
1109 * FIFOs at 0x600, TUSB at 0x800
1111 musb
->mregs
+= TUSB_BASE_OFFSET
;
1113 ret
= tusb_musb_start(musb
);
1115 printk(KERN_ERR
"Could not start tusb6010 (%d)\n",
1119 musb
->isr
= tusb_musb_interrupt
;
1121 if (is_peripheral_enabled(musb
)) {
1122 musb
->xceiv
->set_power
= tusb_draw_power
;
1126 setup_timer(&musb_idle_timer
, musb_do_idle
, (unsigned long) musb
);
1133 usb_put_phy(musb
->xceiv
);
1134 usb_nop_xceiv_unregister();
1139 static int tusb_musb_exit(struct musb
*musb
)
1141 del_timer_sync(&musb_idle_timer
);
1144 if (musb
->board_set_power
)
1145 musb
->board_set_power(0);
1147 iounmap(musb
->sync_va
);
1149 usb_put_phy(musb
->xceiv
);
1150 usb_nop_xceiv_unregister();
1154 static const struct musb_platform_ops tusb_ops
= {
1155 .init
= tusb_musb_init
,
1156 .exit
= tusb_musb_exit
,
1158 .enable
= tusb_musb_enable
,
1159 .disable
= tusb_musb_disable
,
1161 .set_mode
= tusb_musb_set_mode
,
1162 .try_idle
= tusb_musb_try_idle
,
1164 .vbus_status
= tusb_musb_vbus_status
,
1165 .set_vbus
= tusb_musb_set_vbus
,
1168 static u64 tusb_dmamask
= DMA_BIT_MASK(32);
1170 static int __devinit
tusb_probe(struct platform_device
*pdev
)
1172 struct musb_hdrc_platform_data
*pdata
= pdev
->dev
.platform_data
;
1173 struct platform_device
*musb
;
1174 struct tusb6010_glue
*glue
;
1178 glue
= kzalloc(sizeof(*glue
), GFP_KERNEL
);
1180 dev_err(&pdev
->dev
, "failed to allocate glue context\n");
1184 musb
= platform_device_alloc("musb-hdrc", -1);
1186 dev_err(&pdev
->dev
, "failed to allocate musb device\n");
1190 musb
->dev
.parent
= &pdev
->dev
;
1191 musb
->dev
.dma_mask
= &tusb_dmamask
;
1192 musb
->dev
.coherent_dma_mask
= tusb_dmamask
;
1194 glue
->dev
= &pdev
->dev
;
1197 pdata
->platform_ops
= &tusb_ops
;
1199 platform_set_drvdata(pdev
, glue
);
1201 ret
= platform_device_add_resources(musb
, pdev
->resource
,
1202 pdev
->num_resources
);
1204 dev_err(&pdev
->dev
, "failed to add resources\n");
1208 ret
= platform_device_add_data(musb
, pdata
, sizeof(*pdata
));
1210 dev_err(&pdev
->dev
, "failed to add platform_data\n");
1214 ret
= platform_device_add(musb
);
1216 dev_err(&pdev
->dev
, "failed to register musb device\n");
1223 platform_device_put(musb
);
1232 static int __devexit
tusb_remove(struct platform_device
*pdev
)
1234 struct tusb6010_glue
*glue
= platform_get_drvdata(pdev
);
1236 platform_device_del(glue
->musb
);
1237 platform_device_put(glue
->musb
);
1243 static struct platform_driver tusb_driver
= {
1244 .probe
= tusb_probe
,
1245 .remove
= __devexit_p(tusb_remove
),
1247 .name
= "musb-tusb",
1251 MODULE_DESCRIPTION("TUSB6010 MUSB Glue Layer");
1252 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
1253 MODULE_LICENSE("GPL v2");
1255 static int __init
tusb_init(void)
1257 return platform_driver_register(&tusb_driver
);
1259 module_init(tusb_init
);
1261 static void __exit
tusb_exit(void)
1263 platform_driver_unregister(&tusb_driver
);
1265 module_exit(tusb_exit
);