1 #ifndef _ASM_GENERIC_PGTABLE_H
2 #define _ASM_GENERIC_PGTABLE_H
7 #include <linux/mm_types.h>
11 * On almost all architectures and configurations, 0 can be used as the
12 * upper ceiling to free_pgtables(): on many architectures it has the same
13 * effect as using TASK_SIZE. However, there is one configuration which
14 * must impose a more careful limit, to avoid freeing kernel pgtables.
16 #ifndef USER_PGTABLES_CEILING
17 #define USER_PGTABLES_CEILING 0UL
20 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
21 extern int ptep_set_access_flags(struct vm_area_struct
*vma
,
22 unsigned long address
, pte_t
*ptep
,
23 pte_t entry
, int dirty
);
26 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
27 extern int pmdp_set_access_flags(struct vm_area_struct
*vma
,
28 unsigned long address
, pmd_t
*pmdp
,
29 pmd_t entry
, int dirty
);
32 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
33 static inline int ptep_test_and_clear_young(struct vm_area_struct
*vma
,
34 unsigned long address
,
42 set_pte_at(vma
->vm_mm
, address
, ptep
, pte_mkold(pte
));
47 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
48 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
49 static inline int pmdp_test_and_clear_young(struct vm_area_struct
*vma
,
50 unsigned long address
,
58 set_pmd_at(vma
->vm_mm
, address
, pmdp
, pmd_mkold(pmd
));
61 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
62 static inline int pmdp_test_and_clear_young(struct vm_area_struct
*vma
,
63 unsigned long address
,
69 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
72 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
73 int ptep_clear_flush_young(struct vm_area_struct
*vma
,
74 unsigned long address
, pte_t
*ptep
);
77 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
78 int pmdp_clear_flush_young(struct vm_area_struct
*vma
,
79 unsigned long address
, pmd_t
*pmdp
);
82 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
83 static inline pte_t
ptep_get_and_clear(struct mm_struct
*mm
,
84 unsigned long address
,
88 pte_clear(mm
, address
, ptep
);
93 #ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR
94 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
95 static inline pmd_t
pmdp_get_and_clear(struct mm_struct
*mm
,
96 unsigned long address
,
103 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
106 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
107 static inline pte_t
ptep_get_and_clear_full(struct mm_struct
*mm
,
108 unsigned long address
, pte_t
*ptep
,
112 pte
= ptep_get_and_clear(mm
, address
, ptep
);
118 * Some architectures may be able to avoid expensive synchronization
119 * primitives when modifications are made to PTE's which are already
120 * not present, or in the process of an address space destruction.
122 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
123 static inline void pte_clear_not_present_full(struct mm_struct
*mm
,
124 unsigned long address
,
128 pte_clear(mm
, address
, ptep
);
132 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
133 extern pte_t
ptep_clear_flush(struct vm_area_struct
*vma
,
134 unsigned long address
,
138 #ifndef __HAVE_ARCH_PMDP_CLEAR_FLUSH
139 extern pmd_t
pmdp_clear_flush(struct vm_area_struct
*vma
,
140 unsigned long address
,
144 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
146 static inline void ptep_set_wrprotect(struct mm_struct
*mm
, unsigned long address
, pte_t
*ptep
)
148 pte_t old_pte
= *ptep
;
149 set_pte_at(mm
, address
, ptep
, pte_wrprotect(old_pte
));
153 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
154 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
155 static inline void pmdp_set_wrprotect(struct mm_struct
*mm
,
156 unsigned long address
, pmd_t
*pmdp
)
158 pmd_t old_pmd
= *pmdp
;
159 set_pmd_at(mm
, address
, pmdp
, pmd_wrprotect(old_pmd
));
161 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
162 static inline void pmdp_set_wrprotect(struct mm_struct
*mm
,
163 unsigned long address
, pmd_t
*pmdp
)
167 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
170 #ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH
171 extern void pmdp_splitting_flush(struct vm_area_struct
*vma
,
172 unsigned long address
, pmd_t
*pmdp
);
175 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
176 extern void pgtable_trans_huge_deposit(struct mm_struct
*mm
, pmd_t
*pmdp
,
180 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
181 extern pgtable_t
pgtable_trans_huge_withdraw(struct mm_struct
*mm
, pmd_t
*pmdp
);
184 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
185 extern void pmdp_invalidate(struct vm_area_struct
*vma
, unsigned long address
,
189 #ifndef __HAVE_ARCH_PTE_SAME
190 static inline int pte_same(pte_t pte_a
, pte_t pte_b
)
192 return pte_val(pte_a
) == pte_val(pte_b
);
196 #ifndef __HAVE_ARCH_PMD_SAME
197 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
198 static inline int pmd_same(pmd_t pmd_a
, pmd_t pmd_b
)
200 return pmd_val(pmd_a
) == pmd_val(pmd_b
);
202 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
203 static inline int pmd_same(pmd_t pmd_a
, pmd_t pmd_b
)
208 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
211 #ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
212 #define page_test_and_clear_young(pfn) (0)
215 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
216 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
219 #ifndef __HAVE_ARCH_MOVE_PTE
220 #define move_pte(pte, prot, old_addr, new_addr) (pte)
223 #ifndef pte_accessible
224 # define pte_accessible(pte) ((void)(pte),1)
227 #ifndef flush_tlb_fix_spurious_fault
228 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
231 #ifndef pgprot_noncached
232 #define pgprot_noncached(prot) (prot)
235 #ifndef pgprot_writecombine
236 #define pgprot_writecombine pgprot_noncached
240 * When walking page tables, get the address of the next boundary,
241 * or the end address of the range if that comes earlier. Although no
242 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
245 #define pgd_addr_end(addr, end) \
246 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
247 (__boundary - 1 < (end) - 1)? __boundary: (end); \
251 #define pud_addr_end(addr, end) \
252 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
253 (__boundary - 1 < (end) - 1)? __boundary: (end); \
258 #define pmd_addr_end(addr, end) \
259 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
260 (__boundary - 1 < (end) - 1)? __boundary: (end); \
265 * When walking page tables, we usually want to skip any p?d_none entries;
266 * and any p?d_bad entries - reporting the error before resetting to none.
267 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
269 void pgd_clear_bad(pgd_t
*);
270 void pud_clear_bad(pud_t
*);
271 void pmd_clear_bad(pmd_t
*);
273 static inline int pgd_none_or_clear_bad(pgd_t
*pgd
)
277 if (unlikely(pgd_bad(*pgd
))) {
284 static inline int pud_none_or_clear_bad(pud_t
*pud
)
288 if (unlikely(pud_bad(*pud
))) {
295 static inline int pmd_none_or_clear_bad(pmd_t
*pmd
)
299 if (unlikely(pmd_bad(*pmd
))) {
306 static inline pte_t
__ptep_modify_prot_start(struct mm_struct
*mm
,
311 * Get the current pte state, but zero it out to make it
312 * non-present, preventing the hardware from asynchronously
315 return ptep_get_and_clear(mm
, addr
, ptep
);
318 static inline void __ptep_modify_prot_commit(struct mm_struct
*mm
,
320 pte_t
*ptep
, pte_t pte
)
323 * The pte is non-present, so there's no hardware state to
326 set_pte_at(mm
, addr
, ptep
, pte
);
329 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
331 * Start a pte protection read-modify-write transaction, which
332 * protects against asynchronous hardware modifications to the pte.
333 * The intention is not to prevent the hardware from making pte
334 * updates, but to prevent any updates it may make from being lost.
336 * This does not protect against other software modifications of the
337 * pte; the appropriate pte lock must be held over the transation.
339 * Note that this interface is intended to be batchable, meaning that
340 * ptep_modify_prot_commit may not actually update the pte, but merely
341 * queue the update to be done at some later time. The update must be
342 * actually committed before the pte lock is released, however.
344 static inline pte_t
ptep_modify_prot_start(struct mm_struct
*mm
,
348 return __ptep_modify_prot_start(mm
, addr
, ptep
);
352 * Commit an update to a pte, leaving any hardware-controlled bits in
353 * the PTE unmodified.
355 static inline void ptep_modify_prot_commit(struct mm_struct
*mm
,
357 pte_t
*ptep
, pte_t pte
)
359 __ptep_modify_prot_commit(mm
, addr
, ptep
, pte
);
361 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
362 #endif /* CONFIG_MMU */
365 * A facility to provide lazy MMU batching. This allows PTE updates and
366 * page invalidations to be delayed until a call to leave lazy MMU mode
367 * is issued. Some architectures may benefit from doing this, and it is
368 * beneficial for both shadow and direct mode hypervisors, which may batch
369 * the PTE updates which happen during this window. Note that using this
370 * interface requires that read hazards be removed from the code. A read
371 * hazard could result in the direct mode hypervisor case, since the actual
372 * write to the page tables may not yet have taken place, so reads though
373 * a raw PTE pointer after it has been modified are not guaranteed to be
374 * up to date. This mode can only be entered and left under the protection of
375 * the page table locks for all page tables which may be modified. In the UP
376 * case, this is required so that preemption is disabled, and in the SMP case,
377 * it must synchronize the delayed page table writes properly on other CPUs.
379 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
380 #define arch_enter_lazy_mmu_mode() do {} while (0)
381 #define arch_leave_lazy_mmu_mode() do {} while (0)
382 #define arch_flush_lazy_mmu_mode() do {} while (0)
386 * A facility to provide batching of the reload of page tables and
387 * other process state with the actual context switch code for
388 * paravirtualized guests. By convention, only one of the batched
389 * update (lazy) modes (CPU, MMU) should be active at any given time,
390 * entry should never be nested, and entry and exits should always be
391 * paired. This is for sanity of maintaining and reasoning about the
392 * kernel code. In this case, the exit (end of the context switch) is
393 * in architecture-specific code, and so doesn't need a generic
396 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
397 #define arch_start_context_switch(prev) do {} while (0)
400 #ifndef CONFIG_HAVE_ARCH_SOFT_DIRTY
401 static inline int pte_soft_dirty(pte_t pte
)
406 static inline int pmd_soft_dirty(pmd_t pmd
)
411 static inline pte_t
pte_mksoft_dirty(pte_t pte
)
416 static inline pmd_t
pmd_mksoft_dirty(pmd_t pmd
)
422 #ifndef __HAVE_PFNMAP_TRACKING
424 * Interfaces that can be used by architecture code to keep track of
425 * memory type of pfn mappings specified by the remap_pfn_range,
430 * track_pfn_remap is called when a _new_ pfn mapping is being established
431 * by remap_pfn_range() for physical range indicated by pfn and size.
433 static inline int track_pfn_remap(struct vm_area_struct
*vma
, pgprot_t
*prot
,
434 unsigned long pfn
, unsigned long addr
,
441 * track_pfn_insert is called when a _new_ single pfn is established
442 * by vm_insert_pfn().
444 static inline int track_pfn_insert(struct vm_area_struct
*vma
, pgprot_t
*prot
,
451 * track_pfn_copy is called when vma that is covering the pfnmap gets
452 * copied through copy_page_range().
454 static inline int track_pfn_copy(struct vm_area_struct
*vma
)
460 * untrack_pfn_vma is called while unmapping a pfnmap for a region.
461 * untrack can be called for a specific region indicated by pfn and size or
462 * can be for the entire vma (in which case pfn, size are zero).
464 static inline void untrack_pfn(struct vm_area_struct
*vma
,
465 unsigned long pfn
, unsigned long size
)
469 extern int track_pfn_remap(struct vm_area_struct
*vma
, pgprot_t
*prot
,
470 unsigned long pfn
, unsigned long addr
,
472 extern int track_pfn_insert(struct vm_area_struct
*vma
, pgprot_t
*prot
,
474 extern int track_pfn_copy(struct vm_area_struct
*vma
);
475 extern void untrack_pfn(struct vm_area_struct
*vma
, unsigned long pfn
,
479 #ifdef __HAVE_COLOR_ZERO_PAGE
480 static inline int is_zero_pfn(unsigned long pfn
)
482 extern unsigned long zero_pfn
;
483 unsigned long offset_from_zero_pfn
= pfn
- zero_pfn
;
484 return offset_from_zero_pfn
<= (zero_page_mask
>> PAGE_SHIFT
);
487 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
490 static inline int is_zero_pfn(unsigned long pfn
)
492 extern unsigned long zero_pfn
;
493 return pfn
== zero_pfn
;
496 static inline unsigned long my_zero_pfn(unsigned long addr
)
498 extern unsigned long zero_pfn
;
505 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
506 static inline int pmd_trans_huge(pmd_t pmd
)
510 static inline int pmd_trans_splitting(pmd_t pmd
)
514 #ifndef __HAVE_ARCH_PMD_WRITE
515 static inline int pmd_write(pmd_t pmd
)
520 #endif /* __HAVE_ARCH_PMD_WRITE */
521 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
523 #ifndef pmd_read_atomic
524 static inline pmd_t
pmd_read_atomic(pmd_t
*pmdp
)
527 * Depend on compiler for an atomic pmd read. NOTE: this is
528 * only going to work, if the pmdval_t isn't larger than
536 * This function is meant to be used by sites walking pagetables with
537 * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
538 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
539 * into a null pmd and the transhuge page fault can convert a null pmd
540 * into an hugepmd or into a regular pmd (if the hugepage allocation
541 * fails). While holding the mmap_sem in read mode the pmd becomes
542 * stable and stops changing under us only if it's not null and not a
543 * transhuge pmd. When those races occurs and this function makes a
544 * difference vs the standard pmd_none_or_clear_bad, the result is
545 * undefined so behaving like if the pmd was none is safe (because it
546 * can return none anyway). The compiler level barrier() is critically
547 * important to compute the two checks atomically on the same pmdval.
549 * For 32bit kernels with a 64bit large pmd_t this automatically takes
550 * care of reading the pmd atomically to avoid SMP race conditions
551 * against pmd_populate() when the mmap_sem is hold for reading by the
552 * caller (a special atomic read not done by "gcc" as in the generic
553 * version above, is also needed when THP is disabled because the page
554 * fault can populate the pmd from under us).
556 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t
*pmd
)
558 pmd_t pmdval
= pmd_read_atomic(pmd
);
560 * The barrier will stabilize the pmdval in a register or on
561 * the stack so that it will stop changing under the code.
563 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
564 * pmd_read_atomic is allowed to return a not atomic pmdval
565 * (for example pointing to an hugepage that has never been
566 * mapped in the pmd). The below checks will only care about
567 * the low part of the pmd with 32bit PAE x86 anyway, with the
568 * exception of pmd_none(). So the important thing is that if
569 * the low part of the pmd is found null, the high part will
570 * be also null or the pmd_none() check below would be
573 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
576 if (pmd_none(pmdval
))
578 if (unlikely(pmd_bad(pmdval
))) {
579 if (!pmd_trans_huge(pmdval
))
587 * This is a noop if Transparent Hugepage Support is not built into
588 * the kernel. Otherwise it is equivalent to
589 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
590 * places that already verified the pmd is not none and they want to
591 * walk ptes while holding the mmap sem in read mode (write mode don't
592 * need this). If THP is not enabled, the pmd can't go away under the
593 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
594 * run a pmd_trans_unstable before walking the ptes after
595 * split_huge_page_pmd returns (because it may have run when the pmd
596 * become null, but then a page fault can map in a THP and not a
599 static inline int pmd_trans_unstable(pmd_t
*pmd
)
601 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
602 return pmd_none_or_trans_huge_or_clear_bad(pmd
);
608 #ifdef CONFIG_NUMA_BALANCING
609 #ifdef CONFIG_ARCH_USES_NUMA_PROT_NONE
611 * _PAGE_NUMA works identical to _PAGE_PROTNONE (it's actually the
612 * same bit too). It's set only when _PAGE_PRESET is not set and it's
613 * never set if _PAGE_PRESENT is set.
615 * pte/pmd_present() returns true if pte/pmd_numa returns true. Page
616 * fault triggers on those regions if pte/pmd_numa returns true
617 * (because _PAGE_PRESENT is not set).
620 static inline int pte_numa(pte_t pte
)
622 return (pte_flags(pte
) &
623 (_PAGE_NUMA
|_PAGE_PRESENT
)) == _PAGE_NUMA
;
628 static inline int pmd_numa(pmd_t pmd
)
630 return (pmd_flags(pmd
) &
631 (_PAGE_NUMA
|_PAGE_PRESENT
)) == _PAGE_NUMA
;
636 * pte/pmd_mknuma sets the _PAGE_ACCESSED bitflag automatically
637 * because they're called by the NUMA hinting minor page fault. If we
638 * wouldn't set the _PAGE_ACCESSED bitflag here, the TLB miss handler
639 * would be forced to set it later while filling the TLB after we
640 * return to userland. That would trigger a second write to memory
641 * that we optimize away by setting _PAGE_ACCESSED here.
643 #ifndef pte_mknonnuma
644 static inline pte_t
pte_mknonnuma(pte_t pte
)
646 pte
= pte_clear_flags(pte
, _PAGE_NUMA
);
647 return pte_set_flags(pte
, _PAGE_PRESENT
|_PAGE_ACCESSED
);
651 #ifndef pmd_mknonnuma
652 static inline pmd_t
pmd_mknonnuma(pmd_t pmd
)
654 pmd
= pmd_clear_flags(pmd
, _PAGE_NUMA
);
655 return pmd_set_flags(pmd
, _PAGE_PRESENT
|_PAGE_ACCESSED
);
660 static inline pte_t
pte_mknuma(pte_t pte
)
662 pte
= pte_set_flags(pte
, _PAGE_NUMA
);
663 return pte_clear_flags(pte
, _PAGE_PRESENT
);
668 static inline pmd_t
pmd_mknuma(pmd_t pmd
)
670 pmd
= pmd_set_flags(pmd
, _PAGE_NUMA
);
671 return pmd_clear_flags(pmd
, _PAGE_PRESENT
);
675 extern int pte_numa(pte_t pte
);
676 extern int pmd_numa(pmd_t pmd
);
677 extern pte_t
pte_mknonnuma(pte_t pte
);
678 extern pmd_t
pmd_mknonnuma(pmd_t pmd
);
679 extern pte_t
pte_mknuma(pte_t pte
);
680 extern pmd_t
pmd_mknuma(pmd_t pmd
);
681 #endif /* CONFIG_ARCH_USES_NUMA_PROT_NONE */
683 static inline int pmd_numa(pmd_t pmd
)
688 static inline int pte_numa(pte_t pte
)
693 static inline pte_t
pte_mknonnuma(pte_t pte
)
698 static inline pmd_t
pmd_mknonnuma(pmd_t pmd
)
703 static inline pte_t
pte_mknuma(pte_t pte
)
708 static inline pmd_t
pmd_mknuma(pmd_t pmd
)
712 #endif /* CONFIG_NUMA_BALANCING */
714 #endif /* CONFIG_MMU */
716 #endif /* !__ASSEMBLY__ */
718 #ifndef io_remap_pfn_range
719 #define io_remap_pfn_range remap_pfn_range
722 #endif /* _ASM_GENERIC_PGTABLE_H */