arch/mips/sni/setup.c

   1 /*
   2  * Setup pointers to hardware-dependent routines.
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 1996, 97, 98, 2000, 03, 04, 06 Ralf Baechle (ralf@linux-mips.org)
   9  */
  10 #include <linux/config.h>
  11 #include <linux/eisa.h>
  12 #include <linux/hdreg.h>
  13 #include <linux/ioport.h>
  14 #include <linux/sched.h>
  15 #include <linux/init.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/mc146818rtc.h>
  18 #include <linux/pm.h>
  19 #include <linux/pci.h>
  20 #include <linux/console.h>
  21 #include <linux/fb.h>
  22 #include <linux/tty.h>
  23
  24 #include <asm/arc/types.h>
  25 #include <asm/sgialib.h>
  26 #include <asm/bcache.h>
  27 #include <asm/bootinfo.h>
  28 #include <asm/io.h>
  29 #include <asm/irq.h>
  30 #include <asm/mc146818-time.h>
  31 #include <asm/processor.h>
  32 #include <asm/ptrace.h>
  33 #include <asm/reboot.h>
  34 #include <asm/sni.h>
  35 #include <asm/time.h>
  36 #include <asm/traps.h>
  37
  38 extern void sni_machine_restart(char *command);
  39 extern void sni_machine_halt(void);
  40 extern void sni_machine_power_off(void);
  41
  42 static void __init sni_rm200_pci_timer_setup(struct irqaction *irq)
  43 {
  44         /* set the clock to 100 Hz */
  45         outb_p(0x34,0x43);              /* binary, mode 2, LSB/MSB, ch 0 */
  46         outb_p(LATCH & 0xff , 0x40);    /* LSB */
  47         outb(LATCH >> 8 , 0x40);        /* MSB */
  48         setup_irq(0, irq);
  49 }
  50
  51 /*
  52  * A bit more gossip about the iron we're running on ...
  53  */
  54 static inline void sni_pcimt_detect(void)
  55 {
  56         char boardtype[80];
  57         unsigned char csmsr;
  58         char *p = boardtype;
  59         unsigned int asic;
  60
  61         csmsr = *(volatile unsigned char *)PCIMT_CSMSR;
  62
  63         p += sprintf(p, "%s PCI", (csmsr & 0x80) ? "RM200" : "RM300");
  64         if ((csmsr & 0x80) == 0)
  65                 p += sprintf(p, ", board revision %s",
  66                              (csmsr & 0x20) ? "D" : "C");
  67         asic = csmsr & 0x80;
  68         asic = (csmsr & 0x08) ? asic : !asic;
  69         p += sprintf(p, ", ASIC PCI Rev %s", asic ? "1.0" : "1.1");
  70         printk("%s.\n", boardtype);
  71 }
  72
  73 static void __init sni_display_setup(void)
  74 {
  75 #ifdef CONFIG_VT
  76 #if defined(CONFIG_VGA_CONSOLE)
  77         struct screen_info *si = &screen_info;
  78         DISPLAY_STATUS *di;
  79
  80         di = ArcGetDisplayStatus(1);
  81
  82         if (di) {
  83                 si->orig_x              = di->CursorXPosition;
  84                 si->orig_y              = di->CursorYPosition;
  85                 si->orig_video_cols     = di->CursorMaxXPosition;
  86                 si->orig_video_lines    = di->CursorMaxYPosition;
  87                 si->orig_video_isVGA    = VIDEO_TYPE_VGAC;
  88                 si->orig_video_points   = 16;
  89         }
  90 #endif
  91 #endif
  92 }
  93
  94 static struct resource sni_io_resource = {
  95         .start  = 0x00001000UL,
  96         .end    = 0x03bfffffUL,
  97         .name   = "PCIMT IO MEM",
  98         .flags  = IORESOURCE_IO,
  99 };
 100
 101 static struct resource pcimt_io_resources[] = {
 102         {
 103                 .start  = 0x00,
 104                 .end    = 0x1f,
 105                 .name   = "dma1",
 106                 .flags  = IORESOURCE_BUSY
 107         }, {
 108                 .start  =  0x40,
 109                 .end    = 0x5f,
 110                 .name   = "timer",
 111                 .flags  = IORESOURCE_BUSY
 112         }, {
 113                 .start  =  0x60,
 114                 .end    = 0x6f,
 115                 .name   = "keyboard",
 116                 .flags  = IORESOURCE_BUSY
 117         }, {
 118                 .start  =  0x80,
 119                 .end    = 0x8f,
 120                 .name   = "dma page reg",
 121                 .flags  = IORESOURCE_BUSY
 122         }, {
 123                 .start  =  0xc0,
 124                 .end    = 0xdf,
 125                 .name   = "dma2",
 126                 .flags  = IORESOURCE_BUSY
 127         }, {
 128                 .start  =  0xcfc,
 129                 .end    = 0xcff,
 130                 .name   = "PCI config data",
 131                 .flags  = IORESOURCE_BUSY
 132         }
 133 };
 134
 135 static struct resource sni_mem_resource = {
 136         .start  = 0x10000000UL,
 137         .end    = 0xffffffffUL,
 138         .name   = "PCIMT PCI MEM",
 139         .flags  = IORESOURCE_MEM
 140 };
 141
 142 /*
 143  * The RM200/RM300 has a few holes in it's PCI/EISA memory address space used
 144  * for other purposes.  Be paranoid and allocate all of the before the PCI
 145  * code gets a chance to to map anything else there ...
 146  *
 147  * This leaves the following areas available:
 148  *
 149  * 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory
 150  * 0x10100000 - 0x13ffffff ( 15MB) PCI/EISA/ISA Bus Memory
 151  * 0x18000000 - 0x1fbfffff (124MB) PCI/EISA Bus Memory
 152  * 0x1ff08000 - 0x1ffeffff (816kB) PCI/EISA Bus Memory
 153  * 0xa0000000 - 0xffffffff (1.5GB) PCI/EISA Bus Memory
 154  */
 155 static struct resource pcimt_mem_resources[] = {
 156         {
 157                 .start  = 0x100a0000,
 158                 .end    = 0x100bffff,
 159                 .name   = "Video RAM area",
 160                 .flags  = IORESOURCE_BUSY
 161         }, {
 162                 .start  = 0x100c0000,
 163                 .end    = 0x100fffff,
 164                 .name   = "ISA Reserved",
 165                 .flags  = IORESOURCE_BUSY
 166         }, {
 167                 .start  = 0x14000000,
 168                 .end    = 0x17bfffff,
 169                 .name   = "PCI IO",
 170                 .flags  = IORESOURCE_BUSY
 171         }, {
 172                 .start  = 0x17c00000,
 173                 .end    = 0x17ffffff,
 174                 .name   = "Cache Replacement Area",
 175                 .flags  = IORESOURCE_BUSY
 176         }, {
 177                 .start  = 0x1a000000,
 178                 .end    = 0x1a000003,
 179                 .name   = "PCI INT Acknowledge",
 180                 .flags  = IORESOURCE_BUSY
 181         }, {
 182                 .start  = 0x1fc00000,
 183                 .end    = 0x1fc7ffff,
 184                 .name   = "Boot PROM",
 185                 .flags  = IORESOURCE_BUSY
 186         }, {
 187                 .start  = 0x1fc80000,
 188                 .end    = 0x1fcfffff,
 189                 .name   = "Diag PROM",
 190                 .flags  = IORESOURCE_BUSY
 191         }, {
 192                 .start  = 0x1fd00000,
 193                 .end    = 0x1fdfffff,
 194                 .name   = "X-Bus",
 195                 .flags  = IORESOURCE_BUSY
 196         }, {
 197                 .start  = 0x1fe00000,
 198                 .end    = 0x1fefffff,
 199                 .name   = "BIOS map",
 200                 .flags  = IORESOURCE_BUSY
 201         }, {
 202                 .start  = 0x1ff00000,
 203                 .end    = 0x1ff7ffff,
 204                 .name   = "NVRAM / EEPROM",
 205                 .flags  = IORESOURCE_BUSY
 206         }, {
 207                 .start  = 0x1fff0000,
 208                 .end    = 0x1fffefff,
 209                 .name   = "ASIC PCI",
 210                 .flags  = IORESOURCE_BUSY
 211         }, {
 212                 .start  = 0x1ffff000,
 213                 .end    = 0x1fffffff,
 214                 .name   = "MP Agent",
 215                 .flags  = IORESOURCE_BUSY
 216         }, {
 217                 .start  = 0x20000000,
 218                 .end    = 0x9fffffff,
 219                 .name   = "Main Memory",
 220                 .flags  = IORESOURCE_BUSY
 221         }
 222 };
 223
 224 static void __init sni_resource_init(void)
 225 {
 226         int i;
 227
 228         /* request I/O space for devices used on all i[345]86 PCs */
 229         for (i = 0; i < ARRAY_SIZE(pcimt_io_resources); i++)
 230                 request_resource(&ioport_resource, pcimt_io_resources + i);
 231
 232         /* request mem space for pcimt-specific devices */
 233         for (i = 0; i < ARRAY_SIZE(pcimt_mem_resources); i++)
 234                 request_resource(&sni_mem_resource, pcimt_mem_resources + i);
 235
 236         ioport_resource.end = sni_io_resource.end;
 237 }
 238
 239 extern struct pci_ops sni_pci_ops;
 240
 241 static struct pci_controller sni_controller = {
 242         .pci_ops        = &sni_pci_ops,
 243         .mem_resource   = &sni_mem_resource,
 244         .mem_offset     = 0x10000000UL,
 245         .io_resource    = &sni_io_resource,
 246         .io_offset      = 0x00000000UL
 247 };
 248
 249 static inline void sni_pcimt_time_init(void)
 250 {
 251         rtc_mips_get_time = mc146818_get_cmos_time;
 252         rtc_mips_set_time = mc146818_set_rtc_mmss;
 253 }
 254
 255 void __init plat_setup(void)
 256 {
 257         sni_pcimt_detect();
 258         sni_pcimt_sc_init();
 259         sni_pcimt_time_init();
 260
 261         set_io_port_base(SNI_PORT_BASE);
 262         ioport_resource.end = sni_io_resource.end;
 263
 264         /*
 265          * Setup (E)ISA I/O memory access stuff
 266          */
 267         isa_slot_offset = 0xb0000000;
 268 #ifdef CONFIG_EISA
 269         EISA_bus = 1;
 270 #endif
 271
 272         sni_resource_init();
 273         board_timer_setup = sni_rm200_pci_timer_setup;
 274
 275         _machine_restart = sni_machine_restart;
 276         _machine_halt = sni_machine_halt;
 277         pm_power_off = sni_machine_power_off;
 278
 279         sni_display_setup();
 280
 281 #ifdef CONFIG_PCI
 282         register_pci_controller(&sni_controller);
 283 #endif
 284 }