ARM: mvebu: Add MBus to Armada 370/XP device tree
[linux-2.6.git] / arch / arm / boot / dts / armada-370-db.dts
blob5920b4e4b74c523674e2545348aec2deaab4caa5
1 /*
2  * Device Tree file for Marvell Armada 370 evaluation board
3  * (DB-88F6710-BP-DDR3)
4  *
5  *  Copyright (C) 2012 Marvell
6  *
7  * Lior Amsalem <alior@marvell.com>
8  * Gregory CLEMENT <gregory.clement@free-electrons.com>
9  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10  *
11  * This file is licensed under the terms of the GNU General Public
12  * License version 2.  This program is licensed "as is" without any
13  * warranty of any kind, whether express or implied.
14  */
16 /dts-v1/;
17 #include "armada-370.dtsi"
19 / {
20         model = "Marvell Armada 370 Evaluation Board";
21         compatible = "marvell,a370-db", "marvell,armada370", "marvell,armada-370-xp";
23         chosen {
24                 bootargs = "console=ttyS0,115200 earlyprintk";
25         };
27         memory {
28                 device_type = "memory";
29                 reg = <0x00000000 0x40000000>; /* 1 GB */
30         };
32         soc {
33                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>;
35                 internal-regs {
36                         serial@12000 {
37                                 clock-frequency = <200000000>;
38                                 status = "okay";
39                         };
40                         sata@a0000 {
41                                 nr-ports = <2>;
42                                 status = "okay";
43                         };
45                         mdio {
46                                 phy0: ethernet-phy@0 {
47                                         reg = <0>;
48                                 };
50                                 phy1: ethernet-phy@1 {
51                                         reg = <1>;
52                                 };
53                         };
55                         ethernet@70000 {
56                                 status = "okay";
57                                 phy = <&phy0>;
58                                 phy-mode = "rgmii-id";
59                         };
60                         ethernet@74000 {
61                                 status = "okay";
62                                 phy = <&phy1>;
63                                 phy-mode = "rgmii-id";
64                         };
66                         mvsdio@d4000 {
67                                 pinctrl-0 = <&sdio_pins1>;
68                                 pinctrl-names = "default";
69                                 /*
70                                  * This device is disabled by default, because
71                                  * using the SD card connector requires
72                                  * changing the default CON40 connector
73                                  * "DB-88F6710_MPP_2xRGMII_DEVICE_Jumper" to a
74                                  * different connector
75                                  * "DB-88F6710_MPP_RGMII_SD_Jumper".
76                                  */
77                                 status = "disabled";
78                                 /* No CD or WP GPIOs */
79                                 broken-cd;
80                         };
82                         usb@50000 {
83                                 status = "okay";
84                         };
86                         usb@51000 {
87                                 status = "okay";
88                         };
90                         spi0: spi@10600 {
91                                 status = "okay";
93                                 spi-flash@0 {
94                                         #address-cells = <1>;
95                                         #size-cells = <1>;
96                                         compatible = "mx25l25635e";
97                                         reg = <0>; /* Chip select 0 */
98                                         spi-max-frequency = <50000000>;
99                                 };
100                         };
102                         pcie-controller {
103                                 status = "okay";
104                                 /*
105                                  * The two PCIe units are accessible through
106                                  * both standard PCIe slots and mini-PCIe
107                                  * slots on the board.
108                                  */
109                                 pcie@1,0 {
110                                         /* Port 0, Lane 0 */
111                                         status = "okay";
112                                 };
113                                 pcie@2,0 {
114                                         /* Port 1, Lane 0 */
115                                         status = "okay";
116                                 };
117                         };
118                 };
119         };