1 #ifndef __ASM_ARM_DMA_H
2 #define __ASM_ARM_DMA_H
5 * This is the maximum virtual address which can be DMA'd from.
7 #ifndef CONFIG_ZONE_DMA
8 #define MAX_DMA_ADDRESS 0xffffffffUL
10 #define MAX_DMA_ADDRESS ({ \
11 extern unsigned long arm_dma_zone_size; \
13 (PAGE_OFFSET + arm_dma_zone_size) : 0xffffffffUL; })
16 #ifdef CONFIG_ISA_DMA_API
18 * This is used to support drivers written for the x86 ISA DMA API.
19 * It should not be re-used except for that purpose.
21 #include <linux/spinlock.h>
22 #include <asm/scatterlist.h>
24 #include <mach/isa-dma.h>
27 * The DMA modes reflect the settings for the ISA DMA controller
29 #define DMA_MODE_MASK 0xcc
31 #define DMA_MODE_READ 0x44
32 #define DMA_MODE_WRITE 0x48
33 #define DMA_MODE_CASCADE 0xc0
34 #define DMA_AUTOINIT 0x10
36 extern raw_spinlock_t dma_spin_lock
;
38 static inline unsigned long claim_dma_lock(void)
41 raw_spin_lock_irqsave(&dma_spin_lock
, flags
);
45 static inline void release_dma_lock(unsigned long flags
)
47 raw_spin_unlock_irqrestore(&dma_spin_lock
, flags
);
50 /* Clear the 'DMA Pointer Flip Flop'.
51 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
53 #define clear_dma_ff(chan)
55 /* Set only the page register bits of the transfer address.
57 * NOTE: This is an architecture specific function, and should
58 * be hidden from the drivers
60 extern void set_dma_page(unsigned int chan
, char pagenr
);
62 /* Request a DMA channel
64 * Some architectures may need to do allocate an interrupt
66 extern int request_dma(unsigned int chan
, const char * device_id
);
70 * Some architectures may need to do free an interrupt
72 extern void free_dma(unsigned int chan
);
74 /* Enable DMA for this channel
76 * On some architectures, this may have other side effects like
77 * enabling an interrupt and setting the DMA registers.
79 extern void enable_dma(unsigned int chan
);
81 /* Disable DMA for this channel
83 * On some architectures, this may have other side effects like
84 * disabling an interrupt or whatever.
86 extern void disable_dma(unsigned int chan
);
88 /* Test whether the specified channel has an active DMA transfer
90 extern int dma_channel_active(unsigned int chan
);
92 /* Set the DMA scatter gather list for this channel
94 * This should not be called if a DMA channel is enabled,
95 * especially since some DMA architectures don't update the
96 * DMA address immediately, but defer it to the enable_dma().
98 extern void set_dma_sg(unsigned int chan
, struct scatterlist
*sg
, int nr_sg
);
100 /* Set the DMA address for this channel
102 * This should not be called if a DMA channel is enabled,
103 * especially since some DMA architectures don't update the
104 * DMA address immediately, but defer it to the enable_dma().
106 extern void __set_dma_addr(unsigned int chan
, void *addr
);
107 #define set_dma_addr(chan, addr) \
108 __set_dma_addr(chan, (void *)__bus_to_virt(addr))
110 /* Set the DMA byte count for this channel
112 * This should not be called if a DMA channel is enabled,
113 * especially since some DMA architectures don't update the
114 * DMA count immediately, but defer it to the enable_dma().
116 extern void set_dma_count(unsigned int chan
, unsigned long count
);
118 /* Set the transfer direction for this channel
120 * This should not be called if a DMA channel is enabled,
121 * especially since some DMA architectures don't update the
122 * DMA transfer direction immediately, but defer it to the
125 extern void set_dma_mode(unsigned int chan
, unsigned int mode
);
127 /* Set the transfer speed for this channel
129 extern void set_dma_speed(unsigned int chan
, int cycle_ns
);
131 /* Get DMA residue count. After a DMA transfer, this
132 * should return zero. Reading this while a DMA transfer is
133 * still in progress will return unpredictable results.
134 * If called before the channel has been used, it may return 1.
135 * Otherwise, it returns the number of _bytes_ left to transfer.
137 extern int get_dma_residue(unsigned int chan
);
143 #endif /* CONFIG_ISA_DMA_API */
146 extern int isa_dma_bridge_buggy
;
148 #define isa_dma_bridge_buggy (0)
151 #endif /* __ASM_ARM_DMA_H */