2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/seq_file.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/console.h>
14 #include <linux/module.h>
15 #include <linux/cpu.h>
16 #include <linux/of_fdt.h>
17 #include <linux/cache.h>
18 #include <asm/sections.h>
19 #include <asm/arcregs.h>
21 #include <asm/setup.h>
25 #include <asm/unwind.h>
27 #include <asm/mach_desc.h>
29 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
31 int running_on_hw
= 1; /* vs. on ISS */
33 char __initdata command_line
[COMMAND_LINE_SIZE
];
34 struct machine_desc
*machine_desc __cpuinitdata
;
36 struct task_struct
*_current_task
[NR_CPUS
]; /* For stack switching */
38 struct cpuinfo_arc cpuinfo_arc700
[NR_CPUS
];
41 void __cpuinit
read_arc_build_cfg_regs(void)
43 struct bcr_perip uncached_space
;
44 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[smp_processor_id()];
47 READ_BCR(AUX_IDENTITY
, cpu
->core
);
49 cpu
->timers
= read_aux_reg(ARC_REG_TIMERS_BCR
);
51 cpu
->vec_base
= read_aux_reg(AUX_INTR_VEC_BASE
);
52 if (cpu
->vec_base
== 0)
53 cpu
->vec_base
= (unsigned int)_int_vec_base_lds
;
55 READ_BCR(ARC_REG_D_UNCACH_BCR
, uncached_space
);
56 cpu
->uncached_base
= uncached_space
.start
<< 24;
58 cpu
->extn
.mul
= read_aux_reg(ARC_REG_MUL_BCR
);
59 cpu
->extn
.swap
= read_aux_reg(ARC_REG_SWAP_BCR
);
60 cpu
->extn
.norm
= read_aux_reg(ARC_REG_NORM_BCR
);
61 cpu
->extn
.minmax
= read_aux_reg(ARC_REG_MIXMAX_BCR
);
62 cpu
->extn
.barrel
= read_aux_reg(ARC_REG_BARREL_BCR
);
63 READ_BCR(ARC_REG_MAC_BCR
, cpu
->extn_mac_mul
);
65 cpu
->extn
.ext_arith
= read_aux_reg(ARC_REG_EXTARITH_BCR
);
66 cpu
->extn
.crc
= read_aux_reg(ARC_REG_CRC_BCR
);
68 /* Note that we read the CCM BCRs independent of kernel config
69 * This is to catch the cases where user doesn't know that
70 * CCMs are present in hardware build
75 struct bcr_dccm_base dccm_base
;
76 unsigned int bcr_32bit_val
;
78 bcr_32bit_val
= read_aux_reg(ARC_REG_ICCM_BCR
);
80 iccm
= *((struct bcr_iccm
*)&bcr_32bit_val
);
81 cpu
->iccm
.base_addr
= iccm
.base
<< 16;
82 cpu
->iccm
.sz
= 0x2000 << (iccm
.sz
- 1);
85 bcr_32bit_val
= read_aux_reg(ARC_REG_DCCM_BCR
);
87 dccm
= *((struct bcr_dccm
*)&bcr_32bit_val
);
88 cpu
->dccm
.sz
= 0x800 << (dccm
.sz
);
90 READ_BCR(ARC_REG_DCCMBASE_BCR
, dccm_base
);
91 cpu
->dccm
.base_addr
= dccm_base
.addr
<< 8;
95 READ_BCR(ARC_REG_XY_MEM_BCR
, cpu
->extn_xymem
);
97 read_decode_mmu_bcr();
98 read_decode_cache_bcr();
100 READ_BCR(ARC_REG_FP_BCR
, cpu
->fp
);
101 READ_BCR(ARC_REG_DPFP_BCR
, cpu
->dpfp
);
104 static const struct cpuinfo_data arc_cpu_tbl
[] = {
105 { {0x10, "ARCTangent A5"}, 0x1F},
106 { {0x20, "ARC 600" }, 0x2F},
107 { {0x30, "ARC 700" }, 0x33},
108 { {0x34, "ARC 700 R4.10"}, 0x34},
112 char *arc_cpu_mumbojumbo(int cpu_id
, char *buf
, int len
)
115 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[cpu_id
];
116 struct bcr_identity
*core
= &cpu
->core
;
117 const struct cpuinfo_data
*tbl
;
119 #ifdef CONFIG_CPU_BIG_ENDIAN
124 n
+= scnprintf(buf
+ n
, len
- n
,
125 "\nARC IDENTITY\t: Family [%#02x]"
126 " Cpu-id [%#02x] Chip-id [%#4x]\n",
127 core
->family
, core
->cpu_id
,
130 for (tbl
= &arc_cpu_tbl
[0]; tbl
->info
.id
!= 0; tbl
++) {
131 if ((core
->family
>= tbl
->info
.id
) &&
132 (core
->family
<= tbl
->up_range
)) {
133 n
+= scnprintf(buf
+ n
, len
- n
,
134 "processor\t: %s %s\n",
136 be
? "[Big Endian]" : "");
141 if (tbl
->info
.id
== 0)
142 n
+= scnprintf(buf
+ n
, len
- n
, "UNKNOWN ARC Processor\n");
144 n
+= scnprintf(buf
+ n
, len
- n
, "CPU speed\t: %u.%02u Mhz\n",
145 (unsigned int)(arc_get_core_freq() / 1000000),
146 (unsigned int)(arc_get_core_freq() / 10000) % 100);
148 n
+= scnprintf(buf
+ n
, len
- n
, "Timers\t\t: %s %s\n",
149 (cpu
->timers
& 0x200) ? "TIMER1" : "",
150 (cpu
->timers
& 0x100) ? "TIMER0" : "");
152 n
+= scnprintf(buf
+ n
, len
- n
, "Vect Tbl Base\t: %#x\n",
155 n
+= scnprintf(buf
+ n
, len
- n
, "UNCACHED Base\t: %#x\n",
161 static const struct id_to_str mul_type_nm
[] = {
163 { 0x1, "32x32 (spl Result Reg)" },
164 { 0x2, "32x32 (ANY Result Reg)" }
167 static const struct id_to_str mac_mul_nm
[] = {
170 {0x2, "Dual 16 x 16"},
174 {0x6, "Dual 16x16 and 32x16"}
177 char *arc_extn_mumbojumbo(int cpu_id
, char *buf
, int len
)
180 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[cpu_id
];
183 #define IS_AVAIL1(var, str) ((var) ? str : "")
184 #define IS_AVAIL2(var, str) ((var == 0x2) ? str : "")
185 #define IS_USED(var) ((var) ? "(in-use)" : "(not used)")
187 n
+= scnprintf(buf
+ n
, len
- n
,
188 "Extn [700-Base]\t: %s %s %s %s %s %s\n",
189 IS_AVAIL2(cpu
->extn
.norm
, "norm,"),
190 IS_AVAIL2(cpu
->extn
.barrel
, "barrel-shift,"),
191 IS_AVAIL1(cpu
->extn
.swap
, "swap,"),
192 IS_AVAIL2(cpu
->extn
.minmax
, "minmax,"),
193 IS_AVAIL1(cpu
->extn
.crc
, "crc,"),
194 IS_AVAIL2(cpu
->extn
.ext_arith
, "ext-arith"));
196 n
+= scnprintf(buf
+ n
, len
- n
, "Extn [700-MPY]\t: %s",
197 mul_type_nm
[cpu
->extn
.mul
].str
);
199 n
+= scnprintf(buf
+ n
, len
- n
, " MAC MPY: %s\n",
200 mac_mul_nm
[cpu
->extn_mac_mul
.type
].str
);
202 if (cpu
->core
.family
== 0x34) {
203 n
+= scnprintf(buf
+ n
, len
- n
,
204 "Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n",
205 IS_USED(__CONFIG_ARC_HAS_LLSC_VAL
),
206 IS_USED(__CONFIG_ARC_HAS_SWAPE_VAL
),
207 IS_USED(__CONFIG_ARC_HAS_RTSC_VAL
));
210 n
+= scnprintf(buf
+ n
, len
- n
, "Extn [CCM]\t: %s",
211 !(cpu
->dccm
.sz
|| cpu
->iccm
.sz
) ? "N/A" : "");
214 n
+= scnprintf(buf
+ n
, len
- n
, "DCCM: @ %x, %d KB ",
215 cpu
->dccm
.base_addr
, TO_KB(cpu
->dccm
.sz
));
218 n
+= scnprintf(buf
+ n
, len
- n
, "ICCM: @ %x, %d KB",
219 cpu
->iccm
.base_addr
, TO_KB(cpu
->iccm
.sz
));
221 n
+= scnprintf(buf
+ n
, len
- n
, "\nExtn [FPU]\t: %s",
222 !(cpu
->fp
.ver
|| cpu
->dpfp
.ver
) ? "N/A" : "");
225 n
+= scnprintf(buf
+ n
, len
- n
, "SP [v%d] %s",
226 cpu
->fp
.ver
, cpu
->fp
.fast
? "(fast)" : "");
229 n
+= scnprintf(buf
+ n
, len
- n
, "DP [v%d] %s",
230 cpu
->dpfp
.ver
, cpu
->dpfp
.fast
? "(fast)" : "");
232 n
+= scnprintf(buf
+ n
, len
- n
, "\n");
234 n
+= scnprintf(buf
+ n
, len
- n
,
235 "OS ABI [v3]\t: no-legacy-syscalls\n");
240 void __cpuinit
arc_chk_ccms(void)
242 #if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM)
243 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[smp_processor_id()];
245 #ifdef CONFIG_ARC_HAS_DCCM
247 * DCCM can be arbit placed in hardware.
248 * Make sure it's placement/sz matches what Linux is built with
250 if ((unsigned int)__arc_dccm_base
!= cpu
->dccm
.base_addr
)
251 panic("Linux built with incorrect DCCM Base address\n");
253 if (CONFIG_ARC_DCCM_SZ
!= cpu
->dccm
.sz
)
254 panic("Linux built with incorrect DCCM Size\n");
257 #ifdef CONFIG_ARC_HAS_ICCM
258 if (CONFIG_ARC_ICCM_SZ
!= cpu
->iccm
.sz
)
259 panic("Linux built with incorrect ICCM Size\n");
265 * Ensure that FP hardware and kernel config match
266 * -If hardware contains DPFP, kernel needs to save/restore FPU state
267 * across context switches
268 * -If hardware lacks DPFP, but kernel configured to save FPU state then
269 * kernel trying to access non-existant DPFP regs will crash
271 * We only check for Dbl precision Floating Point, because only DPFP
272 * hardware has dedicated regs which need to be saved/restored on ctx-sw
273 * (Single Precision uses core regs), thus kernel is kind of oblivious to it
275 void __cpuinit
arc_chk_fpu(void)
277 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[smp_processor_id()];
280 #ifndef CONFIG_ARC_FPU_SAVE_RESTORE
281 pr_warn("DPFP support broken in this kernel...\n");
284 #ifdef CONFIG_ARC_FPU_SAVE_RESTORE
285 panic("H/w lacks DPFP support, apps won't work\n");
291 * Initialize and setup the processor core
292 * This is called by all the CPUs thus should not do special case stuff
293 * such as only for boot CPU etc
296 void __cpuinit
setup_processor(void)
299 int cpu_id
= smp_processor_id();
301 read_arc_build_cfg_regs();
304 printk(arc_cpu_mumbojumbo(cpu_id
, str
, sizeof(str
)));
310 printk(arc_extn_mumbojumbo(cpu_id
, str
, sizeof(str
)));
313 printk(arc_platform_smp_cpuinfo());
319 void __init
setup_arch(char **cmdline_p
)
321 /* This also populates @boot_command_line from /bootargs */
322 machine_desc
= setup_machine_fdt(__dtb_start
);
324 panic("Embedded DT invalid\n");
326 /* Append any u-boot provided cmdline */
327 #ifdef CONFIG_CMDLINE_UBOOT
328 /* Add a whitespace seperator between the 2 cmdlines */
329 strlcat(boot_command_line
, " ", COMMAND_LINE_SIZE
);
330 strlcat(boot_command_line
, command_line
, COMMAND_LINE_SIZE
);
333 /* Save unparsed command line copy for /proc/cmdline */
334 *cmdline_p
= boot_command_line
;
336 /* To force early parsing of things like mem=xxx */
339 /* Platform/board specific: e.g. early console registration */
340 if (machine_desc
->init_early
)
341 machine_desc
->init_early();
351 /* copy flat DT out of .init and then unflatten it */
353 unflatten_device_tree();
355 /* Can be issue if someone passes cmd line arg "ro"
356 * But that is unlikely so keeping it as it is
358 root_mountflags
&= ~MS_RDONLY
;
362 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
363 conswitchp
= &dummy_con
;
370 static int __init
customize_machine(void)
372 /* Add platform devices */
373 if (machine_desc
->init_machine
)
374 machine_desc
->init_machine();
378 arch_initcall(customize_machine
);
380 static int __init
init_late_machine(void)
382 if (machine_desc
->init_late
)
383 machine_desc
->init_late();
387 late_initcall(init_late_machine
);
389 * Get CPU information for use by the procfs.
392 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
393 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
395 static int show_cpuinfo(struct seq_file
*m
, void *v
)
398 int cpu_id
= ptr_to_cpu(v
);
400 str
= (char *)__get_free_page(GFP_TEMPORARY
);
404 seq_printf(m
, arc_cpu_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
406 seq_printf(m
, "Bogo MIPS : \t%lu.%02lu\n",
407 loops_per_jiffy
/ (500000 / HZ
),
408 (loops_per_jiffy
/ (5000 / HZ
)) % 100);
410 seq_printf(m
, arc_mmu_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
412 seq_printf(m
, arc_cache_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
414 seq_printf(m
, arc_extn_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
417 seq_printf(m
, arc_platform_smp_cpuinfo());
420 free_page((unsigned long)str
);
422 seq_printf(m
, "\n\n");
427 static void *c_start(struct seq_file
*m
, loff_t
*pos
)
430 * Callback returns cpu-id to iterator for show routine, NULL to stop.
431 * However since NULL is also a valid cpu-id (0), we use a round-about
432 * way to pass it w/o having to kmalloc/free a 2 byte string.
433 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
435 return *pos
< num_possible_cpus() ? cpu_to_ptr(*pos
) : NULL
;
438 static void *c_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
441 return c_start(m
, pos
);
444 static void c_stop(struct seq_file
*m
, void *v
)
448 const struct seq_operations cpuinfo_op
= {
455 static DEFINE_PER_CPU(struct cpu
, cpu_topology
);
457 static int __init
topology_init(void)
461 for_each_present_cpu(cpu
)
462 register_cpu(&per_cpu(cpu_topology
, cpu
), cpu
);
467 subsys_initcall(topology_init
);