4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
6 * 2006 (c) MontaVista Software, Inc.
7 * Vitaly Bordug <vbordug@ru.mvista.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/stddef.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/errno.h>
19 #include <linux/major.h>
20 #include <linux/delay.h>
21 #include <linux/irq.h>
22 #include <linux/module.h>
23 #include <linux/device.h>
24 #include <linux/platform_device.h>
25 #include <linux/of_platform.h>
26 #include <linux/phy.h>
27 #include <linux/phy_fixed.h>
28 #include <linux/spi/spi.h>
29 #include <linux/fsl_devices.h>
30 #include <linux/fs_enet_pd.h>
31 #include <linux/fs_uart_pd.h>
33 #include <asm/system.h>
34 #include <asm/atomic.h>
39 #include <sysdev/fsl_soc.h>
40 #include <mm/mmu_decl.h>
43 extern void init_fcc_ioports(struct fs_platform_info
*);
44 extern void init_fec_ioports(struct fs_platform_info
*);
45 extern void init_smc_ioports(struct fs_uart_platform_info
*);
46 static phys_addr_t immrbase
= -1;
48 phys_addr_t
get_immrbase(void)
50 struct device_node
*soc
;
55 soc
= of_find_node_by_type(NULL
, "soc");
59 const u32
*prop
= of_get_property(soc
, "#address-cells", &size
);
61 if (prop
&& size
== 4)
66 prop
= of_get_property(soc
, "ranges", &size
);
68 immrbase
= of_translate_address(soc
, prop
+ naddr
);
76 EXPORT_SYMBOL(get_immrbase
);
78 static u32 sysfreq
= -1;
80 u32
fsl_get_sys_freq(void)
82 struct device_node
*soc
;
89 soc
= of_find_node_by_type(NULL
, "soc");
93 prop
= of_get_property(soc
, "clock-frequency", &size
);
94 if (!prop
|| size
!= sizeof(*prop
) || *prop
== 0)
95 prop
= of_get_property(soc
, "bus-frequency", &size
);
97 if (prop
&& size
== sizeof(*prop
))
103 EXPORT_SYMBOL(fsl_get_sys_freq
);
105 #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
107 static u32 brgfreq
= -1;
109 u32
get_brgfreq(void)
111 struct device_node
*node
;
112 const unsigned int *prop
;
118 node
= of_find_compatible_node(NULL
, NULL
, "fsl,cpm-brg");
120 prop
= of_get_property(node
, "clock-frequency", &size
);
121 if (prop
&& size
== 4)
128 /* Legacy device binding -- will go away when no users are left. */
129 node
= of_find_node_by_type(NULL
, "cpm");
131 node
= of_find_compatible_node(NULL
, NULL
, "fsl,qe");
133 node
= of_find_node_by_type(NULL
, "qe");
136 prop
= of_get_property(node
, "brg-frequency", &size
);
137 if (prop
&& size
== 4)
140 if (brgfreq
== -1 || brgfreq
== 0) {
141 prop
= of_get_property(node
, "bus-frequency", &size
);
142 if (prop
&& size
== 4)
151 EXPORT_SYMBOL(get_brgfreq
);
153 static u32 fs_baudrate
= -1;
155 u32
get_baudrate(void)
157 struct device_node
*node
;
159 if (fs_baudrate
!= -1)
162 node
= of_find_node_by_type(NULL
, "serial");
165 const unsigned int *prop
= of_get_property(node
,
166 "current-speed", &size
);
176 EXPORT_SYMBOL(get_baudrate
);
177 #endif /* CONFIG_CPM2 */
179 #ifdef CONFIG_FIXED_PHY
180 static int __init
of_add_fixed_phys(void)
183 struct device_node
*np
;
185 struct fixed_phy_status status
= {};
187 for_each_node_by_name(np
, "ethernet") {
188 fixed_link
= (u32
*)of_get_property(np
, "fixed-link", NULL
);
193 status
.duplex
= fixed_link
[1];
194 status
.speed
= fixed_link
[2];
195 status
.pause
= fixed_link
[3];
196 status
.asym_pause
= fixed_link
[4];
198 ret
= fixed_phy_add(PHY_POLL
, fixed_link
[0], &status
);
207 arch_initcall(of_add_fixed_phys
);
208 #endif /* CONFIG_FIXED_PHY */
210 #ifdef CONFIG_PPC_83xx
211 static int __init
mpc83xx_wdt_init(void)
214 struct device_node
*np
;
215 struct platform_device
*dev
;
216 u32 freq
= fsl_get_sys_freq();
219 np
= of_find_compatible_node(NULL
, "watchdog", "mpc83xx_wdt");
226 memset(&r
, 0, sizeof(r
));
228 ret
= of_address_to_resource(np
, 0, &r
);
232 dev
= platform_device_register_simple("mpc83xx_wdt", 0, &r
, 1);
238 ret
= platform_device_add_data(dev
, &freq
, sizeof(freq
));
246 platform_device_unregister(dev
);
253 arch_initcall(mpc83xx_wdt_init
);
256 static enum fsl_usb2_phy_modes
determine_usb_phy(const char *phy_type
)
259 return FSL_USB2_PHY_NONE
;
260 if (!strcasecmp(phy_type
, "ulpi"))
261 return FSL_USB2_PHY_ULPI
;
262 if (!strcasecmp(phy_type
, "utmi"))
263 return FSL_USB2_PHY_UTMI
;
264 if (!strcasecmp(phy_type
, "utmi_wide"))
265 return FSL_USB2_PHY_UTMI_WIDE
;
266 if (!strcasecmp(phy_type
, "serial"))
267 return FSL_USB2_PHY_SERIAL
;
269 return FSL_USB2_PHY_NONE
;
272 static int __init
fsl_usb_of_init(void)
274 struct device_node
*np
;
276 struct platform_device
*usb_dev_mph
= NULL
, *usb_dev_dr_host
= NULL
,
277 *usb_dev_dr_client
= NULL
;
280 for_each_compatible_node(np
, NULL
, "fsl-usb2-mph") {
281 struct resource r
[2];
282 struct fsl_usb2_platform_data usb_data
;
283 const unsigned char *prop
= NULL
;
285 memset(&r
, 0, sizeof(r
));
286 memset(&usb_data
, 0, sizeof(usb_data
));
288 ret
= of_address_to_resource(np
, 0, &r
[0]);
292 of_irq_to_resource(np
, 0, &r
[1]);
295 platform_device_register_simple("fsl-ehci", i
, r
, 2);
296 if (IS_ERR(usb_dev_mph
)) {
297 ret
= PTR_ERR(usb_dev_mph
);
301 usb_dev_mph
->dev
.coherent_dma_mask
= 0xffffffffUL
;
302 usb_dev_mph
->dev
.dma_mask
= &usb_dev_mph
->dev
.coherent_dma_mask
;
304 usb_data
.operating_mode
= FSL_USB2_MPH_HOST
;
306 prop
= of_get_property(np
, "port0", NULL
);
308 usb_data
.port_enables
|= FSL_USB2_PORT0_ENABLED
;
310 prop
= of_get_property(np
, "port1", NULL
);
312 usb_data
.port_enables
|= FSL_USB2_PORT1_ENABLED
;
314 prop
= of_get_property(np
, "phy_type", NULL
);
315 usb_data
.phy_mode
= determine_usb_phy(prop
);
318 platform_device_add_data(usb_dev_mph
, &usb_data
,
320 fsl_usb2_platform_data
));
326 for_each_compatible_node(np
, NULL
, "fsl-usb2-dr") {
327 struct resource r
[2];
328 struct fsl_usb2_platform_data usb_data
;
329 const unsigned char *prop
= NULL
;
331 memset(&r
, 0, sizeof(r
));
332 memset(&usb_data
, 0, sizeof(usb_data
));
334 ret
= of_address_to_resource(np
, 0, &r
[0]);
338 of_irq_to_resource(np
, 0, &r
[1]);
340 prop
= of_get_property(np
, "dr_mode", NULL
);
342 if (!prop
|| !strcmp(prop
, "host")) {
343 usb_data
.operating_mode
= FSL_USB2_DR_HOST
;
344 usb_dev_dr_host
= platform_device_register_simple(
345 "fsl-ehci", i
, r
, 2);
346 if (IS_ERR(usb_dev_dr_host
)) {
347 ret
= PTR_ERR(usb_dev_dr_host
);
350 } else if (prop
&& !strcmp(prop
, "peripheral")) {
351 usb_data
.operating_mode
= FSL_USB2_DR_DEVICE
;
352 usb_dev_dr_client
= platform_device_register_simple(
353 "fsl-usb2-udc", i
, r
, 2);
354 if (IS_ERR(usb_dev_dr_client
)) {
355 ret
= PTR_ERR(usb_dev_dr_client
);
358 } else if (prop
&& !strcmp(prop
, "otg")) {
359 usb_data
.operating_mode
= FSL_USB2_DR_OTG
;
360 usb_dev_dr_host
= platform_device_register_simple(
361 "fsl-ehci", i
, r
, 2);
362 if (IS_ERR(usb_dev_dr_host
)) {
363 ret
= PTR_ERR(usb_dev_dr_host
);
366 usb_dev_dr_client
= platform_device_register_simple(
367 "fsl-usb2-udc", i
, r
, 2);
368 if (IS_ERR(usb_dev_dr_client
)) {
369 ret
= PTR_ERR(usb_dev_dr_client
);
377 prop
= of_get_property(np
, "phy_type", NULL
);
378 usb_data
.phy_mode
= determine_usb_phy(prop
);
380 if (usb_dev_dr_host
) {
381 usb_dev_dr_host
->dev
.coherent_dma_mask
= 0xffffffffUL
;
382 usb_dev_dr_host
->dev
.dma_mask
= &usb_dev_dr_host
->
383 dev
.coherent_dma_mask
;
384 if ((ret
= platform_device_add_data(usb_dev_dr_host
,
385 &usb_data
, sizeof(struct
386 fsl_usb2_platform_data
))))
389 if (usb_dev_dr_client
) {
390 usb_dev_dr_client
->dev
.coherent_dma_mask
= 0xffffffffUL
;
391 usb_dev_dr_client
->dev
.dma_mask
= &usb_dev_dr_client
->
392 dev
.coherent_dma_mask
;
393 if ((ret
= platform_device_add_data(usb_dev_dr_client
,
394 &usb_data
, sizeof(struct
395 fsl_usb2_platform_data
))))
404 platform_device_unregister(usb_dev_dr_host
);
405 if (usb_dev_dr_client
)
406 platform_device_unregister(usb_dev_dr_client
);
409 platform_device_unregister(usb_dev_mph
);
414 arch_initcall(fsl_usb_of_init
);
416 static int __init
of_fsl_spi_probe(char *type
, char *compatible
, u32 sysclk
,
417 struct spi_board_info
*board_infos
,
418 unsigned int num_board_infos
,
419 void (*activate_cs
)(u8 cs
, u8 polarity
),
420 void (*deactivate_cs
)(u8 cs
, u8 polarity
))
422 struct device_node
*np
;
425 for_each_compatible_node(np
, type
, compatible
) {
429 struct resource res
[2];
430 struct platform_device
*pdev
;
431 struct fsl_spi_platform_data pdata
= {
432 .activate_cs
= activate_cs
,
433 .deactivate_cs
= deactivate_cs
,
436 memset(res
, 0, sizeof(res
));
438 pdata
.sysclk
= sysclk
;
440 prop
= of_get_property(np
, "reg", NULL
);
443 pdata
.bus_num
= *(u32
*)prop
;
445 prop
= of_get_property(np
, "cell-index", NULL
);
449 prop
= of_get_property(np
, "mode", NULL
);
450 if (prop
&& !strcmp(prop
, "cpu-qe"))
453 for (j
= 0; j
< num_board_infos
; j
++) {
454 if (board_infos
[j
].bus_num
== pdata
.bus_num
)
455 pdata
.max_chipselect
++;
458 if (!pdata
.max_chipselect
)
461 ret
= of_address_to_resource(np
, 0, &res
[0]);
465 ret
= of_irq_to_resource(np
, 0, &res
[1]);
469 pdev
= platform_device_alloc("mpc83xx_spi", i
);
473 ret
= platform_device_add_data(pdev
, &pdata
, sizeof(pdata
));
477 ret
= platform_device_add_resources(pdev
, res
,
482 ret
= platform_device_add(pdev
);
488 platform_device_del(pdev
);
490 pr_err("%s: registration failed\n", np
->full_name
);
498 int __init
fsl_spi_init(struct spi_board_info
*board_infos
,
499 unsigned int num_board_infos
,
500 void (*activate_cs
)(u8 cs
, u8 polarity
),
501 void (*deactivate_cs
)(u8 cs
, u8 polarity
))
506 #ifdef CONFIG_QUICC_ENGINE
507 /* SPI controller is either clocked from QE or SoC clock */
508 sysclk
= get_brgfreq();
511 sysclk
= fsl_get_sys_freq();
516 ret
= of_fsl_spi_probe(NULL
, "fsl,spi", sysclk
, board_infos
,
517 num_board_infos
, activate_cs
, deactivate_cs
);
519 of_fsl_spi_probe("spi", "fsl_spi", sysclk
, board_infos
,
520 num_board_infos
, activate_cs
, deactivate_cs
);
522 return spi_register_board_info(board_infos
, num_board_infos
);
525 #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
526 static __be32 __iomem
*rstcr
;
528 static int __init
setup_rstcr(void)
530 struct device_node
*np
;
531 np
= of_find_node_by_name(NULL
, "global-utilities");
532 if ((np
&& of_get_property(np
, "fsl,has-rstcr", NULL
))) {
533 const u32
*prop
= of_get_property(np
, "reg", NULL
);
535 /* map reset control register
536 * 0xE00B0 is offset of reset control register
538 rstcr
= ioremap(get_immrbase() + *prop
+ 0xB0, 0xff);
540 printk (KERN_EMERG
"Error: reset control "
541 "register not mapped!\n");
544 printk (KERN_INFO
"rstcr compatible register does not exist!\n");
550 arch_initcall(setup_rstcr
);
552 void fsl_rstcr_restart(char *cmd
)
556 /* set reset control register */
557 out_be32(rstcr
, 0x2); /* HRESET_REQ */
563 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
564 struct platform_diu_data_ops diu_ops
;
565 EXPORT_SYMBOL(diu_ops
);