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V4L/DVB: gspca_xirlink_cit: Use alt setting -> fps formula for model 1 cams too
[linux-2.6.git] / drivers / atm / zatm.c
blob4e885d2da49c6f0b5899b9eb3d8d1a874e700ca3
1 /* drivers/atm/zatm.c - ZeitNet ZN122x device driver */
2
3 /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
4
5
6 #include <linux/module.h>
7 #include <linux/kernel.h>
8 #include <linux/mm.h>
9 #include <linux/pci.h>
10 #include <linux/errno.h>
11 #include <linux/atm.h>
12 #include <linux/atmdev.h>
13 #include <linux/sonet.h>
14 #include <linux/skbuff.h>
15 #include <linux/netdevice.h>
16 #include <linux/delay.h>
17 #include <linux/uio.h>
18 #include <linux/init.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/atm_zatm.h>
21 #include <linux/capability.h>
22 #include <linux/bitops.h>
23 #include <linux/wait.h>
24 #include <linux/slab.h>
25 #include <asm/byteorder.h>
26 #include <asm/system.h>
27 #include <asm/string.h>
28 #include <asm/io.h>
29 #include <asm/atomic.h>
30 #include <asm/uaccess.h>
31
32 #include "uPD98401.h"
33 #include "uPD98402.h"
34 #include "zeprom.h"
35 #include "zatm.h"
36
37
38 /*
39 * TODO:
40 *
41 * Minor features
42 * - support 64 kB SDUs (will have to use multibuffer batches then :-( )
43 * - proper use of CDV, credit = max(1,CDVT*PCR)
44 * - AAL0
45 * - better receive timestamps
46 * - OAM
47 */
48
49 #define ZATM_COPPER 1
50
51 #if 0
52 #define DPRINTK(format,args...) printk(KERN_DEBUG format,##args)
53 #else
54 #define DPRINTK(format,args...)
55 #endif
56
57 #ifndef CONFIG_ATM_ZATM_DEBUG
58
59
60 #define NULLCHECK(x)
61
62 #define EVENT(s,a,b)
63
64
65 static void event_dump(void)
66 {
67 }
68
69
70 #else
71
72
73 /*
74 * NULL pointer checking
75 */
76
77 #define NULLCHECK(x) \
78 if ((unsigned long) (x) < 0x30) printk(KERN_CRIT #x "==0x%x\n", (int) (x))
79
80 /*
81 * Very extensive activity logging. Greatly improves bug detection speed but
82 * costs a few Mbps if enabled.
83 */
84
85 #define EV 64
86
87 static const char *ev[EV];
88 static unsigned long ev_a[EV],ev_b[EV];
89 static int ec = 0;
90
91
92 static void EVENT(const char *s,unsigned long a,unsigned long b)
93 {
94 ev[ec] = s;
95 ev_a[ec] = a;
96 ev_b[ec] = b;
97 ec = (ec+1) % EV;
98 }
99
100
101 static void event_dump(void)
102 {
103 int n,i;
104
105 printk(KERN_NOTICE "----- event dump follows -----\n");
106 for (n = 0; n < EV; n++) {
107 i = (ec+n) % EV;
108 printk(KERN_NOTICE);
109 printk(ev[i] ? ev[i] : "(null)",ev_a[i],ev_b[i]);
110 }
111 printk(KERN_NOTICE "----- event dump ends here -----\n");
112 }
113
114
115 #endif /* CONFIG_ATM_ZATM_DEBUG */
116
117
118 #define RING_BUSY 1 /* indication from do_tx that PDU has to be
119 backlogged */
120
121 static struct atm_dev *zatm_boards = NULL;
122 static unsigned long dummy[2] = {0,0};
123
124
125 #define zin_n(r) inl(zatm_dev->base+r*4)
126 #define zin(r) inl(zatm_dev->base+uPD98401_##r*4)
127 #define zout(v,r) outl(v,zatm_dev->base+uPD98401_##r*4)
128 #define zwait while (zin(CMR) & uPD98401_BUSY)
129
130 /* RX0, RX1, TX0, TX1 */
131 static const int mbx_entries[NR_MBX] = { 1024,1024,1024,1024 };
132 static const int mbx_esize[NR_MBX] = { 16,16,4,4 }; /* entry size in bytes */
133
134 #define MBX_SIZE(i) (mbx_entries[i]*mbx_esize[i])
135
136
137 /*-------------------------------- utilities --------------------------------*/
138
139
140 static void zpokel(struct zatm_dev *zatm_dev,u32 value,u32 addr)
141 {
142 zwait;
143 zout(value,CER);
144 zout(uPD98401_IND_ACC | uPD98401_IA_BALL |
145 (uPD98401_IA_TGT_CM << uPD98401_IA_TGT_SHIFT) | addr,CMR);
146 }
147
148
149 static u32 zpeekl(struct zatm_dev *zatm_dev,u32 addr)
150 {
151 zwait;
152 zout(uPD98401_IND_ACC | uPD98401_IA_BALL | uPD98401_IA_RW |
153 (uPD98401_IA_TGT_CM << uPD98401_IA_TGT_SHIFT) | addr,CMR);
154 zwait;
155 return zin(CER);
156 }
157
158
159 /*------------------------------- free lists --------------------------------*/
160
161
162 /*
163 * Free buffer head structure:
164 * [0] pointer to buffer (for SAR)
165 * [1] buffer descr link pointer (for SAR)
166 * [2] back pointer to skb (for poll_rx)
167 * [3] data
168 * ...
169 */
170
171 struct rx_buffer_head {
172 u32 buffer; /* pointer to buffer (for SAR) */
173 u32 link; /* buffer descriptor link pointer (for SAR) */
174 struct sk_buff *skb; /* back pointer to skb (for poll_rx) */
175 };
176
177
178 static void refill_pool(struct atm_dev *dev,int pool)
179 {
180 struct zatm_dev *zatm_dev;
181 struct sk_buff *skb;
182 struct rx_buffer_head *first;
183 unsigned long flags;
184 int align,offset,free,count,size;
185
186 EVENT("refill_pool\n",0,0);
187 zatm_dev = ZATM_DEV(dev);
188 size = (64 << (pool <= ZATM_AAL5_POOL_BASE ? 0 :
189 pool-ZATM_AAL5_POOL_BASE))+sizeof(struct rx_buffer_head);
190 if (size < PAGE_SIZE) {
191 align = 32; /* for 32 byte alignment */
192 offset = sizeof(struct rx_buffer_head);
193 }
194 else {
195 align = 4096;
196 offset = zatm_dev->pool_info[pool].offset+
197 sizeof(struct rx_buffer_head);
198 }
199 size += align;
200 spin_lock_irqsave(&zatm_dev->lock, flags);
201 free = zpeekl(zatm_dev,zatm_dev->pool_base+2*pool) &
202 uPD98401_RXFP_REMAIN;
203 spin_unlock_irqrestore(&zatm_dev->lock, flags);
204 if (free >= zatm_dev->pool_info[pool].low_water) return;
205 EVENT("starting ... POOL: 0x%x, 0x%x\n",
206 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool),
207 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool+1));
208 EVENT("dummy: 0x%08lx, 0x%08lx\n",dummy[0],dummy[1]);
209 count = 0;
210 first = NULL;
211 while (free < zatm_dev->pool_info[pool].high_water) {
212 struct rx_buffer_head *head;
213
214 skb = alloc_skb(size,GFP_ATOMIC);
215 if (!skb) {
216 printk(KERN_WARNING DEV_LABEL "(Itf %d): got no new "
217 "skb (%d) with %d free\n",dev->number,size,free);
218 break;
219 }
220 skb_reserve(skb,(unsigned char *) ((((unsigned long) skb->data+
221 align+offset-1) & ~(unsigned long) (align-1))-offset)-
222 skb->data);
223 head = (struct rx_buffer_head *) skb->data;
224 skb_reserve(skb,sizeof(struct rx_buffer_head));
225 if (!first) first = head;
226 count++;
227 head->buffer = virt_to_bus(skb->data);
228 head->link = 0;
229 head->skb = skb;
230 EVENT("enq skb 0x%08lx/0x%08lx\n",(unsigned long) skb,
231 (unsigned long) head);
232 spin_lock_irqsave(&zatm_dev->lock, flags);
233 if (zatm_dev->last_free[pool])
234 ((struct rx_buffer_head *) (zatm_dev->last_free[pool]->
235 data))[-1].link = virt_to_bus(head);
236 zatm_dev->last_free[pool] = skb;
237 skb_queue_tail(&zatm_dev->pool[pool],skb);
238 spin_unlock_irqrestore(&zatm_dev->lock, flags);
239 free++;
240 }
241 if (first) {
242 spin_lock_irqsave(&zatm_dev->lock, flags);
243 zwait;
244 zout(virt_to_bus(first),CER);
245 zout(uPD98401_ADD_BAT | (pool << uPD98401_POOL_SHIFT) | count,
246 CMR);
247 spin_unlock_irqrestore(&zatm_dev->lock, flags);
248 EVENT ("POOL: 0x%x, 0x%x\n",
249 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool),
250 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool+1));
251 EVENT("dummy: 0x%08lx, 0x%08lx\n",dummy[0],dummy[1]);
252 }
253 }
254
255
256 static void drain_free(struct atm_dev *dev,int pool)
257 {
258 skb_queue_purge(&ZATM_DEV(dev)->pool[pool]);
259 }
260
261
262 static int pool_index(int max_pdu)
263 {
264 int i;
265
266 if (max_pdu % ATM_CELL_PAYLOAD)
267 printk(KERN_ERR DEV_LABEL ": driver error in pool_index: "
268 "max_pdu is %d\n",max_pdu);
269 if (max_pdu > 65536) return -1;
270 for (i = 0; (64 << i) < max_pdu; i++);
271 return i+ZATM_AAL5_POOL_BASE;
272 }
273
274
275 /* use_pool isn't reentrant */
276
277
278 static void use_pool(struct atm_dev *dev,int pool)
279 {
280 struct zatm_dev *zatm_dev;
281 unsigned long flags;
282 int size;
283
284 zatm_dev = ZATM_DEV(dev);
285 if (!(zatm_dev->pool_info[pool].ref_count++)) {
286 skb_queue_head_init(&zatm_dev->pool[pool]);
287 size = pool-ZATM_AAL5_POOL_BASE;
288 if (size < 0) size = 0; /* 64B... */
289 else if (size > 10) size = 10; /* ... 64kB */
290 spin_lock_irqsave(&zatm_dev->lock, flags);
291 zpokel(zatm_dev,((zatm_dev->pool_info[pool].low_water/4) <<
292 uPD98401_RXFP_ALERT_SHIFT) |
293 (1 << uPD98401_RXFP_BTSZ_SHIFT) |
294 (size << uPD98401_RXFP_BFSZ_SHIFT),
295 zatm_dev->pool_base+pool*2);
296 zpokel(zatm_dev,(unsigned long) dummy,zatm_dev->pool_base+
297 pool*2+1);
298 spin_unlock_irqrestore(&zatm_dev->lock, flags);
299 zatm_dev->last_free[pool] = NULL;
300 refill_pool(dev,pool);
301 }
302 DPRINTK("pool %d: %d\n",pool,zatm_dev->pool_info[pool].ref_count);
303 }
304
305
306 static void unuse_pool(struct atm_dev *dev,int pool)
307 {
308 if (!(--ZATM_DEV(dev)->pool_info[pool].ref_count))
309 drain_free(dev,pool);
310 }
311
312 /*----------------------------------- RX ------------------------------------*/
313
314
315 #if 0
316 static void exception(struct atm_vcc *vcc)
317 {
318 static int count = 0;
319 struct zatm_dev *zatm_dev = ZATM_DEV(vcc->dev);
320 struct zatm_vcc *zatm_vcc = ZATM_VCC(vcc);
321 unsigned long *qrp;
322 int i;
323
324 if (count++ > 2) return;
325 for (i = 0; i < 8; i++)
326 printk("TX%d: 0x%08lx\n",i,
327 zpeekl(zatm_dev,zatm_vcc->tx_chan*VC_SIZE/4+i));
328 for (i = 0; i < 5; i++)
329 printk("SH%d: 0x%08lx\n",i,
330 zpeekl(zatm_dev,uPD98401_IM(zatm_vcc->shaper)+16*i));
331 qrp = (unsigned long *) zpeekl(zatm_dev,zatm_vcc->tx_chan*VC_SIZE/4+
332 uPD98401_TXVC_QRP);
333 printk("qrp=0x%08lx\n",(unsigned long) qrp);
334 for (i = 0; i < 4; i++) printk("QRP[%d]: 0x%08lx",i,qrp[i]);
335 }
336 #endif
337
338
339 static const char *err_txt[] = {
340 "No error",
341 "RX buf underflow",
342 "RX FIFO overrun",
343 "Maximum len violation",
344 "CRC error",
345 "User abort",
346 "Length violation",
347 "T1 error",
348 "Deactivated",
349 "???",
350 "???",
351 "???",
352 "???",
353 "???",
354 "???",
355 "???"
356 };
357
358
359 static void poll_rx(struct atm_dev *dev,int mbx)
360 {
361 struct zatm_dev *zatm_dev;
362 unsigned long pos;
363 u32 x;
364 int error;
365
366 EVENT("poll_rx\n",0,0);
367 zatm_dev = ZATM_DEV(dev);
368 pos = (zatm_dev->mbx_start[mbx] & ~0xffffUL) | zin(MTA(mbx));
369 while (x = zin(MWA(mbx)), (pos & 0xffff) != x) {
370 u32 *here;
371 struct sk_buff *skb;
372 struct atm_vcc *vcc;
373 int cells,size,chan;
374
375 EVENT("MBX: host 0x%lx, nic 0x%x\n",pos,x);
376 here = (u32 *) pos;
377 if (((pos += 16) & 0xffff) == zatm_dev->mbx_end[mbx])
378 pos = zatm_dev->mbx_start[mbx];
379 cells = here[0] & uPD98401_AAL5_SIZE;
380 #if 0
381 printk("RX IND: 0x%x, 0x%x, 0x%x, 0x%x\n",here[0],here[1],here[2],here[3]);
382 {
383 unsigned long *x;
384 printk("POOL: 0x%08x, 0x%08x\n",zpeekl(zatm_dev,
385 zatm_dev->pool_base),
386 zpeekl(zatm_dev,zatm_dev->pool_base+1));
387 x = (unsigned long *) here[2];
388 printk("[0..3] = 0x%08lx, 0x%08lx, 0x%08lx, 0x%08lx\n",
389 x[0],x[1],x[2],x[3]);
390 }
391 #endif
392 error = 0;
393 if (here[3] & uPD98401_AAL5_ERR) {
394 error = (here[3] & uPD98401_AAL5_ES) >>
395 uPD98401_AAL5_ES_SHIFT;
396 if (error == uPD98401_AAL5_ES_DEACT ||
397 error == uPD98401_AAL5_ES_FREE) continue;
398 }
399 EVENT("error code 0x%x/0x%x\n",(here[3] & uPD98401_AAL5_ES) >>
400 uPD98401_AAL5_ES_SHIFT,error);
401 skb = ((struct rx_buffer_head *) bus_to_virt(here[2]))->skb;
402 __net_timestamp(skb);
403 #if 0
404 printk("[-3..0] 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n",((unsigned *) skb->data)[-3],
405 ((unsigned *) skb->data)[-2],((unsigned *) skb->data)[-1],
406 ((unsigned *) skb->data)[0]);
407 #endif
408 EVENT("skb 0x%lx, here 0x%lx\n",(unsigned long) skb,
409 (unsigned long) here);
410 #if 0
411 printk("dummy: 0x%08lx, 0x%08lx\n",dummy[0],dummy[1]);
412 #endif
413 size = error ? 0 : ntohs(((__be16 *) skb->data)[cells*
414 ATM_CELL_PAYLOAD/sizeof(u16)-3]);
415 EVENT("got skb 0x%lx, size %d\n",(unsigned long) skb,size);
416 chan = (here[3] & uPD98401_AAL5_CHAN) >>
417 uPD98401_AAL5_CHAN_SHIFT;
418 if (chan < zatm_dev->chans && zatm_dev->rx_map[chan]) {
419 int pos;
420 vcc = zatm_dev->rx_map[chan];
421 pos = ZATM_VCC(vcc)->pool;
422 if (skb == zatm_dev->last_free[pos])
423 zatm_dev->last_free[pos] = NULL;
424 skb_unlink(skb, zatm_dev->pool + pos);
425 }
426 else {
427 printk(KERN_ERR DEV_LABEL "(itf %d): RX indication "
428 "for non-existing channel\n",dev->number);
429 size = 0;
430 vcc = NULL;
431 event_dump();
432 }
433 if (error) {
434 static unsigned long silence = 0;
435 static int last_error = 0;
436
437 if (error != last_error ||
438 time_after(jiffies, silence) || silence == 0){
439 printk(KERN_WARNING DEV_LABEL "(itf %d): "
440 "chan %d error %s\n",dev->number,chan,
441 err_txt[error]);
442 last_error = error;
443 silence = (jiffies+2*HZ)|1;
444 }
445 size = 0;
446 }
447 if (size && (size > cells*ATM_CELL_PAYLOAD-ATM_AAL5_TRAILER ||
448 size <= (cells-1)*ATM_CELL_PAYLOAD-ATM_AAL5_TRAILER)) {
449 printk(KERN_ERR DEV_LABEL "(itf %d): size %d with %d "
450 "cells\n",dev->number,size,cells);
451 size = 0;
452 event_dump();
453 }
454 if (size > ATM_MAX_AAL5_PDU) {
455 printk(KERN_ERR DEV_LABEL "(itf %d): size too big "
456 "(%d)\n",dev->number,size);
457 size = 0;
458 event_dump();
459 }
460 if (!size) {
461 dev_kfree_skb_irq(skb);
462 if (vcc) atomic_inc(&vcc->stats->rx_err);
463 continue;
464 }
465 if (!atm_charge(vcc,skb->truesize)) {
466 dev_kfree_skb_irq(skb);
467 continue;
468 }
469 skb->len = size;
470 ATM_SKB(skb)->vcc = vcc;
471 vcc->push(vcc,skb);
472 atomic_inc(&vcc->stats->rx);
473 }
474 zout(pos & 0xffff,MTA(mbx));
475 #if 0 /* probably a stupid idea */
476 refill_pool(dev,zatm_vcc->pool);
477 /* maybe this saves us a few interrupts */
478 #endif
479 }
480
481
482 static int open_rx_first(struct atm_vcc *vcc)
483 {
484 struct zatm_dev *zatm_dev;
485 struct zatm_vcc *zatm_vcc;
486 unsigned long flags;
487 unsigned short chan;
488 int cells;
489
490 DPRINTK("open_rx_first (0x%x)\n",inb_p(0xc053));
491 zatm_dev = ZATM_DEV(vcc->dev);
492 zatm_vcc = ZATM_VCC(vcc);
493 zatm_vcc->rx_chan = 0;
494 if (vcc->qos.rxtp.traffic_class == ATM_NONE) return 0;
495 if (vcc->qos.aal == ATM_AAL5) {
496 if (vcc->qos.rxtp.max_sdu > 65464)
497 vcc->qos.rxtp.max_sdu = 65464;
498 /* fix this - we may want to receive 64kB SDUs
499 later */
500 cells = DIV_ROUND_UP(vcc->qos.rxtp.max_sdu + ATM_AAL5_TRAILER,
501 ATM_CELL_PAYLOAD);
502 zatm_vcc->pool = pool_index(cells*ATM_CELL_PAYLOAD);
503 }
504 else {
505 cells = 1;
506 zatm_vcc->pool = ZATM_AAL0_POOL;
507 }
508 if (zatm_vcc->pool < 0) return -EMSGSIZE;
509 spin_lock_irqsave(&zatm_dev->lock, flags);
510 zwait;
511 zout(uPD98401_OPEN_CHAN,CMR);
512 zwait;
513 DPRINTK("0x%x 0x%x\n",zin(CMR),zin(CER));
514 chan = (zin(CMR) & uPD98401_CHAN_ADDR) >> uPD98401_CHAN_ADDR_SHIFT;
515 spin_unlock_irqrestore(&zatm_dev->lock, flags);
516 DPRINTK("chan is %d\n",chan);
517 if (!chan) return -EAGAIN;
518 use_pool(vcc->dev,zatm_vcc->pool);
519 DPRINTK("pool %d\n",zatm_vcc->pool);
520 /* set up VC descriptor */
521 spin_lock_irqsave(&zatm_dev->lock, flags);
522 zpokel(zatm_dev,zatm_vcc->pool << uPD98401_RXVC_POOL_SHIFT,
523 chan*VC_SIZE/4);
524 zpokel(zatm_dev,uPD98401_RXVC_OD | (vcc->qos.aal == ATM_AAL5 ?
525 uPD98401_RXVC_AR : 0) | cells,chan*VC_SIZE/4+1);
526 zpokel(zatm_dev,0,chan*VC_SIZE/4+2);
527 zatm_vcc->rx_chan = chan;
528 zatm_dev->rx_map[chan] = vcc;
529 spin_unlock_irqrestore(&zatm_dev->lock, flags);
530 return 0;
531 }
532
533
534 static int open_rx_second(struct atm_vcc *vcc)
535 {
536 struct zatm_dev *zatm_dev;
537 struct zatm_vcc *zatm_vcc;
538 unsigned long flags;
539 int pos,shift;
540
541 DPRINTK("open_rx_second (0x%x)\n",inb_p(0xc053));
542 zatm_dev = ZATM_DEV(vcc->dev);
543 zatm_vcc = ZATM_VCC(vcc);
544 if (!zatm_vcc->rx_chan) return 0;
545 spin_lock_irqsave(&zatm_dev->lock, flags);
546 /* should also handle VPI @@@ */
547 pos = vcc->vci >> 1;
548 shift = (1-(vcc->vci & 1)) << 4;
549 zpokel(zatm_dev,(zpeekl(zatm_dev,pos) & ~(0xffff << shift)) |
550 ((zatm_vcc->rx_chan | uPD98401_RXLT_ENBL) << shift),pos);
551 spin_unlock_irqrestore(&zatm_dev->lock, flags);
552 return 0;
553 }
554
555
556 static void close_rx(struct atm_vcc *vcc)
557 {
558 struct zatm_dev *zatm_dev;
559 struct zatm_vcc *zatm_vcc;
560 unsigned long flags;
561 int pos,shift;
562
563 zatm_vcc = ZATM_VCC(vcc);
564 zatm_dev = ZATM_DEV(vcc->dev);
565 if (!zatm_vcc->rx_chan) return;
566 DPRINTK("close_rx\n");
567 /* disable receiver */
568 if (vcc->vpi != ATM_VPI_UNSPEC && vcc->vci != ATM_VCI_UNSPEC) {
569 spin_lock_irqsave(&zatm_dev->lock, flags);
570 pos = vcc->vci >> 1;
571 shift = (1-(vcc->vci & 1)) << 4;
572 zpokel(zatm_dev,zpeekl(zatm_dev,pos) & ~(0xffff << shift),pos);
573 zwait;
574 zout(uPD98401_NOP,CMR);
575 zwait;
576 zout(uPD98401_NOP,CMR);
577 spin_unlock_irqrestore(&zatm_dev->lock, flags);
578 }
579 spin_lock_irqsave(&zatm_dev->lock, flags);
580 zwait;
581 zout(uPD98401_DEACT_CHAN | uPD98401_CHAN_RT | (zatm_vcc->rx_chan <<
582 uPD98401_CHAN_ADDR_SHIFT),CMR);
583 zwait;
584 udelay(10); /* why oh why ... ? */
585 zout(uPD98401_CLOSE_CHAN | uPD98401_CHAN_RT | (zatm_vcc->rx_chan <<
586 uPD98401_CHAN_ADDR_SHIFT),CMR);
587 zwait;
588 if (!(zin(CMR) & uPD98401_CHAN_ADDR))
589 printk(KERN_CRIT DEV_LABEL "(itf %d): can't close RX channel "
590 "%d\n",vcc->dev->number,zatm_vcc->rx_chan);
591 spin_unlock_irqrestore(&zatm_dev->lock, flags);
592 zatm_dev->rx_map[zatm_vcc->rx_chan] = NULL;
593 zatm_vcc->rx_chan = 0;
594 unuse_pool(vcc->dev,zatm_vcc->pool);
595 }
596
597
598 static int start_rx(struct atm_dev *dev)
599 {
600 struct zatm_dev *zatm_dev;
601 int size,i;
602
603 DPRINTK("start_rx\n");
604 zatm_dev = ZATM_DEV(dev);
605 size = sizeof(struct atm_vcc *)*zatm_dev->chans;
606 zatm_dev->rx_map = kzalloc(size,GFP_KERNEL);
607 if (!zatm_dev->rx_map) return -ENOMEM;
608 /* set VPI/VCI split (use all VCIs and give what's left to VPIs) */
609 zpokel(zatm_dev,(1 << dev->ci_range.vci_bits)-1,uPD98401_VRR);
610 /* prepare free buffer pools */
611 for (i = 0; i <= ZATM_LAST_POOL; i++) {
612 zatm_dev->pool_info[i].ref_count = 0;
613 zatm_dev->pool_info[i].rqa_count = 0;
614 zatm_dev->pool_info[i].rqu_count = 0;
615 zatm_dev->pool_info[i].low_water = LOW_MARK;
616 zatm_dev->pool_info[i].high_water = HIGH_MARK;
617 zatm_dev->pool_info[i].offset = 0;
618 zatm_dev->pool_info[i].next_off = 0;
619 zatm_dev->pool_info[i].next_cnt = 0;
620 zatm_dev->pool_info[i].next_thres = OFF_CNG_THRES;
621 }
622 return 0;
623 }
624
625
626 /*----------------------------------- TX ------------------------------------*/
627
628
629 static int do_tx(struct sk_buff *skb)
630 {
631 struct atm_vcc *vcc;
632 struct zatm_dev *zatm_dev;
633 struct zatm_vcc *zatm_vcc;
634 u32 *dsc;
635 unsigned long flags;
636
637 EVENT("do_tx\n",0,0);
638 DPRINTK("sending skb %p\n",skb);
639 vcc = ATM_SKB(skb)->vcc;
640 zatm_dev = ZATM_DEV(vcc->dev);
641 zatm_vcc = ZATM_VCC(vcc);
642 EVENT("iovcnt=%d\n",skb_shinfo(skb)->nr_frags,0);
643 spin_lock_irqsave(&zatm_dev->lock, flags);
644 if (!skb_shinfo(skb)->nr_frags) {
645 if (zatm_vcc->txing == RING_ENTRIES-1) {
646 spin_unlock_irqrestore(&zatm_dev->lock, flags);
647 return RING_BUSY;
648 }
649 zatm_vcc->txing++;
650 dsc = zatm_vcc->ring+zatm_vcc->ring_curr;
651 zatm_vcc->ring_curr = (zatm_vcc->ring_curr+RING_WORDS) &
652 (RING_ENTRIES*RING_WORDS-1);
653 dsc[1] = 0;
654 dsc[2] = skb->len;
655 dsc[3] = virt_to_bus(skb->data);
656 mb();
657 dsc[0] = uPD98401_TXPD_V | uPD98401_TXPD_DP | uPD98401_TXPD_SM
658 | (vcc->qos.aal == ATM_AAL5 ? uPD98401_TXPD_AAL5 : 0 |
659 (ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ?
660 uPD98401_CLPM_1 : uPD98401_CLPM_0));
661 EVENT("dsc (0x%lx)\n",(unsigned long) dsc,0);
662 }
663 else {
664 printk("NONONONOO!!!!\n");
665 dsc = NULL;
666 #if 0
667 u32 *put;
668 int i;
669
670 dsc = kmalloc(uPD98401_TXPD_SIZE * 2 +
671 uPD98401_TXBD_SIZE * ATM_SKB(skb)->iovcnt, GFP_ATOMIC);
672 if (!dsc) {
673 if (vcc->pop)
674 vcc->pop(vcc, skb);
675 else
676 dev_kfree_skb_irq(skb);
677 return -EAGAIN;
678 }
679 /* @@@ should check alignment */
680 put = dsc+8;
681 dsc[0] = uPD98401_TXPD_V | uPD98401_TXPD_DP |
682 (vcc->aal == ATM_AAL5 ? uPD98401_TXPD_AAL5 : 0 |
683 (ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ?
684 uPD98401_CLPM_1 : uPD98401_CLPM_0));
685 dsc[1] = 0;
686 dsc[2] = ATM_SKB(skb)->iovcnt * uPD98401_TXBD_SIZE;
687 dsc[3] = virt_to_bus(put);
688 for (i = 0; i < ATM_SKB(skb)->iovcnt; i++) {
689 *put++ = ((struct iovec *) skb->data)[i].iov_len;
690 *put++ = virt_to_bus(((struct iovec *)
691 skb->data)[i].iov_base);
692 }
693 put[-2] |= uPD98401_TXBD_LAST;
694 #endif
695 }
696 ZATM_PRV_DSC(skb) = dsc;
697 skb_queue_tail(&zatm_vcc->tx_queue,skb);
698 DPRINTK("QRP=0x%08lx\n",zpeekl(zatm_dev,zatm_vcc->tx_chan*VC_SIZE/4+
699 uPD98401_TXVC_QRP));
700 zwait;
701 zout(uPD98401_TX_READY | (zatm_vcc->tx_chan <<
702 uPD98401_CHAN_ADDR_SHIFT),CMR);
703 spin_unlock_irqrestore(&zatm_dev->lock, flags);
704 EVENT("done\n",0,0);
705 return 0;
706 }
707
708
709 static inline void dequeue_tx(struct atm_vcc *vcc)
710 {
711 struct zatm_vcc *zatm_vcc;
712 struct sk_buff *skb;
713
714 EVENT("dequeue_tx\n",0,0);
715 zatm_vcc = ZATM_VCC(vcc);
716 skb = skb_dequeue(&zatm_vcc->tx_queue);
717 if (!skb) {
718 printk(KERN_CRIT DEV_LABEL "(itf %d): dequeue_tx but not "
719 "txing\n",vcc->dev->number);
720 return;
721 }
722 #if 0 /* @@@ would fail on CLP */
723 if (*ZATM_PRV_DSC(skb) != (uPD98401_TXPD_V | uPD98401_TXPD_DP |
724 uPD98401_TXPD_SM | uPD98401_TXPD_AAL5)) printk("@#*$!!!! (%08x)\n",
725 *ZATM_PRV_DSC(skb));
726 #endif
727 *ZATM_PRV_DSC(skb) = 0; /* mark as invalid */
728 zatm_vcc->txing--;
729 if (vcc->pop) vcc->pop(vcc,skb);
730 else dev_kfree_skb_irq(skb);
731 while ((skb = skb_dequeue(&zatm_vcc->backlog)))
732 if (do_tx(skb) == RING_BUSY) {
733 skb_queue_head(&zatm_vcc->backlog,skb);
734 break;
735 }
736 atomic_inc(&vcc->stats->tx);
737 wake_up(&zatm_vcc->tx_wait);
738 }
739
740
741 static void poll_tx(struct atm_dev *dev,int mbx)
742 {
743 struct zatm_dev *zatm_dev;
744 unsigned long pos;
745 u32 x;
746
747 EVENT("poll_tx\n",0,0);
748 zatm_dev = ZATM_DEV(dev);
749 pos = (zatm_dev->mbx_start[mbx] & ~0xffffUL) | zin(MTA(mbx));
750 while (x = zin(MWA(mbx)), (pos & 0xffff) != x) {
751 int chan;
752
753 #if 1
754 u32 data,*addr;
755
756 EVENT("MBX: host 0x%lx, nic 0x%x\n",pos,x);
757 addr = (u32 *) pos;
758 data = *addr;
759 chan = (data & uPD98401_TXI_CONN) >> uPD98401_TXI_CONN_SHIFT;
760 EVENT("addr = 0x%lx, data = 0x%08x,",(unsigned long) addr,
761 data);
762 EVENT("chan = %d\n",chan,0);
763 #else
764 NO !
765 chan = (zatm_dev->mbx_start[mbx][pos >> 2] & uPD98401_TXI_CONN)
766 >> uPD98401_TXI_CONN_SHIFT;
767 #endif
768 if (chan < zatm_dev->chans && zatm_dev->tx_map[chan])
769 dequeue_tx(zatm_dev->tx_map[chan]);
770 else {
771 printk(KERN_CRIT DEV_LABEL "(itf %d): TX indication "
772 "for non-existing channel %d\n",dev->number,chan);
773 event_dump();
774 }
775 if (((pos += 4) & 0xffff) == zatm_dev->mbx_end[mbx])
776 pos = zatm_dev->mbx_start[mbx];
777 }
778 zout(pos & 0xffff,MTA(mbx));
779 }
780
781
782 /*
783 * BUG BUG BUG: Doesn't handle "new-style" rate specification yet.
784 */
785
786 static int alloc_shaper(struct atm_dev *dev,int *pcr,int min,int max,int ubr)
787 {
788 struct zatm_dev *zatm_dev;
789 unsigned long flags;
790 unsigned long i,m,c;
791 int shaper;
792
793 DPRINTK("alloc_shaper (min = %d, max = %d)\n",min,max);
794 zatm_dev = ZATM_DEV(dev);
795 if (!zatm_dev->free_shapers) return -EAGAIN;
796 for (shaper = 0; !((zatm_dev->free_shapers >> shaper) & 1); shaper++);
797 zatm_dev->free_shapers &= ~1 << shaper;
798 if (ubr) {
799 c = 5;
800 i = m = 1;
801 zatm_dev->ubr_ref_cnt++;
802 zatm_dev->ubr = shaper;
803 *pcr = 0;
804 }
805 else {
806 if (min) {
807 if (min <= 255) {
808 i = min;
809 m = ATM_OC3_PCR;
810 }
811 else {
812 i = 255;
813 m = ATM_OC3_PCR*255/min;
814 }
815 }
816 else {
817 if (max > zatm_dev->tx_bw) max = zatm_dev->tx_bw;
818 if (max <= 255) {
819 i = max;
820 m = ATM_OC3_PCR;
821 }
822 else {
823 i = 255;
824 m = DIV_ROUND_UP(ATM_OC3_PCR*255, max);
825 }
826 }
827 if (i > m) {
828 printk(KERN_CRIT DEV_LABEL "shaper algorithm botched "
829 "[%d,%d] -> i=%ld,m=%ld\n",min,max,i,m);
830 m = i;
831 }
832 *pcr = i*ATM_OC3_PCR/m;
833 c = 20; /* @@@ should use max_cdv ! */
834 if ((min && *pcr < min) || (max && *pcr > max)) return -EINVAL;
835 if (zatm_dev->tx_bw < *pcr) return -EAGAIN;
836 zatm_dev->tx_bw -= *pcr;
837 }
838 spin_lock_irqsave(&zatm_dev->lock, flags);
839 DPRINTK("i = %d, m = %d, PCR = %d\n",i,m,*pcr);
840 zpokel(zatm_dev,(i << uPD98401_IM_I_SHIFT) | m,uPD98401_IM(shaper));
841 zpokel(zatm_dev,c << uPD98401_PC_C_SHIFT,uPD98401_PC(shaper));
842 zpokel(zatm_dev,0,uPD98401_X(shaper));
843 zpokel(zatm_dev,0,uPD98401_Y(shaper));
844 zpokel(zatm_dev,uPD98401_PS_E,uPD98401_PS(shaper));
845 spin_unlock_irqrestore(&zatm_dev->lock, flags);
846 return shaper;
847 }
848
849
850 static void dealloc_shaper(struct atm_dev *dev,int shaper)
851 {
852 struct zatm_dev *zatm_dev;
853 unsigned long flags;
854
855 zatm_dev = ZATM_DEV(dev);
856 if (shaper == zatm_dev->ubr) {
857 if (--zatm_dev->ubr_ref_cnt) return;
858 zatm_dev->ubr = -1;
859 }
860 spin_lock_irqsave(&zatm_dev->lock, flags);
861 zpokel(zatm_dev,zpeekl(zatm_dev,uPD98401_PS(shaper)) & ~uPD98401_PS_E,
862 uPD98401_PS(shaper));
863 spin_unlock_irqrestore(&zatm_dev->lock, flags);
864 zatm_dev->free_shapers |= 1 << shaper;
865 }
866
867
868 static void close_tx(struct atm_vcc *vcc)
869 {
870 struct zatm_dev *zatm_dev;
871 struct zatm_vcc *zatm_vcc;
872 unsigned long flags;
873 int chan;
874
875 zatm_vcc = ZATM_VCC(vcc);
876 zatm_dev = ZATM_DEV(vcc->dev);
877 chan = zatm_vcc->tx_chan;
878 if (!chan) return;
879 DPRINTK("close_tx\n");
880 if (skb_peek(&zatm_vcc->backlog)) {
881 printk("waiting for backlog to drain ...\n");
882 event_dump();
883 wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->backlog));
884 }
885 if (skb_peek(&zatm_vcc->tx_queue)) {
886 printk("waiting for TX queue to drain ...\n");
887 event_dump();
888 wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->tx_queue));
889 }
890 spin_lock_irqsave(&zatm_dev->lock, flags);
891 #if 0
892 zwait;
893 zout(uPD98401_DEACT_CHAN | (chan << uPD98401_CHAN_ADDR_SHIFT),CMR);
894 #endif
895 zwait;
896 zout(uPD98401_CLOSE_CHAN | (chan << uPD98401_CHAN_ADDR_SHIFT),CMR);
897 zwait;
898 if (!(zin(CMR) & uPD98401_CHAN_ADDR))
899 printk(KERN_CRIT DEV_LABEL "(itf %d): can't close TX channel "
900 "%d\n",vcc->dev->number,chan);
901 spin_unlock_irqrestore(&zatm_dev->lock, flags);
902 zatm_vcc->tx_chan = 0;
903 zatm_dev->tx_map[chan] = NULL;
904 if (zatm_vcc->shaper != zatm_dev->ubr) {
905 zatm_dev->tx_bw += vcc->qos.txtp.min_pcr;
906 dealloc_shaper(vcc->dev,zatm_vcc->shaper);
907 }
908 kfree(zatm_vcc->ring);
909 }
910
911
912 static int open_tx_first(struct atm_vcc *vcc)
913 {
914 struct zatm_dev *zatm_dev;
915 struct zatm_vcc *zatm_vcc;
916 unsigned long flags;
917 u32 *loop;
918 unsigned short chan;
919 int unlimited;
920
921 DPRINTK("open_tx_first\n");
922 zatm_dev = ZATM_DEV(vcc->dev);
923 zatm_vcc = ZATM_VCC(vcc);
924 zatm_vcc->tx_chan = 0;
925 if (vcc->qos.txtp.traffic_class == ATM_NONE) return 0;
926 spin_lock_irqsave(&zatm_dev->lock, flags);
927 zwait;
928 zout(uPD98401_OPEN_CHAN,CMR);
929 zwait;
930 DPRINTK("0x%x 0x%x\n",zin(CMR),zin(CER));
931 chan = (zin(CMR) & uPD98401_CHAN_ADDR) >> uPD98401_CHAN_ADDR_SHIFT;
932 spin_unlock_irqrestore(&zatm_dev->lock, flags);
933 DPRINTK("chan is %d\n",chan);
934 if (!chan) return -EAGAIN;
935 unlimited = vcc->qos.txtp.traffic_class == ATM_UBR &&
936 (!vcc->qos.txtp.max_pcr || vcc->qos.txtp.max_pcr == ATM_MAX_PCR ||
937 vcc->qos.txtp.max_pcr >= ATM_OC3_PCR);
938 if (unlimited && zatm_dev->ubr != -1) zatm_vcc->shaper = zatm_dev->ubr;
939 else {
940 int uninitialized_var(pcr);
941
942 if (unlimited) vcc->qos.txtp.max_sdu = ATM_MAX_AAL5_PDU;
943 if ((zatm_vcc->shaper = alloc_shaper(vcc->dev,&pcr,
944 vcc->qos.txtp.min_pcr,vcc->qos.txtp.max_pcr,unlimited))
945 < 0) {
946 close_tx(vcc);
947 return zatm_vcc->shaper;
948 }
949 if (pcr > ATM_OC3_PCR) pcr = ATM_OC3_PCR;
950 vcc->qos.txtp.min_pcr = vcc->qos.txtp.max_pcr = pcr;
951 }
952 zatm_vcc->tx_chan = chan;
953 skb_queue_head_init(&zatm_vcc->tx_queue);
954 init_waitqueue_head(&zatm_vcc->tx_wait);
955 /* initialize ring */
956 zatm_vcc->ring = kzalloc(RING_SIZE,GFP_KERNEL);
957 if (!zatm_vcc->ring) return -ENOMEM;
958 loop = zatm_vcc->ring+RING_ENTRIES*RING_WORDS;
959 loop[0] = uPD98401_TXPD_V;
960 loop[1] = loop[2] = 0;
961 loop[3] = virt_to_bus(zatm_vcc->ring);
962 zatm_vcc->ring_curr = 0;
963 zatm_vcc->txing = 0;
964 skb_queue_head_init(&zatm_vcc->backlog);
965 zpokel(zatm_dev,virt_to_bus(zatm_vcc->ring),
966 chan*VC_SIZE/4+uPD98401_TXVC_QRP);
967 return 0;
968 }
969
970
971 static int open_tx_second(struct atm_vcc *vcc)
972 {
973 struct zatm_dev *zatm_dev;
974 struct zatm_vcc *zatm_vcc;
975 unsigned long flags;
976
977 DPRINTK("open_tx_second\n");
978 zatm_dev = ZATM_DEV(vcc->dev);
979 zatm_vcc = ZATM_VCC(vcc);
980 if (!zatm_vcc->tx_chan) return 0;
981 /* set up VC descriptor */
982 spin_lock_irqsave(&zatm_dev->lock, flags);
983 zpokel(zatm_dev,0,zatm_vcc->tx_chan*VC_SIZE/4);
984 zpokel(zatm_dev,uPD98401_TXVC_L | (zatm_vcc->shaper <<
985 uPD98401_TXVC_SHP_SHIFT) | (vcc->vpi << uPD98401_TXVC_VPI_SHIFT) |
986 vcc->vci,zatm_vcc->tx_chan*VC_SIZE/4+1);
987 zpokel(zatm_dev,0,zatm_vcc->tx_chan*VC_SIZE/4+2);
988 spin_unlock_irqrestore(&zatm_dev->lock, flags);
989 zatm_dev->tx_map[zatm_vcc->tx_chan] = vcc;
990 return 0;
991 }
992
993
994 static int start_tx(struct atm_dev *dev)
995 {
996 struct zatm_dev *zatm_dev;
997 int i;
998
999 DPRINTK("start_tx\n");
1000 zatm_dev = ZATM_DEV(dev);
1001 zatm_dev->tx_map = kmalloc(sizeof(struct atm_vcc *)*
1002 zatm_dev->chans,GFP_KERNEL);
1003 if (!zatm_dev->tx_map) return -ENOMEM;
1004 zatm_dev->tx_bw = ATM_OC3_PCR;
1005 zatm_dev->free_shapers = (1 << NR_SHAPERS)-1;
1006 zatm_dev->ubr = -1;
1007 zatm_dev->ubr_ref_cnt = 0;
1008 /* initialize shapers */
1009 for (i = 0; i < NR_SHAPERS; i++) zpokel(zatm_dev,0,uPD98401_PS(i));
1010 return 0;
1011 }
1012
1013
1014 /*------------------------------- interrupts --------------------------------*/
1015
1016
1017 static irqreturn_t zatm_int(int irq,void *dev_id)
1018 {
1019 struct atm_dev *dev;
1020 struct zatm_dev *zatm_dev;
1021 u32 reason;
1022 int handled = 0;
1023
1024 dev = dev_id;
1025 zatm_dev = ZATM_DEV(dev);
1026 while ((reason = zin(GSR))) {
1027 handled = 1;
1028 EVENT("reason 0x%x\n",reason,0);
1029 if (reason & uPD98401_INT_PI) {
1030 EVENT("PHY int\n",0,0);
1031 dev->phy->interrupt(dev);
1032 }
1033 if (reason & uPD98401_INT_RQA) {
1034 unsigned long pools;
1035 int i;
1036
1037 pools = zin(RQA);
1038 EVENT("RQA (0x%08x)\n",pools,0);
1039 for (i = 0; pools; i++) {
1040 if (pools & 1) {
1041 refill_pool(dev,i);
1042 zatm_dev->pool_info[i].rqa_count++;
1043 }
1044 pools >>= 1;
1045 }
1046 }
1047 if (reason & uPD98401_INT_RQU) {
1048 unsigned long pools;
1049 int i;
1050 pools = zin(RQU);
1051 printk(KERN_WARNING DEV_LABEL "(itf %d): RQU 0x%08lx\n",
1052 dev->number,pools);
1053 event_dump();
1054 for (i = 0; pools; i++) {
1055 if (pools & 1) {
1056 refill_pool(dev,i);
1057 zatm_dev->pool_info[i].rqu_count++;
1058 }
1059 pools >>= 1;
1060 }
1061 }
1062 /* don't handle RD */
1063 if (reason & uPD98401_INT_SPE)
1064 printk(KERN_ALERT DEV_LABEL "(itf %d): system parity "
1065 "error at 0x%08x\n",dev->number,zin(ADDR));
1066 if (reason & uPD98401_INT_CPE)
1067 printk(KERN_ALERT DEV_LABEL "(itf %d): control memory "
1068 "parity error at 0x%08x\n",dev->number,zin(ADDR));
1069 if (reason & uPD98401_INT_SBE) {
1070 printk(KERN_ALERT DEV_LABEL "(itf %d): system bus "
1071 "error at 0x%08x\n",dev->number,zin(ADDR));
1072 event_dump();
1073 }
1074 /* don't handle IND */
1075 if (reason & uPD98401_INT_MF) {
1076 printk(KERN_CRIT DEV_LABEL "(itf %d): mailbox full "
1077 "(0x%x)\n",dev->number,(reason & uPD98401_INT_MF)
1078 >> uPD98401_INT_MF_SHIFT);
1079 event_dump();
1080 /* @@@ should try to recover */
1081 }
1082 if (reason & uPD98401_INT_MM) {
1083 if (reason & 1) poll_rx(dev,0);
1084 if (reason & 2) poll_rx(dev,1);
1085 if (reason & 4) poll_tx(dev,2);
1086 if (reason & 8) poll_tx(dev,3);
1087 }
1088 /* @@@ handle RCRn */
1089 }
1090 return IRQ_RETVAL(handled);
1091 }
1092
1093
1094 /*----------------------------- (E)EPROM access -----------------------------*/
1095
1096
1097 static void __devinit eprom_set(struct zatm_dev *zatm_dev,unsigned long value,
1098 unsigned short cmd)
1099 {
1100 int error;
1101
1102 if ((error = pci_write_config_dword(zatm_dev->pci_dev,cmd,value)))
1103 printk(KERN_ERR DEV_LABEL ": PCI write failed (0x%02x)\n",
1104 error);
1105 }
1106
1107
1108 static unsigned long __devinit eprom_get(struct zatm_dev *zatm_dev,
1109 unsigned short cmd)
1110 {
1111 unsigned int value;
1112 int error;
1113
1114 if ((error = pci_read_config_dword(zatm_dev->pci_dev,cmd,&value)))
1115 printk(KERN_ERR DEV_LABEL ": PCI read failed (0x%02x)\n",
1116 error);
1117 return value;
1118 }
1119
1120
1121 static void __devinit eprom_put_bits(struct zatm_dev *zatm_dev,
1122 unsigned long data,int bits,unsigned short cmd)
1123 {
1124 unsigned long value;
1125 int i;
1126
1127 for (i = bits-1; i >= 0; i--) {
1128 value = ZEPROM_CS | (((data >> i) & 1) ? ZEPROM_DI : 0);
1129 eprom_set(zatm_dev,value,cmd);
1130 eprom_set(zatm_dev,value | ZEPROM_SK,cmd);
1131 eprom_set(zatm_dev,value,cmd);
1132 }
1133 }
1134
1135
1136 static void __devinit eprom_get_byte(struct zatm_dev *zatm_dev,
1137 unsigned char *byte,unsigned short cmd)
1138 {
1139 int i;
1140
1141 *byte = 0;
1142 for (i = 8; i; i--) {
1143 eprom_set(zatm_dev,ZEPROM_CS,cmd);
1144 eprom_set(zatm_dev,ZEPROM_CS | ZEPROM_SK,cmd);
1145 *byte <<= 1;
1146 if (eprom_get(zatm_dev,cmd) & ZEPROM_DO) *byte |= 1;
1147 eprom_set(zatm_dev,ZEPROM_CS,cmd);
1148 }
1149 }
1150
1151
1152 static unsigned char __devinit eprom_try_esi(struct atm_dev *dev,
1153 unsigned short cmd,int offset,int swap)
1154 {
1155 unsigned char buf[ZEPROM_SIZE];
1156 struct zatm_dev *zatm_dev;
1157 int i;
1158
1159 zatm_dev = ZATM_DEV(dev);
1160 for (i = 0; i < ZEPROM_SIZE; i += 2) {
1161 eprom_set(zatm_dev,ZEPROM_CS,cmd); /* select EPROM */
1162 eprom_put_bits(zatm_dev,ZEPROM_CMD_READ,ZEPROM_CMD_LEN,cmd);
1163 eprom_put_bits(zatm_dev,i >> 1,ZEPROM_ADDR_LEN,cmd);
1164 eprom_get_byte(zatm_dev,buf+i+swap,cmd);
1165 eprom_get_byte(zatm_dev,buf+i+1-swap,cmd);
1166 eprom_set(zatm_dev,0,cmd); /* deselect EPROM */
1167 }
1168 memcpy(dev->esi,buf+offset,ESI_LEN);
1169 return memcmp(dev->esi,"\0\0\0\0\0",ESI_LEN); /* assumes ESI_LEN == 6 */
1170 }
1171
1172
1173 static void __devinit eprom_get_esi(struct atm_dev *dev)
1174 {
1175 if (eprom_try_esi(dev,ZEPROM_V1_REG,ZEPROM_V1_ESI_OFF,1)) return;
1176 (void) eprom_try_esi(dev,ZEPROM_V2_REG,ZEPROM_V2_ESI_OFF,0);
1177 }
1178
1179
1180 /*--------------------------------- entries ---------------------------------*/
1181
1182
1183 static int __devinit zatm_init(struct atm_dev *dev)
1184 {
1185 struct zatm_dev *zatm_dev;
1186 struct pci_dev *pci_dev;
1187 unsigned short command;
1188 int error,i,last;
1189 unsigned long t0,t1,t2;
1190
1191 DPRINTK(">zatm_init\n");
1192 zatm_dev = ZATM_DEV(dev);
1193 spin_lock_init(&zatm_dev->lock);
1194 pci_dev = zatm_dev->pci_dev;
1195 zatm_dev->base = pci_resource_start(pci_dev, 0);
1196 zatm_dev->irq = pci_dev->irq;
1197 if ((error = pci_read_config_word(pci_dev,PCI_COMMAND,&command))) {
1198 printk(KERN_ERR DEV_LABEL "(itf %d): init error 0x%02x\n",
1199 dev->number,error);
1200 return -EINVAL;
1201 }
1202 if ((error = pci_write_config_word(pci_dev,PCI_COMMAND,
1203 command | PCI_COMMAND_IO | PCI_COMMAND_MASTER))) {
1204 printk(KERN_ERR DEV_LABEL "(itf %d): can't enable IO (0x%02x)"
1205 "\n",dev->number,error);
1206 return -EIO;
1207 }
1208 eprom_get_esi(dev);
1209 printk(KERN_NOTICE DEV_LABEL "(itf %d): rev.%d,base=0x%x,irq=%d,",
1210 dev->number,pci_dev->revision,zatm_dev->base,zatm_dev->irq);
1211 /* reset uPD98401 */
1212 zout(0,SWR);
1213 while (!(zin(GSR) & uPD98401_INT_IND));
1214 zout(uPD98401_GMR_ONE /*uPD98401_BURST4*/,GMR);
1215 last = MAX_CRAM_SIZE;
1216 for (i = last-RAM_INCREMENT; i >= 0; i -= RAM_INCREMENT) {
1217 zpokel(zatm_dev,0x55555555,i);
1218 if (zpeekl(zatm_dev,i) != 0x55555555) last = i;
1219 else {
1220 zpokel(zatm_dev,0xAAAAAAAA,i);
1221 if (zpeekl(zatm_dev,i) != 0xAAAAAAAA) last = i;
1222 else zpokel(zatm_dev,i,i);
1223 }
1224 }
1225 for (i = 0; i < last; i += RAM_INCREMENT)
1226 if (zpeekl(zatm_dev,i) != i) break;
1227 zatm_dev->mem = i << 2;
1228 while (i) zpokel(zatm_dev,0,--i);
1229 /* reset again to rebuild memory pointers */
1230 zout(0,SWR);
1231 while (!(zin(GSR) & uPD98401_INT_IND));
1232 zout(uPD98401_GMR_ONE | uPD98401_BURST8 | uPD98401_BURST4 |
1233 uPD98401_BURST2 | uPD98401_GMR_PM | uPD98401_GMR_DR,GMR);
1234 /* TODO: should shrink allocation now */
1235 printk("mem=%dkB,%s (",zatm_dev->mem >> 10,zatm_dev->copper ? "UTP" :
1236 "MMF");
1237 for (i = 0; i < ESI_LEN; i++)
1238 printk("%02X%s",dev->esi[i],i == ESI_LEN-1 ? ")\n" : "-");
1239 do {
1240 unsigned long flags;
1241
1242 spin_lock_irqsave(&zatm_dev->lock, flags);
1243 t0 = zpeekl(zatm_dev,uPD98401_TSR);
1244 udelay(10);
1245 t1 = zpeekl(zatm_dev,uPD98401_TSR);
1246 udelay(1010);
1247 t2 = zpeekl(zatm_dev,uPD98401_TSR);
1248 spin_unlock_irqrestore(&zatm_dev->lock, flags);
1249 }
1250 while (t0 > t1 || t1 > t2); /* loop if wrapping ... */
1251 zatm_dev->khz = t2-2*t1+t0;
1252 printk(KERN_NOTICE DEV_LABEL "(itf %d): uPD98401 %d.%d at %d.%03d "
1253 "MHz\n",dev->number,
1254 (zin(VER) & uPD98401_MAJOR) >> uPD98401_MAJOR_SHIFT,
1255 zin(VER) & uPD98401_MINOR,zatm_dev->khz/1000,zatm_dev->khz % 1000);
1256 return uPD98402_init(dev);
1257 }
1258
1259
1260 static int __devinit zatm_start(struct atm_dev *dev)
1261 {
1262 struct zatm_dev *zatm_dev = ZATM_DEV(dev);
1263 struct pci_dev *pdev = zatm_dev->pci_dev;
1264 unsigned long curr;
1265 int pools,vccs,rx;
1266 int error, i, ld;
1267
1268 DPRINTK("zatm_start\n");
1269 zatm_dev->rx_map = zatm_dev->tx_map = NULL;
1270 for (i = 0; i < NR_MBX; i++)
1271 zatm_dev->mbx_start[i] = 0;
1272 error = request_irq(zatm_dev->irq, zatm_int, IRQF_SHARED, DEV_LABEL, dev);
1273 if (error < 0) {
1274 printk(KERN_ERR DEV_LABEL "(itf %d): IRQ%d is already in use\n",
1275 dev->number,zatm_dev->irq);
1276 goto done;
1277 }
1278 /* define memory regions */
1279 pools = NR_POOLS;
1280 if (NR_SHAPERS*SHAPER_SIZE > pools*POOL_SIZE)
1281 pools = NR_SHAPERS*SHAPER_SIZE/POOL_SIZE;
1282 vccs = (zatm_dev->mem-NR_SHAPERS*SHAPER_SIZE-pools*POOL_SIZE)/
1283 (2*VC_SIZE+RX_SIZE);
1284 ld = -1;
1285 for (rx = 1; rx < vccs; rx <<= 1) ld++;
1286 dev->ci_range.vpi_bits = 0; /* @@@ no VPI for now */
1287 dev->ci_range.vci_bits = ld;
1288 dev->link_rate = ATM_OC3_PCR;
1289 zatm_dev->chans = vccs; /* ??? */
1290 curr = rx*RX_SIZE/4;
1291 DPRINTK("RX pool 0x%08lx\n",curr);
1292 zpokel(zatm_dev,curr,uPD98401_PMA); /* receive pool */
1293 zatm_dev->pool_base = curr;
1294 curr += pools*POOL_SIZE/4;
1295 DPRINTK("Shapers 0x%08lx\n",curr);
1296 zpokel(zatm_dev,curr,uPD98401_SMA); /* shapers */
1297 curr += NR_SHAPERS*SHAPER_SIZE/4;
1298 DPRINTK("Free 0x%08lx\n",curr);
1299 zpokel(zatm_dev,curr,uPD98401_TOS); /* free pool */
1300 printk(KERN_INFO DEV_LABEL "(itf %d): %d shapers, %d pools, %d RX, "
1301 "%ld VCs\n",dev->number,NR_SHAPERS,pools,rx,
1302 (zatm_dev->mem-curr*4)/VC_SIZE);
1303 /* create mailboxes */
1304 for (i = 0; i < NR_MBX; i++) {
1305 void *mbx;
1306 dma_addr_t mbx_dma;
1307
1308 if (!mbx_entries[i])
1309 continue;
1310 mbx = pci_alloc_consistent(pdev, 2*MBX_SIZE(i), &mbx_dma);
1311 if (!mbx) {
1312 error = -ENOMEM;
1313 goto out;
1314 }
1315 /*
1316 * Alignment provided by pci_alloc_consistent() isn't enough
1317 * for this device.
1318 */
1319 if (((unsigned long)mbx ^ mbx_dma) & 0xffff) {
1320 printk(KERN_ERR DEV_LABEL "(itf %d): system "
1321 "bus incompatible with driver\n", dev->number);
1322 pci_free_consistent(pdev, 2*MBX_SIZE(i), mbx, mbx_dma);
1323 error = -ENODEV;
1324 goto out;
1325 }
1326 DPRINTK("mbx@0x%08lx-0x%08lx\n", mbx, mbx + MBX_SIZE(i));
1327 zatm_dev->mbx_start[i] = (unsigned long)mbx;
1328 zatm_dev->mbx_dma[i] = mbx_dma;
1329 zatm_dev->mbx_end[i] = (zatm_dev->mbx_start[i] + MBX_SIZE(i)) &
1330 0xffff;
1331 zout(mbx_dma >> 16, MSH(i));
1332 zout(mbx_dma, MSL(i));
1333 zout(zatm_dev->mbx_end[i], MBA(i));
1334 zout((unsigned long)mbx & 0xffff, MTA(i));
1335 zout((unsigned long)mbx & 0xffff, MWA(i));
1336 }
1337 error = start_tx(dev);
1338 if (error)
1339 goto out;
1340 error = start_rx(dev);
1341 if (error)
1342 goto out_tx;
1343 error = dev->phy->start(dev);
1344 if (error)
1345 goto out_rx;
1346 zout(0xffffffff,IMR); /* enable interrupts */
1347 /* enable TX & RX */
1348 zout(zin(GMR) | uPD98401_GMR_SE | uPD98401_GMR_RE,GMR);
1349 done:
1350 return error;
1351
1352 out_rx:
1353 kfree(zatm_dev->rx_map);
1354 out_tx:
1355 kfree(zatm_dev->tx_map);
1356 out:
1357 while (i-- > 0) {
1358 pci_free_consistent(pdev, 2*MBX_SIZE(i),
1359 (void *)zatm_dev->mbx_start[i],
1360 zatm_dev->mbx_dma[i]);
1361 }
1362 free_irq(zatm_dev->irq, dev);
1363 goto done;
1364 }
1365
1366
1367 static void zatm_close(struct atm_vcc *vcc)
1368 {
1369 DPRINTK(">zatm_close\n");
1370 if (!ZATM_VCC(vcc)) return;
1371 clear_bit(ATM_VF_READY,&vcc->flags);
1372 close_rx(vcc);
1373 EVENT("close_tx\n",0,0);
1374 close_tx(vcc);
1375 DPRINTK("zatm_close: done waiting\n");
1376 /* deallocate memory */
1377 kfree(ZATM_VCC(vcc));
1378 vcc->dev_data = NULL;
1379 clear_bit(ATM_VF_ADDR,&vcc->flags);
1380 }
1381
1382
1383 static int zatm_open(struct atm_vcc *vcc)
1384 {
1385 struct zatm_dev *zatm_dev;
1386 struct zatm_vcc *zatm_vcc;
1387 short vpi = vcc->vpi;
1388 int vci = vcc->vci;
1389 int error;
1390
1391 DPRINTK(">zatm_open\n");
1392 zatm_dev = ZATM_DEV(vcc->dev);
1393 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
1394 vcc->dev_data = NULL;
1395 if (vci != ATM_VPI_UNSPEC && vpi != ATM_VCI_UNSPEC)
1396 set_bit(ATM_VF_ADDR,&vcc->flags);
1397 if (vcc->qos.aal != ATM_AAL5) return -EINVAL; /* @@@ AAL0 */
1398 DPRINTK(DEV_LABEL "(itf %d): open %d.%d\n",vcc->dev->number,vcc->vpi,
1399 vcc->vci);
1400 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags)) {
1401 zatm_vcc = kmalloc(sizeof(struct zatm_vcc),GFP_KERNEL);
1402 if (!zatm_vcc) {
1403 clear_bit(ATM_VF_ADDR,&vcc->flags);
1404 return -ENOMEM;
1405 }
1406 vcc->dev_data = zatm_vcc;
1407 ZATM_VCC(vcc)->tx_chan = 0; /* for zatm_close after open_rx */
1408 if ((error = open_rx_first(vcc))) {
1409 zatm_close(vcc);
1410 return error;
1411 }
1412 if ((error = open_tx_first(vcc))) {
1413 zatm_close(vcc);
1414 return error;
1415 }
1416 }
1417 if (vci == ATM_VPI_UNSPEC || vpi == ATM_VCI_UNSPEC) return 0;
1418 if ((error = open_rx_second(vcc))) {
1419 zatm_close(vcc);
1420 return error;
1421 }
1422 if ((error = open_tx_second(vcc))) {
1423 zatm_close(vcc);
1424 return error;
1425 }
1426 set_bit(ATM_VF_READY,&vcc->flags);
1427 return 0;
1428 }
1429
1430
1431 static int zatm_change_qos(struct atm_vcc *vcc,struct atm_qos *qos,int flags)
1432 {
1433 printk("Not yet implemented\n");
1434 return -ENOSYS;
1435 /* @@@ */
1436 }
1437
1438
1439 static int zatm_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
1440 {
1441 struct zatm_dev *zatm_dev;
1442 unsigned long flags;
1443
1444 zatm_dev = ZATM_DEV(dev);
1445 switch (cmd) {
1446 case ZATM_GETPOOLZ:
1447 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1448 /* fall through */
1449 case ZATM_GETPOOL:
1450 {
1451 struct zatm_pool_info info;
1452 int pool;
1453
1454 if (get_user(pool,
1455 &((struct zatm_pool_req __user *) arg)->pool_num))
1456 return -EFAULT;
1457 if (pool < 0 || pool > ZATM_LAST_POOL)
1458 return -EINVAL;
1459 spin_lock_irqsave(&zatm_dev->lock, flags);
1460 info = zatm_dev->pool_info[pool];
1461 if (cmd == ZATM_GETPOOLZ) {
1462 zatm_dev->pool_info[pool].rqa_count = 0;
1463 zatm_dev->pool_info[pool].rqu_count = 0;
1464 }
1465 spin_unlock_irqrestore(&zatm_dev->lock, flags);
1466 return copy_to_user(
1467 &((struct zatm_pool_req __user *) arg)->info,
1468 &info,sizeof(info)) ? -EFAULT : 0;
1469 }
1470 case ZATM_SETPOOL:
1471 {
1472 struct zatm_pool_info info;
1473 int pool;
1474
1475 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1476 if (get_user(pool,
1477 &((struct zatm_pool_req __user *) arg)->pool_num))
1478 return -EFAULT;
1479 if (pool < 0 || pool > ZATM_LAST_POOL)
1480 return -EINVAL;
1481 if (copy_from_user(&info,
1482 &((struct zatm_pool_req __user *) arg)->info,
1483 sizeof(info))) return -EFAULT;
1484 if (!info.low_water)
1485 info.low_water = zatm_dev->
1486 pool_info[pool].low_water;
1487 if (!info.high_water)
1488 info.high_water = zatm_dev->
1489 pool_info[pool].high_water;
1490 if (!info.next_thres)
1491 info.next_thres = zatm_dev->
1492 pool_info[pool].next_thres;
1493 if (info.low_water >= info.high_water ||
1494 info.low_water < 0)
1495 return -EINVAL;
1496 spin_lock_irqsave(&zatm_dev->lock, flags);
1497 zatm_dev->pool_info[pool].low_water =
1498 info.low_water;
1499 zatm_dev->pool_info[pool].high_water =
1500 info.high_water;
1501 zatm_dev->pool_info[pool].next_thres =
1502 info.next_thres;
1503 spin_unlock_irqrestore(&zatm_dev->lock, flags);
1504 return 0;
1505 }
1506 default:
1507 if (!dev->phy->ioctl) return -ENOIOCTLCMD;
1508 return dev->phy->ioctl(dev,cmd,arg);
1509 }
1510 }
1511
1512
1513 static int zatm_getsockopt(struct atm_vcc *vcc,int level,int optname,
1514 void __user *optval,int optlen)
1515 {
1516 return -EINVAL;
1517 }
1518
1519
1520 static int zatm_setsockopt(struct atm_vcc *vcc,int level,int optname,
1521 void __user *optval,unsigned int optlen)
1522 {
1523 return -EINVAL;
1524 }
1525
1526 static int zatm_send(struct atm_vcc *vcc,struct sk_buff *skb)
1527 {
1528 int error;
1529
1530 EVENT(">zatm_send 0x%lx\n",(unsigned long) skb,0);
1531 if (!ZATM_VCC(vcc)->tx_chan || !test_bit(ATM_VF_READY,&vcc->flags)) {
1532 if (vcc->pop) vcc->pop(vcc,skb);
1533 else dev_kfree_skb(skb);
1534 return -EINVAL;
1535 }
1536 if (!skb) {
1537 printk(KERN_CRIT "!skb in zatm_send ?\n");
1538 if (vcc->pop) vcc->pop(vcc,skb);
1539 return -EINVAL;
1540 }
1541 ATM_SKB(skb)->vcc = vcc;
1542 error = do_tx(skb);
1543 if (error != RING_BUSY) return error;
1544 skb_queue_tail(&ZATM_VCC(vcc)->backlog,skb);
1545 return 0;
1546 }
1547
1548
1549 static void zatm_phy_put(struct atm_dev *dev,unsigned char value,
1550 unsigned long addr)
1551 {
1552 struct zatm_dev *zatm_dev;
1553
1554 zatm_dev = ZATM_DEV(dev);
1555 zwait;
1556 zout(value,CER);
1557 zout(uPD98401_IND_ACC | uPD98401_IA_B0 |
1558 (uPD98401_IA_TGT_PHY << uPD98401_IA_TGT_SHIFT) | addr,CMR);
1559 }
1560
1561
1562 static unsigned char zatm_phy_get(struct atm_dev *dev,unsigned long addr)
1563 {
1564 struct zatm_dev *zatm_dev;
1565
1566 zatm_dev = ZATM_DEV(dev);
1567 zwait;
1568 zout(uPD98401_IND_ACC | uPD98401_IA_B0 | uPD98401_IA_RW |
1569 (uPD98401_IA_TGT_PHY << uPD98401_IA_TGT_SHIFT) | addr,CMR);
1570 zwait;
1571 return zin(CER) & 0xff;
1572 }
1573
1574
1575 static const struct atmdev_ops ops = {
1576 .open = zatm_open,
1577 .close = zatm_close,
1578 .ioctl = zatm_ioctl,
1579 .getsockopt = zatm_getsockopt,
1580 .setsockopt = zatm_setsockopt,
1581 .send = zatm_send,
1582 .phy_put = zatm_phy_put,
1583 .phy_get = zatm_phy_get,
1584 .change_qos = zatm_change_qos,
1585 };
1586
1587 static int __devinit zatm_init_one(struct pci_dev *pci_dev,
1588 const struct pci_device_id *ent)
1589 {
1590 struct atm_dev *dev;
1591 struct zatm_dev *zatm_dev;
1592 int ret = -ENOMEM;
1593
1594 zatm_dev = kmalloc(sizeof(*zatm_dev), GFP_KERNEL);
1595 if (!zatm_dev) {
1596 printk(KERN_EMERG "%s: memory shortage\n", DEV_LABEL);
1597 goto out;
1598 }
1599
1600 dev = atm_dev_register(DEV_LABEL, &ops, -1, NULL);
1601 if (!dev)
1602 goto out_free;
1603
1604 ret = pci_enable_device(pci_dev);
1605 if (ret < 0)
1606 goto out_deregister;
1607
1608 ret = pci_request_regions(pci_dev, DEV_LABEL);
1609 if (ret < 0)
1610 goto out_disable;
1611
1612 zatm_dev->pci_dev = pci_dev;
1613 dev->dev_data = zatm_dev;
1614 zatm_dev->copper = (int)ent->driver_data;
1615 if ((ret = zatm_init(dev)) || (ret = zatm_start(dev)))
1616 goto out_release;
1617
1618 pci_set_drvdata(pci_dev, dev);
1619 zatm_dev->more = zatm_boards;
1620 zatm_boards = dev;
1621 ret = 0;
1622 out:
1623 return ret;
1624
1625 out_release:
1626 pci_release_regions(pci_dev);
1627 out_disable:
1628 pci_disable_device(pci_dev);
1629 out_deregister:
1630 atm_dev_deregister(dev);
1631 out_free:
1632 kfree(zatm_dev);
1633 goto out;
1634 }
1635
1636
1637 MODULE_LICENSE("GPL");
1638
1639 static struct pci_device_id zatm_pci_tbl[] __devinitdata = {
1640 { PCI_VDEVICE(ZEITNET, PCI_DEVICE_ID_ZEITNET_1221), ZATM_COPPER },
1641 { PCI_VDEVICE(ZEITNET, PCI_DEVICE_ID_ZEITNET_1225), 0 },
1642 { 0, }
1643 };
1644 MODULE_DEVICE_TABLE(pci, zatm_pci_tbl);
1645
1646 static struct pci_driver zatm_driver = {
1647 .name = DEV_LABEL,
1648 .id_table = zatm_pci_tbl,
1649 .probe = zatm_init_one,
1650 };
1651
1652 static int __init zatm_init_module(void)
1653 {
1654 return pci_register_driver(&zatm_driver);
1655 }
1656
1657 module_init(zatm_init_module);
1658 /* module_exit not defined so not unloadable */
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