arch/powerpc/platforms/85xx/mpc85xx_cds.c

   1 /*
   2  * MPC85xx setup and early boot code plus other random bits.
   3  *
   4  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
   5  *
   6  * Copyright 2005 Freescale Semiconductor Inc.
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  */
  13
  14 #include <linux/stddef.h>
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/errno.h>
  18 #include <linux/reboot.h>
  19 #include <linux/pci.h>
  20 #include <linux/kdev_t.h>
  21 #include <linux/major.h>
  22 #include <linux/console.h>
  23 #include <linux/delay.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/initrd.h>
  26 #include <linux/module.h>
  27 #include <linux/fsl_devices.h>
  28
  29 #include <asm/system.h>
  30 #include <asm/pgtable.h>
  31 #include <asm/page.h>
  32 #include <asm/atomic.h>
  33 #include <asm/time.h>
  34 #include <asm/io.h>
  35 #include <asm/machdep.h>
  36 #include <asm/ipic.h>
  37 #include <asm/bootinfo.h>
  38 #include <asm/pci-bridge.h>
  39 #include <asm/mpc85xx.h>
  40 #include <asm/irq.h>
  41 #include <mm/mmu_decl.h>
  42 #include <asm/prom.h>
  43 #include <asm/udbg.h>
  44 #include <asm/mpic.h>
  45 #include <asm/i8259.h>
  46
  47 #include <sysdev/fsl_soc.h>
  48 #include "mpc85xx.h"
  49
  50 static int cds_pci_slot = 2;
  51 static volatile u8 *cadmus;
  52
  53 #ifdef CONFIG_PCI
  54
  55 #define ARCADIA_HOST_BRIDGE_IDSEL       17
  56 #define ARCADIA_2ND_BRIDGE_IDSEL        3
  57
  58 static int mpc85xx_exclude_device(struct pci_controller *hose,
  59                                   u_char bus, u_char devfn)
  60 {
  61         if ((bus == hose->first_busno) && PCI_SLOT(devfn) == 0)
  62                 return PCIBIOS_DEVICE_NOT_FOUND;
  63         /* We explicitly do not go past the Tundra 320 Bridge */
  64         if ((bus == 1) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
  65                 return PCIBIOS_DEVICE_NOT_FOUND;
  66         if ((bus == 0) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
  67                 return PCIBIOS_DEVICE_NOT_FOUND;
  68         else
  69                 return PCIBIOS_SUCCESSFUL;
  70 }
  71
  72 static void __init mpc85xx_cds_pcibios_fixup(void)
  73 {
  74         struct pci_dev *dev;
  75         u_char          c;
  76
  77         if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
  78                                         PCI_DEVICE_ID_VIA_82C586_1, NULL))) {
  79                 /*
  80                  * U-Boot does not set the enable bits
  81                  * for the IDE device. Force them on here.
  82                  */
  83                 pci_read_config_byte(dev, 0x40, &c);
  84                 c |= 0x03; /* IDE: Chip Enable Bits */
  85                 pci_write_config_byte(dev, 0x40, c);
  86
  87                 /*
  88                  * Since only primary interface works, force the
  89                  * IDE function to standard primary IDE interrupt
  90                  * w/ 8259 offset
  91                  */
  92                 dev->irq = 14;
  93                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
  94                 pci_dev_put(dev);
  95         }
  96
  97         /*
  98          * Force legacy USB interrupt routing
  99          */
 100         if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
 101                                         PCI_DEVICE_ID_VIA_82C586_2, NULL))) {
 102                 dev->irq = 10;
 103                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 10);
 104                 pci_dev_put(dev);
 105         }
 106
 107         if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
 108                                         PCI_DEVICE_ID_VIA_82C586_2, dev))) {
 109                 dev->irq = 11;
 110                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
 111                 pci_dev_put(dev);
 112         }
 113
 114         /* Now map all the PCI irqs */
 115         dev = NULL;
 116         for_each_pci_dev(dev)
 117                 pci_read_irq_line(dev);
 118 }
 119
 120 #ifdef CONFIG_PPC_I8259
 121 #warning The i8259 PIC support is currently broken
 122 static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
 123 {
 124         unsigned int cascade_irq = i8259_irq();
 125
 126         if (cascade_irq != NO_IRQ)
 127                 generic_handle_irq(cascade_irq);
 128
 129         desc->chip->eoi(irq);
 130 }
 131 #endif /* PPC_I8259 */
 132 #endif /* CONFIG_PCI */
 133
 134 static void __init mpc85xx_cds_pic_init(void)
 135 {
 136         struct mpic *mpic;
 137         struct resource r;
 138         struct device_node *np = NULL;
 139 #ifdef CONFIG_PPC_I8259
 140         struct device_node *cascade_node = NULL;
 141         int cascade_irq;
 142 #endif
 143
 144         np = of_find_node_by_type(np, "open-pic");
 145
 146         if (np == NULL) {
 147                 printk(KERN_ERR "Could not find open-pic node\n");
 148                 return;
 149         }
 150
 151         if (of_address_to_resource(np, 0, &r)) {
 152                 printk(KERN_ERR "Failed to map mpic register space\n");
 153                 of_node_put(np);
 154                 return;
 155         }
 156
 157         mpic = mpic_alloc(np, r.start,
 158                         MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
 159                         4, 0, " OpenPIC  ");
 160         BUG_ON(mpic == NULL);
 161
 162         /* Return the mpic node */
 163         of_node_put(np);
 164
 165         mpic_assign_isu(mpic, 0, r.start + 0x10200);
 166         mpic_assign_isu(mpic, 1, r.start + 0x10280);
 167         mpic_assign_isu(mpic, 2, r.start + 0x10300);
 168         mpic_assign_isu(mpic, 3, r.start + 0x10380);
 169         mpic_assign_isu(mpic, 4, r.start + 0x10400);
 170         mpic_assign_isu(mpic, 5, r.start + 0x10480);
 171         mpic_assign_isu(mpic, 6, r.start + 0x10500);
 172         mpic_assign_isu(mpic, 7, r.start + 0x10580);
 173
 174         /* Used only for 8548 so far, but no harm in
 175          * allocating them for everyone */
 176         mpic_assign_isu(mpic, 8, r.start + 0x10600);
 177         mpic_assign_isu(mpic, 9, r.start + 0x10680);
 178         mpic_assign_isu(mpic, 10, r.start + 0x10700);
 179         mpic_assign_isu(mpic, 11, r.start + 0x10780);
 180
 181         /* External Interrupts */
 182         mpic_assign_isu(mpic, 12, r.start + 0x10000);
 183         mpic_assign_isu(mpic, 13, r.start + 0x10080);
 184         mpic_assign_isu(mpic, 14, r.start + 0x10100);
 185
 186         mpic_init(mpic);
 187
 188 #ifdef CONFIG_PPC_I8259
 189         /* Initialize the i8259 controller */
 190         for_each_node_by_type(np, "interrupt-controller")
 191                 if (of_device_is_compatible(np, "chrp,iic")) {
 192                         cascade_node = np;
 193                         break;
 194                 }
 195
 196         if (cascade_node == NULL) {
 197                 printk(KERN_DEBUG "Could not find i8259 PIC\n");
 198                 return;
 199         }
 200
 201         cascade_irq = irq_of_parse_and_map(cascade_node, 0);
 202         if (cascade_irq == NO_IRQ) {
 203                 printk(KERN_ERR "Failed to map cascade interrupt\n");
 204                 return;
 205         }
 206
 207         i8259_init(cascade_node, 0);
 208         of_node_put(cascade_node);
 209
 210         set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade);
 211 #endif /* CONFIG_PPC_I8259 */
 212 }
 213
 214 /*
 215  * Setup the architecture
 216  */
 217 static void __init mpc85xx_cds_setup_arch(void)
 218 {
 219         struct device_node *cpu;
 220 #ifdef CONFIG_PCI
 221         struct device_node *np;
 222 #endif
 223
 224         if (ppc_md.progress)
 225                 ppc_md.progress("mpc85xx_cds_setup_arch()", 0);
 226
 227         cpu = of_find_node_by_type(NULL, "cpu");
 228         if (cpu != 0) {
 229                 const unsigned int *fp;
 230
 231                 fp = of_get_property(cpu, "clock-frequency", NULL);
 232                 if (fp != 0)
 233                         loops_per_jiffy = *fp / HZ;
 234                 else
 235                         loops_per_jiffy = 500000000 / HZ;
 236                 of_node_put(cpu);
 237         }
 238
 239         cadmus = ioremap(CADMUS_BASE, CADMUS_SIZE);
 240         cds_pci_slot = ((cadmus[CM_CSR] >> 6) & 0x3) + 1;
 241
 242         if (ppc_md.progress) {
 243                 char buf[40];
 244                 snprintf(buf, 40, "CDS Version = 0x%x in slot %d\n",
 245                                 cadmus[CM_VER], cds_pci_slot);
 246                 ppc_md.progress(buf, 0);
 247         }
 248
 249 #ifdef CONFIG_PCI
 250         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
 251                 mpc85xx_add_bridge(np);
 252
 253         ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup;
 254         ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 255 #endif
 256 }
 257
 258 static void mpc85xx_cds_show_cpuinfo(struct seq_file *m)
 259 {
 260         uint pvid, svid, phid1;
 261         uint memsize = total_memory;
 262
 263         pvid = mfspr(SPRN_PVR);
 264         svid = mfspr(SPRN_SVR);
 265
 266         seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
 267         seq_printf(m, "Machine\t\t: MPC85xx CDS (0x%x)\n", cadmus[CM_VER]);
 268         seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
 269         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 270
 271         /* Display cpu Pll setting */
 272         phid1 = mfspr(SPRN_HID1);
 273         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 274
 275         /* Display the amount of memory */
 276         seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
 277 }
 278
 279
 280 /*
 281  * Called very early, device-tree isn't unflattened
 282  */
 283 static int __init mpc85xx_cds_probe(void)
 284 {
 285         unsigned long root = of_get_flat_dt_root();
 286
 287         return of_flat_dt_is_compatible(root, "MPC85xxCDS");
 288 }
 289
 290 define_machine(mpc85xx_cds) {
 291         .name           = "MPC85xx CDS",
 292         .probe          = mpc85xx_cds_probe,
 293         .setup_arch     = mpc85xx_cds_setup_arch,
 294         .init_IRQ       = mpc85xx_cds_pic_init,
 295         .show_cpuinfo   = mpc85xx_cds_show_cpuinfo,
 296         .get_irq        = mpic_get_irq,
 297         .restart        = mpc85xx_restart,
 298         .calibrate_decr = generic_calibrate_decr,
 299         .progress       = udbg_progress,
 300 };