2 * Texas Instruments DSPS platforms "glue layer"
4 * Copyright (C) 2012, by Texas Instruments
6 * Based on the am35x "glue layer" code.
8 * This file is part of the Inventra Controller Driver for Linux.
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
32 #include <linux/init.h>
34 #include <linux/err.h>
35 #include <linux/platform_device.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/pm_runtime.h>
38 #include <linux/module.h>
39 #include <linux/usb/usb_phy_gen_xceiv.h>
40 #include <linux/platform_data/usb-omap.h>
41 #include <linux/sizes.h>
44 #include <linux/of_device.h>
45 #include <linux/of_address.h>
46 #include <linux/of_irq.h>
48 #include "musb_core.h"
50 static const struct of_device_id musb_dsps_of_match
[];
53 * avoid using musb_readx()/musb_writex() as glue layer should not be
54 * dependent on musb core layer symbols.
56 static inline u8
dsps_readb(const void __iomem
*addr
, unsigned offset
)
57 { return __raw_readb(addr
+ offset
); }
59 static inline u32
dsps_readl(const void __iomem
*addr
, unsigned offset
)
60 { return __raw_readl(addr
+ offset
); }
62 static inline void dsps_writeb(void __iomem
*addr
, unsigned offset
, u8 data
)
63 { __raw_writeb(data
, addr
+ offset
); }
65 static inline void dsps_writel(void __iomem
*addr
, unsigned offset
, u32 data
)
66 { __raw_writel(data
, addr
+ offset
); }
69 * DSPS musb wrapper register offset.
70 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
73 struct dsps_musb_wrapper
{
86 /* bit positions for control */
89 /* bit positions for interrupt */
95 unsigned txep_shift
:5;
99 unsigned rxep_shift
:5;
103 /* bit positions for phy_utmi */
104 unsigned otg_disable
:5;
106 /* bit positions for mode */
108 /* miscellaneous stuff */
113 * DSPS glue structure.
117 struct platform_device
*musb
; /* child musb pdev */
118 const struct dsps_musb_wrapper
*wrp
; /* wrapper register offsets */
119 struct timer_list timer
; /* otg_workaround timer */
120 unsigned long last_timer
; /* last timer data for each instance */
124 * dsps_musb_enable - enable interrupts
126 static void dsps_musb_enable(struct musb
*musb
)
128 struct device
*dev
= musb
->controller
;
129 struct platform_device
*pdev
= to_platform_device(dev
->parent
);
130 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
131 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
132 void __iomem
*reg_base
= musb
->ctrl_base
;
133 u32 epmask
, coremask
;
135 /* Workaround: setup IRQs through both register sets. */
136 epmask
= ((musb
->epmask
& wrp
->txep_mask
) << wrp
->txep_shift
) |
137 ((musb
->epmask
& wrp
->rxep_mask
) << wrp
->rxep_shift
);
138 coremask
= (wrp
->usb_bitmap
& ~MUSB_INTR_SOF
);
140 dsps_writel(reg_base
, wrp
->epintr_set
, epmask
);
141 dsps_writel(reg_base
, wrp
->coreintr_set
, coremask
);
142 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
143 dsps_writel(reg_base
, wrp
->coreintr_set
,
144 (1 << wrp
->drvvbus
) << wrp
->usb_shift
);
148 * dsps_musb_disable - disable HDRC and flush interrupts
150 static void dsps_musb_disable(struct musb
*musb
)
152 struct device
*dev
= musb
->controller
;
153 struct platform_device
*pdev
= to_platform_device(dev
->parent
);
154 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
155 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
156 void __iomem
*reg_base
= musb
->ctrl_base
;
158 dsps_writel(reg_base
, wrp
->coreintr_clear
, wrp
->usb_bitmap
);
159 dsps_writel(reg_base
, wrp
->epintr_clear
,
160 wrp
->txep_bitmap
| wrp
->rxep_bitmap
);
161 dsps_writeb(musb
->mregs
, MUSB_DEVCTL
, 0);
164 static void otg_timer(unsigned long _musb
)
166 struct musb
*musb
= (void *)_musb
;
167 void __iomem
*mregs
= musb
->mregs
;
168 struct device
*dev
= musb
->controller
;
169 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
170 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
175 * We poll because DSPS IP's won't expose several OTG-critical
176 * status change events (from the transceiver) otherwise.
178 devctl
= dsps_readb(mregs
, MUSB_DEVCTL
);
179 dev_dbg(musb
->controller
, "Poll devctl %02x (%s)\n", devctl
,
180 usb_otg_state_string(musb
->xceiv
->state
));
182 spin_lock_irqsave(&musb
->lock
, flags
);
183 switch (musb
->xceiv
->state
) {
184 case OTG_STATE_A_WAIT_BCON
:
185 devctl
&= ~MUSB_DEVCTL_SESSION
;
186 dsps_writeb(musb
->mregs
, MUSB_DEVCTL
, devctl
);
188 devctl
= dsps_readb(musb
->mregs
, MUSB_DEVCTL
);
189 if (devctl
& MUSB_DEVCTL_BDEVICE
) {
190 musb
->xceiv
->state
= OTG_STATE_B_IDLE
;
193 musb
->xceiv
->state
= OTG_STATE_A_IDLE
;
197 case OTG_STATE_A_WAIT_VFALL
:
198 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VRISE
;
199 dsps_writel(musb
->ctrl_base
, wrp
->coreintr_set
,
200 MUSB_INTR_VBUSERROR
<< wrp
->usb_shift
);
202 case OTG_STATE_B_IDLE
:
203 devctl
= dsps_readb(mregs
, MUSB_DEVCTL
);
204 if (devctl
& MUSB_DEVCTL_BDEVICE
)
205 mod_timer(&glue
->timer
,
206 jiffies
+ wrp
->poll_seconds
* HZ
);
208 musb
->xceiv
->state
= OTG_STATE_A_IDLE
;
213 spin_unlock_irqrestore(&musb
->lock
, flags
);
216 static void dsps_musb_try_idle(struct musb
*musb
, unsigned long timeout
)
218 struct device
*dev
= musb
->controller
;
219 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
222 timeout
= jiffies
+ msecs_to_jiffies(3);
224 /* Never idle if active, or when VBUS timeout is not set as host */
225 if (musb
->is_active
|| (musb
->a_wait_bcon
== 0 &&
226 musb
->xceiv
->state
== OTG_STATE_A_WAIT_BCON
)) {
227 dev_dbg(musb
->controller
, "%s active, deleting timer\n",
228 usb_otg_state_string(musb
->xceiv
->state
));
229 del_timer(&glue
->timer
);
230 glue
->last_timer
= jiffies
;
234 if (time_after(glue
->last_timer
, timeout
) &&
235 timer_pending(&glue
->timer
)) {
236 dev_dbg(musb
->controller
,
237 "Longer idle timer already pending, ignoring...\n");
240 glue
->last_timer
= timeout
;
242 dev_dbg(musb
->controller
, "%s inactive, starting idle timer for %u ms\n",
243 usb_otg_state_string(musb
->xceiv
->state
),
244 jiffies_to_msecs(timeout
- jiffies
));
245 mod_timer(&glue
->timer
, timeout
);
248 static irqreturn_t
dsps_interrupt(int irq
, void *hci
)
250 struct musb
*musb
= hci
;
251 void __iomem
*reg_base
= musb
->ctrl_base
;
252 struct device
*dev
= musb
->controller
;
253 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
254 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
256 irqreturn_t ret
= IRQ_NONE
;
259 spin_lock_irqsave(&musb
->lock
, flags
);
261 /* Get endpoint interrupts */
262 epintr
= dsps_readl(reg_base
, wrp
->epintr_status
);
263 musb
->int_rx
= (epintr
& wrp
->rxep_bitmap
) >> wrp
->rxep_shift
;
264 musb
->int_tx
= (epintr
& wrp
->txep_bitmap
) >> wrp
->txep_shift
;
267 dsps_writel(reg_base
, wrp
->epintr_status
, epintr
);
269 /* Get usb core interrupts */
270 usbintr
= dsps_readl(reg_base
, wrp
->coreintr_status
);
271 if (!usbintr
&& !epintr
)
274 musb
->int_usb
= (usbintr
& wrp
->usb_bitmap
) >> wrp
->usb_shift
;
276 dsps_writel(reg_base
, wrp
->coreintr_status
, usbintr
);
278 dev_dbg(musb
->controller
, "usbintr (%x) epintr(%x)\n",
281 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
282 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
283 * switch appropriately between halves of the OTG state machine.
284 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
285 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
286 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
288 if (is_host_active(musb
) && usbintr
& MUSB_INTR_BABBLE
)
289 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
291 if (usbintr
& ((1 << wrp
->drvvbus
) << wrp
->usb_shift
)) {
292 int drvvbus
= dsps_readl(reg_base
, wrp
->status
);
293 void __iomem
*mregs
= musb
->mregs
;
294 u8 devctl
= dsps_readb(mregs
, MUSB_DEVCTL
);
297 err
= musb
->int_usb
& MUSB_INTR_VBUSERROR
;
300 * The Mentor core doesn't debounce VBUS as needed
301 * to cope with device connect current spikes. This
302 * means it's not uncommon for bus-powered devices
303 * to get VBUS errors during enumeration.
305 * This is a workaround, but newer RTL from Mentor
306 * seems to allow a better one: "re"-starting sessions
307 * without waiting for VBUS to stop registering in
310 musb
->int_usb
&= ~MUSB_INTR_VBUSERROR
;
311 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VFALL
;
312 mod_timer(&glue
->timer
,
313 jiffies
+ wrp
->poll_seconds
* HZ
);
314 WARNING("VBUS error workaround (delay coming)\n");
315 } else if (drvvbus
) {
318 musb
->xceiv
->otg
->default_a
= 1;
319 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VRISE
;
320 del_timer(&glue
->timer
);
324 musb
->xceiv
->otg
->default_a
= 0;
325 musb
->xceiv
->state
= OTG_STATE_B_IDLE
;
328 /* NOTE: this must complete power-on within 100 ms. */
329 dev_dbg(musb
->controller
, "VBUS %s (%s)%s, devctl %02x\n",
330 drvvbus
? "on" : "off",
331 usb_otg_state_string(musb
->xceiv
->state
),
337 if (musb
->int_tx
|| musb
->int_rx
|| musb
->int_usb
)
338 ret
|= musb_interrupt(musb
);
340 /* Poll for ID change */
341 if (musb
->xceiv
->state
== OTG_STATE_B_IDLE
)
342 mod_timer(&glue
->timer
, jiffies
+ wrp
->poll_seconds
* HZ
);
344 spin_unlock_irqrestore(&musb
->lock
, flags
);
349 static int dsps_musb_init(struct musb
*musb
)
351 struct device
*dev
= musb
->controller
;
352 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
353 struct platform_device
*parent
= to_platform_device(dev
->parent
);
354 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
355 void __iomem
*reg_base
;
359 r
= platform_get_resource_byname(parent
, IORESOURCE_MEM
, "control");
363 reg_base
= devm_ioremap_resource(dev
, r
);
364 if (IS_ERR(reg_base
))
365 return PTR_ERR(reg_base
);
366 musb
->ctrl_base
= reg_base
;
368 /* NOP driver needs change if supporting dual instance */
369 musb
->xceiv
= devm_usb_get_phy_by_phandle(dev
, "phys", 0);
370 if (IS_ERR(musb
->xceiv
))
371 return PTR_ERR(musb
->xceiv
);
373 /* Returns zero if e.g. not clocked */
374 rev
= dsps_readl(reg_base
, wrp
->revision
);
378 usb_phy_init(musb
->xceiv
);
379 setup_timer(&glue
->timer
, otg_timer
, (unsigned long) musb
);
382 dsps_writel(reg_base
, wrp
->control
, (1 << wrp
->reset
));
384 musb
->isr
= dsps_interrupt
;
386 /* reset the otgdisable bit, needed for host mode to work */
387 val
= dsps_readl(reg_base
, wrp
->phy_utmi
);
388 val
&= ~(1 << wrp
->otg_disable
);
389 dsps_writel(musb
->ctrl_base
, wrp
->phy_utmi
, val
);
394 static int dsps_musb_exit(struct musb
*musb
)
396 struct device
*dev
= musb
->controller
;
397 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
399 del_timer_sync(&glue
->timer
);
401 usb_phy_shutdown(musb
->xceiv
);
405 static struct musb_platform_ops dsps_ops
= {
406 .init
= dsps_musb_init
,
407 .exit
= dsps_musb_exit
,
409 .enable
= dsps_musb_enable
,
410 .disable
= dsps_musb_disable
,
412 .try_idle
= dsps_musb_try_idle
,
415 static u64 musb_dmamask
= DMA_BIT_MASK(32);
417 static int get_int_prop(struct device_node
*dn
, const char *s
)
422 ret
= of_property_read_u32(dn
, s
, &val
);
428 static int dsps_create_musb_pdev(struct dsps_glue
*glue
,
429 struct platform_device
*parent
)
431 struct musb_hdrc_platform_data pdata
;
432 struct resource resources
[2];
433 struct device
*dev
= &parent
->dev
;
434 struct musb_hdrc_config
*config
;
435 struct platform_device
*musb
;
436 struct device_node
*dn
= parent
->dev
.of_node
;
437 struct device_node
*child_node
;
440 child_node
= of_get_child_by_name(dn
, "usb");
444 memset(resources
, 0, sizeof(resources
));
445 ret
= of_address_to_resource(child_node
, 0, &resources
[0]);
447 dev_err(dev
, "failed to get memory.\n");
451 ret
= of_irq_to_resource(child_node
, 0, &resources
[1]);
453 dev_err(dev
, "failed to get irq.\n");
458 /* allocate the child platform device */
459 musb
= platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO
);
461 dev_err(dev
, "failed to allocate musb device\n");
465 musb
->dev
.parent
= dev
;
466 musb
->dev
.dma_mask
= &musb_dmamask
;
467 musb
->dev
.coherent_dma_mask
= musb_dmamask
;
468 musb
->dev
.of_node
= of_node_get(child_node
);
472 ret
= platform_device_add_resources(musb
, resources
,
473 ARRAY_SIZE(resources
));
475 dev_err(dev
, "failed to add resources\n");
479 config
= devm_kzalloc(&parent
->dev
, sizeof(*config
), GFP_KERNEL
);
481 dev_err(dev
, "failed to allocate musb hdrc config\n");
485 pdata
.config
= config
;
486 pdata
.platform_ops
= &dsps_ops
;
488 config
->num_eps
= get_int_prop(child_node
, "num-eps");
489 config
->ram_bits
= get_int_prop(child_node
, "ram-bits");
490 pdata
.mode
= get_int_prop(child_node
, "port-mode");
491 pdata
.power
= get_int_prop(child_node
, "power");
492 config
->multipoint
= of_property_read_bool(child_node
, "multipoint");
494 ret
= platform_device_add_data(musb
, &pdata
, sizeof(pdata
));
496 dev_err(dev
, "failed to add platform_data\n");
500 ret
= platform_device_add(musb
);
502 dev_err(dev
, "failed to register musb device\n");
508 platform_device_put(musb
);
512 static int dsps_probe(struct platform_device
*pdev
)
514 const struct of_device_id
*match
;
515 const struct dsps_musb_wrapper
*wrp
;
516 struct dsps_glue
*glue
;
519 match
= of_match_node(musb_dsps_of_match
, pdev
->dev
.of_node
);
521 dev_err(&pdev
->dev
, "fail to get matching of_match struct\n");
527 glue
= kzalloc(sizeof(*glue
), GFP_KERNEL
);
529 dev_err(&pdev
->dev
, "unable to allocate glue memory\n");
533 glue
->dev
= &pdev
->dev
;
536 platform_set_drvdata(pdev
, glue
);
537 pm_runtime_enable(&pdev
->dev
);
539 ret
= pm_runtime_get_sync(&pdev
->dev
);
541 dev_err(&pdev
->dev
, "pm_runtime_get_sync FAILED");
545 ret
= dsps_create_musb_pdev(glue
, pdev
);
552 pm_runtime_put(&pdev
->dev
);
554 pm_runtime_disable(&pdev
->dev
);
559 static int dsps_remove(struct platform_device
*pdev
)
561 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
563 platform_device_unregister(glue
->musb
);
565 /* disable usbss clocks */
566 pm_runtime_put(&pdev
->dev
);
567 pm_runtime_disable(&pdev
->dev
);
572 static const struct dsps_musb_wrapper am33xx_driver_data
= {
577 .epintr_clear
= 0x40,
578 .epintr_status
= 0x30,
579 .coreintr_set
= 0x3c,
580 .coreintr_clear
= 0x44,
581 .coreintr_status
= 0x34,
589 .usb_bitmap
= (0x1ff << 0),
593 .txep_bitmap
= (0xffff << 0),
596 .rxep_bitmap
= (0xfffe << 16),
600 static const struct of_device_id musb_dsps_of_match
[] = {
601 { .compatible
= "ti,musb-am33xx",
602 .data
= (void *) &am33xx_driver_data
, },
605 MODULE_DEVICE_TABLE(of
, musb_dsps_of_match
);
607 static struct platform_driver dsps_usbss_driver
= {
609 .remove
= dsps_remove
,
612 .of_match_table
= of_match_ptr(musb_dsps_of_match
),
616 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
617 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
618 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
619 MODULE_LICENSE("GPL v2");
621 module_platform_driver(dsps_usbss_driver
);