Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart
[linux-2.6.git] / include / asm-s390 / pgtable.h
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1 /*
2 * include/asm-s390/pgtable.h
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com)
7 * Ulrich Weigand (weigand@de.ibm.com)
8 * Martin Schwidefsky (schwidefsky@de.ibm.com)
10 * Derived from "include/asm-i386/pgtable.h"
13 #ifndef _ASM_S390_PGTABLE_H
14 #define _ASM_S390_PGTABLE_H
16 #include <asm-generic/4level-fixup.h>
19 * The Linux memory management assumes a three-level page table setup. For
20 * s390 31 bit we "fold" the mid level into the top-level page table, so
21 * that we physically have the same two-level page table as the s390 mmu
22 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
23 * the hardware provides (region first and region second tables are not
24 * used).
26 * The "pgd_xxx()" functions are trivial for a folded two-level
27 * setup: the pgd is never bad, and a pmd always exists (as it's folded
28 * into the pgd entry)
30 * This file contains the functions and defines necessary to modify and use
31 * the S390 page table tree.
33 #ifndef __ASSEMBLY__
34 #include <linux/mm_types.h>
35 #include <asm/bug.h>
36 #include <asm/processor.h>
38 struct vm_area_struct; /* forward declaration (include/linux/mm.h) */
39 struct mm_struct;
41 extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
42 extern void paging_init(void);
45 * The S390 doesn't have any external MMU info: the kernel page
46 * tables contain all the necessary information.
48 #define update_mmu_cache(vma, address, pte) do { } while (0)
51 * ZERO_PAGE is a global shared page that is always zero: used
52 * for zero-mapped memory areas etc..
54 extern char empty_zero_page[PAGE_SIZE];
55 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
56 #endif /* !__ASSEMBLY__ */
59 * PMD_SHIFT determines the size of the area a second-level page
60 * table can map
61 * PGDIR_SHIFT determines what a third-level page table entry can map
63 #ifndef __s390x__
64 # define PMD_SHIFT 22
65 # define PGDIR_SHIFT 22
66 #else /* __s390x__ */
67 # define PMD_SHIFT 21
68 # define PGDIR_SHIFT 31
69 #endif /* __s390x__ */
71 #define PMD_SIZE (1UL << PMD_SHIFT)
72 #define PMD_MASK (~(PMD_SIZE-1))
73 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
74 #define PGDIR_MASK (~(PGDIR_SIZE-1))
77 * entries per page directory level: the S390 is two-level, so
78 * we don't really have any PMD directory physically.
79 * for S390 segment-table entries are combined to one PGD
80 * that leads to 1024 pte per pgd
82 #ifndef __s390x__
83 # define PTRS_PER_PTE 1024
84 # define PTRS_PER_PMD 1
85 # define PTRS_PER_PGD 512
86 #else /* __s390x__ */
87 # define PTRS_PER_PTE 512
88 # define PTRS_PER_PMD 1024
89 # define PTRS_PER_PGD 2048
90 #endif /* __s390x__ */
92 #define FIRST_USER_ADDRESS 0
94 #define pte_ERROR(e) \
95 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
96 #define pmd_ERROR(e) \
97 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
98 #define pgd_ERROR(e) \
99 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
101 #ifndef __ASSEMBLY__
103 * Just any arbitrary offset to the start of the vmalloc VM area: the
104 * current 8MB value just means that there will be a 8MB "hole" after the
105 * physical memory until the kernel virtual memory starts. That means that
106 * any out-of-bounds memory accesses will hopefully be caught.
107 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
108 * area for the same reason. ;)
110 extern unsigned long vmalloc_end;
111 #define VMALLOC_OFFSET (8*1024*1024)
112 #define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) \
113 & ~(VMALLOC_OFFSET-1))
114 #define VMALLOC_END vmalloc_end
117 * We need some free virtual space to be able to do vmalloc.
118 * VMALLOC_MIN_SIZE defines the minimum size of the vmalloc
119 * area. On a machine with 2GB memory we make sure that we
120 * have at least 128MB free space for vmalloc. On a machine
121 * with 4TB we make sure we have at least 128GB.
123 #ifndef __s390x__
124 #define VMALLOC_MIN_SIZE 0x8000000UL
125 #define VMALLOC_END_INIT 0x80000000UL
126 #else /* __s390x__ */
127 #define VMALLOC_MIN_SIZE 0x2000000000UL
128 #define VMALLOC_END_INIT 0x40000000000UL
129 #endif /* __s390x__ */
132 * A 31 bit pagetable entry of S390 has following format:
133 * | PFRA | | OS |
134 * 0 0IP0
135 * 00000000001111111111222222222233
136 * 01234567890123456789012345678901
138 * I Page-Invalid Bit: Page is not available for address-translation
139 * P Page-Protection Bit: Store access not possible for page
141 * A 31 bit segmenttable entry of S390 has following format:
142 * | P-table origin | |PTL
143 * 0 IC
144 * 00000000001111111111222222222233
145 * 01234567890123456789012345678901
147 * I Segment-Invalid Bit: Segment is not available for address-translation
148 * C Common-Segment Bit: Segment is not private (PoP 3-30)
149 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
151 * The 31 bit segmenttable origin of S390 has following format:
153 * |S-table origin | | STL |
154 * X **GPS
155 * 00000000001111111111222222222233
156 * 01234567890123456789012345678901
158 * X Space-Switch event:
159 * G Segment-Invalid Bit: *
160 * P Private-Space Bit: Segment is not private (PoP 3-30)
161 * S Storage-Alteration:
162 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
164 * A 64 bit pagetable entry of S390 has following format:
165 * | PFRA |0IP0| OS |
166 * 0000000000111111111122222222223333333333444444444455555555556666
167 * 0123456789012345678901234567890123456789012345678901234567890123
169 * I Page-Invalid Bit: Page is not available for address-translation
170 * P Page-Protection Bit: Store access not possible for page
172 * A 64 bit segmenttable entry of S390 has following format:
173 * | P-table origin | TT
174 * 0000000000111111111122222222223333333333444444444455555555556666
175 * 0123456789012345678901234567890123456789012345678901234567890123
177 * I Segment-Invalid Bit: Segment is not available for address-translation
178 * C Common-Segment Bit: Segment is not private (PoP 3-30)
179 * P Page-Protection Bit: Store access not possible for page
180 * TT Type 00
182 * A 64 bit region table entry of S390 has following format:
183 * | S-table origin | TF TTTL
184 * 0000000000111111111122222222223333333333444444444455555555556666
185 * 0123456789012345678901234567890123456789012345678901234567890123
187 * I Segment-Invalid Bit: Segment is not available for address-translation
188 * TT Type 01
189 * TF
190 * TL Table lenght
192 * The 64 bit regiontable origin of S390 has following format:
193 * | region table origon | DTTL
194 * 0000000000111111111122222222223333333333444444444455555555556666
195 * 0123456789012345678901234567890123456789012345678901234567890123
197 * X Space-Switch event:
198 * G Segment-Invalid Bit:
199 * P Private-Space Bit:
200 * S Storage-Alteration:
201 * R Real space
202 * TL Table-Length:
204 * A storage key has the following format:
205 * | ACC |F|R|C|0|
206 * 0 3 4 5 6 7
207 * ACC: access key
208 * F : fetch protection bit
209 * R : referenced bit
210 * C : changed bit
213 /* Hardware bits in the page table entry */
214 #define _PAGE_RO 0x200 /* HW read-only bit */
215 #define _PAGE_INVALID 0x400 /* HW invalid bit */
216 #define _PAGE_SWT 0x001 /* SW pte type bit t */
217 #define _PAGE_SWX 0x002 /* SW pte type bit x */
219 /* Six different types of pages. */
220 #define _PAGE_TYPE_EMPTY 0x400
221 #define _PAGE_TYPE_NONE 0x401
222 #define _PAGE_TYPE_SWAP 0x403
223 #define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */
224 #define _PAGE_TYPE_RO 0x200
225 #define _PAGE_TYPE_RW 0x000
228 * PTE type bits are rather complicated. handle_pte_fault uses pte_present,
229 * pte_none and pte_file to find out the pte type WITHOUT holding the page
230 * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to
231 * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs
232 * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards.
233 * This change is done while holding the lock, but the intermediate step
234 * of a previously valid pte with the hw invalid bit set can be observed by
235 * handle_pte_fault. That makes it necessary that all valid pte types with
236 * the hw invalid bit set must be distinguishable from the four pte types
237 * empty, none, swap and file.
239 * irxt ipte irxt
240 * _PAGE_TYPE_EMPTY 1000 -> 1000
241 * _PAGE_TYPE_NONE 1001 -> 1001
242 * _PAGE_TYPE_SWAP 1011 -> 1011
243 * _PAGE_TYPE_FILE 11?1 -> 11?1
244 * _PAGE_TYPE_RO 0100 -> 1100
245 * _PAGE_TYPE_RW 0000 -> 1000
247 * pte_none is true for bits combinations 1000, 1100
248 * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001
249 * pte_file is true for bits combinations 1101, 1111
250 * swap pte is 1011 and 0001, 0011, 0101, 0111, 1010 and 1110 are invalid.
253 #ifndef __s390x__
255 /* Bits in the segment table entry */
256 #define _PAGE_TABLE_LEN 0xf /* only full page-tables */
257 #define _PAGE_TABLE_COM 0x10 /* common page-table */
258 #define _PAGE_TABLE_INV 0x20 /* invalid page-table */
259 #define _SEG_PRESENT 0x001 /* Software (overlap with PTL) */
261 /* Bits int the storage key */
262 #define _PAGE_CHANGED 0x02 /* HW changed bit */
263 #define _PAGE_REFERENCED 0x04 /* HW referenced bit */
265 #define _USER_SEG_TABLE_LEN 0x7f /* user-segment-table up to 2 GB */
266 #define _KERNEL_SEG_TABLE_LEN 0x7f /* kernel-segment-table up to 2 GB */
269 * User and Kernel pagetables are identical
271 #define _PAGE_TABLE _PAGE_TABLE_LEN
272 #define _KERNPG_TABLE _PAGE_TABLE_LEN
275 * The Kernel segment-tables includes the User segment-table
278 #define _SEGMENT_TABLE (_USER_SEG_TABLE_LEN|0x80000000|0x100)
279 #define _KERNSEG_TABLE _KERNEL_SEG_TABLE_LEN
281 #define USER_STD_MASK 0x00000080UL
283 #else /* __s390x__ */
285 /* Bits in the segment table entry */
286 #define _PMD_ENTRY_INV 0x20 /* invalid segment table entry */
287 #define _PMD_ENTRY 0x00
289 /* Bits in the region third table entry */
290 #define _PGD_ENTRY_INV 0x20 /* invalid region table entry */
291 #define _PGD_ENTRY 0x07
294 * User and kernel page directory
296 #define _REGION_THIRD 0x4
297 #define _REGION_THIRD_LEN 0x3
298 #define _REGION_TABLE (_REGION_THIRD|_REGION_THIRD_LEN|0x40|0x100)
299 #define _KERN_REGION_TABLE (_REGION_THIRD|_REGION_THIRD_LEN)
301 #define USER_STD_MASK 0x0000000000000080UL
303 /* Bits in the storage key */
304 #define _PAGE_CHANGED 0x02 /* HW changed bit */
305 #define _PAGE_REFERENCED 0x04 /* HW referenced bit */
307 #endif /* __s390x__ */
310 * Page protection definitions.
312 #define PAGE_NONE __pgprot(_PAGE_TYPE_NONE)
313 #define PAGE_RO __pgprot(_PAGE_TYPE_RO)
314 #define PAGE_RW __pgprot(_PAGE_TYPE_RW)
316 #define PAGE_KERNEL PAGE_RW
317 #define PAGE_COPY PAGE_RO
320 * The S390 can't do page protection for execute, and considers that the
321 * same are read. Also, write permissions imply read permissions. This is
322 * the closest we can get..
324 /*xwr*/
325 #define __P000 PAGE_NONE
326 #define __P001 PAGE_RO
327 #define __P010 PAGE_RO
328 #define __P011 PAGE_RO
329 #define __P100 PAGE_RO
330 #define __P101 PAGE_RO
331 #define __P110 PAGE_RO
332 #define __P111 PAGE_RO
334 #define __S000 PAGE_NONE
335 #define __S001 PAGE_RO
336 #define __S010 PAGE_RW
337 #define __S011 PAGE_RW
338 #define __S100 PAGE_RO
339 #define __S101 PAGE_RO
340 #define __S110 PAGE_RW
341 #define __S111 PAGE_RW
344 * Certain architectures need to do special things when PTEs
345 * within a page table are directly modified. Thus, the following
346 * hook is made available.
348 static inline void set_pte(pte_t *pteptr, pte_t pteval)
350 *pteptr = pteval;
352 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
355 * pgd/pmd/pte query functions
357 #ifndef __s390x__
359 static inline int pgd_present(pgd_t pgd) { return 1; }
360 static inline int pgd_none(pgd_t pgd) { return 0; }
361 static inline int pgd_bad(pgd_t pgd) { return 0; }
363 static inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _SEG_PRESENT; }
364 static inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PAGE_TABLE_INV; }
365 static inline int pmd_bad(pmd_t pmd)
367 return (pmd_val(pmd) & (~PAGE_MASK & ~_PAGE_TABLE_INV)) != _PAGE_TABLE;
370 #else /* __s390x__ */
372 static inline int pgd_present(pgd_t pgd)
374 return (pgd_val(pgd) & ~PAGE_MASK) == _PGD_ENTRY;
377 static inline int pgd_none(pgd_t pgd)
379 return pgd_val(pgd) & _PGD_ENTRY_INV;
382 static inline int pgd_bad(pgd_t pgd)
384 return (pgd_val(pgd) & (~PAGE_MASK & ~_PGD_ENTRY_INV)) != _PGD_ENTRY;
387 static inline int pmd_present(pmd_t pmd)
389 return (pmd_val(pmd) & ~PAGE_MASK) == _PMD_ENTRY;
392 static inline int pmd_none(pmd_t pmd)
394 return pmd_val(pmd) & _PMD_ENTRY_INV;
397 static inline int pmd_bad(pmd_t pmd)
399 return (pmd_val(pmd) & (~PAGE_MASK & ~_PMD_ENTRY_INV)) != _PMD_ENTRY;
402 #endif /* __s390x__ */
404 static inline int pte_none(pte_t pte)
406 return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
409 static inline int pte_present(pte_t pte)
411 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX;
412 return (pte_val(pte) & mask) == _PAGE_TYPE_NONE ||
413 (!(pte_val(pte) & _PAGE_INVALID) &&
414 !(pte_val(pte) & _PAGE_SWT));
417 static inline int pte_file(pte_t pte)
419 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT;
420 return (pte_val(pte) & mask) == _PAGE_TYPE_FILE;
423 #define pte_same(a,b) (pte_val(a) == pte_val(b))
426 * query functions pte_write/pte_dirty/pte_young only work if
427 * pte_present() is true. Undefined behaviour if not..
429 static inline int pte_write(pte_t pte)
431 return (pte_val(pte) & _PAGE_RO) == 0;
434 static inline int pte_dirty(pte_t pte)
436 /* A pte is neither clean nor dirty on s/390. The dirty bit
437 * is in the storage key. See page_test_and_clear_dirty for
438 * details.
440 return 0;
443 static inline int pte_young(pte_t pte)
445 /* A pte is neither young nor old on s/390. The young bit
446 * is in the storage key. See page_test_and_clear_young for
447 * details.
449 return 0;
452 static inline int pte_read(pte_t pte)
454 /* All pages are readable since we don't use the fetch
455 * protection bit in the storage key.
457 return 1;
461 * pgd/pmd/pte modification functions
464 #ifndef __s390x__
466 static inline void pgd_clear(pgd_t * pgdp) { }
468 static inline void pmd_clear(pmd_t * pmdp)
470 pmd_val(pmdp[0]) = _PAGE_TABLE_INV;
471 pmd_val(pmdp[1]) = _PAGE_TABLE_INV;
472 pmd_val(pmdp[2]) = _PAGE_TABLE_INV;
473 pmd_val(pmdp[3]) = _PAGE_TABLE_INV;
476 #else /* __s390x__ */
478 static inline void pgd_clear(pgd_t * pgdp)
480 pgd_val(*pgdp) = _PGD_ENTRY_INV | _PGD_ENTRY;
483 static inline void pmd_clear(pmd_t * pmdp)
485 pmd_val(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
486 pmd_val1(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
489 #endif /* __s390x__ */
491 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
493 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
497 * The following pte modification functions only work if
498 * pte_present() is true. Undefined behaviour if not..
500 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
502 pte_val(pte) &= PAGE_MASK;
503 pte_val(pte) |= pgprot_val(newprot);
504 return pte;
507 static inline pte_t pte_wrprotect(pte_t pte)
509 /* Do not clobber _PAGE_TYPE_NONE pages! */
510 if (!(pte_val(pte) & _PAGE_INVALID))
511 pte_val(pte) |= _PAGE_RO;
512 return pte;
515 static inline pte_t pte_mkwrite(pte_t pte)
517 pte_val(pte) &= ~_PAGE_RO;
518 return pte;
521 static inline pte_t pte_mkclean(pte_t pte)
523 /* The only user of pte_mkclean is the fork() code.
524 We must *not* clear the *physical* page dirty bit
525 just because fork() wants to clear the dirty bit in
526 *one* of the page's mappings. So we just do nothing. */
527 return pte;
530 static inline pte_t pte_mkdirty(pte_t pte)
532 /* We do not explicitly set the dirty bit because the
533 * sske instruction is slow. It is faster to let the
534 * next instruction set the dirty bit.
536 return pte;
539 static inline pte_t pte_mkold(pte_t pte)
541 /* S/390 doesn't keep its dirty/referenced bit in the pte.
542 * There is no point in clearing the real referenced bit.
544 return pte;
547 static inline pte_t pte_mkyoung(pte_t pte)
549 /* S/390 doesn't keep its dirty/referenced bit in the pte.
550 * There is no point in setting the real referenced bit.
552 return pte;
555 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
557 return 0;
560 static inline int
561 ptep_clear_flush_young(struct vm_area_struct *vma,
562 unsigned long address, pte_t *ptep)
564 /* No need to flush TLB; bits are in storage key */
565 return ptep_test_and_clear_young(vma, address, ptep);
568 static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
570 return 0;
573 static inline int
574 ptep_clear_flush_dirty(struct vm_area_struct *vma,
575 unsigned long address, pte_t *ptep)
577 /* No need to flush TLB; bits are in storage key */
578 return ptep_test_and_clear_dirty(vma, address, ptep);
581 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
583 pte_t pte = *ptep;
584 pte_clear(mm, addr, ptep);
585 return pte;
588 static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
590 if (!(pte_val(*ptep) & _PAGE_INVALID)) {
591 #ifndef __s390x__
592 /* S390 has 1mb segments, we are emulating 4MB segments */
593 pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
594 #else
595 /* ipte in zarch mode can do the math */
596 pte_t *pto = ptep;
597 #endif
598 asm volatile(
599 " ipte %2,%3"
600 : "=m" (*ptep) : "m" (*ptep),
601 "a" (pto), "a" (address));
603 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
606 static inline pte_t
607 ptep_clear_flush(struct vm_area_struct *vma,
608 unsigned long address, pte_t *ptep)
610 pte_t pte = *ptep;
612 __ptep_ipte(address, ptep);
613 return pte;
616 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
618 pte_t old_pte = *ptep;
619 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
622 static inline void
623 ptep_establish(struct vm_area_struct *vma,
624 unsigned long address, pte_t *ptep,
625 pte_t entry)
627 ptep_clear_flush(vma, address, ptep);
628 set_pte(ptep, entry);
631 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
632 ptep_establish(__vma, __address, __ptep, __entry)
635 * Test and clear dirty bit in storage key.
636 * We can't clear the changed bit atomically. This is a potential
637 * race against modification of the referenced bit. This function
638 * should therefore only be called if it is not mapped in any
639 * address space.
641 static inline int page_test_and_clear_dirty(struct page *page)
643 unsigned long physpage = page_to_phys(page);
644 int skey = page_get_storage_key(physpage);
646 if (skey & _PAGE_CHANGED)
647 page_set_storage_key(physpage, skey & ~_PAGE_CHANGED);
648 return skey & _PAGE_CHANGED;
652 * Test and clear referenced bit in storage key.
654 static inline int page_test_and_clear_young(struct page *page)
656 unsigned long physpage = page_to_phys(page);
657 int ccode;
659 asm volatile(
660 " rrbe 0,%1\n"
661 " ipm %0\n"
662 " srl %0,28\n"
663 : "=d" (ccode) : "a" (physpage) : "cc" );
664 return ccode & 2;
668 * Conversion functions: convert a page and protection to a page entry,
669 * and a page entry and page directory to the page they refer to.
671 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
673 pte_t __pte;
674 pte_val(__pte) = physpage + pgprot_val(pgprot);
675 return __pte;
678 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
680 unsigned long physpage = page_to_phys(page);
682 return mk_pte_phys(physpage, pgprot);
685 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
687 unsigned long physpage = __pa((pfn) << PAGE_SHIFT);
689 return mk_pte_phys(physpage, pgprot);
692 #ifdef __s390x__
694 static inline pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot)
696 unsigned long physpage = __pa((pfn) << PAGE_SHIFT);
698 return __pmd(physpage + pgprot_val(pgprot));
701 #endif /* __s390x__ */
703 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
704 #define pte_page(x) pfn_to_page(pte_pfn(x))
706 #define pmd_page_vaddr(pmd) (pmd_val(pmd) & PAGE_MASK)
708 #define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
710 #define pgd_page_vaddr(pgd) (pgd_val(pgd) & PAGE_MASK)
712 #define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
714 /* to find an entry in a page-table-directory */
715 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
716 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
718 /* to find an entry in a kernel page-table-directory */
719 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
721 #ifndef __s390x__
723 /* Find an entry in the second-level page table.. */
724 static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
726 return (pmd_t *) dir;
729 #else /* __s390x__ */
731 /* Find an entry in the second-level page table.. */
732 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
733 #define pmd_offset(dir,addr) \
734 ((pmd_t *) pgd_page_vaddr(*(dir)) + pmd_index(addr))
736 #endif /* __s390x__ */
738 /* Find an entry in the third-level page table.. */
739 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
740 #define pte_offset_kernel(pmd, address) \
741 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
742 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
743 #define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
744 #define pte_unmap(pte) do { } while (0)
745 #define pte_unmap_nested(pte) do { } while (0)
748 * 31 bit swap entry format:
749 * A page-table entry has some bits we have to treat in a special way.
750 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
751 * exception will occur instead of a page translation exception. The
752 * specifiation exception has the bad habit not to store necessary
753 * information in the lowcore.
754 * Bit 21 and bit 22 are the page invalid bit and the page protection
755 * bit. We set both to indicate a swapped page.
756 * Bit 30 and 31 are used to distinguish the different page types. For
757 * a swapped page these bits need to be zero.
758 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
759 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
760 * plus 24 for the offset.
761 * 0| offset |0110|o|type |00|
762 * 0 0000000001111111111 2222 2 22222 33
763 * 0 1234567890123456789 0123 4 56789 01
765 * 64 bit swap entry format:
766 * A page-table entry has some bits we have to treat in a special way.
767 * Bits 52 and bit 55 have to be zero, otherwise an specification
768 * exception will occur instead of a page translation exception. The
769 * specifiation exception has the bad habit not to store necessary
770 * information in the lowcore.
771 * Bit 53 and bit 54 are the page invalid bit and the page protection
772 * bit. We set both to indicate a swapped page.
773 * Bit 62 and 63 are used to distinguish the different page types. For
774 * a swapped page these bits need to be zero.
775 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
776 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
777 * plus 56 for the offset.
778 * | offset |0110|o|type |00|
779 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
780 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
782 #ifndef __s390x__
783 #define __SWP_OFFSET_MASK (~0UL >> 12)
784 #else
785 #define __SWP_OFFSET_MASK (~0UL >> 11)
786 #endif
787 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
789 pte_t pte;
790 offset &= __SWP_OFFSET_MASK;
791 pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) |
792 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
793 return pte;
796 #define __swp_type(entry) (((entry).val >> 2) & 0x1f)
797 #define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
798 #define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
800 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
801 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
803 #ifndef __s390x__
804 # define PTE_FILE_MAX_BITS 26
805 #else /* __s390x__ */
806 # define PTE_FILE_MAX_BITS 59
807 #endif /* __s390x__ */
809 #define pte_to_pgoff(__pte) \
810 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
812 #define pgoff_to_pte(__off) \
813 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
814 | _PAGE_TYPE_FILE })
816 #endif /* !__ASSEMBLY__ */
818 #define kern_addr_valid(addr) (1)
820 extern int add_shared_memory(unsigned long start, unsigned long size);
821 extern int remove_shared_memory(unsigned long start, unsigned long size);
824 * No page table caches to initialise
826 #define pgtable_cache_init() do { } while (0)
828 #define __HAVE_ARCH_MEMMAP_INIT
829 extern void memmap_init(unsigned long, int, unsigned long, unsigned long);
831 #define __HAVE_ARCH_PTEP_ESTABLISH
832 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
833 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
834 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
835 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
836 #define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
837 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
838 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
839 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
840 #define __HAVE_ARCH_PTE_SAME
841 #define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
842 #define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
843 #include <asm-generic/pgtable.h>
845 #endif /* _S390_PAGE_H */