2 * Device Tree file for Marvell Armada XP development board
5 * Copyright (C) 2013 Marvell
7 * Lior Amsalem <alior@marvell.com>
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
17 /include/ "armada-xp-mv78460.dtsi"
20 model = "Marvell Armada XP Development Board DB-MV784MP-GP";
21 compatible = "marvell,axp-gp", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
24 bootargs = "console=ttyS0,115200 earlyprintk";
28 device_type = "memory";
31 * 4 GB of plug-in RAM modules by default but only 3GB
32 * are visible, the amount of memory available can be
33 * changed by the bootloader according the size of the
34 * module actually plugged
36 reg = <0x00000000 0xC0000000>;
41 clock-frequency = <250000000>;
45 clock-frequency = <250000000>;
49 clock-frequency = <250000000>;
53 clock-frequency = <250000000>;
63 phy0: ethernet-phy@0 {
67 phy1: ethernet-phy@1 {
71 phy2: ethernet-phy@2 {
75 phy3: ethernet-phy@3 {
83 phy-mode = "rgmii-id";
88 phy-mode = "rgmii-id";
93 phy-mode = "rgmii-id";
98 phy-mode = "rgmii-id";
105 #address-cells = <1>;
107 compatible = "n25q128a13";
108 reg = <0>; /* Chip select 0 */
109 spi-max-frequency = <108000000>;
113 devbus-bootcs@d0010400 {
115 ranges = <0 0xf0000000 0x1000000>; /* @addr 0xf000000, size 0x1000000 */
117 /* Device Bus parameters are required */
119 /* Read parameters */
120 devbus,bus-width = <8>;
121 devbus,turn-off-ps = <60000>;
122 devbus,badr-skew-ps = <0>;
123 devbus,acc-first-ps = <124000>;
124 devbus,acc-next-ps = <248000>;
125 devbus,rd-setup-ps = <0>;
126 devbus,rd-hold-ps = <0>;
128 /* Write parameters */
129 devbus,sync-enable = <0>;
130 devbus,wr-high-ps = <60000>;
131 devbus,wr-low-ps = <60000>;
132 devbus,ale-wr-ps = <60000>;
136 compatible = "cfi-flash";
146 * The 3 slots are physically present as
147 * standard PCIe slots on the board.