arch/ia64/hp/common/hwsw_iommu.c

   1 /*
   2  * Copyright (c) 2004 Hewlett-Packard Development Company, L.P.
   3  *   Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
   4  *
   5  * This is a pseudo I/O MMU which dispatches to the hardware I/O MMU
   6  * whenever possible.  We assume that the hardware I/O MMU requires
   7  * full 32-bit addressability, as is the case, e.g., for HP zx1-based
   8  * systems (there, the I/O MMU window is mapped at 3-4GB).  If a
   9  * device doesn't provide full 32-bit addressability, we fall back on
  10  * the sw I/O TLB.  This is good enough to let us support broken
  11  * hardware such as soundcards which have a DMA engine that can
  12  * address only 28 bits.
  13  */
  14
  15 #include <linux/device.h>
  16 #include <linux/dma-mapping.h>
  17 #include <linux/swiotlb.h>
  18 #include <asm/machvec.h>
  19
  20 /* swiotlb declarations & definitions: */
  21 extern int swiotlb_late_init_with_default_size (size_t size);
  22
  23 /* hwiommu declarations & definitions: */
  24
  25 extern ia64_mv_dma_alloc_coherent       sba_alloc_coherent;
  26 extern ia64_mv_dma_free_coherent        sba_free_coherent;
  27 extern ia64_mv_dma_map_single_attrs     sba_map_single_attrs;
  28 extern ia64_mv_dma_unmap_single_attrs   sba_unmap_single_attrs;
  29 extern ia64_mv_dma_map_sg_attrs         sba_map_sg_attrs;
  30 extern ia64_mv_dma_unmap_sg_attrs       sba_unmap_sg_attrs;
  31 extern ia64_mv_dma_supported            sba_dma_supported;
  32 extern ia64_mv_dma_mapping_error        sba_dma_mapping_error;
  33
  34 #define hwiommu_alloc_coherent          sba_alloc_coherent
  35 #define hwiommu_free_coherent           sba_free_coherent
  36 #define hwiommu_map_single_attrs        sba_map_single_attrs
  37 #define hwiommu_unmap_single_attrs      sba_unmap_single_attrs
  38 #define hwiommu_map_sg_attrs            sba_map_sg_attrs
  39 #define hwiommu_unmap_sg_attrs          sba_unmap_sg_attrs
  40 #define hwiommu_dma_supported           sba_dma_supported
  41 #define hwiommu_dma_mapping_error       sba_dma_mapping_error
  42 #define hwiommu_sync_single_for_cpu     machvec_dma_sync_single
  43 #define hwiommu_sync_sg_for_cpu         machvec_dma_sync_sg
  44 #define hwiommu_sync_single_for_device  machvec_dma_sync_single
  45 #define hwiommu_sync_sg_for_device      machvec_dma_sync_sg
  46
  47
  48 /*
  49  * Note: we need to make the determination of whether or not to use
  50  * the sw I/O TLB based purely on the device structure.  Anything else
  51  * would be unreliable or would be too intrusive.
  52  */
  53 static inline int
  54 use_swiotlb (struct device *dev)
  55 {
  56         return dev && dev->dma_mask && !hwiommu_dma_supported(dev, *dev->dma_mask);
  57 }
  58
  59 struct dma_mapping_ops hwsw_dma_ops;
  60
  61 void __init
  62 hwsw_init (void)
  63 {
  64         dma_ops = &hwsw_dma_ops;
  65         /* default to a smallish 2MB sw I/O TLB */
  66         if (swiotlb_late_init_with_default_size (2 * (1<<20)) != 0) {
  67 #ifdef CONFIG_IA64_GENERIC
  68                 /* Better to have normal DMA than panic */
  69                 printk(KERN_WARNING "%s: Failed to initialize software I/O TLB,"
  70                        " reverting to hpzx1 platform vector\n", __func__);
  71                 machvec_init("hpzx1");
  72 #else
  73                 panic("Unable to initialize software I/O TLB services");
  74 #endif
  75         }
  76 }
  77
  78 void *
  79 hwsw_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flags)
  80 {
  81         if (use_swiotlb(dev))
  82                 return swiotlb_alloc_coherent(dev, size, dma_handle, flags);
  83         else
  84                 return hwiommu_alloc_coherent(dev, size, dma_handle, flags);
  85 }
  86
  87 void
  88 hwsw_free_coherent (struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle)
  89 {
  90         if (use_swiotlb(dev))
  91                 swiotlb_free_coherent(dev, size, vaddr, dma_handle);
  92         else
  93                 hwiommu_free_coherent(dev, size, vaddr, dma_handle);
  94 }
  95
  96 dma_addr_t
  97 hwsw_map_single_attrs(struct device *dev, void *addr, size_t size, int dir,
  98                        struct dma_attrs *attrs)
  99 {
 100         if (use_swiotlb(dev))
 101                 return swiotlb_map_single_attrs(dev, addr, size, dir, attrs);
 102         else
 103                 return hwiommu_map_single_attrs(dev, addr, size, dir, attrs);
 104 }
 105 EXPORT_SYMBOL(hwsw_map_single_attrs);
 106
 107 void
 108 hwsw_unmap_single_attrs(struct device *dev, dma_addr_t iova, size_t size,
 109                          int dir, struct dma_attrs *attrs)
 110 {
 111         if (use_swiotlb(dev))
 112                 return swiotlb_unmap_single_attrs(dev, iova, size, dir, attrs);
 113         else
 114                 return hwiommu_unmap_single_attrs(dev, iova, size, dir, attrs);
 115 }
 116 EXPORT_SYMBOL(hwsw_unmap_single_attrs);
 117
 118 int
 119 hwsw_map_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents,
 120                    int dir, struct dma_attrs *attrs)
 121 {
 122         if (use_swiotlb(dev))
 123                 return swiotlb_map_sg_attrs(dev, sglist, nents, dir, attrs);
 124         else
 125                 return hwiommu_map_sg_attrs(dev, sglist, nents, dir, attrs);
 126 }
 127 EXPORT_SYMBOL(hwsw_map_sg_attrs);
 128
 129 void
 130 hwsw_unmap_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents,
 131                      int dir, struct dma_attrs *attrs)
 132 {
 133         if (use_swiotlb(dev))
 134                 return swiotlb_unmap_sg_attrs(dev, sglist, nents, dir, attrs);
 135         else
 136                 return hwiommu_unmap_sg_attrs(dev, sglist, nents, dir, attrs);
 137 }
 138 EXPORT_SYMBOL(hwsw_unmap_sg_attrs);
 139
 140 void
 141 hwsw_sync_single_for_cpu (struct device *dev, dma_addr_t addr, size_t size, int dir)
 142 {
 143         if (use_swiotlb(dev))
 144                 swiotlb_sync_single_for_cpu(dev, addr, size, dir);
 145         else
 146                 hwiommu_sync_single_for_cpu(dev, addr, size, dir);
 147 }
 148
 149 void
 150 hwsw_sync_sg_for_cpu (struct device *dev, struct scatterlist *sg, int nelems, int dir)
 151 {
 152         if (use_swiotlb(dev))
 153                 swiotlb_sync_sg_for_cpu(dev, sg, nelems, dir);
 154         else
 155                 hwiommu_sync_sg_for_cpu(dev, sg, nelems, dir);
 156 }
 157
 158 void
 159 hwsw_sync_single_for_device (struct device *dev, dma_addr_t addr, size_t size, int dir)
 160 {
 161         if (use_swiotlb(dev))
 162                 swiotlb_sync_single_for_device(dev, addr, size, dir);
 163         else
 164                 hwiommu_sync_single_for_device(dev, addr, size, dir);
 165 }
 166
 167 void
 168 hwsw_sync_sg_for_device (struct device *dev, struct scatterlist *sg, int nelems, int dir)
 169 {
 170         if (use_swiotlb(dev))
 171                 swiotlb_sync_sg_for_device(dev, sg, nelems, dir);
 172         else
 173                 hwiommu_sync_sg_for_device(dev, sg, nelems, dir);
 174 }
 175
 176 int
 177 hwsw_dma_supported (struct device *dev, u64 mask)
 178 {
 179         if (hwiommu_dma_supported(dev, mask))
 180                 return 1;
 181         return swiotlb_dma_supported(dev, mask);
 182 }
 183
 184 int
 185 hwsw_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 186 {
 187         return hwiommu_dma_mapping_error(dev, dma_addr) ||
 188                 swiotlb_dma_mapping_error(dev, dma_addr);
 189 }
 190
 191 EXPORT_SYMBOL(hwsw_dma_mapping_error);
 192 EXPORT_SYMBOL(hwsw_dma_supported);
 193 EXPORT_SYMBOL(hwsw_alloc_coherent);
 194 EXPORT_SYMBOL(hwsw_free_coherent);
 195 EXPORT_SYMBOL(hwsw_sync_single_for_cpu);
 196 EXPORT_SYMBOL(hwsw_sync_single_for_device);
 197 EXPORT_SYMBOL(hwsw_sync_sg_for_cpu);
 198 EXPORT_SYMBOL(hwsw_sync_sg_for_device);
 199
 200 struct dma_mapping_ops hwsw_dma_ops = {
 201         .alloc_coherent         = hwsw_alloc_coherent,
 202         .free_coherent          = hwsw_free_coherent,
 203         .map_single_attrs       = hwsw_map_single_attrs,
 204         .unmap_single_attrs     = hwsw_unmap_single_attrs,
 205         .map_sg_attrs           = hwsw_map_sg_attrs,
 206         .unmap_sg_attrs         = hwsw_unmap_sg_attrs,
 207         .sync_single_for_cpu    = hwsw_sync_single_for_cpu,
 208         .sync_sg_for_cpu        = hwsw_sync_sg_for_cpu,
 209         .sync_single_for_device = hwsw_sync_single_for_device,
 210         .sync_sg_for_device     = hwsw_sync_sg_for_device,
 211         .dma_supported_op       = hwsw_dma_supported,
 212         .mapping_error          = hwsw_dma_mapping_error,
 213 };