x86/apic: Make cpu_mask_to_apicid() operations check cpu_online_mask
[linux-2.6.git] / arch / x86 / kernel / apic / x2apic_cluster.c
blob23a46cf5b6fdcac1e180a130ad8ad6c14f4d48df
1 #include <linux/threads.h>
2 #include <linux/cpumask.h>
3 #include <linux/string.h>
4 #include <linux/kernel.h>
5 #include <linux/ctype.h>
6 #include <linux/init.h>
7 #include <linux/dmar.h>
8 #include <linux/cpu.h>
10 #include <asm/smp.h>
11 #include <asm/x2apic.h>
13 static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
14 static DEFINE_PER_CPU(cpumask_var_t, cpus_in_cluster);
15 static DEFINE_PER_CPU(cpumask_var_t, ipi_mask);
17 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
19 return x2apic_enabled();
22 static inline u32 x2apic_cluster(int cpu)
24 return per_cpu(x86_cpu_to_logical_apicid, cpu) >> 16;
27 static void
28 __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
30 struct cpumask *cpus_in_cluster_ptr;
31 struct cpumask *ipi_mask_ptr;
32 unsigned int cpu, this_cpu;
33 unsigned long flags;
34 u32 dest;
36 x2apic_wrmsr_fence();
38 local_irq_save(flags);
40 this_cpu = smp_processor_id();
43 * We are to modify mask, so we need an own copy
44 * and be sure it's manipulated with irq off.
46 ipi_mask_ptr = __raw_get_cpu_var(ipi_mask);
47 cpumask_copy(ipi_mask_ptr, mask);
50 * The idea is to send one IPI per cluster.
52 for_each_cpu(cpu, ipi_mask_ptr) {
53 unsigned long i;
55 cpus_in_cluster_ptr = per_cpu(cpus_in_cluster, cpu);
56 dest = 0;
58 /* Collect cpus in cluster. */
59 for_each_cpu_and(i, ipi_mask_ptr, cpus_in_cluster_ptr) {
60 if (apic_dest == APIC_DEST_ALLINC || i != this_cpu)
61 dest |= per_cpu(x86_cpu_to_logical_apicid, i);
64 if (!dest)
65 continue;
67 __x2apic_send_IPI_dest(dest, vector, apic->dest_logical);
69 * Cluster sibling cpus should be discared now so
70 * we would not send IPI them second time.
72 cpumask_andnot(ipi_mask_ptr, ipi_mask_ptr, cpus_in_cluster_ptr);
75 local_irq_restore(flags);
78 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
80 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
83 static void
84 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
86 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
89 static void x2apic_send_IPI_allbutself(int vector)
91 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
94 static void x2apic_send_IPI_all(int vector)
96 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
99 static int
100 x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask, unsigned int *apicid)
102 int cpu = cpumask_first_and(cpumask, cpu_online_mask);
103 int i;
105 if (cpu >= nr_cpu_ids)
106 return -EINVAL;
108 *apicid = 0;
109 for_each_cpu_and(i, cpumask, per_cpu(cpus_in_cluster, cpu))
110 *apicid |= per_cpu(x86_cpu_to_logical_apicid, i);
112 return 0;
115 static int
116 x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
117 const struct cpumask *andmask,
118 unsigned int *apicid)
120 u32 dest = 0;
121 u16 cluster;
122 int i;
124 for_each_cpu_and(i, cpumask, andmask) {
125 if (!cpumask_test_cpu(i, cpu_online_mask))
126 continue;
127 dest = per_cpu(x86_cpu_to_logical_apicid, i);
128 cluster = x2apic_cluster(i);
129 break;
132 if (!dest)
133 return -EINVAL;
135 for_each_cpu_and(i, cpumask, andmask) {
136 if (!cpumask_test_cpu(i, cpu_online_mask))
137 continue;
138 if (cluster != x2apic_cluster(i))
139 continue;
140 dest |= per_cpu(x86_cpu_to_logical_apicid, i);
143 *apicid = dest;
145 return 0;
148 static void init_x2apic_ldr(void)
150 unsigned int this_cpu = smp_processor_id();
151 unsigned int cpu;
153 per_cpu(x86_cpu_to_logical_apicid, this_cpu) = apic_read(APIC_LDR);
155 __cpu_set(this_cpu, per_cpu(cpus_in_cluster, this_cpu));
156 for_each_online_cpu(cpu) {
157 if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))
158 continue;
159 __cpu_set(this_cpu, per_cpu(cpus_in_cluster, cpu));
160 __cpu_set(cpu, per_cpu(cpus_in_cluster, this_cpu));
165 * At CPU state changes, update the x2apic cluster sibling info.
167 static int __cpuinit
168 update_clusterinfo(struct notifier_block *nfb, unsigned long action, void *hcpu)
170 unsigned int this_cpu = (unsigned long)hcpu;
171 unsigned int cpu;
172 int err = 0;
174 switch (action) {
175 case CPU_UP_PREPARE:
176 if (!zalloc_cpumask_var(&per_cpu(cpus_in_cluster, this_cpu),
177 GFP_KERNEL)) {
178 err = -ENOMEM;
179 } else if (!zalloc_cpumask_var(&per_cpu(ipi_mask, this_cpu),
180 GFP_KERNEL)) {
181 free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu));
182 err = -ENOMEM;
184 break;
185 case CPU_UP_CANCELED:
186 case CPU_UP_CANCELED_FROZEN:
187 case CPU_DEAD:
188 for_each_online_cpu(cpu) {
189 if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))
190 continue;
191 __cpu_clear(this_cpu, per_cpu(cpus_in_cluster, cpu));
192 __cpu_clear(cpu, per_cpu(cpus_in_cluster, this_cpu));
194 free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu));
195 free_cpumask_var(per_cpu(ipi_mask, this_cpu));
196 break;
199 return notifier_from_errno(err);
202 static struct notifier_block __refdata x2apic_cpu_notifier = {
203 .notifier_call = update_clusterinfo,
206 static int x2apic_init_cpu_notifier(void)
208 int cpu = smp_processor_id();
210 zalloc_cpumask_var(&per_cpu(cpus_in_cluster, cpu), GFP_KERNEL);
211 zalloc_cpumask_var(&per_cpu(ipi_mask, cpu), GFP_KERNEL);
213 BUG_ON(!per_cpu(cpus_in_cluster, cpu) || !per_cpu(ipi_mask, cpu));
215 __cpu_set(cpu, per_cpu(cpus_in_cluster, cpu));
216 register_hotcpu_notifier(&x2apic_cpu_notifier);
217 return 1;
220 static int x2apic_cluster_probe(void)
222 if (x2apic_mode)
223 return x2apic_init_cpu_notifier();
224 else
225 return 0;
229 * Each x2apic cluster is an allocation domain.
231 static void cluster_vector_allocation_domain(int cpu, struct cpumask *retmask)
233 cpumask_clear(retmask);
234 cpumask_copy(retmask, per_cpu(cpus_in_cluster, cpu));
237 static struct apic apic_x2apic_cluster = {
239 .name = "cluster x2apic",
240 .probe = x2apic_cluster_probe,
241 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
242 .apic_id_valid = x2apic_apic_id_valid,
243 .apic_id_registered = x2apic_apic_id_registered,
245 .irq_delivery_mode = dest_LowestPrio,
246 .irq_dest_mode = 1, /* logical */
248 .target_cpus = online_target_cpus,
249 .disable_esr = 0,
250 .dest_logical = APIC_DEST_LOGICAL,
251 .check_apicid_used = NULL,
252 .check_apicid_present = NULL,
254 .vector_allocation_domain = cluster_vector_allocation_domain,
255 .init_apic_ldr = init_x2apic_ldr,
257 .ioapic_phys_id_map = NULL,
258 .setup_apic_routing = NULL,
259 .multi_timer_check = NULL,
260 .cpu_present_to_apicid = default_cpu_present_to_apicid,
261 .apicid_to_cpu_present = NULL,
262 .setup_portio_remap = NULL,
263 .check_phys_apicid_present = default_check_phys_apicid_present,
264 .enable_apic_mode = NULL,
265 .phys_pkg_id = x2apic_phys_pkg_id,
266 .mps_oem_check = NULL,
268 .get_apic_id = x2apic_get_apic_id,
269 .set_apic_id = x2apic_set_apic_id,
270 .apic_id_mask = 0xFFFFFFFFu,
272 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
273 .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
275 .send_IPI_mask = x2apic_send_IPI_mask,
276 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
277 .send_IPI_allbutself = x2apic_send_IPI_allbutself,
278 .send_IPI_all = x2apic_send_IPI_all,
279 .send_IPI_self = x2apic_send_IPI_self,
281 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
282 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
283 .wait_for_init_deassert = NULL,
284 .smp_callin_clear_local_apic = NULL,
285 .inquire_remote_apic = NULL,
287 .read = native_apic_msr_read,
288 .write = native_apic_msr_write,
289 .eoi_write = native_apic_msr_eoi_write,
290 .icr_read = native_x2apic_icr_read,
291 .icr_write = native_x2apic_icr_write,
292 .wait_icr_idle = native_x2apic_wait_icr_idle,
293 .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
296 apic_driver(apic_x2apic_cluster);