2 * Telecom Clock driver for Intel NetStructure(tm) MPCBL0010
4 * Copyright (C) 2005 Kontron Canada
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or (at
11 * your option) any later version.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
16 * NON INFRINGEMENT. See the GNU General Public License for more
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * Send feedback to <sebastien.bouchard@ca.kontron.com> and the current
24 * Maintainer <mark.gross@intel.com>
26 * Description : This is the TELECOM CLOCK module driver for the ATCA
27 * MPCBL0010 ATCA computer.
30 #include <linux/module.h>
31 #include <linux/init.h>
32 #include <linux/kernel.h> /* printk() */
33 #include <linux/fs.h> /* everything... */
34 #include <linux/errno.h> /* error codes */
35 #include <linux/sched.h>
36 #include <linux/slab.h>
37 #include <linux/ioport.h>
38 #include <linux/interrupt.h>
39 #include <linux/spinlock.h>
40 #include <linux/mutex.h>
41 #include <linux/timer.h>
42 #include <linux/sysfs.h>
43 #include <linux/device.h>
44 #include <linux/miscdevice.h>
45 #include <linux/platform_device.h>
46 #include <asm/io.h> /* inb/outb */
47 #include <asm/uaccess.h>
49 MODULE_AUTHOR("Sebastien Bouchard <sebastien.bouchard@ca.kontron.com>");
50 MODULE_LICENSE("GPL");
52 /*Hardware Reset of the PLL */
54 #define RESET_OFF 0x01
57 #define NORMAL_MODE 0x00
58 #define HOLDOVER_MODE 0x10
59 #define FREERUN_MODE 0x20
62 #define FILTER_6HZ 0x04
63 #define FILTER_12HZ 0x00
65 /* SELECT REFERENCE FREQUENCY */
66 #define REF_CLK1_8kHz 0x00
67 #define REF_CLK2_19_44MHz 0x02
69 /* Select primary or secondary redundant clock */
70 #define PRIMARY_CLOCK 0x00
71 #define SECONDARY_CLOCK 0x01
73 /* CLOCK TRANSMISSION DEFINE */
75 #define CLK_16_384MHz 0xfb
77 #define CLK_1_544MHz 0x00
78 #define CLK_2_048MHz 0x01
79 #define CLK_4_096MHz 0x02
80 #define CLK_6_312MHz 0x03
81 #define CLK_8_192MHz 0x04
82 #define CLK_19_440MHz 0x06
84 #define CLK_8_592MHz 0x08
85 #define CLK_11_184MHz 0x09
86 #define CLK_34_368MHz 0x0b
87 #define CLK_44_736MHz 0x0a
89 /* RECEIVED REFERENCE */
93 /* HARDWARE SWITCHING DEFINE */
94 #define HW_ENABLE 0x80
95 #define HW_DISABLE 0x00
97 /* HARDWARE SWITCHING MODE DEFINE */
98 #define PLL_HOLDOVER 0x40
99 #define LOST_CLOCK 0x00
102 #define UNLOCK_MASK 0x10
103 #define HOLDOVER_MASK 0x20
104 #define SEC_LOST_MASK 0x40
105 #define PRI_LOST_MASK 0x80
107 /* INTERRUPT CAUSE DEFINE */
109 #define PRI_LOS_01_MASK 0x01
110 #define PRI_LOS_10_MASK 0x02
112 #define SEC_LOS_01_MASK 0x04
113 #define SEC_LOS_10_MASK 0x08
115 #define HOLDOVER_01_MASK 0x10
116 #define HOLDOVER_10_MASK 0x20
118 #define UNLOCK_01_MASK 0x40
119 #define UNLOCK_10_MASK 0x80
121 struct tlclk_alarms
{
123 __u32 lost_primary_clock
;
124 __u32 lost_secondary_clock
;
125 __u32 primary_clock_back
;
126 __u32 secondary_clock_back
;
127 __u32 switchover_primary
;
128 __u32 switchover_secondary
;
130 __u32 pll_end_holdover
;
134 /* Telecom clock I/O register definition */
135 #define TLCLK_BASE 0xa08
136 #define TLCLK_REG0 TLCLK_BASE
137 #define TLCLK_REG1 (TLCLK_BASE+1)
138 #define TLCLK_REG2 (TLCLK_BASE+2)
139 #define TLCLK_REG3 (TLCLK_BASE+3)
140 #define TLCLK_REG4 (TLCLK_BASE+4)
141 #define TLCLK_REG5 (TLCLK_BASE+5)
142 #define TLCLK_REG6 (TLCLK_BASE+6)
143 #define TLCLK_REG7 (TLCLK_BASE+7)
145 #define SET_PORT_BITS(port, mask, val) outb(((inb(port) & mask) | val), port)
147 /* 0 = Dynamic allocation of the major device number */
148 #define TLCLK_MAJOR 0
150 /* sysfs interface definition:
151 Upon loading the driver will create a sysfs directory under
152 /sys/devices/platform/telco_clock.
154 This directory exports the following interfaces. There operation is
155 documented in the MCPBL0010 TPS under the Telecom Clock API section, 11.4.
160 enable_clk3a_output :
161 enable_clk3b_output :
162 enable_clka0_output :
163 enable_clka1_output :
164 enable_clkb0_output :
165 enable_clkb1_output :
168 hardware_switching_mode :
173 select_amcb1_transmit_clock :
174 select_amcb2_transmit_clock :
175 select_redundant_clock :
176 select_ref_frequency :
178 All sysfs interfaces are integers in hex format, i.e echo 99 > refalign
179 has the same effect as echo 0x99 > refalign.
182 static unsigned int telclk_interrupt
;
184 static int int_events
; /* Event that generate a interrupt */
185 static int got_event
; /* if events processing have been done */
187 static void switchover_timeout(unsigned long data
);
188 static struct timer_list switchover_timer
=
189 TIMER_INITIALIZER(switchover_timeout
, 0, 0);
190 static unsigned long tlclk_timer_data
;
192 static struct tlclk_alarms
*alarm_events
;
194 static DEFINE_SPINLOCK(event_lock
);
196 static int tlclk_major
= TLCLK_MAJOR
;
198 static irqreturn_t
tlclk_interrupt(int irq
, void *dev_id
);
200 static DECLARE_WAIT_QUEUE_HEAD(wq
);
202 static unsigned long useflags
;
203 static DEFINE_MUTEX(tlclk_mutex
);
205 static int tlclk_open(struct inode
*inode
, struct file
*filp
)
209 mutex_lock(&tlclk_mutex
);
210 if (test_and_set_bit(0, &useflags
)) {
212 /* this legacy device is always one per system and it doesn't
213 * know how to handle multiple concurrent clients.
218 /* Make sure there is no interrupt pending while
219 * initialising interrupt handler */
222 /* This device is wired through the FPGA IO space of the ATCA blade
223 * we can't share this IRQ */
224 result
= request_irq(telclk_interrupt
, &tlclk_interrupt
,
225 IRQF_DISABLED
, "telco_clock", tlclk_interrupt
);
226 if (result
== -EBUSY
)
227 printk(KERN_ERR
"tlclk: Interrupt can't be reserved.\n");
229 inb(TLCLK_REG6
); /* Clear interrupt events */
232 mutex_unlock(&tlclk_mutex
);
236 static int tlclk_release(struct inode
*inode
, struct file
*filp
)
238 free_irq(telclk_interrupt
, tlclk_interrupt
);
239 clear_bit(0, &useflags
);
244 static ssize_t
tlclk_read(struct file
*filp
, char __user
*buf
, size_t count
,
247 if (count
< sizeof(struct tlclk_alarms
))
249 if (mutex_lock_interruptible(&tlclk_mutex
))
253 wait_event_interruptible(wq
, got_event
);
254 if (copy_to_user(buf
, alarm_events
, sizeof(struct tlclk_alarms
))) {
255 mutex_unlock(&tlclk_mutex
);
259 memset(alarm_events
, 0, sizeof(struct tlclk_alarms
));
262 mutex_unlock(&tlclk_mutex
);
263 return sizeof(struct tlclk_alarms
);
266 static const struct file_operations tlclk_fops
= {
269 .release
= tlclk_release
,
270 .llseek
= noop_llseek
,
274 static struct miscdevice tlclk_miscdev
= {
275 .minor
= MISC_DYNAMIC_MINOR
,
276 .name
= "telco_clock",
280 static ssize_t
show_current_ref(struct device
*d
,
281 struct device_attribute
*attr
, char *buf
)
283 unsigned long ret_val
;
286 spin_lock_irqsave(&event_lock
, flags
);
287 ret_val
= ((inb(TLCLK_REG1
) & 0x08) >> 3);
288 spin_unlock_irqrestore(&event_lock
, flags
);
290 return sprintf(buf
, "0x%lX\n", ret_val
);
293 static DEVICE_ATTR(current_ref
, S_IRUGO
, show_current_ref
, NULL
);
296 static ssize_t
show_telclock_version(struct device
*d
,
297 struct device_attribute
*attr
, char *buf
)
299 unsigned long ret_val
;
302 spin_lock_irqsave(&event_lock
, flags
);
303 ret_val
= inb(TLCLK_REG5
);
304 spin_unlock_irqrestore(&event_lock
, flags
);
306 return sprintf(buf
, "0x%lX\n", ret_val
);
309 static DEVICE_ATTR(telclock_version
, S_IRUGO
,
310 show_telclock_version
, NULL
);
312 static ssize_t
show_alarms(struct device
*d
,
313 struct device_attribute
*attr
, char *buf
)
315 unsigned long ret_val
;
318 spin_lock_irqsave(&event_lock
, flags
);
319 ret_val
= (inb(TLCLK_REG2
) & 0xf0);
320 spin_unlock_irqrestore(&event_lock
, flags
);
322 return sprintf(buf
, "0x%lX\n", ret_val
);
325 static DEVICE_ATTR(alarms
, S_IRUGO
, show_alarms
, NULL
);
327 static ssize_t
store_received_ref_clk3a(struct device
*d
,
328 struct device_attribute
*attr
, const char *buf
, size_t count
)
334 sscanf(buf
, "%lX", &tmp
);
335 dev_dbg(d
, ": tmp = 0x%lX\n", tmp
);
337 val
= (unsigned char)tmp
;
338 spin_lock_irqsave(&event_lock
, flags
);
339 SET_PORT_BITS(TLCLK_REG1
, 0xef, val
);
340 spin_unlock_irqrestore(&event_lock
, flags
);
342 return strnlen(buf
, count
);
345 static DEVICE_ATTR(received_ref_clk3a
, (S_IWUSR
|S_IWGRP
), NULL
,
346 store_received_ref_clk3a
);
349 static ssize_t
store_received_ref_clk3b(struct device
*d
,
350 struct device_attribute
*attr
, const char *buf
, size_t count
)
356 sscanf(buf
, "%lX", &tmp
);
357 dev_dbg(d
, ": tmp = 0x%lX\n", tmp
);
359 val
= (unsigned char)tmp
;
360 spin_lock_irqsave(&event_lock
, flags
);
361 SET_PORT_BITS(TLCLK_REG1
, 0xdf, val
<< 1);
362 spin_unlock_irqrestore(&event_lock
, flags
);
364 return strnlen(buf
, count
);
367 static DEVICE_ATTR(received_ref_clk3b
, (S_IWUSR
|S_IWGRP
), NULL
,
368 store_received_ref_clk3b
);
371 static ssize_t
store_enable_clk3b_output(struct device
*d
,
372 struct device_attribute
*attr
, const char *buf
, size_t count
)
378 sscanf(buf
, "%lX", &tmp
);
379 dev_dbg(d
, ": tmp = 0x%lX\n", tmp
);
381 val
= (unsigned char)tmp
;
382 spin_lock_irqsave(&event_lock
, flags
);
383 SET_PORT_BITS(TLCLK_REG3
, 0x7f, val
<< 7);
384 spin_unlock_irqrestore(&event_lock
, flags
);
386 return strnlen(buf
, count
);
389 static DEVICE_ATTR(enable_clk3b_output
, (S_IWUSR
|S_IWGRP
), NULL
,
390 store_enable_clk3b_output
);
392 static ssize_t
store_enable_clk3a_output(struct device
*d
,
393 struct device_attribute
*attr
, const char *buf
, size_t count
)
399 sscanf(buf
, "%lX", &tmp
);
400 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
402 val
= (unsigned char)tmp
;
403 spin_lock_irqsave(&event_lock
, flags
);
404 SET_PORT_BITS(TLCLK_REG3
, 0xbf, val
<< 6);
405 spin_unlock_irqrestore(&event_lock
, flags
);
407 return strnlen(buf
, count
);
410 static DEVICE_ATTR(enable_clk3a_output
, (S_IWUSR
|S_IWGRP
), NULL
,
411 store_enable_clk3a_output
);
413 static ssize_t
store_enable_clkb1_output(struct device
*d
,
414 struct device_attribute
*attr
, const char *buf
, size_t count
)
420 sscanf(buf
, "%lX", &tmp
);
421 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
423 val
= (unsigned char)tmp
;
424 spin_lock_irqsave(&event_lock
, flags
);
425 SET_PORT_BITS(TLCLK_REG2
, 0xf7, val
<< 3);
426 spin_unlock_irqrestore(&event_lock
, flags
);
428 return strnlen(buf
, count
);
431 static DEVICE_ATTR(enable_clkb1_output
, (S_IWUSR
|S_IWGRP
), NULL
,
432 store_enable_clkb1_output
);
435 static ssize_t
store_enable_clka1_output(struct device
*d
,
436 struct device_attribute
*attr
, const char *buf
, size_t count
)
442 sscanf(buf
, "%lX", &tmp
);
443 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
445 val
= (unsigned char)tmp
;
446 spin_lock_irqsave(&event_lock
, flags
);
447 SET_PORT_BITS(TLCLK_REG2
, 0xfb, val
<< 2);
448 spin_unlock_irqrestore(&event_lock
, flags
);
450 return strnlen(buf
, count
);
453 static DEVICE_ATTR(enable_clka1_output
, (S_IWUSR
|S_IWGRP
), NULL
,
454 store_enable_clka1_output
);
456 static ssize_t
store_enable_clkb0_output(struct device
*d
,
457 struct device_attribute
*attr
, const char *buf
, size_t count
)
463 sscanf(buf
, "%lX", &tmp
);
464 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
466 val
= (unsigned char)tmp
;
467 spin_lock_irqsave(&event_lock
, flags
);
468 SET_PORT_BITS(TLCLK_REG2
, 0xfd, val
<< 1);
469 spin_unlock_irqrestore(&event_lock
, flags
);
471 return strnlen(buf
, count
);
474 static DEVICE_ATTR(enable_clkb0_output
, (S_IWUSR
|S_IWGRP
), NULL
,
475 store_enable_clkb0_output
);
477 static ssize_t
store_enable_clka0_output(struct device
*d
,
478 struct device_attribute
*attr
, const char *buf
, size_t count
)
484 sscanf(buf
, "%lX", &tmp
);
485 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
487 val
= (unsigned char)tmp
;
488 spin_lock_irqsave(&event_lock
, flags
);
489 SET_PORT_BITS(TLCLK_REG2
, 0xfe, val
);
490 spin_unlock_irqrestore(&event_lock
, flags
);
492 return strnlen(buf
, count
);
495 static DEVICE_ATTR(enable_clka0_output
, (S_IWUSR
|S_IWGRP
), NULL
,
496 store_enable_clka0_output
);
498 static ssize_t
store_select_amcb2_transmit_clock(struct device
*d
,
499 struct device_attribute
*attr
, const char *buf
, size_t count
)
505 sscanf(buf
, "%lX", &tmp
);
506 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
508 val
= (unsigned char)tmp
;
509 spin_lock_irqsave(&event_lock
, flags
);
510 if ((val
== CLK_8kHz
) || (val
== CLK_16_384MHz
)) {
511 SET_PORT_BITS(TLCLK_REG3
, 0xc7, 0x28);
512 SET_PORT_BITS(TLCLK_REG1
, 0xfb, ~val
);
513 } else if (val
>= CLK_8_592MHz
) {
514 SET_PORT_BITS(TLCLK_REG3
, 0xc7, 0x38);
517 SET_PORT_BITS(TLCLK_REG0
, 0xfc, 2);
520 SET_PORT_BITS(TLCLK_REG0
, 0xfc, 0);
523 SET_PORT_BITS(TLCLK_REG0
, 0xfc, 3);
526 SET_PORT_BITS(TLCLK_REG0
, 0xfc, 1);
530 SET_PORT_BITS(TLCLK_REG3
, 0xc7, val
<< 3);
532 spin_unlock_irqrestore(&event_lock
, flags
);
534 return strnlen(buf
, count
);
537 static DEVICE_ATTR(select_amcb2_transmit_clock
, (S_IWUSR
|S_IWGRP
), NULL
,
538 store_select_amcb2_transmit_clock
);
540 static ssize_t
store_select_amcb1_transmit_clock(struct device
*d
,
541 struct device_attribute
*attr
, const char *buf
, size_t count
)
547 sscanf(buf
, "%lX", &tmp
);
548 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
550 val
= (unsigned char)tmp
;
551 spin_lock_irqsave(&event_lock
, flags
);
552 if ((val
== CLK_8kHz
) || (val
== CLK_16_384MHz
)) {
553 SET_PORT_BITS(TLCLK_REG3
, 0xf8, 0x5);
554 SET_PORT_BITS(TLCLK_REG1
, 0xfb, ~val
);
555 } else if (val
>= CLK_8_592MHz
) {
556 SET_PORT_BITS(TLCLK_REG3
, 0xf8, 0x7);
559 SET_PORT_BITS(TLCLK_REG0
, 0xfc, 2);
562 SET_PORT_BITS(TLCLK_REG0
, 0xfc, 0);
565 SET_PORT_BITS(TLCLK_REG0
, 0xfc, 3);
568 SET_PORT_BITS(TLCLK_REG0
, 0xfc, 1);
572 SET_PORT_BITS(TLCLK_REG3
, 0xf8, val
);
573 spin_unlock_irqrestore(&event_lock
, flags
);
575 return strnlen(buf
, count
);
578 static DEVICE_ATTR(select_amcb1_transmit_clock
, (S_IWUSR
|S_IWGRP
), NULL
,
579 store_select_amcb1_transmit_clock
);
581 static ssize_t
store_select_redundant_clock(struct device
*d
,
582 struct device_attribute
*attr
, const char *buf
, size_t count
)
588 sscanf(buf
, "%lX", &tmp
);
589 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
591 val
= (unsigned char)tmp
;
592 spin_lock_irqsave(&event_lock
, flags
);
593 SET_PORT_BITS(TLCLK_REG1
, 0xfe, val
);
594 spin_unlock_irqrestore(&event_lock
, flags
);
596 return strnlen(buf
, count
);
599 static DEVICE_ATTR(select_redundant_clock
, (S_IWUSR
|S_IWGRP
), NULL
,
600 store_select_redundant_clock
);
602 static ssize_t
store_select_ref_frequency(struct device
*d
,
603 struct device_attribute
*attr
, const char *buf
, size_t count
)
609 sscanf(buf
, "%lX", &tmp
);
610 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
612 val
= (unsigned char)tmp
;
613 spin_lock_irqsave(&event_lock
, flags
);
614 SET_PORT_BITS(TLCLK_REG1
, 0xfd, val
);
615 spin_unlock_irqrestore(&event_lock
, flags
);
617 return strnlen(buf
, count
);
620 static DEVICE_ATTR(select_ref_frequency
, (S_IWUSR
|S_IWGRP
), NULL
,
621 store_select_ref_frequency
);
623 static ssize_t
store_filter_select(struct device
*d
,
624 struct device_attribute
*attr
, const char *buf
, size_t count
)
630 sscanf(buf
, "%lX", &tmp
);
631 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
633 val
= (unsigned char)tmp
;
634 spin_lock_irqsave(&event_lock
, flags
);
635 SET_PORT_BITS(TLCLK_REG0
, 0xfb, val
);
636 spin_unlock_irqrestore(&event_lock
, flags
);
638 return strnlen(buf
, count
);
641 static DEVICE_ATTR(filter_select
, (S_IWUSR
|S_IWGRP
), NULL
, store_filter_select
);
643 static ssize_t
store_hardware_switching_mode(struct device
*d
,
644 struct device_attribute
*attr
, const char *buf
, size_t count
)
650 sscanf(buf
, "%lX", &tmp
);
651 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
653 val
= (unsigned char)tmp
;
654 spin_lock_irqsave(&event_lock
, flags
);
655 SET_PORT_BITS(TLCLK_REG0
, 0xbf, val
);
656 spin_unlock_irqrestore(&event_lock
, flags
);
658 return strnlen(buf
, count
);
661 static DEVICE_ATTR(hardware_switching_mode
, (S_IWUSR
|S_IWGRP
), NULL
,
662 store_hardware_switching_mode
);
664 static ssize_t
store_hardware_switching(struct device
*d
,
665 struct device_attribute
*attr
, const char *buf
, size_t count
)
671 sscanf(buf
, "%lX", &tmp
);
672 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
674 val
= (unsigned char)tmp
;
675 spin_lock_irqsave(&event_lock
, flags
);
676 SET_PORT_BITS(TLCLK_REG0
, 0x7f, val
);
677 spin_unlock_irqrestore(&event_lock
, flags
);
679 return strnlen(buf
, count
);
682 static DEVICE_ATTR(hardware_switching
, (S_IWUSR
|S_IWGRP
), NULL
,
683 store_hardware_switching
);
685 static ssize_t
store_refalign (struct device
*d
,
686 struct device_attribute
*attr
, const char *buf
, size_t count
)
691 sscanf(buf
, "%lX", &tmp
);
692 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
693 spin_lock_irqsave(&event_lock
, flags
);
694 SET_PORT_BITS(TLCLK_REG0
, 0xf7, 0);
695 SET_PORT_BITS(TLCLK_REG0
, 0xf7, 0x08);
696 SET_PORT_BITS(TLCLK_REG0
, 0xf7, 0);
697 spin_unlock_irqrestore(&event_lock
, flags
);
699 return strnlen(buf
, count
);
702 static DEVICE_ATTR(refalign
, (S_IWUSR
|S_IWGRP
), NULL
, store_refalign
);
704 static ssize_t
store_mode_select (struct device
*d
,
705 struct device_attribute
*attr
, const char *buf
, size_t count
)
711 sscanf(buf
, "%lX", &tmp
);
712 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
714 val
= (unsigned char)tmp
;
715 spin_lock_irqsave(&event_lock
, flags
);
716 SET_PORT_BITS(TLCLK_REG0
, 0xcf, val
);
717 spin_unlock_irqrestore(&event_lock
, flags
);
719 return strnlen(buf
, count
);
722 static DEVICE_ATTR(mode_select
, (S_IWUSR
|S_IWGRP
), NULL
, store_mode_select
);
724 static ssize_t
store_reset (struct device
*d
,
725 struct device_attribute
*attr
, const char *buf
, size_t count
)
731 sscanf(buf
, "%lX", &tmp
);
732 dev_dbg(d
, "tmp = 0x%lX\n", tmp
);
734 val
= (unsigned char)tmp
;
735 spin_lock_irqsave(&event_lock
, flags
);
736 SET_PORT_BITS(TLCLK_REG4
, 0xfd, val
);
737 spin_unlock_irqrestore(&event_lock
, flags
);
739 return strnlen(buf
, count
);
742 static DEVICE_ATTR(reset
, (S_IWUSR
|S_IWGRP
), NULL
, store_reset
);
744 static struct attribute
*tlclk_sysfs_entries
[] = {
745 &dev_attr_current_ref
.attr
,
746 &dev_attr_telclock_version
.attr
,
747 &dev_attr_alarms
.attr
,
748 &dev_attr_received_ref_clk3a
.attr
,
749 &dev_attr_received_ref_clk3b
.attr
,
750 &dev_attr_enable_clk3a_output
.attr
,
751 &dev_attr_enable_clk3b_output
.attr
,
752 &dev_attr_enable_clkb1_output
.attr
,
753 &dev_attr_enable_clka1_output
.attr
,
754 &dev_attr_enable_clkb0_output
.attr
,
755 &dev_attr_enable_clka0_output
.attr
,
756 &dev_attr_select_amcb1_transmit_clock
.attr
,
757 &dev_attr_select_amcb2_transmit_clock
.attr
,
758 &dev_attr_select_redundant_clock
.attr
,
759 &dev_attr_select_ref_frequency
.attr
,
760 &dev_attr_filter_select
.attr
,
761 &dev_attr_hardware_switching_mode
.attr
,
762 &dev_attr_hardware_switching
.attr
,
763 &dev_attr_refalign
.attr
,
764 &dev_attr_mode_select
.attr
,
765 &dev_attr_reset
.attr
,
769 static struct attribute_group tlclk_attribute_group
= {
770 .name
= NULL
, /* put in device directory */
771 .attrs
= tlclk_sysfs_entries
,
774 static struct platform_device
*tlclk_device
;
776 static int __init
tlclk_init(void)
780 ret
= register_chrdev(tlclk_major
, "telco_clock", &tlclk_fops
);
782 printk(KERN_ERR
"tlclk: can't get major %d.\n", tlclk_major
);
786 alarm_events
= kzalloc( sizeof(struct tlclk_alarms
), GFP_KERNEL
);
790 /* Read telecom clock IRQ number (Set by BIOS) */
791 if (!request_region(TLCLK_BASE
, 8, "telco_clock")) {
792 printk(KERN_ERR
"tlclk: request_region 0x%X failed.\n",
797 telclk_interrupt
= (inb(TLCLK_REG7
) & 0x0f);
799 if (0x0F == telclk_interrupt
) { /* not MCPBL0010 ? */
800 printk(KERN_ERR
"telclk_interrupt = 0x%x non-mcpbl0010 hw.\n",
806 init_timer(&switchover_timer
);
808 ret
= misc_register(&tlclk_miscdev
);
810 printk(KERN_ERR
"tlclk: misc_register returns %d.\n", ret
);
814 tlclk_device
= platform_device_register_simple("telco_clock",
816 if (IS_ERR(tlclk_device
)) {
817 printk(KERN_ERR
"tlclk: platform_device_register failed.\n");
818 ret
= PTR_ERR(tlclk_device
);
822 ret
= sysfs_create_group(&tlclk_device
->dev
.kobj
,
823 &tlclk_attribute_group
);
825 printk(KERN_ERR
"tlclk: failed to create sysfs device attributes.\n");
831 platform_device_unregister(tlclk_device
);
833 misc_deregister(&tlclk_miscdev
);
835 release_region(TLCLK_BASE
, 8);
839 unregister_chrdev(tlclk_major
, "telco_clock");
843 static void __exit
tlclk_cleanup(void)
845 sysfs_remove_group(&tlclk_device
->dev
.kobj
, &tlclk_attribute_group
);
846 platform_device_unregister(tlclk_device
);
847 misc_deregister(&tlclk_miscdev
);
848 unregister_chrdev(tlclk_major
, "telco_clock");
850 release_region(TLCLK_BASE
, 8);
851 del_timer_sync(&switchover_timer
);
856 static void switchover_timeout(unsigned long data
)
858 unsigned long flags
= *(unsigned long *) data
;
861 if ((inb(TLCLK_REG1
) & 0x08) != (flags
& 0x08))
862 alarm_events
->switchover_primary
++;
864 if ((inb(TLCLK_REG1
) & 0x08) != (flags
& 0x08))
865 alarm_events
->switchover_secondary
++;
868 /* Alarm processing is done, wake up read task */
869 del_timer(&switchover_timer
);
874 static irqreturn_t
tlclk_interrupt(int irq
, void *dev_id
)
878 spin_lock_irqsave(&event_lock
, flags
);
879 /* Read and clear interrupt events */
880 int_events
= inb(TLCLK_REG6
);
882 /* Primary_Los changed from 0 to 1 ? */
883 if (int_events
& PRI_LOS_01_MASK
) {
884 if (inb(TLCLK_REG2
) & SEC_LOST_MASK
)
885 alarm_events
->lost_clocks
++;
887 alarm_events
->lost_primary_clock
++;
890 /* Primary_Los changed from 1 to 0 ? */
891 if (int_events
& PRI_LOS_10_MASK
) {
892 alarm_events
->primary_clock_back
++;
893 SET_PORT_BITS(TLCLK_REG1
, 0xFE, 1);
895 /* Secondary_Los changed from 0 to 1 ? */
896 if (int_events
& SEC_LOS_01_MASK
) {
897 if (inb(TLCLK_REG2
) & PRI_LOST_MASK
)
898 alarm_events
->lost_clocks
++;
900 alarm_events
->lost_secondary_clock
++;
902 /* Secondary_Los changed from 1 to 0 ? */
903 if (int_events
& SEC_LOS_10_MASK
) {
904 alarm_events
->secondary_clock_back
++;
905 SET_PORT_BITS(TLCLK_REG1
, 0xFE, 0);
907 if (int_events
& HOLDOVER_10_MASK
)
908 alarm_events
->pll_end_holdover
++;
910 if (int_events
& UNLOCK_01_MASK
)
911 alarm_events
->pll_lost_sync
++;
913 if (int_events
& UNLOCK_10_MASK
)
914 alarm_events
->pll_sync
++;
916 /* Holdover changed from 0 to 1 ? */
917 if (int_events
& HOLDOVER_01_MASK
) {
918 alarm_events
->pll_holdover
++;
920 /* TIMEOUT in ~10ms */
921 switchover_timer
.expires
= jiffies
+ msecs_to_jiffies(10);
922 tlclk_timer_data
= inb(TLCLK_REG1
);
923 switchover_timer
.data
= (unsigned long) &tlclk_timer_data
;
924 mod_timer(&switchover_timer
, switchover_timer
.expires
);
929 spin_unlock_irqrestore(&event_lock
, flags
);
934 module_init(tlclk_init
);
935 module_exit(tlclk_cleanup
);