microblaze/PCI: factor out pcibios_setup()
[linux-2.6.git] / arch / arm / mach-omap2 / powerdomain.h
blob8f88d65c46ea5ab7a28c1fb70694a386556a5039
1 /*
2 * OMAP2/3/4 powerdomain control
4 * Copyright (C) 2007-2008, 2010 Texas Instruments, Inc.
5 * Copyright (C) 2007-2011 Nokia Corporation
7 * Paul Walmsley
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * XXX This should be moved to the mach-omap2/ directory at the earliest
14 * opportunity.
17 #ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
18 #define __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
20 #include <linux/types.h>
21 #include <linux/list.h>
23 #include <linux/atomic.h>
25 #include <plat/cpu.h>
27 #include "voltage.h"
29 /* Powerdomain basic power states */
30 #define PWRDM_POWER_OFF 0x0
31 #define PWRDM_POWER_RET 0x1
32 #define PWRDM_POWER_INACTIVE 0x2
33 #define PWRDM_POWER_ON 0x3
35 #define PWRDM_MAX_PWRSTS 4
37 /* Powerdomain allowable state bitfields */
38 #define PWRSTS_ON (1 << PWRDM_POWER_ON)
39 #define PWRSTS_INACTIVE (1 << PWRDM_POWER_INACTIVE)
40 #define PWRSTS_RET (1 << PWRDM_POWER_RET)
41 #define PWRSTS_OFF (1 << PWRDM_POWER_OFF)
43 #define PWRSTS_OFF_ON (PWRSTS_OFF | PWRSTS_ON)
44 #define PWRSTS_OFF_RET (PWRSTS_OFF | PWRSTS_RET)
45 #define PWRSTS_RET_ON (PWRSTS_RET | PWRSTS_ON)
46 #define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | PWRSTS_ON)
49 /* Powerdomain flags */
50 #define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */
51 #define PWRDM_HAS_MPU_QUIRK (1 << 1) /* MPU pwr domain has MEM bank 0 bits
52 * in MEM bank 1 position. This is
53 * true for OMAP3430
55 #define PWRDM_HAS_LOWPOWERSTATECHANGE (1 << 2) /*
56 * support to transition from a
57 * sleep state to a lower sleep
58 * state without waking up the
59 * powerdomain
63 * Number of memory banks that are power-controllable. On OMAP4430, the
64 * maximum is 5.
66 #define PWRDM_MAX_MEM_BANKS 5
69 * Maximum number of clockdomains that can be associated with a powerdomain.
70 * CORE powerdomain on OMAP4 is the worst case
72 #define PWRDM_MAX_CLKDMS 9
74 /* XXX A completely arbitrary number. What is reasonable here? */
75 #define PWRDM_TRANSITION_BAILOUT 100000
77 struct clockdomain;
78 struct powerdomain;
80 /**
81 * struct powerdomain - OMAP powerdomain
82 * @name: Powerdomain name
83 * @voltdm: voltagedomain containing this powerdomain
84 * @prcm_offs: the address offset from CM_BASE/PRM_BASE
85 * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
86 * @pwrsts: Possible powerdomain power states
87 * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION
88 * @flags: Powerdomain flags
89 * @banks: Number of software-controllable memory banks in this powerdomain
90 * @pwrsts_mem_ret: Possible memory bank pwrstates when pwrdm in RETENTION
91 * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON
92 * @pwrdm_clkdms: Clockdomains in this powerdomain
93 * @node: list_head linking all powerdomains
94 * @voltdm_node: list_head linking all powerdomains in a voltagedomain
95 * @state:
96 * @state_counter:
97 * @timer:
98 * @state_timer:
100 * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h.
102 struct powerdomain {
103 const char *name;
104 union {
105 const char *name;
106 struct voltagedomain *ptr;
107 } voltdm;
108 const s16 prcm_offs;
109 const u8 pwrsts;
110 const u8 pwrsts_logic_ret;
111 const u8 flags;
112 const u8 banks;
113 const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS];
114 const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS];
115 const u8 prcm_partition;
116 struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
117 struct list_head node;
118 struct list_head voltdm_node;
119 int state;
120 unsigned state_counter[PWRDM_MAX_PWRSTS];
121 unsigned ret_logic_off_counter;
122 unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS];
124 #ifdef CONFIG_PM_DEBUG
125 s64 timer;
126 s64 state_timer[PWRDM_MAX_PWRSTS];
127 #endif
131 * struct pwrdm_ops - Arch specific function implementations
132 * @pwrdm_set_next_pwrst: Set the target power state for a pd
133 * @pwrdm_read_next_pwrst: Read the target power state set for a pd
134 * @pwrdm_read_pwrst: Read the current power state of a pd
135 * @pwrdm_read_prev_pwrst: Read the prev power state entered by the pd
136 * @pwrdm_set_logic_retst: Set the logic state in RET for a pd
137 * @pwrdm_set_mem_onst: Set the Memory state in ON for a pd
138 * @pwrdm_set_mem_retst: Set the Memory state in RET for a pd
139 * @pwrdm_read_logic_pwrst: Read the current logic state of a pd
140 * @pwrdm_read_prev_logic_pwrst: Read the previous logic state entered by a pd
141 * @pwrdm_read_logic_retst: Read the logic state in RET for a pd
142 * @pwrdm_read_mem_pwrst: Read the current memory state of a pd
143 * @pwrdm_read_prev_mem_pwrst: Read the previous memory state entered by a pd
144 * @pwrdm_read_mem_retst: Read the memory state in RET for a pd
145 * @pwrdm_clear_all_prev_pwrst: Clear all previous power states logged for a pd
146 * @pwrdm_enable_hdwr_sar: Enable Hardware Save-Restore feature for the pd
147 * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd
148 * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep
149 * @pwrdm_wait_transition: Wait for a pd state transition to complete
151 struct pwrdm_ops {
152 int (*pwrdm_set_next_pwrst)(struct powerdomain *pwrdm, u8 pwrst);
153 int (*pwrdm_read_next_pwrst)(struct powerdomain *pwrdm);
154 int (*pwrdm_read_pwrst)(struct powerdomain *pwrdm);
155 int (*pwrdm_read_prev_pwrst)(struct powerdomain *pwrdm);
156 int (*pwrdm_set_logic_retst)(struct powerdomain *pwrdm, u8 pwrst);
157 int (*pwrdm_set_mem_onst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
158 int (*pwrdm_set_mem_retst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
159 int (*pwrdm_read_logic_pwrst)(struct powerdomain *pwrdm);
160 int (*pwrdm_read_prev_logic_pwrst)(struct powerdomain *pwrdm);
161 int (*pwrdm_read_logic_retst)(struct powerdomain *pwrdm);
162 int (*pwrdm_read_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
163 int (*pwrdm_read_prev_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
164 int (*pwrdm_read_mem_retst)(struct powerdomain *pwrdm, u8 bank);
165 int (*pwrdm_clear_all_prev_pwrst)(struct powerdomain *pwrdm);
166 int (*pwrdm_enable_hdwr_sar)(struct powerdomain *pwrdm);
167 int (*pwrdm_disable_hdwr_sar)(struct powerdomain *pwrdm);
168 int (*pwrdm_set_lowpwrstchange)(struct powerdomain *pwrdm);
169 int (*pwrdm_wait_transition)(struct powerdomain *pwrdm);
172 int pwrdm_register_platform_funcs(struct pwrdm_ops *custom_funcs);
173 int pwrdm_register_pwrdms(struct powerdomain **pwrdm_list);
174 int pwrdm_complete_init(void);
176 struct powerdomain *pwrdm_lookup(const char *name);
178 int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
179 void *user);
180 int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
181 void *user);
183 int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
184 int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
185 int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
186 int (*fn)(struct powerdomain *pwrdm,
187 struct clockdomain *clkdm));
188 struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm);
190 int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
192 int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
193 int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
194 int pwrdm_read_pwrst(struct powerdomain *pwrdm);
195 int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
196 int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
198 int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
199 int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
200 int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
202 int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm);
203 int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
204 int pwrdm_read_logic_retst(struct powerdomain *pwrdm);
205 int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
206 int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
207 int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank);
209 int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
210 int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
211 bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
213 int pwrdm_wait_transition(struct powerdomain *pwrdm);
215 int pwrdm_state_switch(struct powerdomain *pwrdm);
216 int pwrdm_pre_transition(void);
217 int pwrdm_post_transition(void);
218 int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);
219 int pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
220 bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
222 extern void omap242x_powerdomains_init(void);
223 extern void omap243x_powerdomains_init(void);
224 extern void omap3xxx_powerdomains_init(void);
225 extern void omap44xx_powerdomains_init(void);
227 extern struct pwrdm_ops omap2_pwrdm_operations;
228 extern struct pwrdm_ops omap3_pwrdm_operations;
229 extern struct pwrdm_ops omap4_pwrdm_operations;
231 /* Common Internal functions used across OMAP rev's */
232 extern u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank);
233 extern u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank);
234 extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank);
236 extern struct powerdomain wkup_omap2_pwrdm;
237 extern struct powerdomain gfx_omap2_pwrdm;
240 #endif