drivers/media/dvb/frontends/or51132.c

   1 /*
   2  *    Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
   5  *
   6  *    Based on code from Jack Kelliher (kelliher@xmission.com)
   7  *                           Copyright (C) 2002 & pcHDTV, inc.
   8  *
   9  *    This program is free software; you can redistribute it and/or modify
  10  *    it under the terms of the GNU General Public License as published by
  11  *    the Free Software Foundation; either version 2 of the License, or
  12  *    (at your option) any later version.
  13  *
  14  *    This program is distributed in the hope that it will be useful,
  15  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *    GNU General Public License for more details.
  18  *
  19  *    You should have received a copy of the GNU General Public License
  20  *    along with this program; if not, write to the Free Software
  21  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23 */
  24
  25 /*
  26  * This driver needs two external firmware files. Please copy
  27  * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
  28  * /usr/lib/hotplug/firmware/ or /lib/firmware/
  29  * (depending on configuration of firmware hotplug).
  30  */
  31 #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
  32 #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
  33
  34 #include <linux/kernel.h>
  35 #include <linux/module.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/init.h>
  38 #include <linux/delay.h>
  39 #include <linux/string.h>
  40 #include <linux/slab.h>
  41 #include <asm/byteorder.h>
  42
  43 #include "dvb_frontend.h"
  44 #include "dvb-pll.h"
  45 #include "or51132.h"
  46
  47 static int debug;
  48 #define dprintk(args...) \
  49         do { \
  50                 if (debug) printk(KERN_DEBUG "or51132: " args); \
  51         } while (0)
  52
  53
  54 struct or51132_state
  55 {
  56         struct i2c_adapter* i2c;
  57         struct dvb_frontend_ops ops;
  58
  59         /* Configuration settings */
  60         const struct or51132_config* config;
  61
  62         struct dvb_frontend frontend;
  63
  64         /* Demodulator private data */
  65         fe_modulation_t current_modulation;
  66
  67         /* Tuner private data */
  68         u32 current_frequency;
  69 };
  70
  71 static int i2c_writebytes (struct or51132_state* state, u8 reg, u8 *buf, int len)
  72 {
  73         int err;
  74         struct i2c_msg msg;
  75         msg.addr  = reg;
  76         msg.flags = 0;
  77         msg.len   = len;
  78         msg.buf   = buf;
  79
  80         if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  81                 printk(KERN_WARNING "or51132: i2c_writebytes error (addr %02x, err == %i)\n", reg, err);
  82                 return -EREMOTEIO;
  83         }
  84
  85         return 0;
  86 }
  87
  88 static u8 i2c_readbytes (struct or51132_state* state, u8 reg, u8* buf, int len)
  89 {
  90         int err;
  91         struct i2c_msg msg;
  92         msg.addr   = reg;
  93         msg.flags = I2C_M_RD;
  94         msg.len = len;
  95         msg.buf = buf;
  96
  97         if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  98                 printk(KERN_WARNING "or51132: i2c_readbytes error (addr %02x, err == %i)\n", reg, err);
  99                 return -EREMOTEIO;
 100         }
 101
 102         return 0;
 103 }
 104
 105 static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 106 {
 107         struct or51132_state* state = fe->demodulator_priv;
 108         static u8 run_buf[] = {0x7F,0x01};
 109         u8 rec_buf[8];
 110         u8 cmd_buf[3];
 111         u32 firmwareAsize, firmwareBsize;
 112         int i,ret;
 113
 114         dprintk("Firmware is %Zd bytes\n",fw->size);
 115
 116         /* Get size of firmware A and B */
 117         firmwareAsize = le32_to_cpu(*((u32*)fw->data));
 118         dprintk("FirmwareA is %i bytes\n",firmwareAsize);
 119         firmwareBsize = le32_to_cpu(*((u32*)(fw->data+4)));
 120         dprintk("FirmwareB is %i bytes\n",firmwareBsize);
 121
 122         /* Upload firmware */
 123         if ((ret = i2c_writebytes(state,state->config->demod_address,
 124                                  &fw->data[8],firmwareAsize))) {
 125                 printk(KERN_WARNING "or51132: load_firmware error 1\n");
 126                 return ret;
 127         }
 128         msleep(1); /* 1ms */
 129         if ((ret = i2c_writebytes(state,state->config->demod_address,
 130                                  &fw->data[8+firmwareAsize],firmwareBsize))) {
 131                 printk(KERN_WARNING "or51132: load_firmware error 2\n");
 132                 return ret;
 133         }
 134         msleep(1); /* 1ms */
 135
 136         if ((ret = i2c_writebytes(state,state->config->demod_address,
 137                                  run_buf,2))) {
 138                 printk(KERN_WARNING "or51132: load_firmware error 3\n");
 139                 return ret;
 140         }
 141
 142         /* Wait at least 5 msec */
 143         msleep(20); /* 10ms */
 144
 145         if ((ret = i2c_writebytes(state,state->config->demod_address,
 146                                  run_buf,2))) {
 147                 printk(KERN_WARNING "or51132: load_firmware error 4\n");
 148                 return ret;
 149         }
 150
 151         /* 50ms for operation to begin */
 152         msleep(50);
 153
 154         /* Read back ucode version to besure we loaded correctly and are really up and running */
 155         /* Get uCode version */
 156         cmd_buf[0] = 0x10;
 157         cmd_buf[1] = 0x10;
 158         cmd_buf[2] = 0x00;
 159         msleep(20); /* 20ms */
 160         if ((ret = i2c_writebytes(state,state->config->demod_address,
 161                                  cmd_buf,3))) {
 162                 printk(KERN_WARNING "or51132: load_firmware error a\n");
 163                 return ret;
 164         }
 165
 166         cmd_buf[0] = 0x04;
 167         cmd_buf[1] = 0x17;
 168         msleep(20); /* 20ms */
 169         if ((ret = i2c_writebytes(state,state->config->demod_address,
 170                                  cmd_buf,2))) {
 171                 printk(KERN_WARNING "or51132: load_firmware error b\n");
 172                 return ret;
 173         }
 174
 175         cmd_buf[0] = 0x00;
 176         cmd_buf[1] = 0x00;
 177         msleep(20); /* 20ms */
 178         if ((ret = i2c_writebytes(state,state->config->demod_address,
 179                                  cmd_buf,2))) {
 180                 printk(KERN_WARNING "or51132: load_firmware error c\n");
 181                 return ret;
 182         }
 183
 184         for(i=0;i<4;i++) {
 185                 msleep(20); /* 20ms */
 186                 /* Once upon a time, this command might have had something
 187                    to do with getting the firmware version, but it's
 188                    not used anymore:
 189                    {0x04,0x00,0x30,0x00,i+1} */
 190                 /* Read 8 bytes, two bytes at a time */
 191                 if ((ret = i2c_readbytes(state,state->config->demod_address,
 192                                         &rec_buf[i*2],2))) {
 193                         printk(KERN_WARNING
 194                                "or51132: load_firmware error d - %d\n",i);
 195                         return ret;
 196                 }
 197         }
 198
 199         printk(KERN_WARNING
 200                "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
 201                rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
 202                rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
 203                rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
 204                rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
 205
 206         cmd_buf[0] = 0x10;
 207         cmd_buf[1] = 0x00;
 208         cmd_buf[2] = 0x00;
 209         msleep(20); /* 20ms */
 210         if ((ret = i2c_writebytes(state,state->config->demod_address,
 211                                  cmd_buf,3))) {
 212                 printk(KERN_WARNING "or51132: load_firmware error e\n");
 213                 return ret;
 214         }
 215         return 0;
 216 };
 217
 218 static int or51132_init(struct dvb_frontend* fe)
 219 {
 220         return 0;
 221 }
 222
 223 static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
 224 {
 225         *ber = 0;
 226         return 0;
 227 }
 228
 229 static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 230 {
 231         *ucblocks = 0;
 232         return 0;
 233 }
 234
 235 static int or51132_sleep(struct dvb_frontend* fe)
 236 {
 237         return 0;
 238 }
 239
 240 static int or51132_setmode(struct dvb_frontend* fe)
 241 {
 242         struct or51132_state* state = fe->demodulator_priv;
 243         unsigned char cmd_buf[3];
 244
 245         dprintk("setmode %d\n",(int)state->current_modulation);
 246         /* set operation mode in Receiver 1 register; */
 247         cmd_buf[0] = 0x04;
 248         cmd_buf[1] = 0x01;
 249         switch (state->current_modulation) {
 250         case QAM_256:
 251         case QAM_64:
 252         case QAM_AUTO:
 253                 /* Auto-deinterleave; MPEG ser, MPEG2tr, phase noise-high*/
 254                 cmd_buf[2] = 0x5F;
 255                 break;
 256         case VSB_8:
 257                 /* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high*/
 258                 cmd_buf[2] = 0x50;
 259                 break;
 260         default:
 261                 printk("setmode:Modulation set to unsupported value\n");
 262         };
 263         if (i2c_writebytes(state,state->config->demod_address,
 264                            cmd_buf,3)) {
 265                 printk(KERN_WARNING "or51132: set_mode error 1\n");
 266                 return -1;
 267         }
 268         dprintk("or51132: set #1 to %02x\n", cmd_buf[2]);
 269
 270         /* Set operation mode in Receiver 6 register */
 271         cmd_buf[0] = 0x1C;
 272         switch (state->current_modulation) {
 273         case QAM_AUTO:
 274                 /* REC MODE Normal Carrier Lock */
 275                 cmd_buf[1] = 0x00;
 276                 /* Channel MODE Auto QAM64/256 */
 277                 cmd_buf[2] = 0x4f;
 278                 break;
 279         case QAM_256:
 280                 /* REC MODE Normal Carrier Lock */
 281                 cmd_buf[1] = 0x00;
 282                 /* Channel MODE QAM256 */
 283                 cmd_buf[2] = 0x45;
 284                 break;
 285         case QAM_64:
 286                 /* REC MODE Normal Carrier Lock */
 287                 cmd_buf[1] = 0x00;
 288                 /* Channel MODE QAM64 */
 289                 cmd_buf[2] = 0x43;
 290                 break;
 291         case VSB_8:
 292                  /* REC MODE inv IF spectrum, Normal */
 293                 cmd_buf[1] = 0x03;
 294                 /* Channel MODE ATSC/VSB8 */
 295                 cmd_buf[2] = 0x06;
 296                 break;
 297         default:
 298                 printk("setmode: Modulation set to unsupported value\n");
 299         };
 300         msleep(20); /* 20ms */
 301         if (i2c_writebytes(state,state->config->demod_address,
 302                            cmd_buf,3)) {
 303                 printk(KERN_WARNING "or51132: set_mode error 2\n");
 304                 return -1;
 305         }
 306         dprintk("or51132: set #6 to 0x%02x%02x\n", cmd_buf[1], cmd_buf[2]);
 307
 308         return 0;
 309 }
 310
 311 /* Some modulations use the same firmware.  This classifies modulations
 312    by the firmware they use. */
 313 #define MOD_FWCLASS_UNKNOWN     0
 314 #define MOD_FWCLASS_VSB         1
 315 #define MOD_FWCLASS_QAM         2
 316 static int modulation_fw_class(fe_modulation_t modulation)
 317 {
 318         switch(modulation) {
 319         case VSB_8:
 320                 return MOD_FWCLASS_VSB;
 321         case QAM_AUTO:
 322         case QAM_64:
 323         case QAM_256:
 324                 return MOD_FWCLASS_QAM;
 325         default:
 326                 return MOD_FWCLASS_UNKNOWN;
 327         }
 328 }
 329
 330 static int or51132_set_parameters(struct dvb_frontend* fe,
 331                                   struct dvb_frontend_parameters *param)
 332 {
 333         int ret;
 334         struct or51132_state* state = fe->demodulator_priv;
 335         const struct firmware *fw;
 336         const char *fwname;
 337         int clock_mode;
 338
 339         /* Upload new firmware only if we need a different one */
 340         if (modulation_fw_class(state->current_modulation) !=
 341             modulation_fw_class(param->u.vsb.modulation)) {
 342                 switch(modulation_fw_class(param->u.vsb.modulation)) {
 343                 case MOD_FWCLASS_VSB:
 344                         dprintk("set_parameters VSB MODE\n");
 345                         fwname = OR51132_VSB_FIRMWARE;
 346
 347                         /* Set non-punctured clock for VSB */
 348                         clock_mode = 0;
 349                         break;
 350                 case MOD_FWCLASS_QAM:
 351                         dprintk("set_parameters QAM MODE\n");
 352                         fwname = OR51132_QAM_FIRMWARE;
 353
 354                         /* Set punctured clock for QAM */
 355                         clock_mode = 1;
 356                         break;
 357                 default:
 358                         printk("or51132: Modulation type(%d) UNSUPPORTED\n",
 359                                param->u.vsb.modulation);
 360                         return -1;
 361                 }
 362                 printk("or51132: Waiting for firmware upload(%s)...\n",
 363                        fwname);
 364                 ret = request_firmware(&fw, fwname, &state->i2c->dev);
 365                 if (ret) {
 366                         printk(KERN_WARNING "or51132: No firmware up"
 367                                "loaded(timeout or file not found?)\n");
 368                         return ret;
 369                 }
 370                 ret = or51132_load_firmware(fe, fw);
 371                 release_firmware(fw);
 372                 if (ret) {
 373                         printk(KERN_WARNING "or51132: Writing firmware to "
 374                                "device failed!\n");
 375                         return ret;
 376                 }
 377                 printk("or51132: Firmware upload complete.\n");
 378                 state->config->set_ts_params(fe, clock_mode);
 379         }
 380         /* Change only if we are actually changing the modulation */
 381         if (state->current_modulation != param->u.vsb.modulation) {
 382                 state->current_modulation = param->u.vsb.modulation;
 383                 or51132_setmode(fe);
 384         }
 385
 386         if (fe->ops->tuner_ops.set_params) {
 387                 fe->ops->tuner_ops.set_params(fe, param);
 388                 if (fe->ops->i2c_gate_ctrl) fe->ops->i2c_gate_ctrl(fe, 0);
 389         }
 390
 391         /* Set to current mode */
 392         or51132_setmode(fe);
 393
 394         /* Update current frequency */
 395         state->current_frequency = param->frequency;
 396         return 0;
 397 }
 398
 399 static int or51132_get_parameters(struct dvb_frontend* fe,
 400                                   struct dvb_frontend_parameters *param)
 401 {
 402         struct or51132_state* state = fe->demodulator_priv;
 403         u8 buf[2];
 404
 405         /* Receiver Status */
 406         buf[0]=0x04;
 407         buf[1]=0x00;
 408         msleep(30); /* 30ms */
 409         if (i2c_writebytes(state,state->config->demod_address,buf,2)) {
 410                 printk(KERN_WARNING "or51132: get_parameters write error\n");
 411                 return -EREMOTEIO;
 412         }
 413         msleep(30); /* 30ms */
 414         if (i2c_readbytes(state,state->config->demod_address,buf,2)) {
 415                 printk(KERN_WARNING "or51132: get_parameters read error\n");
 416                 return -EREMOTEIO;
 417         }
 418         switch(buf[0]) {
 419                 case 0x06: param->u.vsb.modulation = VSB_8; break;
 420                 case 0x43: param->u.vsb.modulation = QAM_64; break;
 421                 case 0x45: param->u.vsb.modulation = QAM_256; break;
 422                 default:
 423                         printk(KERN_WARNING "or51132: unknown status 0x%02x\n",
 424                                buf[0]);
 425                         return -EREMOTEIO;
 426         }
 427
 428         /* FIXME: Read frequency from frontend, take AFC into account */
 429         param->frequency = state->current_frequency;
 430
 431         /* FIXME: How to read inversion setting? Receiver 6 register? */
 432         param->inversion = INVERSION_AUTO;
 433
 434         return 0;
 435 }
 436
 437 static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
 438 {
 439         struct or51132_state* state = fe->demodulator_priv;
 440         unsigned char rec_buf[2];
 441         unsigned char snd_buf[2];
 442         *status = 0;
 443
 444         /* Receiver Status */
 445         snd_buf[0]=0x04;
 446         snd_buf[1]=0x00;
 447         msleep(30); /* 30ms */
 448         if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
 449                 printk(KERN_WARNING "or51132: read_status write error\n");
 450                 return -1;
 451         }
 452         msleep(30); /* 30ms */
 453         if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
 454                 printk(KERN_WARNING "or51132: read_status read error\n");
 455                 return -1;
 456         }
 457         dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);
 458
 459         if (rec_buf[1] & 0x01) { /* Receiver Lock */
 460                 *status |= FE_HAS_SIGNAL;
 461                 *status |= FE_HAS_CARRIER;
 462                 *status |= FE_HAS_VITERBI;
 463                 *status |= FE_HAS_SYNC;
 464                 *status |= FE_HAS_LOCK;
 465         }
 466         return 0;
 467 }
 468
 469 /* log10-1 table at .5 increments from 1 to 100.5 */
 470 static unsigned int i100x20log10[] = {
 471      0,  352,  602,  795,  954, 1088, 1204, 1306, 1397, 1480,
 472   1556, 1625, 1690, 1750, 1806, 1858, 1908, 1955, 2000, 2042,
 473   2082, 2121, 2158, 2193, 2227, 2260, 2292, 2322, 2352, 2380,
 474   2408, 2434, 2460, 2486, 2510, 2534, 2557, 2580, 2602, 2623,
 475   2644, 2664, 2684, 2704, 2723, 2742, 2760, 2778, 2795, 2813,
 476   2829, 2846, 2862, 2878, 2894, 2909, 2924, 2939, 2954, 2968,
 477   2982, 2996, 3010, 3023, 3037, 3050, 3062, 3075, 3088, 3100,
 478   3112, 3124, 3136, 3148, 3159, 3170, 3182, 3193, 3204, 3214,
 479   3225, 3236, 3246, 3256, 3266, 3276, 3286, 3296, 3306, 3316,
 480   3325, 3334, 3344, 3353, 3362, 3371, 3380, 3389, 3397, 3406,
 481   3415, 3423, 3432, 3440, 3448, 3456, 3464, 3472, 3480, 3488,
 482   3496, 3504, 3511, 3519, 3526, 3534, 3541, 3549, 3556, 3563,
 483   3570, 3577, 3584, 3591, 3598, 3605, 3612, 3619, 3625, 3632,
 484   3639, 3645, 3652, 3658, 3665, 3671, 3677, 3683, 3690, 3696,
 485   3702, 3708, 3714, 3720, 3726, 3732, 3738, 3744, 3750, 3755,
 486   3761, 3767, 3772, 3778, 3784, 3789, 3795, 3800, 3806, 3811,
 487   3816, 3822, 3827, 3832, 3838, 3843, 3848, 3853, 3858, 3863,
 488   3868, 3874, 3879, 3884, 3888, 3893, 3898, 3903, 3908, 3913,
 489   3918, 3922, 3927, 3932, 3936, 3941, 3946, 3950, 3955, 3960,
 490   3964, 3969, 3973, 3978, 3982, 3986, 3991, 3995, 4000, 4004,
 491 };
 492
 493 static unsigned int denom[] = {1,1,100,1000,10000,100000,1000000,10000000,100000000};
 494
 495 static unsigned int i20Log10(unsigned short val)
 496 {
 497         unsigned int rntval = 100;
 498         unsigned int tmp = val;
 499         unsigned int exp = 1;
 500
 501         while(tmp > 100) {tmp /= 100; exp++;}
 502
 503         val = (2 * val)/denom[exp];
 504         if (exp > 1) rntval = 2000*exp;
 505
 506         rntval += i100x20log10[val];
 507         return rntval;
 508 }
 509
 510 static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 511 {
 512         struct or51132_state* state = fe->demodulator_priv;
 513         unsigned char rec_buf[2];
 514         unsigned char snd_buf[2];
 515         u8 rcvr_stat;
 516         u16 snr_equ;
 517         u32 signal_strength;
 518         int usK;
 519
 520         snd_buf[0]=0x04;
 521         snd_buf[1]=0x02; /* SNR after Equalizer */
 522         msleep(30); /* 30ms */
 523         if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
 524                 printk(KERN_WARNING "or51132: read_status write error\n");
 525                 return -1;
 526         }
 527         msleep(30); /* 30ms */
 528         if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
 529                 printk(KERN_WARNING "or51132: read_status read error\n");
 530                 return -1;
 531         }
 532         snr_equ = rec_buf[0] | (rec_buf[1] << 8);
 533         dprintk("read_signal_strength snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
 534
 535         /* Receiver Status */
 536         snd_buf[0]=0x04;
 537         snd_buf[1]=0x00;
 538         msleep(30); /* 30ms */
 539         if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
 540                 printk(KERN_WARNING "or51132: read_signal_strength read_status write error\n");
 541                 return -1;
 542         }
 543         msleep(30); /* 30ms */
 544         if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
 545                 printk(KERN_WARNING "or51132: read_signal_strength read_status read error\n");
 546                 return -1;
 547         }
 548         dprintk("read_signal_strength read_status %x %x\n",rec_buf[0],rec_buf[1]);
 549         rcvr_stat = rec_buf[1];
 550         usK = (rcvr_stat & 0x10) ? 3 : 0;
 551
 552         /* The value reported back from the frontend will be FFFF=100% 0000=0% */
 553         signal_strength = (((8952 - i20Log10(snr_equ) - usK*100)/3+5)*65535)/1000;
 554         if (signal_strength > 0xffff)
 555                 *strength = 0xffff;
 556         else
 557                 *strength = signal_strength;
 558         dprintk("read_signal_strength %i\n",*strength);
 559
 560         return 0;
 561 }
 562
 563 static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
 564 {
 565         struct or51132_state* state = fe->demodulator_priv;
 566         unsigned char rec_buf[2];
 567         unsigned char snd_buf[2];
 568         u16 snr_equ;
 569
 570         snd_buf[0]=0x04;
 571         snd_buf[1]=0x02; /* SNR after Equalizer */
 572         msleep(30); /* 30ms */
 573         if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
 574                 printk(KERN_WARNING "or51132: read_snr write error\n");
 575                 return -1;
 576         }
 577         msleep(30); /* 30ms */
 578         if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
 579                 printk(KERN_WARNING "or51132: read_snr dvr read error\n");
 580                 return -1;
 581         }
 582         snr_equ = rec_buf[0] | (rec_buf[1] << 8);
 583         dprintk("read_snr snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
 584
 585         *snr = 0xFFFF - snr_equ;
 586         dprintk("read_snr %i\n",*snr);
 587
 588         return 0;
 589 }
 590
 591 static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
 592 {
 593         fe_tune_settings->min_delay_ms = 500;
 594         fe_tune_settings->step_size = 0;
 595         fe_tune_settings->max_drift = 0;
 596
 597         return 0;
 598 }
 599
 600 static void or51132_release(struct dvb_frontend* fe)
 601 {
 602         struct or51132_state* state = fe->demodulator_priv;
 603         kfree(state);
 604 }
 605
 606 static struct dvb_frontend_ops or51132_ops;
 607
 608 struct dvb_frontend* or51132_attach(const struct or51132_config* config,
 609                                     struct i2c_adapter* i2c)
 610 {
 611         struct or51132_state* state = NULL;
 612
 613         /* Allocate memory for the internal state */
 614         state = kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
 615         if (state == NULL)
 616                 goto error;
 617
 618         /* Setup the state */
 619         state->config = config;
 620         state->i2c = i2c;
 621         memcpy(&state->ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
 622         state->current_frequency = -1;
 623         state->current_modulation = -1;
 624
 625         /* Create dvb_frontend */
 626         state->frontend.ops = &state->ops;
 627         state->frontend.demodulator_priv = state;
 628         return &state->frontend;
 629
 630 error:
 631         kfree(state);
 632         return NULL;
 633 }
 634
 635 static struct dvb_frontend_ops or51132_ops = {
 636
 637         .info = {
 638                 .name                   = "Oren OR51132 VSB/QAM Frontend",
 639                 .type                   = FE_ATSC,
 640                 .frequency_min          = 44000000,
 641                 .frequency_max          = 958000000,
 642                 .frequency_stepsize     = 166666,
 643                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 644                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 645                         FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
 646                         FE_CAN_8VSB
 647         },
 648
 649         .release = or51132_release,
 650
 651         .init = or51132_init,
 652         .sleep = or51132_sleep,
 653
 654         .set_frontend = or51132_set_parameters,
 655         .get_frontend = or51132_get_parameters,
 656         .get_tune_settings = or51132_get_tune_settings,
 657
 658         .read_status = or51132_read_status,
 659         .read_ber = or51132_read_ber,
 660         .read_signal_strength = or51132_read_signal_strength,
 661         .read_snr = or51132_read_snr,
 662         .read_ucblocks = or51132_read_ucblocks,
 663 };
 664
 665 module_param(debug, int, 0644);
 666 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
 667
 668 MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
 669 MODULE_AUTHOR("Kirk Lapray");
 670 MODULE_LICENSE("GPL");
 671
 672 EXPORT_SYMBOL(or51132_attach);
 673
 674 /*
 675  * Local variables:
 676  * c-basic-offset: 8
 677  * End:
 678  */