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bnx2x: reduced sparse warnings
[linux-2.6.git] / drivers / net / ethernet / broadcom / bnx2x / bnx2x_cmn.c
blob673bd83b5a261c7318f183e465e8f15896da9c48
1 /* bnx2x_cmn.c: Broadcom Everest network driver.
2 *
3 * Copyright (c) 2007-2012 Broadcom Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
10 * Written by: Eliezer Tamir
11 * Based on code from Michael Chan's bnx2 driver
12 * UDP CSUM errata workaround by Arik Gendelman
13 * Slowpath and fastpath rework by Vladislav Zolotarov
14 * Statistics and Link management by Yitchak Gertner
15 *
16 */
17
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
20 #include <linux/etherdevice.h>
21 #include <linux/if_vlan.h>
22 #include <linux/interrupt.h>
23 #include <linux/ip.h>
24 #include <net/ipv6.h>
25 #include <net/ip6_checksum.h>
26 #include <linux/firmware.h>
27 #include <linux/prefetch.h>
28 #include "bnx2x_cmn.h"
29 #include "bnx2x_init.h"
30 #include "bnx2x_sp.h"
31
32
33
34 /**
35 * bnx2x_move_fp - move content of the fastpath structure.
36 *
37 * @bp: driver handle
38 * @from: source FP index
39 * @to: destination FP index
40 *
41 * Makes sure the contents of the bp->fp[to].napi is kept
42 * intact. This is done by first copying the napi struct from
43 * the target to the source, and then mem copying the entire
44 * source onto the target
45 */
46 static inline void bnx2x_move_fp(struct bnx2x *bp, int from, int to)
47 {
48 struct bnx2x_fastpath *from_fp = &bp->fp[from];
49 struct bnx2x_fastpath *to_fp = &bp->fp[to];
50
51 /* Copy the NAPI object as it has been already initialized */
52 from_fp->napi = to_fp->napi;
53
54 /* Move bnx2x_fastpath contents */
55 memcpy(to_fp, from_fp, sizeof(*to_fp));
56 to_fp->index = to;
57 }
58
59 int load_count[2][3] = { {0} }; /* per-path: 0-common, 1-port0, 2-port1 */
60
61 /* free skb in the packet ring at pos idx
62 * return idx of last bd freed
63 */
64 static u16 bnx2x_free_tx_pkt(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata,
65 u16 idx, unsigned int *pkts_compl,
66 unsigned int *bytes_compl)
67 {
68 struct sw_tx_bd *tx_buf = &txdata->tx_buf_ring[idx];
69 struct eth_tx_start_bd *tx_start_bd;
70 struct eth_tx_bd *tx_data_bd;
71 struct sk_buff *skb = tx_buf->skb;
72 u16 bd_idx = TX_BD(tx_buf->first_bd), new_cons;
73 int nbd;
74
75 /* prefetch skb end pointer to speedup dev_kfree_skb() */
76 prefetch(&skb->end);
77
78 DP(NETIF_MSG_TX_DONE, "fp[%d]: pkt_idx %d buff @(%p)->skb %p\n",
79 txdata->txq_index, idx, tx_buf, skb);
80
81 /* unmap first bd */
82 tx_start_bd = &txdata->tx_desc_ring[bd_idx].start_bd;
83 dma_unmap_single(&bp->pdev->dev, BD_UNMAP_ADDR(tx_start_bd),
84 BD_UNMAP_LEN(tx_start_bd), DMA_TO_DEVICE);
85
86
87 nbd = le16_to_cpu(tx_start_bd->nbd) - 1;
88 #ifdef BNX2X_STOP_ON_ERROR
89 if ((nbd - 1) > (MAX_SKB_FRAGS + 2)) {
90 BNX2X_ERR("BAD nbd!\n");
91 bnx2x_panic();
92 }
93 #endif
94 new_cons = nbd + tx_buf->first_bd;
95
96 /* Get the next bd */
97 bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
98
99 /* Skip a parse bd... */
100 --nbd;
101 bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
102
103 /* ...and the TSO split header bd since they have no mapping */
104 if (tx_buf->flags & BNX2X_TSO_SPLIT_BD) {
105 --nbd;
106 bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
107 }
108
109 /* now free frags */
110 while (nbd > 0) {
111
112 tx_data_bd = &txdata->tx_desc_ring[bd_idx].reg_bd;
113 dma_unmap_page(&bp->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
114 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
115 if (--nbd)
116 bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
117 }
118
119 /* release skb */
120 WARN_ON(!skb);
121 if (likely(skb)) {
122 (*pkts_compl)++;
123 (*bytes_compl) += skb->len;
124 }
125
126 dev_kfree_skb_any(skb);
127 tx_buf->first_bd = 0;
128 tx_buf->skb = NULL;
129
130 return new_cons;
131 }
132
133 int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata)
134 {
135 struct netdev_queue *txq;
136 u16 hw_cons, sw_cons, bd_cons = txdata->tx_bd_cons;
137 unsigned int pkts_compl = 0, bytes_compl = 0;
138
139 #ifdef BNX2X_STOP_ON_ERROR
140 if (unlikely(bp->panic))
141 return -1;
142 #endif
143
144 txq = netdev_get_tx_queue(bp->dev, txdata->txq_index);
145 hw_cons = le16_to_cpu(*txdata->tx_cons_sb);
146 sw_cons = txdata->tx_pkt_cons;
147
148 while (sw_cons != hw_cons) {
149 u16 pkt_cons;
150
151 pkt_cons = TX_BD(sw_cons);
152
153 DP(NETIF_MSG_TX_DONE,
154 "queue[%d]: hw_cons %u sw_cons %u pkt_cons %u\n",
155 txdata->txq_index, hw_cons, sw_cons, pkt_cons);
156
157 bd_cons = bnx2x_free_tx_pkt(bp, txdata, pkt_cons,
158 &pkts_compl, &bytes_compl);
159
160 sw_cons++;
161 }
162
163 netdev_tx_completed_queue(txq, pkts_compl, bytes_compl);
164
165 txdata->tx_pkt_cons = sw_cons;
166 txdata->tx_bd_cons = bd_cons;
167
168 /* Need to make the tx_bd_cons update visible to start_xmit()
169 * before checking for netif_tx_queue_stopped(). Without the
170 * memory barrier, there is a small possibility that
171 * start_xmit() will miss it and cause the queue to be stopped
172 * forever.
173 * On the other hand we need an rmb() here to ensure the proper
174 * ordering of bit testing in the following
175 * netif_tx_queue_stopped(txq) call.
176 */
177 smp_mb();
178
179 if (unlikely(netif_tx_queue_stopped(txq))) {
180 /* Taking tx_lock() is needed to prevent reenabling the queue
181 * while it's empty. This could have happen if rx_action() gets
182 * suspended in bnx2x_tx_int() after the condition before
183 * netif_tx_wake_queue(), while tx_action (bnx2x_start_xmit()):
184 *
185 * stops the queue->sees fresh tx_bd_cons->releases the queue->
186 * sends some packets consuming the whole queue again->
187 * stops the queue
188 */
189
190 __netif_tx_lock(txq, smp_processor_id());
191
192 if ((netif_tx_queue_stopped(txq)) &&
193 (bp->state == BNX2X_STATE_OPEN) &&
194 (bnx2x_tx_avail(bp, txdata) >= MAX_SKB_FRAGS + 3))
195 netif_tx_wake_queue(txq);
196
197 __netif_tx_unlock(txq);
198 }
199 return 0;
200 }
201
202 static inline void bnx2x_update_last_max_sge(struct bnx2x_fastpath *fp,
203 u16 idx)
204 {
205 u16 last_max = fp->last_max_sge;
206
207 if (SUB_S16(idx, last_max) > 0)
208 fp->last_max_sge = idx;
209 }
210
211 static inline void bnx2x_update_sge_prod(struct bnx2x_fastpath *fp,
212 u16 sge_len,
213 struct eth_end_agg_rx_cqe *cqe)
214 {
215 struct bnx2x *bp = fp->bp;
216 u16 last_max, last_elem, first_elem;
217 u16 delta = 0;
218 u16 i;
219
220 if (!sge_len)
221 return;
222
223 /* First mark all used pages */
224 for (i = 0; i < sge_len; i++)
225 BIT_VEC64_CLEAR_BIT(fp->sge_mask,
226 RX_SGE(le16_to_cpu(cqe->sgl_or_raw_data.sgl[i])));
227
228 DP(NETIF_MSG_RX_STATUS, "fp_cqe->sgl[%d] = %d\n",
229 sge_len - 1, le16_to_cpu(cqe->sgl_or_raw_data.sgl[sge_len - 1]));
230
231 /* Here we assume that the last SGE index is the biggest */
232 prefetch((void *)(fp->sge_mask));
233 bnx2x_update_last_max_sge(fp,
234 le16_to_cpu(cqe->sgl_or_raw_data.sgl[sge_len - 1]));
235
236 last_max = RX_SGE(fp->last_max_sge);
237 last_elem = last_max >> BIT_VEC64_ELEM_SHIFT;
238 first_elem = RX_SGE(fp->rx_sge_prod) >> BIT_VEC64_ELEM_SHIFT;
239
240 /* If ring is not full */
241 if (last_elem + 1 != first_elem)
242 last_elem++;
243
244 /* Now update the prod */
245 for (i = first_elem; i != last_elem; i = NEXT_SGE_MASK_ELEM(i)) {
246 if (likely(fp->sge_mask[i]))
247 break;
248
249 fp->sge_mask[i] = BIT_VEC64_ELEM_ONE_MASK;
250 delta += BIT_VEC64_ELEM_SZ;
251 }
252
253 if (delta > 0) {
254 fp->rx_sge_prod += delta;
255 /* clear page-end entries */
256 bnx2x_clear_sge_mask_next_elems(fp);
257 }
258
259 DP(NETIF_MSG_RX_STATUS,
260 "fp->last_max_sge = %d fp->rx_sge_prod = %d\n",
261 fp->last_max_sge, fp->rx_sge_prod);
262 }
263
264 /* Set Toeplitz hash value in the skb using the value from the
265 * CQE (calculated by HW).
266 */
267 static u32 bnx2x_get_rxhash(const struct bnx2x *bp,
268 const struct eth_fast_path_rx_cqe *cqe)
269 {
270 /* Set Toeplitz hash from CQE */
271 if ((bp->dev->features & NETIF_F_RXHASH) &&
272 (cqe->status_flags & ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG))
273 return le32_to_cpu(cqe->rss_hash_result);
274 return 0;
275 }
276
277 static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue,
278 u16 cons, u16 prod,
279 struct eth_fast_path_rx_cqe *cqe)
280 {
281 struct bnx2x *bp = fp->bp;
282 struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons];
283 struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod];
284 struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod];
285 dma_addr_t mapping;
286 struct bnx2x_agg_info *tpa_info = &fp->tpa_info[queue];
287 struct sw_rx_bd *first_buf = &tpa_info->first_buf;
288
289 /* print error if current state != stop */
290 if (tpa_info->tpa_state != BNX2X_TPA_STOP)
291 BNX2X_ERR("start of bin not in stop [%d]\n", queue);
292
293 /* Try to map an empty data buffer from the aggregation info */
294 mapping = dma_map_single(&bp->pdev->dev,
295 first_buf->data + NET_SKB_PAD,
296 fp->rx_buf_size, DMA_FROM_DEVICE);
297 /*
298 * ...if it fails - move the skb from the consumer to the producer
299 * and set the current aggregation state as ERROR to drop it
300 * when TPA_STOP arrives.
301 */
302
303 if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
304 /* Move the BD from the consumer to the producer */
305 bnx2x_reuse_rx_data(fp, cons, prod);
306 tpa_info->tpa_state = BNX2X_TPA_ERROR;
307 return;
308 }
309
310 /* move empty data from pool to prod */
311 prod_rx_buf->data = first_buf->data;
312 dma_unmap_addr_set(prod_rx_buf, mapping, mapping);
313 /* point prod_bd to new data */
314 prod_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
315 prod_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
316
317 /* move partial skb from cons to pool (don't unmap yet) */
318 *first_buf = *cons_rx_buf;
319
320 /* mark bin state as START */
321 tpa_info->parsing_flags =
322 le16_to_cpu(cqe->pars_flags.flags);
323 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
324 tpa_info->tpa_state = BNX2X_TPA_START;
325 tpa_info->len_on_bd = le16_to_cpu(cqe->len_on_bd);
326 tpa_info->placement_offset = cqe->placement_offset;
327 tpa_info->rxhash = bnx2x_get_rxhash(bp, cqe);
328 if (fp->mode == TPA_MODE_GRO) {
329 u16 gro_size = le16_to_cpu(cqe->pkt_len_or_gro_seg_len);
330 tpa_info->full_page =
331 SGE_PAGE_SIZE * PAGES_PER_SGE / gro_size * gro_size;
332 /*
333 * FW 7.2.16 BUG workaround:
334 * if SGE size is (exactly) multiple gro_size
335 * fw will place one less frag on SGE.
336 * the calculation is done only for potentially
337 * dangerous MTUs.
338 */
339 if (unlikely(bp->gro_check))
340 if (!(SGE_PAGE_SIZE * PAGES_PER_SGE % gro_size))
341 tpa_info->full_page -= gro_size;
342 tpa_info->gro_size = gro_size;
343 }
344
345 #ifdef BNX2X_STOP_ON_ERROR
346 fp->tpa_queue_used |= (1 << queue);
347 #ifdef _ASM_GENERIC_INT_L64_H
348 DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n",
349 #else
350 DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n",
351 #endif
352 fp->tpa_queue_used);
353 #endif
354 }
355
356 /* Timestamp option length allowed for TPA aggregation:
357 *
358 * nop nop kind length echo val
359 */
360 #define TPA_TSTAMP_OPT_LEN 12
361 /**
362 * bnx2x_set_lro_mss - calculate the approximate value of the MSS
363 *
364 * @bp: driver handle
365 * @parsing_flags: parsing flags from the START CQE
366 * @len_on_bd: total length of the first packet for the
367 * aggregation.
368 *
369 * Approximate value of the MSS for this aggregation calculated using
370 * the first packet of it.
371 */
372 static inline u16 bnx2x_set_lro_mss(struct bnx2x *bp, u16 parsing_flags,
373 u16 len_on_bd)
374 {
375 /*
376 * TPA arrgregation won't have either IP options or TCP options
377 * other than timestamp or IPv6 extension headers.
378 */
379 u16 hdrs_len = ETH_HLEN + sizeof(struct tcphdr);
380
381 if (GET_FLAG(parsing_flags, PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) ==
382 PRS_FLAG_OVERETH_IPV6)
383 hdrs_len += sizeof(struct ipv6hdr);
384 else /* IPv4 */
385 hdrs_len += sizeof(struct iphdr);
386
387
388 /* Check if there was a TCP timestamp, if there is it's will
389 * always be 12 bytes length: nop nop kind length echo val.
390 *
391 * Otherwise FW would close the aggregation.
392 */
393 if (parsing_flags & PARSING_FLAGS_TIME_STAMP_EXIST_FLAG)
394 hdrs_len += TPA_TSTAMP_OPT_LEN;
395
396 return len_on_bd - hdrs_len;
397 }
398
399 static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,
400 struct bnx2x_agg_info *tpa_info,
401 u16 pages,
402 struct sk_buff *skb,
403 struct eth_end_agg_rx_cqe *cqe,
404 u16 cqe_idx)
405 {
406 struct sw_rx_page *rx_pg, old_rx_pg;
407 u32 i, frag_len, frag_size;
408 int err, j, frag_id = 0;
409 u16 len_on_bd = tpa_info->len_on_bd;
410 u16 full_page = 0, gro_size = 0;
411
412 frag_size = le16_to_cpu(cqe->pkt_len) - len_on_bd;
413
414 if (fp->mode == TPA_MODE_GRO) {
415 gro_size = tpa_info->gro_size;
416 full_page = tpa_info->full_page;
417 }
418
419 /* This is needed in order to enable forwarding support */
420 if (frag_size) {
421 skb_shinfo(skb)->gso_size = bnx2x_set_lro_mss(bp,
422 tpa_info->parsing_flags, len_on_bd);
423
424 /* set for GRO */
425 if (fp->mode == TPA_MODE_GRO)
426 skb_shinfo(skb)->gso_type =
427 (GET_FLAG(tpa_info->parsing_flags,
428 PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) ==
429 PRS_FLAG_OVERETH_IPV6) ?
430 SKB_GSO_TCPV6 : SKB_GSO_TCPV4;
431 }
432
433
434 #ifdef BNX2X_STOP_ON_ERROR
435 if (pages > min_t(u32, 8, MAX_SKB_FRAGS)*SGE_PAGE_SIZE*PAGES_PER_SGE) {
436 BNX2X_ERR("SGL length is too long: %d. CQE index is %d\n",
437 pages, cqe_idx);
438 BNX2X_ERR("cqe->pkt_len = %d\n", cqe->pkt_len);
439 bnx2x_panic();
440 return -EINVAL;
441 }
442 #endif
443
444 /* Run through the SGL and compose the fragmented skb */
445 for (i = 0, j = 0; i < pages; i += PAGES_PER_SGE, j++) {
446 u16 sge_idx = RX_SGE(le16_to_cpu(cqe->sgl_or_raw_data.sgl[j]));
447
448 /* FW gives the indices of the SGE as if the ring is an array
449 (meaning that "next" element will consume 2 indices) */
450 if (fp->mode == TPA_MODE_GRO)
451 frag_len = min_t(u32, frag_size, (u32)full_page);
452 else /* LRO */
453 frag_len = min_t(u32, frag_size,
454 (u32)(SGE_PAGE_SIZE * PAGES_PER_SGE));
455
456 rx_pg = &fp->rx_page_ring[sge_idx];
457 old_rx_pg = *rx_pg;
458
459 /* If we fail to allocate a substitute page, we simply stop
460 where we are and drop the whole packet */
461 err = bnx2x_alloc_rx_sge(bp, fp, sge_idx);
462 if (unlikely(err)) {
463 fp->eth_q_stats.rx_skb_alloc_failed++;
464 return err;
465 }
466
467 /* Unmap the page as we r going to pass it to the stack */
468 dma_unmap_page(&bp->pdev->dev,
469 dma_unmap_addr(&old_rx_pg, mapping),
470 SGE_PAGE_SIZE*PAGES_PER_SGE, DMA_FROM_DEVICE);
471 /* Add one frag and update the appropriate fields in the skb */
472 if (fp->mode == TPA_MODE_LRO)
473 skb_fill_page_desc(skb, j, old_rx_pg.page, 0, frag_len);
474 else { /* GRO */
475 int rem;
476 int offset = 0;
477 for (rem = frag_len; rem > 0; rem -= gro_size) {
478 int len = rem > gro_size ? gro_size : rem;
479 skb_fill_page_desc(skb, frag_id++,
480 old_rx_pg.page, offset, len);
481 if (offset)
482 get_page(old_rx_pg.page);
483 offset += len;
484 }
485 }
486
487 skb->data_len += frag_len;
488 skb->truesize += SGE_PAGE_SIZE * PAGES_PER_SGE;
489 skb->len += frag_len;
490
491 frag_size -= frag_len;
492 }
493
494 return 0;
495 }
496
497 static inline void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
498 struct bnx2x_agg_info *tpa_info,
499 u16 pages,
500 struct eth_end_agg_rx_cqe *cqe,
501 u16 cqe_idx)
502 {
503 struct sw_rx_bd *rx_buf = &tpa_info->first_buf;
504 u8 pad = tpa_info->placement_offset;
505 u16 len = tpa_info->len_on_bd;
506 struct sk_buff *skb = NULL;
507 u8 *new_data, *data = rx_buf->data;
508 u8 old_tpa_state = tpa_info->tpa_state;
509
510 tpa_info->tpa_state = BNX2X_TPA_STOP;
511
512 /* If we there was an error during the handling of the TPA_START -
513 * drop this aggregation.
514 */
515 if (old_tpa_state == BNX2X_TPA_ERROR)
516 goto drop;
517
518 /* Try to allocate the new data */
519 new_data = kmalloc(fp->rx_buf_size + NET_SKB_PAD, GFP_ATOMIC);
520
521 /* Unmap skb in the pool anyway, as we are going to change
522 pool entry status to BNX2X_TPA_STOP even if new skb allocation
523 fails. */
524 dma_unmap_single(&bp->pdev->dev, dma_unmap_addr(rx_buf, mapping),
525 fp->rx_buf_size, DMA_FROM_DEVICE);
526 if (likely(new_data))
527 skb = build_skb(data);
528
529 if (likely(skb)) {
530 #ifdef BNX2X_STOP_ON_ERROR
531 if (pad + len > fp->rx_buf_size) {
532 BNX2X_ERR("skb_put is about to fail... pad %d len %d rx_buf_size %d\n",
533 pad, len, fp->rx_buf_size);
534 bnx2x_panic();
535 return;
536 }
537 #endif
538
539 skb_reserve(skb, pad + NET_SKB_PAD);
540 skb_put(skb, len);
541 skb->rxhash = tpa_info->rxhash;
542
543 skb->protocol = eth_type_trans(skb, bp->dev);
544 skb->ip_summed = CHECKSUM_UNNECESSARY;
545
546 if (!bnx2x_fill_frag_skb(bp, fp, tpa_info, pages,
547 skb, cqe, cqe_idx)) {
548 if (tpa_info->parsing_flags & PARSING_FLAGS_VLAN)
549 __vlan_hwaccel_put_tag(skb, tpa_info->vlan_tag);
550 napi_gro_receive(&fp->napi, skb);
551 } else {
552 DP(NETIF_MSG_RX_STATUS,
553 "Failed to allocate new pages - dropping packet!\n");
554 dev_kfree_skb_any(skb);
555 }
556
557
558 /* put new data in bin */
559 rx_buf->data = new_data;
560
561 return;
562 }
563 kfree(new_data);
564 drop:
565 /* drop the packet and keep the buffer in the bin */
566 DP(NETIF_MSG_RX_STATUS,
567 "Failed to allocate or map a new skb - dropping packet!\n");
568 fp->eth_q_stats.rx_skb_alloc_failed++;
569 }
570
571
572 int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
573 {
574 struct bnx2x *bp = fp->bp;
575 u16 bd_cons, bd_prod, bd_prod_fw, comp_ring_cons;
576 u16 hw_comp_cons, sw_comp_cons, sw_comp_prod;
577 int rx_pkt = 0;
578
579 #ifdef BNX2X_STOP_ON_ERROR
580 if (unlikely(bp->panic))
581 return 0;
582 #endif
583
584 /* CQ "next element" is of the size of the regular element,
585 that's why it's ok here */
586 hw_comp_cons = le16_to_cpu(*fp->rx_cons_sb);
587 if ((hw_comp_cons & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT)
588 hw_comp_cons++;
589
590 bd_cons = fp->rx_bd_cons;
591 bd_prod = fp->rx_bd_prod;
592 bd_prod_fw = bd_prod;
593 sw_comp_cons = fp->rx_comp_cons;
594 sw_comp_prod = fp->rx_comp_prod;
595
596 /* Memory barrier necessary as speculative reads of the rx
597 * buffer can be ahead of the index in the status block
598 */
599 rmb();
600
601 DP(NETIF_MSG_RX_STATUS,
602 "queue[%d]: hw_comp_cons %u sw_comp_cons %u\n",
603 fp->index, hw_comp_cons, sw_comp_cons);
604
605 while (sw_comp_cons != hw_comp_cons) {
606 struct sw_rx_bd *rx_buf = NULL;
607 struct sk_buff *skb;
608 union eth_rx_cqe *cqe;
609 struct eth_fast_path_rx_cqe *cqe_fp;
610 u8 cqe_fp_flags;
611 enum eth_rx_cqe_type cqe_fp_type;
612 u16 len, pad, queue;
613 u8 *data;
614
615 #ifdef BNX2X_STOP_ON_ERROR
616 if (unlikely(bp->panic))
617 return 0;
618 #endif
619
620 comp_ring_cons = RCQ_BD(sw_comp_cons);
621 bd_prod = RX_BD(bd_prod);
622 bd_cons = RX_BD(bd_cons);
623
624 cqe = &fp->rx_comp_ring[comp_ring_cons];
625 cqe_fp = &cqe->fast_path_cqe;
626 cqe_fp_flags = cqe_fp->type_error_flags;
627 cqe_fp_type = cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE;
628
629 DP(NETIF_MSG_RX_STATUS,
630 "CQE type %x err %x status %x queue %x vlan %x len %u\n",
631 CQE_TYPE(cqe_fp_flags),
632 cqe_fp_flags, cqe_fp->status_flags,
633 le32_to_cpu(cqe_fp->rss_hash_result),
634 le16_to_cpu(cqe_fp->vlan_tag),
635 le16_to_cpu(cqe_fp->pkt_len_or_gro_seg_len));
636
637 /* is this a slowpath msg? */
638 if (unlikely(CQE_TYPE_SLOW(cqe_fp_type))) {
639 bnx2x_sp_event(fp, cqe);
640 goto next_cqe;
641 }
642
643 rx_buf = &fp->rx_buf_ring[bd_cons];
644 data = rx_buf->data;
645
646 if (!CQE_TYPE_FAST(cqe_fp_type)) {
647 struct bnx2x_agg_info *tpa_info;
648 u16 frag_size, pages;
649 #ifdef BNX2X_STOP_ON_ERROR
650 /* sanity check */
651 if (fp->disable_tpa &&
652 (CQE_TYPE_START(cqe_fp_type) ||
653 CQE_TYPE_STOP(cqe_fp_type)))
654 BNX2X_ERR("START/STOP packet while disable_tpa type %x\n",
655 CQE_TYPE(cqe_fp_type));
656 #endif
657
658 if (CQE_TYPE_START(cqe_fp_type)) {
659 u16 queue = cqe_fp->queue_index;
660 DP(NETIF_MSG_RX_STATUS,
661 "calling tpa_start on queue %d\n",
662 queue);
663
664 bnx2x_tpa_start(fp, queue,
665 bd_cons, bd_prod,
666 cqe_fp);
667
668 goto next_rx;
669
670 }
671 queue = cqe->end_agg_cqe.queue_index;
672 tpa_info = &fp->tpa_info[queue];
673 DP(NETIF_MSG_RX_STATUS,
674 "calling tpa_stop on queue %d\n",
675 queue);
676
677 frag_size = le16_to_cpu(cqe->end_agg_cqe.pkt_len) -
678 tpa_info->len_on_bd;
679
680 if (fp->mode == TPA_MODE_GRO)
681 pages = (frag_size + tpa_info->full_page - 1) /
682 tpa_info->full_page;
683 else
684 pages = SGE_PAGE_ALIGN(frag_size) >>
685 SGE_PAGE_SHIFT;
686
687 bnx2x_tpa_stop(bp, fp, tpa_info, pages,
688 &cqe->end_agg_cqe, comp_ring_cons);
689 #ifdef BNX2X_STOP_ON_ERROR
690 if (bp->panic)
691 return 0;
692 #endif
693
694 bnx2x_update_sge_prod(fp, pages, &cqe->end_agg_cqe);
695 goto next_cqe;
696 }
697 /* non TPA */
698 len = le16_to_cpu(cqe_fp->pkt_len_or_gro_seg_len);
699 pad = cqe_fp->placement_offset;
700 dma_sync_single_for_cpu(&bp->pdev->dev,
701 dma_unmap_addr(rx_buf, mapping),
702 pad + RX_COPY_THRESH,
703 DMA_FROM_DEVICE);
704 pad += NET_SKB_PAD;
705 prefetch(data + pad); /* speedup eth_type_trans() */
706 /* is this an error packet? */
707 if (unlikely(cqe_fp_flags & ETH_RX_ERROR_FALGS)) {
708 DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS,
709 "ERROR flags %x rx packet %u\n",
710 cqe_fp_flags, sw_comp_cons);
711 fp->eth_q_stats.rx_err_discard_pkt++;
712 goto reuse_rx;
713 }
714
715 /* Since we don't have a jumbo ring
716 * copy small packets if mtu > 1500
717 */
718 if ((bp->dev->mtu > ETH_MAX_PACKET_SIZE) &&
719 (len <= RX_COPY_THRESH)) {
720 skb = netdev_alloc_skb_ip_align(bp->dev, len);
721 if (skb == NULL) {
722 DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS,
723 "ERROR packet dropped because of alloc failure\n");
724 fp->eth_q_stats.rx_skb_alloc_failed++;
725 goto reuse_rx;
726 }
727 memcpy(skb->data, data + pad, len);
728 bnx2x_reuse_rx_data(fp, bd_cons, bd_prod);
729 } else {
730 if (likely(bnx2x_alloc_rx_data(bp, fp, bd_prod) == 0)) {
731 dma_unmap_single(&bp->pdev->dev,
732 dma_unmap_addr(rx_buf, mapping),
733 fp->rx_buf_size,
734 DMA_FROM_DEVICE);
735 skb = build_skb(data);
736 if (unlikely(!skb)) {
737 kfree(data);
738 fp->eth_q_stats.rx_skb_alloc_failed++;
739 goto next_rx;
740 }
741 skb_reserve(skb, pad);
742 } else {
743 DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS,
744 "ERROR packet dropped because of alloc failure\n");
745 fp->eth_q_stats.rx_skb_alloc_failed++;
746 reuse_rx:
747 bnx2x_reuse_rx_data(fp, bd_cons, bd_prod);
748 goto next_rx;
749 }
750 }
751
752 skb_put(skb, len);
753 skb->protocol = eth_type_trans(skb, bp->dev);
754
755 /* Set Toeplitz hash for a none-LRO skb */
756 skb->rxhash = bnx2x_get_rxhash(bp, cqe_fp);
757
758 skb_checksum_none_assert(skb);
759
760 if (bp->dev->features & NETIF_F_RXCSUM) {
761
762 if (likely(BNX2X_RX_CSUM_OK(cqe)))
763 skb->ip_summed = CHECKSUM_UNNECESSARY;
764 else
765 fp->eth_q_stats.hw_csum_err++;
766 }
767
768 skb_record_rx_queue(skb, fp->rx_queue);
769
770 if (le16_to_cpu(cqe_fp->pars_flags.flags) &
771 PARSING_FLAGS_VLAN)
772 __vlan_hwaccel_put_tag(skb,
773 le16_to_cpu(cqe_fp->vlan_tag));
774 napi_gro_receive(&fp->napi, skb);
775
776
777 next_rx:
778 rx_buf->data = NULL;
779
780 bd_cons = NEXT_RX_IDX(bd_cons);
781 bd_prod = NEXT_RX_IDX(bd_prod);
782 bd_prod_fw = NEXT_RX_IDX(bd_prod_fw);
783 rx_pkt++;
784 next_cqe:
785 sw_comp_prod = NEXT_RCQ_IDX(sw_comp_prod);
786 sw_comp_cons = NEXT_RCQ_IDX(sw_comp_cons);
787
788 if (rx_pkt == budget)
789 break;
790 } /* while */
791
792 fp->rx_bd_cons = bd_cons;
793 fp->rx_bd_prod = bd_prod_fw;
794 fp->rx_comp_cons = sw_comp_cons;
795 fp->rx_comp_prod = sw_comp_prod;
796
797 /* Update producers */
798 bnx2x_update_rx_prod(bp, fp, bd_prod_fw, sw_comp_prod,
799 fp->rx_sge_prod);
800
801 fp->rx_pkt += rx_pkt;
802 fp->rx_calls++;
803
804 return rx_pkt;
805 }
806
807 static irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie)
808 {
809 struct bnx2x_fastpath *fp = fp_cookie;
810 struct bnx2x *bp = fp->bp;
811 u8 cos;
812
813 DP(NETIF_MSG_INTR,
814 "got an MSI-X interrupt on IDX:SB [fp %d fw_sd %d igusb %d]\n",
815 fp->index, fp->fw_sb_id, fp->igu_sb_id);
816 bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID, 0, IGU_INT_DISABLE, 0);
817
818 #ifdef BNX2X_STOP_ON_ERROR
819 if (unlikely(bp->panic))
820 return IRQ_HANDLED;
821 #endif
822
823 /* Handle Rx and Tx according to MSI-X vector */
824 prefetch(fp->rx_cons_sb);
825
826 for_each_cos_in_tx_queue(fp, cos)
827 prefetch(fp->txdata[cos].tx_cons_sb);
828
829 prefetch(&fp->sb_running_index[SM_RX_ID]);
830 napi_schedule(&bnx2x_fp(bp, fp->index, napi));
831
832 return IRQ_HANDLED;
833 }
834
835 /* HW Lock for shared dual port PHYs */
836 void bnx2x_acquire_phy_lock(struct bnx2x *bp)
837 {
838 mutex_lock(&bp->port.phy_mutex);
839
840 if (bp->port.need_hw_lock)
841 bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
842 }
843
844 void bnx2x_release_phy_lock(struct bnx2x *bp)
845 {
846 if (bp->port.need_hw_lock)
847 bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
848
849 mutex_unlock(&bp->port.phy_mutex);
850 }
851
852 /* calculates MF speed according to current linespeed and MF configuration */
853 u16 bnx2x_get_mf_speed(struct bnx2x *bp)
854 {
855 u16 line_speed = bp->link_vars.line_speed;
856 if (IS_MF(bp)) {
857 u16 maxCfg = bnx2x_extract_max_cfg(bp,
858 bp->mf_config[BP_VN(bp)]);
859
860 /* Calculate the current MAX line speed limit for the MF
861 * devices
862 */
863 if (IS_MF_SI(bp))
864 line_speed = (line_speed * maxCfg) / 100;
865 else { /* SD mode */
866 u16 vn_max_rate = maxCfg * 100;
867
868 if (vn_max_rate < line_speed)
869 line_speed = vn_max_rate;
870 }
871 }
872
873 return line_speed;
874 }
875
876 /**
877 * bnx2x_fill_report_data - fill link report data to report
878 *
879 * @bp: driver handle
880 * @data: link state to update
881 *
882 * It uses a none-atomic bit operations because is called under the mutex.
883 */
884 static inline void bnx2x_fill_report_data(struct bnx2x *bp,
885 struct bnx2x_link_report_data *data)
886 {
887 u16 line_speed = bnx2x_get_mf_speed(bp);
888
889 memset(data, 0, sizeof(*data));
890
891 /* Fill the report data: efective line speed */
892 data->line_speed = line_speed;
893
894 /* Link is down */
895 if (!bp->link_vars.link_up || (bp->flags & MF_FUNC_DIS))
896 __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
897 &data->link_report_flags);
898
899 /* Full DUPLEX */
900 if (bp->link_vars.duplex == DUPLEX_FULL)
901 __set_bit(BNX2X_LINK_REPORT_FD, &data->link_report_flags);
902
903 /* Rx Flow Control is ON */
904 if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_RX)
905 __set_bit(BNX2X_LINK_REPORT_RX_FC_ON, &data->link_report_flags);
906
907 /* Tx Flow Control is ON */
908 if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_TX)
909 __set_bit(BNX2X_LINK_REPORT_TX_FC_ON, &data->link_report_flags);
910 }
911
912 /**
913 * bnx2x_link_report - report link status to OS.
914 *
915 * @bp: driver handle
916 *
917 * Calls the __bnx2x_link_report() under the same locking scheme
918 * as a link/PHY state managing code to ensure a consistent link
919 * reporting.
920 */
921
922 void bnx2x_link_report(struct bnx2x *bp)
923 {
924 bnx2x_acquire_phy_lock(bp);
925 __bnx2x_link_report(bp);
926 bnx2x_release_phy_lock(bp);
927 }
928
929 /**
930 * __bnx2x_link_report - report link status to OS.
931 *
932 * @bp: driver handle
933 *
934 * None atomic inmlementation.
935 * Should be called under the phy_lock.
936 */
937 void __bnx2x_link_report(struct bnx2x *bp)
938 {
939 struct bnx2x_link_report_data cur_data;
940
941 /* reread mf_cfg */
942 if (!CHIP_IS_E1(bp))
943 bnx2x_read_mf_cfg(bp);
944
945 /* Read the current link report info */
946 bnx2x_fill_report_data(bp, &cur_data);
947
948 /* Don't report link down or exactly the same link status twice */
949 if (!memcmp(&cur_data, &bp->last_reported_link, sizeof(cur_data)) ||
950 (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
951 &bp->last_reported_link.link_report_flags) &&
952 test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
953 &cur_data.link_report_flags)))
954 return;
955
956 bp->link_cnt++;
957
958 /* We are going to report a new link parameters now -
959 * remember the current data for the next time.
960 */
961 memcpy(&bp->last_reported_link, &cur_data, sizeof(cur_data));
962
963 if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
964 &cur_data.link_report_flags)) {
965 netif_carrier_off(bp->dev);
966 netdev_err(bp->dev, "NIC Link is Down\n");
967 return;
968 } else {
969 const char *duplex;
970 const char *flow;
971
972 netif_carrier_on(bp->dev);
973
974 if (test_and_clear_bit(BNX2X_LINK_REPORT_FD,
975 &cur_data.link_report_flags))
976 duplex = "full";
977 else
978 duplex = "half";
979
980 /* Handle the FC at the end so that only these flags would be
981 * possibly set. This way we may easily check if there is no FC
982 * enabled.
983 */
984 if (cur_data.link_report_flags) {
985 if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
986 &cur_data.link_report_flags)) {
987 if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
988 &cur_data.link_report_flags))
989 flow = "ON - receive & transmit";
990 else
991 flow = "ON - receive";
992 } else {
993 flow = "ON - transmit";
994 }
995 } else {
996 flow = "none";
997 }
998 netdev_info(bp->dev, "NIC Link is Up, %d Mbps %s duplex, Flow control: %s\n",
999 cur_data.line_speed, duplex, flow);
1000 }
1001 }
1002
1003 void bnx2x_init_rx_rings(struct bnx2x *bp)
1004 {
1005 int func = BP_FUNC(bp);
1006 u16 ring_prod;
1007 int i, j;
1008
1009 /* Allocate TPA resources */
1010 for_each_rx_queue(bp, j) {
1011 struct bnx2x_fastpath *fp = &bp->fp[j];
1012
1013 DP(NETIF_MSG_IFUP,
1014 "mtu %d rx_buf_size %d\n", bp->dev->mtu, fp->rx_buf_size);
1015
1016 if (!fp->disable_tpa) {
1017 /* Fill the per-aggregtion pool */
1018 for (i = 0; i < MAX_AGG_QS(bp); i++) {
1019 struct bnx2x_agg_info *tpa_info =
1020 &fp->tpa_info[i];
1021 struct sw_rx_bd *first_buf =
1022 &tpa_info->first_buf;
1023
1024 first_buf->data = kmalloc(fp->rx_buf_size + NET_SKB_PAD,
1025 GFP_ATOMIC);
1026 if (!first_buf->data) {
1027 BNX2X_ERR("Failed to allocate TPA skb pool for queue[%d] - disabling TPA on this queue!\n",
1028 j);
1029 bnx2x_free_tpa_pool(bp, fp, i);
1030 fp->disable_tpa = 1;
1031 break;
1032 }
1033 dma_unmap_addr_set(first_buf, mapping, 0);
1034 tpa_info->tpa_state = BNX2X_TPA_STOP;
1035 }
1036
1037 /* "next page" elements initialization */
1038 bnx2x_set_next_page_sgl(fp);
1039
1040 /* set SGEs bit mask */
1041 bnx2x_init_sge_ring_bit_mask(fp);
1042
1043 /* Allocate SGEs and initialize the ring elements */
1044 for (i = 0, ring_prod = 0;
1045 i < MAX_RX_SGE_CNT*NUM_RX_SGE_PAGES; i++) {
1046
1047 if (bnx2x_alloc_rx_sge(bp, fp, ring_prod) < 0) {
1048 BNX2X_ERR("was only able to allocate %d rx sges\n",
1049 i);
1050 BNX2X_ERR("disabling TPA for queue[%d]\n",
1051 j);
1052 /* Cleanup already allocated elements */
1053 bnx2x_free_rx_sge_range(bp, fp,
1054 ring_prod);
1055 bnx2x_free_tpa_pool(bp, fp,
1056 MAX_AGG_QS(bp));
1057 fp->disable_tpa = 1;
1058 ring_prod = 0;
1059 break;
1060 }
1061 ring_prod = NEXT_SGE_IDX(ring_prod);
1062 }
1063
1064 fp->rx_sge_prod = ring_prod;
1065 }
1066 }
1067
1068 for_each_rx_queue(bp, j) {
1069 struct bnx2x_fastpath *fp = &bp->fp[j];
1070
1071 fp->rx_bd_cons = 0;
1072
1073 /* Activate BD ring */
1074 /* Warning!
1075 * this will generate an interrupt (to the TSTORM)
1076 * must only be done after chip is initialized
1077 */
1078 bnx2x_update_rx_prod(bp, fp, fp->rx_bd_prod, fp->rx_comp_prod,
1079 fp->rx_sge_prod);
1080
1081 if (j != 0)
1082 continue;
1083
1084 if (CHIP_IS_E1(bp)) {
1085 REG_WR(bp, BAR_USTRORM_INTMEM +
1086 USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func),
1087 U64_LO(fp->rx_comp_mapping));
1088 REG_WR(bp, BAR_USTRORM_INTMEM +
1089 USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func) + 4,
1090 U64_HI(fp->rx_comp_mapping));
1091 }
1092 }
1093 }
1094
1095 static void bnx2x_free_tx_skbs(struct bnx2x *bp)
1096 {
1097 int i;
1098 u8 cos;
1099
1100 for_each_tx_queue(bp, i) {
1101 struct bnx2x_fastpath *fp = &bp->fp[i];
1102 for_each_cos_in_tx_queue(fp, cos) {
1103 struct bnx2x_fp_txdata *txdata = &fp->txdata[cos];
1104 unsigned pkts_compl = 0, bytes_compl = 0;
1105
1106 u16 sw_prod = txdata->tx_pkt_prod;
1107 u16 sw_cons = txdata->tx_pkt_cons;
1108
1109 while (sw_cons != sw_prod) {
1110 bnx2x_free_tx_pkt(bp, txdata, TX_BD(sw_cons),
1111 &pkts_compl, &bytes_compl);
1112 sw_cons++;
1113 }
1114 netdev_tx_reset_queue(
1115 netdev_get_tx_queue(bp->dev, txdata->txq_index));
1116 }
1117 }
1118 }
1119
1120 static void bnx2x_free_rx_bds(struct bnx2x_fastpath *fp)
1121 {
1122 struct bnx2x *bp = fp->bp;
1123 int i;
1124
1125 /* ring wasn't allocated */
1126 if (fp->rx_buf_ring == NULL)
1127 return;
1128
1129 for (i = 0; i < NUM_RX_BD; i++) {
1130 struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[i];
1131 u8 *data = rx_buf->data;
1132
1133 if (data == NULL)
1134 continue;
1135 dma_unmap_single(&bp->pdev->dev,
1136 dma_unmap_addr(rx_buf, mapping),
1137 fp->rx_buf_size, DMA_FROM_DEVICE);
1138
1139 rx_buf->data = NULL;
1140 kfree(data);
1141 }
1142 }
1143
1144 static void bnx2x_free_rx_skbs(struct bnx2x *bp)
1145 {
1146 int j;
1147
1148 for_each_rx_queue(bp, j) {
1149 struct bnx2x_fastpath *fp = &bp->fp[j];
1150
1151 bnx2x_free_rx_bds(fp);
1152
1153 if (!fp->disable_tpa)
1154 bnx2x_free_tpa_pool(bp, fp, MAX_AGG_QS(bp));
1155 }
1156 }
1157
1158 void bnx2x_free_skbs(struct bnx2x *bp)
1159 {
1160 bnx2x_free_tx_skbs(bp);
1161 bnx2x_free_rx_skbs(bp);
1162 }
1163
1164 void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value)
1165 {
1166 /* load old values */
1167 u32 mf_cfg = bp->mf_config[BP_VN(bp)];
1168
1169 if (value != bnx2x_extract_max_cfg(bp, mf_cfg)) {
1170 /* leave all but MAX value */
1171 mf_cfg &= ~FUNC_MF_CFG_MAX_BW_MASK;
1172
1173 /* set new MAX value */
1174 mf_cfg |= (value << FUNC_MF_CFG_MAX_BW_SHIFT)
1175 & FUNC_MF_CFG_MAX_BW_MASK;
1176
1177 bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, mf_cfg);
1178 }
1179 }
1180
1181 /**
1182 * bnx2x_free_msix_irqs - free previously requested MSI-X IRQ vectors
1183 *
1184 * @bp: driver handle
1185 * @nvecs: number of vectors to be released
1186 */
1187 static void bnx2x_free_msix_irqs(struct bnx2x *bp, int nvecs)
1188 {
1189 int i, offset = 0;
1190
1191 if (nvecs == offset)
1192 return;
1193 free_irq(bp->msix_table[offset].vector, bp->dev);
1194 DP(NETIF_MSG_IFDOWN, "released sp irq (%d)\n",
1195 bp->msix_table[offset].vector);
1196 offset++;
1197 #ifdef BCM_CNIC
1198 if (nvecs == offset)
1199 return;
1200 offset++;
1201 #endif
1202
1203 for_each_eth_queue(bp, i) {
1204 if (nvecs == offset)
1205 return;
1206 DP(NETIF_MSG_IFDOWN, "about to release fp #%d->%d irq\n",
1207 i, bp->msix_table[offset].vector);
1208
1209 free_irq(bp->msix_table[offset++].vector, &bp->fp[i]);
1210 }
1211 }
1212
1213 void bnx2x_free_irq(struct bnx2x *bp)
1214 {
1215 if (bp->flags & USING_MSIX_FLAG)
1216 bnx2x_free_msix_irqs(bp, BNX2X_NUM_ETH_QUEUES(bp) +
1217 CNIC_PRESENT + 1);
1218 else if (bp->flags & USING_MSI_FLAG)
1219 free_irq(bp->pdev->irq, bp->dev);
1220 else
1221 free_irq(bp->pdev->irq, bp->dev);
1222 }
1223
1224 int bnx2x_enable_msix(struct bnx2x *bp)
1225 {
1226 int msix_vec = 0, i, rc, req_cnt;
1227
1228 bp->msix_table[msix_vec].entry = msix_vec;
1229 BNX2X_DEV_INFO("msix_table[0].entry = %d (slowpath)\n",
1230 bp->msix_table[0].entry);
1231 msix_vec++;
1232
1233 #ifdef BCM_CNIC
1234 bp->msix_table[msix_vec].entry = msix_vec;
1235 BNX2X_DEV_INFO("msix_table[%d].entry = %d (CNIC)\n",
1236 bp->msix_table[msix_vec].entry, bp->msix_table[msix_vec].entry);
1237 msix_vec++;
1238 #endif
1239 /* We need separate vectors for ETH queues only (not FCoE) */
1240 for_each_eth_queue(bp, i) {
1241 bp->msix_table[msix_vec].entry = msix_vec;
1242 BNX2X_DEV_INFO("msix_table[%d].entry = %d (fastpath #%u)\n",
1243 msix_vec, msix_vec, i);
1244 msix_vec++;
1245 }
1246
1247 req_cnt = BNX2X_NUM_ETH_QUEUES(bp) + CNIC_PRESENT + 1;
1248
1249 rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], req_cnt);
1250
1251 /*
1252 * reconfigure number of tx/rx queues according to available
1253 * MSI-X vectors
1254 */
1255 if (rc >= BNX2X_MIN_MSIX_VEC_CNT) {
1256 /* how less vectors we will have? */
1257 int diff = req_cnt - rc;
1258
1259 BNX2X_DEV_INFO("Trying to use less MSI-X vectors: %d\n", rc);
1260
1261 rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], rc);
1262
1263 if (rc) {
1264 BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc);
1265 return rc;
1266 }
1267 /*
1268 * decrease number of queues by number of unallocated entries
1269 */
1270 bp->num_queues -= diff;
1271
1272 BNX2X_DEV_INFO("New queue configuration set: %d\n",
1273 bp->num_queues);
1274 } else if (rc) {
1275 /* fall to INTx if not enough memory */
1276 if (rc == -ENOMEM)
1277 bp->flags |= DISABLE_MSI_FLAG;
1278 BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc);
1279 return rc;
1280 }
1281
1282 bp->flags |= USING_MSIX_FLAG;
1283
1284 return 0;
1285 }
1286
1287 static int bnx2x_req_msix_irqs(struct bnx2x *bp)
1288 {
1289 int i, rc, offset = 0;
1290
1291 rc = request_irq(bp->msix_table[offset++].vector,
1292 bnx2x_msix_sp_int, 0,
1293 bp->dev->name, bp->dev);
1294 if (rc) {
1295 BNX2X_ERR("request sp irq failed\n");
1296 return -EBUSY;
1297 }
1298
1299 #ifdef BCM_CNIC
1300 offset++;
1301 #endif
1302 for_each_eth_queue(bp, i) {
1303 struct bnx2x_fastpath *fp = &bp->fp[i];
1304 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1305 bp->dev->name, i);
1306
1307 rc = request_irq(bp->msix_table[offset].vector,
1308 bnx2x_msix_fp_int, 0, fp->name, fp);
1309 if (rc) {
1310 BNX2X_ERR("request fp #%d irq (%d) failed rc %d\n", i,
1311 bp->msix_table[offset].vector, rc);
1312 bnx2x_free_msix_irqs(bp, offset);
1313 return -EBUSY;
1314 }
1315
1316 offset++;
1317 }
1318
1319 i = BNX2X_NUM_ETH_QUEUES(bp);
1320 offset = 1 + CNIC_PRESENT;
1321 netdev_info(bp->dev, "using MSI-X IRQs: sp %d fp[%d] %d ... fp[%d] %d\n",
1322 bp->msix_table[0].vector,
1323 0, bp->msix_table[offset].vector,
1324 i - 1, bp->msix_table[offset + i - 1].vector);
1325
1326 return 0;
1327 }
1328
1329 int bnx2x_enable_msi(struct bnx2x *bp)
1330 {
1331 int rc;
1332
1333 rc = pci_enable_msi(bp->pdev);
1334 if (rc) {
1335 BNX2X_DEV_INFO("MSI is not attainable\n");
1336 return -1;
1337 }
1338 bp->flags |= USING_MSI_FLAG;
1339
1340 return 0;
1341 }
1342
1343 static int bnx2x_req_irq(struct bnx2x *bp)
1344 {
1345 unsigned long flags;
1346 int rc;
1347
1348 if (bp->flags & USING_MSI_FLAG)
1349 flags = 0;
1350 else
1351 flags = IRQF_SHARED;
1352
1353 rc = request_irq(bp->pdev->irq, bnx2x_interrupt, flags,
1354 bp->dev->name, bp->dev);
1355 return rc;
1356 }
1357
1358 static inline int bnx2x_setup_irqs(struct bnx2x *bp)
1359 {
1360 int rc = 0;
1361 if (bp->flags & USING_MSIX_FLAG) {
1362 rc = bnx2x_req_msix_irqs(bp);
1363 if (rc)
1364 return rc;
1365 } else {
1366 bnx2x_ack_int(bp);
1367 rc = bnx2x_req_irq(bp);
1368 if (rc) {
1369 BNX2X_ERR("IRQ request failed rc %d, aborting\n", rc);
1370 return rc;
1371 }
1372 if (bp->flags & USING_MSI_FLAG) {
1373 bp->dev->irq = bp->pdev->irq;
1374 netdev_info(bp->dev, "using MSI IRQ %d\n",
1375 bp->pdev->irq);
1376 }
1377 }
1378
1379 return 0;
1380 }
1381
1382 static inline void bnx2x_napi_enable(struct bnx2x *bp)
1383 {
1384 int i;
1385
1386 for_each_rx_queue(bp, i)
1387 napi_enable(&bnx2x_fp(bp, i, napi));
1388 }
1389
1390 static inline void bnx2x_napi_disable(struct bnx2x *bp)
1391 {
1392 int i;
1393
1394 for_each_rx_queue(bp, i)
1395 napi_disable(&bnx2x_fp(bp, i, napi));
1396 }
1397
1398 void bnx2x_netif_start(struct bnx2x *bp)
1399 {
1400 if (netif_running(bp->dev)) {
1401 bnx2x_napi_enable(bp);
1402 bnx2x_int_enable(bp);
1403 if (bp->state == BNX2X_STATE_OPEN)
1404 netif_tx_wake_all_queues(bp->dev);
1405 }
1406 }
1407
1408 void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw)
1409 {
1410 bnx2x_int_disable_sync(bp, disable_hw);
1411 bnx2x_napi_disable(bp);
1412 }
1413
1414 u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb)
1415 {
1416 struct bnx2x *bp = netdev_priv(dev);
1417
1418 #ifdef BCM_CNIC
1419 if (!NO_FCOE(bp)) {
1420 struct ethhdr *hdr = (struct ethhdr *)skb->data;
1421 u16 ether_type = ntohs(hdr->h_proto);
1422
1423 /* Skip VLAN tag if present */
1424 if (ether_type == ETH_P_8021Q) {
1425 struct vlan_ethhdr *vhdr =
1426 (struct vlan_ethhdr *)skb->data;
1427
1428 ether_type = ntohs(vhdr->h_vlan_encapsulated_proto);
1429 }
1430
1431 /* If ethertype is FCoE or FIP - use FCoE ring */
1432 if ((ether_type == ETH_P_FCOE) || (ether_type == ETH_P_FIP))
1433 return bnx2x_fcoe_tx(bp, txq_index);
1434 }
1435 #endif
1436 /* select a non-FCoE queue */
1437 return __skb_tx_hash(dev, skb, BNX2X_NUM_ETH_QUEUES(bp));
1438 }
1439
1440 void bnx2x_set_num_queues(struct bnx2x *bp)
1441 {
1442 switch (bp->multi_mode) {
1443 case ETH_RSS_MODE_DISABLED:
1444 bp->num_queues = 1;
1445 break;
1446 case ETH_RSS_MODE_REGULAR:
1447 bp->num_queues = bnx2x_calc_num_queues(bp);
1448 break;
1449
1450 default:
1451 bp->num_queues = 1;
1452 break;
1453 }
1454
1455 #ifdef BCM_CNIC
1456 /* override in ISCSI SD mod */
1457 if (IS_MF_ISCSI_SD(bp))
1458 bp->num_queues = 1;
1459 #endif
1460 /* Add special queues */
1461 bp->num_queues += NON_ETH_CONTEXT_USE;
1462 }
1463
1464 /**
1465 * bnx2x_set_real_num_queues - configure netdev->real_num_[tx,rx]_queues
1466 *
1467 * @bp: Driver handle
1468 *
1469 * We currently support for at most 16 Tx queues for each CoS thus we will
1470 * allocate a multiple of 16 for ETH L2 rings according to the value of the
1471 * bp->max_cos.
1472 *
1473 * If there is an FCoE L2 queue the appropriate Tx queue will have the next
1474 * index after all ETH L2 indices.
1475 *
1476 * If the actual number of Tx queues (for each CoS) is less than 16 then there
1477 * will be the holes at the end of each group of 16 ETh L2 indices (0..15,
1478 * 16..31,...) with indicies that are not coupled with any real Tx queue.
1479 *
1480 * The proper configuration of skb->queue_mapping is handled by
1481 * bnx2x_select_queue() and __skb_tx_hash().
1482 *
1483 * bnx2x_setup_tc() takes care of the proper TC mappings so that __skb_tx_hash()
1484 * will return a proper Tx index if TC is enabled (netdev->num_tc > 0).
1485 */
1486 static inline int bnx2x_set_real_num_queues(struct bnx2x *bp)
1487 {
1488 int rc, tx, rx;
1489
1490 tx = MAX_TXQS_PER_COS * bp->max_cos;
1491 rx = BNX2X_NUM_ETH_QUEUES(bp);
1492
1493 /* account for fcoe queue */
1494 #ifdef BCM_CNIC
1495 if (!NO_FCOE(bp)) {
1496 rx += FCOE_PRESENT;
1497 tx += FCOE_PRESENT;
1498 }
1499 #endif
1500
1501 rc = netif_set_real_num_tx_queues(bp->dev, tx);
1502 if (rc) {
1503 BNX2X_ERR("Failed to set real number of Tx queues: %d\n", rc);
1504 return rc;
1505 }
1506 rc = netif_set_real_num_rx_queues(bp->dev, rx);
1507 if (rc) {
1508 BNX2X_ERR("Failed to set real number of Rx queues: %d\n", rc);
1509 return rc;
1510 }
1511
1512 DP(NETIF_MSG_IFUP, "Setting real num queues to (tx, rx) (%d, %d)\n",
1513 tx, rx);
1514
1515 return rc;
1516 }
1517
1518 static inline void bnx2x_set_rx_buf_size(struct bnx2x *bp)
1519 {
1520 int i;
1521
1522 for_each_queue(bp, i) {
1523 struct bnx2x_fastpath *fp = &bp->fp[i];
1524 u32 mtu;
1525
1526 /* Always use a mini-jumbo MTU for the FCoE L2 ring */
1527 if (IS_FCOE_IDX(i))
1528 /*
1529 * Although there are no IP frames expected to arrive to
1530 * this ring we still want to add an
1531 * IP_HEADER_ALIGNMENT_PADDING to prevent a buffer
1532 * overrun attack.
1533 */
1534 mtu = BNX2X_FCOE_MINI_JUMBO_MTU;
1535 else
1536 mtu = bp->dev->mtu;
1537 fp->rx_buf_size = BNX2X_FW_RX_ALIGN_START +
1538 IP_HEADER_ALIGNMENT_PADDING +
1539 ETH_OVREHEAD +
1540 mtu +
1541 BNX2X_FW_RX_ALIGN_END;
1542 /* Note : rx_buf_size doesnt take into account NET_SKB_PAD */
1543 }
1544 }
1545
1546 static inline int bnx2x_init_rss_pf(struct bnx2x *bp)
1547 {
1548 int i;
1549 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE] = {0};
1550 u8 num_eth_queues = BNX2X_NUM_ETH_QUEUES(bp);
1551
1552 /*
1553 * Prepare the inital contents fo the indirection table if RSS is
1554 * enabled
1555 */
1556 if (bp->multi_mode != ETH_RSS_MODE_DISABLED) {
1557 for (i = 0; i < sizeof(ind_table); i++)
1558 ind_table[i] =
1559 bp->fp->cl_id +
1560 ethtool_rxfh_indir_default(i, num_eth_queues);
1561 }
1562
1563 /*
1564 * For 57710 and 57711 SEARCHER configuration (rss_keys) is
1565 * per-port, so if explicit configuration is needed , do it only
1566 * for a PMF.
1567 *
1568 * For 57712 and newer on the other hand it's a per-function
1569 * configuration.
1570 */
1571 return bnx2x_config_rss_pf(bp, ind_table,
1572 bp->port.pmf || !CHIP_IS_E1x(bp));
1573 }
1574
1575 int bnx2x_config_rss_pf(struct bnx2x *bp, u8 *ind_table, bool config_hash)
1576 {
1577 struct bnx2x_config_rss_params params = {NULL};
1578 int i;
1579
1580 /* Although RSS is meaningless when there is a single HW queue we
1581 * still need it enabled in order to have HW Rx hash generated.
1582 *
1583 * if (!is_eth_multi(bp))
1584 * bp->multi_mode = ETH_RSS_MODE_DISABLED;
1585 */
1586
1587 params.rss_obj = &bp->rss_conf_obj;
1588
1589 __set_bit(RAMROD_COMP_WAIT, &params.ramrod_flags);
1590
1591 /* RSS mode */
1592 switch (bp->multi_mode) {
1593 case ETH_RSS_MODE_DISABLED:
1594 __set_bit(BNX2X_RSS_MODE_DISABLED, &params.rss_flags);
1595 break;
1596 case ETH_RSS_MODE_REGULAR:
1597 __set_bit(BNX2X_RSS_MODE_REGULAR, &params.rss_flags);
1598 break;
1599 case ETH_RSS_MODE_VLAN_PRI:
1600 __set_bit(BNX2X_RSS_MODE_VLAN_PRI, &params.rss_flags);
1601 break;
1602 case ETH_RSS_MODE_E1HOV_PRI:
1603 __set_bit(BNX2X_RSS_MODE_E1HOV_PRI, &params.rss_flags);
1604 break;
1605 case ETH_RSS_MODE_IP_DSCP:
1606 __set_bit(BNX2X_RSS_MODE_IP_DSCP, &params.rss_flags);
1607 break;
1608 default:
1609 BNX2X_ERR("Unknown multi_mode: %d\n", bp->multi_mode);
1610 return -EINVAL;
1611 }
1612
1613 /* If RSS is enabled */
1614 if (bp->multi_mode != ETH_RSS_MODE_DISABLED) {
1615 /* RSS configuration */
1616 __set_bit(BNX2X_RSS_IPV4, &params.rss_flags);
1617 __set_bit(BNX2X_RSS_IPV4_TCP, &params.rss_flags);
1618 __set_bit(BNX2X_RSS_IPV6, &params.rss_flags);
1619 __set_bit(BNX2X_RSS_IPV6_TCP, &params.rss_flags);
1620
1621 /* Hash bits */
1622 params.rss_result_mask = MULTI_MASK;
1623
1624 memcpy(params.ind_table, ind_table, sizeof(params.ind_table));
1625
1626 if (config_hash) {
1627 /* RSS keys */
1628 for (i = 0; i < sizeof(params.rss_key) / 4; i++)
1629 params.rss_key[i] = random32();
1630
1631 __set_bit(BNX2X_RSS_SET_SRCH, &params.rss_flags);
1632 }
1633 }
1634
1635 return bnx2x_config_rss(bp, &params);
1636 }
1637
1638 static inline int bnx2x_init_hw(struct bnx2x *bp, u32 load_code)
1639 {
1640 struct bnx2x_func_state_params func_params = {NULL};
1641
1642 /* Prepare parameters for function state transitions */
1643 __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);
1644
1645 func_params.f_obj = &bp->func_obj;
1646 func_params.cmd = BNX2X_F_CMD_HW_INIT;
1647
1648 func_params.params.hw_init.load_phase = load_code;
1649
1650 return bnx2x_func_state_change(bp, &func_params);
1651 }
1652
1653 /*
1654 * Cleans the object that have internal lists without sending
1655 * ramrods. Should be run when interrutps are disabled.
1656 */
1657 static void bnx2x_squeeze_objects(struct bnx2x *bp)
1658 {
1659 int rc;
1660 unsigned long ramrod_flags = 0, vlan_mac_flags = 0;
1661 struct bnx2x_mcast_ramrod_params rparam = {NULL};
1662 struct bnx2x_vlan_mac_obj *mac_obj = &bp->fp->mac_obj;
1663
1664 /***************** Cleanup MACs' object first *************************/
1665
1666 /* Wait for completion of requested */
1667 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
1668 /* Perform a dry cleanup */
1669 __set_bit(RAMROD_DRV_CLR_ONLY, &ramrod_flags);
1670
1671 /* Clean ETH primary MAC */
1672 __set_bit(BNX2X_ETH_MAC, &vlan_mac_flags);
1673 rc = mac_obj->delete_all(bp, &bp->fp->mac_obj, &vlan_mac_flags,
1674 &ramrod_flags);
1675 if (rc != 0)
1676 BNX2X_ERR("Failed to clean ETH MACs: %d\n", rc);
1677
1678 /* Cleanup UC list */
1679 vlan_mac_flags = 0;
1680 __set_bit(BNX2X_UC_LIST_MAC, &vlan_mac_flags);
1681 rc = mac_obj->delete_all(bp, mac_obj, &vlan_mac_flags,
1682 &ramrod_flags);
1683 if (rc != 0)
1684 BNX2X_ERR("Failed to clean UC list MACs: %d\n", rc);
1685
1686 /***************** Now clean mcast object *****************************/
1687 rparam.mcast_obj = &bp->mcast_obj;
1688 __set_bit(RAMROD_DRV_CLR_ONLY, &rparam.ramrod_flags);
1689
1690 /* Add a DEL command... */
1691 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_DEL);
1692 if (rc < 0)
1693 BNX2X_ERR("Failed to add a new DEL command to a multi-cast object: %d\n",
1694 rc);
1695
1696 /* ...and wait until all pending commands are cleared */
1697 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1698 while (rc != 0) {
1699 if (rc < 0) {
1700 BNX2X_ERR("Failed to clean multi-cast object: %d\n",
1701 rc);
1702 return;
1703 }
1704
1705 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1706 }
1707 }
1708
1709 #ifndef BNX2X_STOP_ON_ERROR
1710 #define LOAD_ERROR_EXIT(bp, label) \
1711 do { \
1712 (bp)->state = BNX2X_STATE_ERROR; \
1713 goto label; \
1714 } while (0)
1715 #else
1716 #define LOAD_ERROR_EXIT(bp, label) \
1717 do { \
1718 (bp)->state = BNX2X_STATE_ERROR; \
1719 (bp)->panic = 1; \
1720 return -EBUSY; \
1721 } while (0)
1722 #endif
1723
1724 /* must be called with rtnl_lock */
1725 int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
1726 {
1727 int port = BP_PORT(bp);
1728 u32 load_code;
1729 int i, rc;
1730
1731 #ifdef BNX2X_STOP_ON_ERROR
1732 if (unlikely(bp->panic)) {
1733 BNX2X_ERR("Can't load NIC when there is panic\n");
1734 return -EPERM;
1735 }
1736 #endif
1737
1738 bp->state = BNX2X_STATE_OPENING_WAIT4_LOAD;
1739
1740 /* Set the initial link reported state to link down */
1741 bnx2x_acquire_phy_lock(bp);
1742 memset(&bp->last_reported_link, 0, sizeof(bp->last_reported_link));
1743 __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1744 &bp->last_reported_link.link_report_flags);
1745 bnx2x_release_phy_lock(bp);
1746
1747 /* must be called before memory allocation and HW init */
1748 bnx2x_ilt_set_info(bp);
1749
1750 /*
1751 * Zero fastpath structures preserving invariants like napi, which are
1752 * allocated only once, fp index, max_cos, bp pointer.
1753 * Also set fp->disable_tpa.
1754 */
1755 DP(NETIF_MSG_IFUP, "num queues: %d", bp->num_queues);
1756 for_each_queue(bp, i)
1757 bnx2x_bz_fp(bp, i);
1758
1759
1760 /* Set the receive queues buffer size */
1761 bnx2x_set_rx_buf_size(bp);
1762
1763 if (bnx2x_alloc_mem(bp))
1764 return -ENOMEM;
1765
1766 /* As long as bnx2x_alloc_mem() may possibly update
1767 * bp->num_queues, bnx2x_set_real_num_queues() should always
1768 * come after it.
1769 */
1770 rc = bnx2x_set_real_num_queues(bp);
1771 if (rc) {
1772 BNX2X_ERR("Unable to set real_num_queues\n");
1773 LOAD_ERROR_EXIT(bp, load_error0);
1774 }
1775
1776 /* configure multi cos mappings in kernel.
1777 * this configuration may be overriden by a multi class queue discipline
1778 * or by a dcbx negotiation result.
1779 */
1780 bnx2x_setup_tc(bp->dev, bp->max_cos);
1781
1782 bnx2x_napi_enable(bp);
1783
1784 /* set pf load just before approaching the MCP */
1785 bnx2x_set_pf_load(bp);
1786
1787 /* Send LOAD_REQUEST command to MCP
1788 * Returns the type of LOAD command:
1789 * if it is the first port to be initialized
1790 * common blocks should be initialized, otherwise - not
1791 */
1792 if (!BP_NOMCP(bp)) {
1793 /* init fw_seq */
1794 bp->fw_seq =
1795 (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) &
1796 DRV_MSG_SEQ_NUMBER_MASK);
1797 BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq);
1798
1799 /* Get current FW pulse sequence */
1800 bp->fw_drv_pulse_wr_seq =
1801 (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_pulse_mb) &
1802 DRV_PULSE_SEQ_MASK);
1803 BNX2X_DEV_INFO("drv_pulse 0x%x\n", bp->fw_drv_pulse_wr_seq);
1804
1805 load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, 0);
1806 if (!load_code) {
1807 BNX2X_ERR("MCP response failure, aborting\n");
1808 rc = -EBUSY;
1809 LOAD_ERROR_EXIT(bp, load_error1);
1810 }
1811 if (load_code == FW_MSG_CODE_DRV_LOAD_REFUSED) {
1812 BNX2X_ERR("Driver load refused\n");
1813 rc = -EBUSY; /* other port in diagnostic mode */
1814 LOAD_ERROR_EXIT(bp, load_error1);
1815 }
1816 if (load_code != FW_MSG_CODE_DRV_LOAD_COMMON_CHIP &&
1817 load_code != FW_MSG_CODE_DRV_LOAD_COMMON) {
1818 /* build FW version dword */
1819 u32 my_fw = (BCM_5710_FW_MAJOR_VERSION) +
1820 (BCM_5710_FW_MINOR_VERSION << 8) +
1821 (BCM_5710_FW_REVISION_VERSION << 16) +
1822 (BCM_5710_FW_ENGINEERING_VERSION << 24);
1823
1824 /* read loaded FW from chip */
1825 u32 loaded_fw = REG_RD(bp, XSEM_REG_PRAM);
1826
1827 DP(BNX2X_MSG_SP, "loaded fw %x, my fw %x",
1828 loaded_fw, my_fw);
1829
1830 /* abort nic load if version mismatch */
1831 if (my_fw != loaded_fw) {
1832 BNX2X_ERR("bnx2x with FW %x already loaded, "
1833 "which mismatches my %x FW. aborting",
1834 loaded_fw, my_fw);
1835 rc = -EBUSY;
1836 LOAD_ERROR_EXIT(bp, load_error2);
1837 }
1838 }
1839
1840 } else {
1841 int path = BP_PATH(bp);
1842
1843 DP(NETIF_MSG_IFUP, "NO MCP - load counts[%d] %d, %d, %d\n",
1844 path, load_count[path][0], load_count[path][1],
1845 load_count[path][2]);
1846 load_count[path][0]++;
1847 load_count[path][1 + port]++;
1848 DP(NETIF_MSG_IFUP, "NO MCP - new load counts[%d] %d, %d, %d\n",
1849 path, load_count[path][0], load_count[path][1],
1850 load_count[path][2]);
1851 if (load_count[path][0] == 1)
1852 load_code = FW_MSG_CODE_DRV_LOAD_COMMON;
1853 else if (load_count[path][1 + port] == 1)
1854 load_code = FW_MSG_CODE_DRV_LOAD_PORT;
1855 else
1856 load_code = FW_MSG_CODE_DRV_LOAD_FUNCTION;
1857 }
1858
1859 if ((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
1860 (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP) ||
1861 (load_code == FW_MSG_CODE_DRV_LOAD_PORT)) {
1862 bp->port.pmf = 1;
1863 /*
1864 * We need the barrier to ensure the ordering between the
1865 * writing to bp->port.pmf here and reading it from the
1866 * bnx2x_periodic_task().
1867 */
1868 smp_mb();
1869 queue_delayed_work(bnx2x_wq, &bp->period_task, 0);
1870 } else
1871 bp->port.pmf = 0;
1872
1873 DP(NETIF_MSG_IFUP, "pmf %d\n", bp->port.pmf);
1874
1875 /* Init Function state controlling object */
1876 bnx2x__init_func_obj(bp);
1877
1878 /* Initialize HW */
1879 rc = bnx2x_init_hw(bp, load_code);
1880 if (rc) {
1881 BNX2X_ERR("HW init failed, aborting\n");
1882 bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
1883 LOAD_ERROR_EXIT(bp, load_error2);
1884 }
1885
1886 /* Connect to IRQs */
1887 rc = bnx2x_setup_irqs(bp);
1888 if (rc) {
1889 BNX2X_ERR("IRQs setup failed\n");
1890 bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
1891 LOAD_ERROR_EXIT(bp, load_error2);
1892 }
1893
1894 /* Setup NIC internals and enable interrupts */
1895 bnx2x_nic_init(bp, load_code);
1896
1897 /* Init per-function objects */
1898 bnx2x_init_bp_objs(bp);
1899
1900 if (((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
1901 (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP)) &&
1902 (bp->common.shmem2_base)) {
1903 if (SHMEM2_HAS(bp, dcc_support))
1904 SHMEM2_WR(bp, dcc_support,
1905 (SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV |
1906 SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV));
1907 }
1908
1909 bp->state = BNX2X_STATE_OPENING_WAIT4_PORT;
1910 rc = bnx2x_func_start(bp);
1911 if (rc) {
1912 BNX2X_ERR("Function start failed!\n");
1913 bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
1914 LOAD_ERROR_EXIT(bp, load_error3);
1915 }
1916
1917 /* Send LOAD_DONE command to MCP */
1918 if (!BP_NOMCP(bp)) {
1919 load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
1920 if (!load_code) {
1921 BNX2X_ERR("MCP response failure, aborting\n");
1922 rc = -EBUSY;
1923 LOAD_ERROR_EXIT(bp, load_error3);
1924 }
1925 }
1926
1927 rc = bnx2x_setup_leading(bp);
1928 if (rc) {
1929 BNX2X_ERR("Setup leading failed!\n");
1930 LOAD_ERROR_EXIT(bp, load_error3);
1931 }
1932
1933 #ifdef BCM_CNIC
1934 /* Enable Timer scan */
1935 REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 1);
1936 #endif
1937
1938 for_each_nondefault_queue(bp, i) {
1939 rc = bnx2x_setup_queue(bp, &bp->fp[i], 0);
1940 if (rc) {
1941 BNX2X_ERR("Queue setup failed\n");
1942 LOAD_ERROR_EXIT(bp, load_error4);
1943 }
1944 }
1945
1946 rc = bnx2x_init_rss_pf(bp);
1947 if (rc) {
1948 BNX2X_ERR("PF RSS init failed\n");
1949 LOAD_ERROR_EXIT(bp, load_error4);
1950 }
1951
1952 /* Now when Clients are configured we are ready to work */
1953 bp->state = BNX2X_STATE_OPEN;
1954
1955 /* Configure a ucast MAC */
1956 rc = bnx2x_set_eth_mac(bp, true);
1957 if (rc) {
1958 BNX2X_ERR("Setting Ethernet MAC failed\n");
1959 LOAD_ERROR_EXIT(bp, load_error4);
1960 }
1961
1962 if (bp->pending_max) {
1963 bnx2x_update_max_mf_config(bp, bp->pending_max);
1964 bp->pending_max = 0;
1965 }
1966
1967 if (bp->port.pmf)
1968 bnx2x_initial_phy_init(bp, load_mode);
1969
1970 /* Start fast path */
1971
1972 /* Initialize Rx filter. */
1973 netif_addr_lock_bh(bp->dev);
1974 bnx2x_set_rx_mode(bp->dev);
1975 netif_addr_unlock_bh(bp->dev);
1976
1977 /* Start the Tx */
1978 switch (load_mode) {
1979 case LOAD_NORMAL:
1980 /* Tx queue should be only reenabled */
1981 netif_tx_wake_all_queues(bp->dev);
1982 break;
1983
1984 case LOAD_OPEN:
1985 netif_tx_start_all_queues(bp->dev);
1986 smp_mb__after_clear_bit();
1987 break;
1988
1989 case LOAD_DIAG:
1990 bp->state = BNX2X_STATE_DIAG;
1991 break;
1992
1993 default:
1994 break;
1995 }
1996
1997 if (bp->port.pmf)
1998 bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0);
1999 else
2000 bnx2x__link_status_update(bp);
2001
2002 /* start the timer */
2003 mod_timer(&bp->timer, jiffies + bp->current_interval);
2004
2005 #ifdef BCM_CNIC
2006 /* re-read iscsi info */
2007 bnx2x_get_iscsi_info(bp);
2008 bnx2x_setup_cnic_irq_info(bp);
2009 if (bp->state == BNX2X_STATE_OPEN)
2010 bnx2x_cnic_notify(bp, CNIC_CTL_START_CMD);
2011 #endif
2012
2013 /* mark driver is loaded in shmem2 */
2014 if (SHMEM2_HAS(bp, drv_capabilities_flag)) {
2015 u32 val;
2016 val = SHMEM2_RD(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)]);
2017 SHMEM2_WR(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)],
2018 val | DRV_FLAGS_CAPABILITIES_LOADED_SUPPORTED |
2019 DRV_FLAGS_CAPABILITIES_LOADED_L2);
2020 }
2021
2022 /* Wait for all pending SP commands to complete */
2023 if (!bnx2x_wait_sp_comp(bp, ~0x0UL)) {
2024 BNX2X_ERR("Timeout waiting for SP elements to complete\n");
2025 bnx2x_nic_unload(bp, UNLOAD_CLOSE);
2026 return -EBUSY;
2027 }
2028
2029 bnx2x_dcbx_init(bp);
2030 return 0;
2031
2032 #ifndef BNX2X_STOP_ON_ERROR
2033 load_error4:
2034 #ifdef BCM_CNIC
2035 /* Disable Timer scan */
2036 REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 0);
2037 #endif
2038 load_error3:
2039 bnx2x_int_disable_sync(bp, 1);
2040
2041 /* Clean queueable objects */
2042 bnx2x_squeeze_objects(bp);
2043
2044 /* Free SKBs, SGEs, TPA pool and driver internals */
2045 bnx2x_free_skbs(bp);
2046 for_each_rx_queue(bp, i)
2047 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
2048
2049 /* Release IRQs */
2050 bnx2x_free_irq(bp);
2051 load_error2:
2052 if (!BP_NOMCP(bp)) {
2053 bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP, 0);
2054 bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0);
2055 }
2056
2057 bp->port.pmf = 0;
2058 load_error1:
2059 bnx2x_napi_disable(bp);
2060 /* clear pf_load status, as it was already set */
2061 bnx2x_clear_pf_load(bp);
2062 load_error0:
2063 bnx2x_free_mem(bp);
2064
2065 return rc;
2066 #endif /* ! BNX2X_STOP_ON_ERROR */
2067 }
2068
2069 /* must be called with rtnl_lock */
2070 int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
2071 {
2072 int i;
2073 bool global = false;
2074
2075 /* mark driver is unloaded in shmem2 */
2076 if (SHMEM2_HAS(bp, drv_capabilities_flag)) {
2077 u32 val;
2078 val = SHMEM2_RD(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)]);
2079 SHMEM2_WR(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)],
2080 val & ~DRV_FLAGS_CAPABILITIES_LOADED_L2);
2081 }
2082
2083 if ((bp->state == BNX2X_STATE_CLOSED) ||
2084 (bp->state == BNX2X_STATE_ERROR)) {
2085 /* We can get here if the driver has been unloaded
2086 * during parity error recovery and is either waiting for a
2087 * leader to complete or for other functions to unload and
2088 * then ifdown has been issued. In this case we want to
2089 * unload and let other functions to complete a recovery
2090 * process.
2091 */
2092 bp->recovery_state = BNX2X_RECOVERY_DONE;
2093 bp->is_leader = 0;
2094 bnx2x_release_leader_lock(bp);
2095 smp_mb();
2096
2097 DP(NETIF_MSG_IFDOWN, "Releasing a leadership...\n");
2098 BNX2X_ERR("Can't unload in closed or error state\n");
2099 return -EINVAL;
2100 }
2101
2102 /*
2103 * It's important to set the bp->state to the value different from
2104 * BNX2X_STATE_OPEN and only then stop the Tx. Otherwise bnx2x_tx_int()
2105 * may restart the Tx from the NAPI context (see bnx2x_tx_int()).
2106 */
2107 bp->state = BNX2X_STATE_CLOSING_WAIT4_HALT;
2108 smp_mb();
2109
2110 /* Stop Tx */
2111 bnx2x_tx_disable(bp);
2112
2113 #ifdef BCM_CNIC
2114 bnx2x_cnic_notify(bp, CNIC_CTL_STOP_CMD);
2115 #endif
2116
2117 bp->rx_mode = BNX2X_RX_MODE_NONE;
2118
2119 del_timer_sync(&bp->timer);
2120
2121 /* Set ALWAYS_ALIVE bit in shmem */
2122 bp->fw_drv_pulse_wr_seq |= DRV_PULSE_ALWAYS_ALIVE;
2123
2124 bnx2x_drv_pulse(bp);
2125
2126 bnx2x_stats_handle(bp, STATS_EVENT_STOP);
2127 bnx2x_save_statistics(bp);
2128
2129 /* Cleanup the chip if needed */
2130 if (unload_mode != UNLOAD_RECOVERY)
2131 bnx2x_chip_cleanup(bp, unload_mode);
2132 else {
2133 /* Send the UNLOAD_REQUEST to the MCP */
2134 bnx2x_send_unload_req(bp, unload_mode);
2135
2136 /*
2137 * Prevent transactions to host from the functions on the
2138 * engine that doesn't reset global blocks in case of global
2139 * attention once gloabl blocks are reset and gates are opened
2140 * (the engine which leader will perform the recovery
2141 * last).
2142 */
2143 if (!CHIP_IS_E1x(bp))
2144 bnx2x_pf_disable(bp);
2145
2146 /* Disable HW interrupts, NAPI */
2147 bnx2x_netif_stop(bp, 1);
2148
2149 /* Release IRQs */
2150 bnx2x_free_irq(bp);
2151
2152 /* Report UNLOAD_DONE to MCP */
2153 bnx2x_send_unload_done(bp);
2154 }
2155
2156 /*
2157 * At this stage no more interrupts will arrive so we may safly clean
2158 * the queueable objects here in case they failed to get cleaned so far.
2159 */
2160 bnx2x_squeeze_objects(bp);
2161
2162 /* There should be no more pending SP commands at this stage */
2163 bp->sp_state = 0;
2164
2165 bp->port.pmf = 0;
2166
2167 /* Free SKBs, SGEs, TPA pool and driver internals */
2168 bnx2x_free_skbs(bp);
2169 for_each_rx_queue(bp, i)
2170 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
2171
2172 bnx2x_free_mem(bp);
2173
2174 bp->state = BNX2X_STATE_CLOSED;
2175
2176 /* Check if there are pending parity attentions. If there are - set
2177 * RECOVERY_IN_PROGRESS.
2178 */
2179 if (bnx2x_chk_parity_attn(bp, &global, false)) {
2180 bnx2x_set_reset_in_progress(bp);
2181
2182 /* Set RESET_IS_GLOBAL if needed */
2183 if (global)
2184 bnx2x_set_reset_global(bp);
2185 }
2186
2187
2188 /* The last driver must disable a "close the gate" if there is no
2189 * parity attention or "process kill" pending.
2190 */
2191 if (!bnx2x_clear_pf_load(bp) && bnx2x_reset_is_done(bp, BP_PATH(bp)))
2192 bnx2x_disable_close_the_gate(bp);
2193
2194 return 0;
2195 }
2196
2197 int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state)
2198 {
2199 u16 pmcsr;
2200
2201 /* If there is no power capability, silently succeed */
2202 if (!bp->pm_cap) {
2203 BNX2X_DEV_INFO("No power capability. Breaking.\n");
2204 return 0;
2205 }
2206
2207 pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr);
2208
2209 switch (state) {
2210 case PCI_D0:
2211 pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
2212 ((pmcsr & ~PCI_PM_CTRL_STATE_MASK) |
2213 PCI_PM_CTRL_PME_STATUS));
2214
2215 if (pmcsr & PCI_PM_CTRL_STATE_MASK)
2216 /* delay required during transition out of D3hot */
2217 msleep(20);
2218 break;
2219
2220 case PCI_D3hot:
2221 /* If there are other clients above don't
2222 shut down the power */
2223 if (atomic_read(&bp->pdev->enable_cnt) != 1)
2224 return 0;
2225 /* Don't shut down the power for emulation and FPGA */
2226 if (CHIP_REV_IS_SLOW(bp))
2227 return 0;
2228
2229 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
2230 pmcsr |= 3;
2231
2232 if (bp->wol)
2233 pmcsr |= PCI_PM_CTRL_PME_ENABLE;
2234
2235 pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
2236 pmcsr);
2237
2238 /* No more memory access after this point until
2239 * device is brought back to D0.
2240 */
2241 break;
2242
2243 default:
2244 dev_err(&bp->pdev->dev, "Can't support state = %d\n", state);
2245 return -EINVAL;
2246 }
2247 return 0;
2248 }
2249
2250 /*
2251 * net_device service functions
2252 */
2253 int bnx2x_poll(struct napi_struct *napi, int budget)
2254 {
2255 int work_done = 0;
2256 u8 cos;
2257 struct bnx2x_fastpath *fp = container_of(napi, struct bnx2x_fastpath,
2258 napi);
2259 struct bnx2x *bp = fp->bp;
2260
2261 while (1) {
2262 #ifdef BNX2X_STOP_ON_ERROR
2263 if (unlikely(bp->panic)) {
2264 napi_complete(napi);
2265 return 0;
2266 }
2267 #endif
2268
2269 for_each_cos_in_tx_queue(fp, cos)
2270 if (bnx2x_tx_queue_has_work(&fp->txdata[cos]))
2271 bnx2x_tx_int(bp, &fp->txdata[cos]);
2272
2273
2274 if (bnx2x_has_rx_work(fp)) {
2275 work_done += bnx2x_rx_int(fp, budget - work_done);
2276
2277 /* must not complete if we consumed full budget */
2278 if (work_done >= budget)
2279 break;
2280 }
2281
2282 /* Fall out from the NAPI loop if needed */
2283 if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) {
2284 #ifdef BCM_CNIC
2285 /* No need to update SB for FCoE L2 ring as long as
2286 * it's connected to the default SB and the SB
2287 * has been updated when NAPI was scheduled.
2288 */
2289 if (IS_FCOE_FP(fp)) {
2290 napi_complete(napi);
2291 break;
2292 }
2293 #endif
2294
2295 bnx2x_update_fpsb_idx(fp);
2296 /* bnx2x_has_rx_work() reads the status block,
2297 * thus we need to ensure that status block indices
2298 * have been actually read (bnx2x_update_fpsb_idx)
2299 * prior to this check (bnx2x_has_rx_work) so that
2300 * we won't write the "newer" value of the status block
2301 * to IGU (if there was a DMA right after
2302 * bnx2x_has_rx_work and if there is no rmb, the memory
2303 * reading (bnx2x_update_fpsb_idx) may be postponed
2304 * to right before bnx2x_ack_sb). In this case there
2305 * will never be another interrupt until there is
2306 * another update of the status block, while there
2307 * is still unhandled work.
2308 */
2309 rmb();
2310
2311 if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) {
2312 napi_complete(napi);
2313 /* Re-enable interrupts */
2314 DP(NETIF_MSG_RX_STATUS,
2315 "Update index to %d\n", fp->fp_hc_idx);
2316 bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID,
2317 le16_to_cpu(fp->fp_hc_idx),
2318 IGU_INT_ENABLE, 1);
2319 break;
2320 }
2321 }
2322 }
2323
2324 return work_done;
2325 }
2326
2327 /* we split the first BD into headers and data BDs
2328 * to ease the pain of our fellow microcode engineers
2329 * we use one mapping for both BDs
2330 * So far this has only been observed to happen
2331 * in Other Operating Systems(TM)
2332 */
2333 static noinline u16 bnx2x_tx_split(struct bnx2x *bp,
2334 struct bnx2x_fp_txdata *txdata,
2335 struct sw_tx_bd *tx_buf,
2336 struct eth_tx_start_bd **tx_bd, u16 hlen,
2337 u16 bd_prod, int nbd)
2338 {
2339 struct eth_tx_start_bd *h_tx_bd = *tx_bd;
2340 struct eth_tx_bd *d_tx_bd;
2341 dma_addr_t mapping;
2342 int old_len = le16_to_cpu(h_tx_bd->nbytes);
2343
2344 /* first fix first BD */
2345 h_tx_bd->nbd = cpu_to_le16(nbd);
2346 h_tx_bd->nbytes = cpu_to_le16(hlen);
2347
2348 DP(NETIF_MSG_TX_QUEUED, "TSO split header size is %d (%x:%x) nbd %d\n",
2349 h_tx_bd->nbytes, h_tx_bd->addr_hi, h_tx_bd->addr_lo, h_tx_bd->nbd);
2350
2351 /* now get a new data BD
2352 * (after the pbd) and fill it */
2353 bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2354 d_tx_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
2355
2356 mapping = HILO_U64(le32_to_cpu(h_tx_bd->addr_hi),
2357 le32_to_cpu(h_tx_bd->addr_lo)) + hlen;
2358
2359 d_tx_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
2360 d_tx_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
2361 d_tx_bd->nbytes = cpu_to_le16(old_len - hlen);
2362
2363 /* this marks the BD as one that has no individual mapping */
2364 tx_buf->flags |= BNX2X_TSO_SPLIT_BD;
2365
2366 DP(NETIF_MSG_TX_QUEUED,
2367 "TSO split data size is %d (%x:%x)\n",
2368 d_tx_bd->nbytes, d_tx_bd->addr_hi, d_tx_bd->addr_lo);
2369
2370 /* update tx_bd */
2371 *tx_bd = (struct eth_tx_start_bd *)d_tx_bd;
2372
2373 return bd_prod;
2374 }
2375
2376 static inline u16 bnx2x_csum_fix(unsigned char *t_header, u16 csum, s8 fix)
2377 {
2378 if (fix > 0)
2379 csum = (u16) ~csum_fold(csum_sub(csum,
2380 csum_partial(t_header - fix, fix, 0)));
2381
2382 else if (fix < 0)
2383 csum = (u16) ~csum_fold(csum_add(csum,
2384 csum_partial(t_header, -fix, 0)));
2385
2386 return swab16(csum);
2387 }
2388
2389 static inline u32 bnx2x_xmit_type(struct bnx2x *bp, struct sk_buff *skb)
2390 {
2391 u32 rc;
2392
2393 if (skb->ip_summed != CHECKSUM_PARTIAL)
2394 rc = XMIT_PLAIN;
2395
2396 else {
2397 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6)) {
2398 rc = XMIT_CSUM_V6;
2399 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2400 rc |= XMIT_CSUM_TCP;
2401
2402 } else {
2403 rc = XMIT_CSUM_V4;
2404 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2405 rc |= XMIT_CSUM_TCP;
2406 }
2407 }
2408
2409 if (skb_is_gso_v6(skb))
2410 rc |= XMIT_GSO_V6 | XMIT_CSUM_TCP | XMIT_CSUM_V6;
2411 else if (skb_is_gso(skb))
2412 rc |= XMIT_GSO_V4 | XMIT_CSUM_V4 | XMIT_CSUM_TCP;
2413
2414 return rc;
2415 }
2416
2417 #if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3)
2418 /* check if packet requires linearization (packet is too fragmented)
2419 no need to check fragmentation if page size > 8K (there will be no
2420 violation to FW restrictions) */
2421 static int bnx2x_pkt_req_lin(struct bnx2x *bp, struct sk_buff *skb,
2422 u32 xmit_type)
2423 {
2424 int to_copy = 0;
2425 int hlen = 0;
2426 int first_bd_sz = 0;
2427
2428 /* 3 = 1 (for linear data BD) + 2 (for PBD and last BD) */
2429 if (skb_shinfo(skb)->nr_frags >= (MAX_FETCH_BD - 3)) {
2430
2431 if (xmit_type & XMIT_GSO) {
2432 unsigned short lso_mss = skb_shinfo(skb)->gso_size;
2433 /* Check if LSO packet needs to be copied:
2434 3 = 1 (for headers BD) + 2 (for PBD and last BD) */
2435 int wnd_size = MAX_FETCH_BD - 3;
2436 /* Number of windows to check */
2437 int num_wnds = skb_shinfo(skb)->nr_frags - wnd_size;
2438 int wnd_idx = 0;
2439 int frag_idx = 0;
2440 u32 wnd_sum = 0;
2441
2442 /* Headers length */
2443 hlen = (int)(skb_transport_header(skb) - skb->data) +
2444 tcp_hdrlen(skb);
2445
2446 /* Amount of data (w/o headers) on linear part of SKB*/
2447 first_bd_sz = skb_headlen(skb) - hlen;
2448
2449 wnd_sum = first_bd_sz;
2450
2451 /* Calculate the first sum - it's special */
2452 for (frag_idx = 0; frag_idx < wnd_size - 1; frag_idx++)
2453 wnd_sum +=
2454 skb_frag_size(&skb_shinfo(skb)->frags[frag_idx]);
2455
2456 /* If there was data on linear skb data - check it */
2457 if (first_bd_sz > 0) {
2458 if (unlikely(wnd_sum < lso_mss)) {
2459 to_copy = 1;
2460 goto exit_lbl;
2461 }
2462
2463 wnd_sum -= first_bd_sz;
2464 }
2465
2466 /* Others are easier: run through the frag list and
2467 check all windows */
2468 for (wnd_idx = 0; wnd_idx <= num_wnds; wnd_idx++) {
2469 wnd_sum +=
2470 skb_frag_size(&skb_shinfo(skb)->frags[wnd_idx + wnd_size - 1]);
2471
2472 if (unlikely(wnd_sum < lso_mss)) {
2473 to_copy = 1;
2474 break;
2475 }
2476 wnd_sum -=
2477 skb_frag_size(&skb_shinfo(skb)->frags[wnd_idx]);
2478 }
2479 } else {
2480 /* in non-LSO too fragmented packet should always
2481 be linearized */
2482 to_copy = 1;
2483 }
2484 }
2485
2486 exit_lbl:
2487 if (unlikely(to_copy))
2488 DP(NETIF_MSG_TX_QUEUED,
2489 "Linearization IS REQUIRED for %s packet. num_frags %d hlen %d first_bd_sz %d\n",
2490 (xmit_type & XMIT_GSO) ? "LSO" : "non-LSO",
2491 skb_shinfo(skb)->nr_frags, hlen, first_bd_sz);
2492
2493 return to_copy;
2494 }
2495 #endif
2496
2497 static inline void bnx2x_set_pbd_gso_e2(struct sk_buff *skb, u32 *parsing_data,
2498 u32 xmit_type)
2499 {
2500 *parsing_data |= (skb_shinfo(skb)->gso_size <<
2501 ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT) &
2502 ETH_TX_PARSE_BD_E2_LSO_MSS;
2503 if ((xmit_type & XMIT_GSO_V6) &&
2504 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
2505 *parsing_data |= ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR;
2506 }
2507
2508 /**
2509 * bnx2x_set_pbd_gso - update PBD in GSO case.
2510 *
2511 * @skb: packet skb
2512 * @pbd: parse BD
2513 * @xmit_type: xmit flags
2514 */
2515 static inline void bnx2x_set_pbd_gso(struct sk_buff *skb,
2516 struct eth_tx_parse_bd_e1x *pbd,
2517 u32 xmit_type)
2518 {
2519 pbd->lso_mss = cpu_to_le16(skb_shinfo(skb)->gso_size);
2520 pbd->tcp_send_seq = swab32(tcp_hdr(skb)->seq);
2521 pbd->tcp_flags = pbd_tcp_flags(skb);
2522
2523 if (xmit_type & XMIT_GSO_V4) {
2524 pbd->ip_id = swab16(ip_hdr(skb)->id);
2525 pbd->tcp_pseudo_csum =
2526 swab16(~csum_tcpudp_magic(ip_hdr(skb)->saddr,
2527 ip_hdr(skb)->daddr,
2528 0, IPPROTO_TCP, 0));
2529
2530 } else
2531 pbd->tcp_pseudo_csum =
2532 swab16(~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2533 &ipv6_hdr(skb)->daddr,
2534 0, IPPROTO_TCP, 0));
2535
2536 pbd->global_data |= ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN;
2537 }
2538
2539 /**
2540 * bnx2x_set_pbd_csum_e2 - update PBD with checksum and return header length
2541 *
2542 * @bp: driver handle
2543 * @skb: packet skb
2544 * @parsing_data: data to be updated
2545 * @xmit_type: xmit flags
2546 *
2547 * 57712 related
2548 */
2549 static inline u8 bnx2x_set_pbd_csum_e2(struct bnx2x *bp, struct sk_buff *skb,
2550 u32 *parsing_data, u32 xmit_type)
2551 {
2552 *parsing_data |=
2553 ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) <<
2554 ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W_SHIFT) &
2555 ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W;
2556
2557 if (xmit_type & XMIT_CSUM_TCP) {
2558 *parsing_data |= ((tcp_hdrlen(skb) / 4) <<
2559 ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT) &
2560 ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW;
2561
2562 return skb_transport_header(skb) + tcp_hdrlen(skb) - skb->data;
2563 } else
2564 /* We support checksum offload for TCP and UDP only.
2565 * No need to pass the UDP header length - it's a constant.
2566 */
2567 return skb_transport_header(skb) +
2568 sizeof(struct udphdr) - skb->data;
2569 }
2570
2571 static inline void bnx2x_set_sbd_csum(struct bnx2x *bp, struct sk_buff *skb,
2572 struct eth_tx_start_bd *tx_start_bd, u32 xmit_type)
2573 {
2574 tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_L4_CSUM;
2575
2576 if (xmit_type & XMIT_CSUM_V4)
2577 tx_start_bd->bd_flags.as_bitfield |=
2578 ETH_TX_BD_FLAGS_IP_CSUM;
2579 else
2580 tx_start_bd->bd_flags.as_bitfield |=
2581 ETH_TX_BD_FLAGS_IPV6;
2582
2583 if (!(xmit_type & XMIT_CSUM_TCP))
2584 tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_IS_UDP;
2585 }
2586
2587 /**
2588 * bnx2x_set_pbd_csum - update PBD with checksum and return header length
2589 *
2590 * @bp: driver handle
2591 * @skb: packet skb
2592 * @pbd: parse BD to be updated
2593 * @xmit_type: xmit flags
2594 */
2595 static inline u8 bnx2x_set_pbd_csum(struct bnx2x *bp, struct sk_buff *skb,
2596 struct eth_tx_parse_bd_e1x *pbd,
2597 u32 xmit_type)
2598 {
2599 u8 hlen = (skb_network_header(skb) - skb->data) >> 1;
2600
2601 /* for now NS flag is not used in Linux */
2602 pbd->global_data =
2603 (hlen | ((skb->protocol == cpu_to_be16(ETH_P_8021Q)) <<
2604 ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN_SHIFT));
2605
2606 pbd->ip_hlen_w = (skb_transport_header(skb) -
2607 skb_network_header(skb)) >> 1;
2608
2609 hlen += pbd->ip_hlen_w;
2610
2611 /* We support checksum offload for TCP and UDP only */
2612 if (xmit_type & XMIT_CSUM_TCP)
2613 hlen += tcp_hdrlen(skb) / 2;
2614 else
2615 hlen += sizeof(struct udphdr) / 2;
2616
2617 pbd->total_hlen_w = cpu_to_le16(hlen);
2618 hlen = hlen*2;
2619
2620 if (xmit_type & XMIT_CSUM_TCP) {
2621 pbd->tcp_pseudo_csum = swab16(tcp_hdr(skb)->check);
2622
2623 } else {
2624 s8 fix = SKB_CS_OFF(skb); /* signed! */
2625
2626 DP(NETIF_MSG_TX_QUEUED,
2627 "hlen %d fix %d csum before fix %x\n",
2628 le16_to_cpu(pbd->total_hlen_w), fix, SKB_CS(skb));
2629
2630 /* HW bug: fixup the CSUM */
2631 pbd->tcp_pseudo_csum =
2632 bnx2x_csum_fix(skb_transport_header(skb),
2633 SKB_CS(skb), fix);
2634
2635 DP(NETIF_MSG_TX_QUEUED, "csum after fix %x\n",
2636 pbd->tcp_pseudo_csum);
2637 }
2638
2639 return hlen;
2640 }
2641
2642 /* called with netif_tx_lock
2643 * bnx2x_tx_int() runs without netif_tx_lock unless it needs to call
2644 * netif_wake_queue()
2645 */
2646 netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
2647 {
2648 struct bnx2x *bp = netdev_priv(dev);
2649
2650 struct bnx2x_fastpath *fp;
2651 struct netdev_queue *txq;
2652 struct bnx2x_fp_txdata *txdata;
2653 struct sw_tx_bd *tx_buf;
2654 struct eth_tx_start_bd *tx_start_bd, *first_bd;
2655 struct eth_tx_bd *tx_data_bd, *total_pkt_bd = NULL;
2656 struct eth_tx_parse_bd_e1x *pbd_e1x = NULL;
2657 struct eth_tx_parse_bd_e2 *pbd_e2 = NULL;
2658 u32 pbd_e2_parsing_data = 0;
2659 u16 pkt_prod, bd_prod;
2660 int nbd, txq_index, fp_index, txdata_index;
2661 dma_addr_t mapping;
2662 u32 xmit_type = bnx2x_xmit_type(bp, skb);
2663 int i;
2664 u8 hlen = 0;
2665 __le16 pkt_size = 0;
2666 struct ethhdr *eth;
2667 u8 mac_type = UNICAST_ADDRESS;
2668
2669 #ifdef BNX2X_STOP_ON_ERROR
2670 if (unlikely(bp->panic))
2671 return NETDEV_TX_BUSY;
2672 #endif
2673
2674 txq_index = skb_get_queue_mapping(skb);
2675 txq = netdev_get_tx_queue(dev, txq_index);
2676
2677 BUG_ON(txq_index >= MAX_ETH_TXQ_IDX(bp) + FCOE_PRESENT);
2678
2679 /* decode the fastpath index and the cos index from the txq */
2680 fp_index = TXQ_TO_FP(txq_index);
2681 txdata_index = TXQ_TO_COS(txq_index);
2682
2683 #ifdef BCM_CNIC
2684 /*
2685 * Override the above for the FCoE queue:
2686 * - FCoE fp entry is right after the ETH entries.
2687 * - FCoE L2 queue uses bp->txdata[0] only.
2688 */
2689 if (unlikely(!NO_FCOE(bp) && (txq_index ==
2690 bnx2x_fcoe_tx(bp, txq_index)))) {
2691 fp_index = FCOE_IDX;
2692 txdata_index = 0;
2693 }
2694 #endif
2695
2696 /* enable this debug print to view the transmission queue being used
2697 DP(NETIF_MSG_TX_QUEUED, "indices: txq %d, fp %d, txdata %d\n",
2698 txq_index, fp_index, txdata_index); */
2699
2700 /* locate the fastpath and the txdata */
2701 fp = &bp->fp[fp_index];
2702 txdata = &fp->txdata[txdata_index];
2703
2704 /* enable this debug print to view the tranmission details
2705 DP(NETIF_MSG_TX_QUEUED,
2706 "transmitting packet cid %d fp index %d txdata_index %d tx_data ptr %p fp pointer %p\n",
2707 txdata->cid, fp_index, txdata_index, txdata, fp); */
2708
2709 if (unlikely(bnx2x_tx_avail(bp, txdata) <
2710 (skb_shinfo(skb)->nr_frags + 3))) {
2711 fp->eth_q_stats.driver_xoff++;
2712 netif_tx_stop_queue(txq);
2713 BNX2X_ERR("BUG! Tx ring full when queue awake!\n");
2714 return NETDEV_TX_BUSY;
2715 }
2716
2717 DP(NETIF_MSG_TX_QUEUED,
2718 "queue[%d]: SKB: summed %x protocol %x protocol(%x,%x) gso type %x xmit_type %x\n",
2719 txq_index, skb->ip_summed, skb->protocol, ipv6_hdr(skb)->nexthdr,
2720 ip_hdr(skb)->protocol, skb_shinfo(skb)->gso_type, xmit_type);
2721
2722 eth = (struct ethhdr *)skb->data;
2723
2724 /* set flag according to packet type (UNICAST_ADDRESS is default)*/
2725 if (unlikely(is_multicast_ether_addr(eth->h_dest))) {
2726 if (is_broadcast_ether_addr(eth->h_dest))
2727 mac_type = BROADCAST_ADDRESS;
2728 else
2729 mac_type = MULTICAST_ADDRESS;
2730 }
2731
2732 #if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3)
2733 /* First, check if we need to linearize the skb (due to FW
2734 restrictions). No need to check fragmentation if page size > 8K
2735 (there will be no violation to FW restrictions) */
2736 if (bnx2x_pkt_req_lin(bp, skb, xmit_type)) {
2737 /* Statistics of linearization */
2738 bp->lin_cnt++;
2739 if (skb_linearize(skb) != 0) {
2740 DP(NETIF_MSG_TX_QUEUED,
2741 "SKB linearization failed - silently dropping this SKB\n");
2742 dev_kfree_skb_any(skb);
2743 return NETDEV_TX_OK;
2744 }
2745 }
2746 #endif
2747 /* Map skb linear data for DMA */
2748 mapping = dma_map_single(&bp->pdev->dev, skb->data,
2749 skb_headlen(skb), DMA_TO_DEVICE);
2750 if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
2751 DP(NETIF_MSG_TX_QUEUED,
2752 "SKB mapping failed - silently dropping this SKB\n");
2753 dev_kfree_skb_any(skb);
2754 return NETDEV_TX_OK;
2755 }
2756 /*
2757 Please read carefully. First we use one BD which we mark as start,
2758 then we have a parsing info BD (used for TSO or xsum),
2759 and only then we have the rest of the TSO BDs.
2760 (don't forget to mark the last one as last,
2761 and to unmap only AFTER you write to the BD ...)
2762 And above all, all pdb sizes are in words - NOT DWORDS!
2763 */
2764
2765 /* get current pkt produced now - advance it just before sending packet
2766 * since mapping of pages may fail and cause packet to be dropped
2767 */
2768 pkt_prod = txdata->tx_pkt_prod;
2769 bd_prod = TX_BD(txdata->tx_bd_prod);
2770
2771 /* get a tx_buf and first BD
2772 * tx_start_bd may be changed during SPLIT,
2773 * but first_bd will always stay first
2774 */
2775 tx_buf = &txdata->tx_buf_ring[TX_BD(pkt_prod)];
2776 tx_start_bd = &txdata->tx_desc_ring[bd_prod].start_bd;
2777 first_bd = tx_start_bd;
2778
2779 tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
2780 SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_ETH_ADDR_TYPE,
2781 mac_type);
2782
2783 /* header nbd */
2784 SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_HDR_NBDS, 1);
2785
2786 /* remember the first BD of the packet */
2787 tx_buf->first_bd = txdata->tx_bd_prod;
2788 tx_buf->skb = skb;
2789 tx_buf->flags = 0;
2790
2791 DP(NETIF_MSG_TX_QUEUED,
2792 "sending pkt %u @%p next_idx %u bd %u @%p\n",
2793 pkt_prod, tx_buf, txdata->tx_pkt_prod, bd_prod, tx_start_bd);
2794
2795 if (vlan_tx_tag_present(skb)) {
2796 tx_start_bd->vlan_or_ethertype =
2797 cpu_to_le16(vlan_tx_tag_get(skb));
2798 tx_start_bd->bd_flags.as_bitfield |=
2799 (X_ETH_OUTBAND_VLAN << ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT);
2800 } else
2801 tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod);
2802
2803 /* turn on parsing and get a BD */
2804 bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2805
2806 if (xmit_type & XMIT_CSUM)
2807 bnx2x_set_sbd_csum(bp, skb, tx_start_bd, xmit_type);
2808
2809 if (!CHIP_IS_E1x(bp)) {
2810 pbd_e2 = &txdata->tx_desc_ring[bd_prod].parse_bd_e2;
2811 memset(pbd_e2, 0, sizeof(struct eth_tx_parse_bd_e2));
2812 /* Set PBD in checksum offload case */
2813 if (xmit_type & XMIT_CSUM)
2814 hlen = bnx2x_set_pbd_csum_e2(bp, skb,
2815 &pbd_e2_parsing_data,
2816 xmit_type);
2817 if (IS_MF_SI(bp)) {
2818 /*
2819 * fill in the MAC addresses in the PBD - for local
2820 * switching
2821 */
2822 bnx2x_set_fw_mac_addr(&pbd_e2->src_mac_addr_hi,
2823 &pbd_e2->src_mac_addr_mid,
2824 &pbd_e2->src_mac_addr_lo,
2825 eth->h_source);
2826 bnx2x_set_fw_mac_addr(&pbd_e2->dst_mac_addr_hi,
2827 &pbd_e2->dst_mac_addr_mid,
2828 &pbd_e2->dst_mac_addr_lo,
2829 eth->h_dest);
2830 }
2831 } else {
2832 pbd_e1x = &txdata->tx_desc_ring[bd_prod].parse_bd_e1x;
2833 memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x));
2834 /* Set PBD in checksum offload case */
2835 if (xmit_type & XMIT_CSUM)
2836 hlen = bnx2x_set_pbd_csum(bp, skb, pbd_e1x, xmit_type);
2837
2838 }
2839
2840 /* Setup the data pointer of the first BD of the packet */
2841 tx_start_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
2842 tx_start_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
2843 nbd = 2; /* start_bd + pbd + frags (updated when pages are mapped) */
2844 tx_start_bd->nbytes = cpu_to_le16(skb_headlen(skb));
2845 pkt_size = tx_start_bd->nbytes;
2846
2847 DP(NETIF_MSG_TX_QUEUED,
2848 "first bd @%p addr (%x:%x) nbd %d nbytes %d flags %x vlan %x\n",
2849 tx_start_bd, tx_start_bd->addr_hi, tx_start_bd->addr_lo,
2850 le16_to_cpu(tx_start_bd->nbd), le16_to_cpu(tx_start_bd->nbytes),
2851 tx_start_bd->bd_flags.as_bitfield,
2852 le16_to_cpu(tx_start_bd->vlan_or_ethertype));
2853
2854 if (xmit_type & XMIT_GSO) {
2855
2856 DP(NETIF_MSG_TX_QUEUED,
2857 "TSO packet len %d hlen %d total len %d tso size %d\n",
2858 skb->len, hlen, skb_headlen(skb),
2859 skb_shinfo(skb)->gso_size);
2860
2861 tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_SW_LSO;
2862
2863 if (unlikely(skb_headlen(skb) > hlen))
2864 bd_prod = bnx2x_tx_split(bp, txdata, tx_buf,
2865 &tx_start_bd, hlen,
2866 bd_prod, ++nbd);
2867 if (!CHIP_IS_E1x(bp))
2868 bnx2x_set_pbd_gso_e2(skb, &pbd_e2_parsing_data,
2869 xmit_type);
2870 else
2871 bnx2x_set_pbd_gso(skb, pbd_e1x, xmit_type);
2872 }
2873
2874 /* Set the PBD's parsing_data field if not zero
2875 * (for the chips newer than 57711).
2876 */
2877 if (pbd_e2_parsing_data)
2878 pbd_e2->parsing_data = cpu_to_le32(pbd_e2_parsing_data);
2879
2880 tx_data_bd = (struct eth_tx_bd *)tx_start_bd;
2881
2882 /* Handle fragmented skb */
2883 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2884 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2885
2886 mapping = skb_frag_dma_map(&bp->pdev->dev, frag, 0,
2887 skb_frag_size(frag), DMA_TO_DEVICE);
2888 if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
2889 unsigned int pkts_compl = 0, bytes_compl = 0;
2890
2891 DP(NETIF_MSG_TX_QUEUED,
2892 "Unable to map page - dropping packet...\n");
2893
2894 /* we need unmap all buffers already mapped
2895 * for this SKB;
2896 * first_bd->nbd need to be properly updated
2897 * before call to bnx2x_free_tx_pkt
2898 */
2899 first_bd->nbd = cpu_to_le16(nbd);
2900 bnx2x_free_tx_pkt(bp, txdata,
2901 TX_BD(txdata->tx_pkt_prod),
2902 &pkts_compl, &bytes_compl);
2903 return NETDEV_TX_OK;
2904 }
2905
2906 bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2907 tx_data_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
2908 if (total_pkt_bd == NULL)
2909 total_pkt_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
2910
2911 tx_data_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
2912 tx_data_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
2913 tx_data_bd->nbytes = cpu_to_le16(skb_frag_size(frag));
2914 le16_add_cpu(&pkt_size, skb_frag_size(frag));
2915 nbd++;
2916
2917 DP(NETIF_MSG_TX_QUEUED,
2918 "frag %d bd @%p addr (%x:%x) nbytes %d\n",
2919 i, tx_data_bd, tx_data_bd->addr_hi, tx_data_bd->addr_lo,
2920 le16_to_cpu(tx_data_bd->nbytes));
2921 }
2922
2923 DP(NETIF_MSG_TX_QUEUED, "last bd @%p\n", tx_data_bd);
2924
2925 /* update with actual num BDs */
2926 first_bd->nbd = cpu_to_le16(nbd);
2927
2928 bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2929
2930 /* now send a tx doorbell, counting the next BD
2931 * if the packet contains or ends with it
2932 */
2933 if (TX_BD_POFF(bd_prod) < nbd)
2934 nbd++;
2935
2936 /* total_pkt_bytes should be set on the first data BD if
2937 * it's not an LSO packet and there is more than one
2938 * data BD. In this case pkt_size is limited by an MTU value.
2939 * However we prefer to set it for an LSO packet (while we don't
2940 * have to) in order to save some CPU cycles in a none-LSO
2941 * case, when we much more care about them.
2942 */
2943 if (total_pkt_bd != NULL)
2944 total_pkt_bd->total_pkt_bytes = pkt_size;
2945
2946 if (pbd_e1x)
2947 DP(NETIF_MSG_TX_QUEUED,
2948 "PBD (E1X) @%p ip_data %x ip_hlen %u ip_id %u lso_mss %u tcp_flags %x xsum %x seq %u hlen %u\n",
2949 pbd_e1x, pbd_e1x->global_data, pbd_e1x->ip_hlen_w,
2950 pbd_e1x->ip_id, pbd_e1x->lso_mss, pbd_e1x->tcp_flags,
2951 pbd_e1x->tcp_pseudo_csum, pbd_e1x->tcp_send_seq,
2952 le16_to_cpu(pbd_e1x->total_hlen_w));
2953 if (pbd_e2)
2954 DP(NETIF_MSG_TX_QUEUED,
2955 "PBD (E2) @%p dst %x %x %x src %x %x %x parsing_data %x\n",
2956 pbd_e2, pbd_e2->dst_mac_addr_hi, pbd_e2->dst_mac_addr_mid,
2957 pbd_e2->dst_mac_addr_lo, pbd_e2->src_mac_addr_hi,
2958 pbd_e2->src_mac_addr_mid, pbd_e2->src_mac_addr_lo,
2959 pbd_e2->parsing_data);
2960 DP(NETIF_MSG_TX_QUEUED, "doorbell: nbd %d bd %u\n", nbd, bd_prod);
2961
2962 netdev_tx_sent_queue(txq, skb->len);
2963
2964 txdata->tx_pkt_prod++;
2965 /*
2966 * Make sure that the BD data is updated before updating the producer
2967 * since FW might read the BD right after the producer is updated.
2968 * This is only applicable for weak-ordered memory model archs such
2969 * as IA-64. The following barrier is also mandatory since FW will
2970 * assumes packets must have BDs.
2971 */
2972 wmb();
2973
2974 txdata->tx_db.data.prod += nbd;
2975 barrier();
2976
2977 DOORBELL(bp, txdata->cid, txdata->tx_db.raw);
2978
2979 mmiowb();
2980
2981 txdata->tx_bd_prod += nbd;
2982
2983 if (unlikely(bnx2x_tx_avail(bp, txdata) < MAX_SKB_FRAGS + 3)) {
2984 netif_tx_stop_queue(txq);
2985
2986 /* paired memory barrier is in bnx2x_tx_int(), we have to keep
2987 * ordering of set_bit() in netif_tx_stop_queue() and read of
2988 * fp->bd_tx_cons */
2989 smp_mb();
2990
2991 fp->eth_q_stats.driver_xoff++;
2992 if (bnx2x_tx_avail(bp, txdata) >= MAX_SKB_FRAGS + 3)
2993 netif_tx_wake_queue(txq);
2994 }
2995 txdata->tx_pkt++;
2996
2997 return NETDEV_TX_OK;
2998 }
2999
3000 /**
3001 * bnx2x_setup_tc - routine to configure net_device for multi tc
3002 *
3003 * @netdev: net device to configure
3004 * @tc: number of traffic classes to enable
3005 *
3006 * callback connected to the ndo_setup_tc function pointer
3007 */
3008 int bnx2x_setup_tc(struct net_device *dev, u8 num_tc)
3009 {
3010 int cos, prio, count, offset;
3011 struct bnx2x *bp = netdev_priv(dev);
3012
3013 /* setup tc must be called under rtnl lock */
3014 ASSERT_RTNL();
3015
3016 /* no traffic classes requested. aborting */
3017 if (!num_tc) {
3018 netdev_reset_tc(dev);
3019 return 0;
3020 }
3021
3022 /* requested to support too many traffic classes */
3023 if (num_tc > bp->max_cos) {
3024 BNX2X_ERR("support for too many traffic classes requested: %d. max supported is %d\n",
3025 num_tc, bp->max_cos);
3026 return -EINVAL;
3027 }
3028
3029 /* declare amount of supported traffic classes */
3030 if (netdev_set_num_tc(dev, num_tc)) {
3031 BNX2X_ERR("failed to declare %d traffic classes\n", num_tc);
3032 return -EINVAL;
3033 }
3034
3035 /* configure priority to traffic class mapping */
3036 for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) {
3037 netdev_set_prio_tc_map(dev, prio, bp->prio_to_cos[prio]);
3038 DP(BNX2X_MSG_SP | NETIF_MSG_IFUP,
3039 "mapping priority %d to tc %d\n",
3040 prio, bp->prio_to_cos[prio]);
3041 }
3042
3043
3044 /* Use this configuration to diffrentiate tc0 from other COSes
3045 This can be used for ets or pfc, and save the effort of setting
3046 up a multio class queue disc or negotiating DCBX with a switch
3047 netdev_set_prio_tc_map(dev, 0, 0);
3048 DP(BNX2X_MSG_SP, "mapping priority %d to tc %d\n", 0, 0);
3049 for (prio = 1; prio < 16; prio++) {
3050 netdev_set_prio_tc_map(dev, prio, 1);
3051 DP(BNX2X_MSG_SP, "mapping priority %d to tc %d\n", prio, 1);
3052 } */
3053
3054 /* configure traffic class to transmission queue mapping */
3055 for (cos = 0; cos < bp->max_cos; cos++) {
3056 count = BNX2X_NUM_ETH_QUEUES(bp);
3057 offset = cos * MAX_TXQS_PER_COS;
3058 netdev_set_tc_queue(dev, cos, count, offset);
3059 DP(BNX2X_MSG_SP | NETIF_MSG_IFUP,
3060 "mapping tc %d to offset %d count %d\n",
3061 cos, offset, count);
3062 }
3063
3064 return 0;
3065 }
3066
3067 /* called with rtnl_lock */
3068 int bnx2x_change_mac_addr(struct net_device *dev, void *p)
3069 {
3070 struct sockaddr *addr = p;
3071 struct bnx2x *bp = netdev_priv(dev);
3072 int rc = 0;
3073
3074 if (!bnx2x_is_valid_ether_addr(bp, addr->sa_data)) {
3075 BNX2X_ERR("Requested MAC address is not valid\n");
3076 return -EINVAL;
3077 }
3078
3079 #ifdef BCM_CNIC
3080 if (IS_MF_ISCSI_SD(bp) && !is_zero_ether_addr(addr->sa_data)) {
3081 BNX2X_ERR("Can't configure non-zero address on iSCSI or FCoE functions in MF-SD mode\n");
3082 return -EINVAL;
3083 }
3084 #endif
3085
3086 if (netif_running(dev)) {
3087 rc = bnx2x_set_eth_mac(bp, false);
3088 if (rc)
3089 return rc;
3090 }
3091
3092 dev->addr_assign_type &= ~NET_ADDR_RANDOM;
3093 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
3094
3095 if (netif_running(dev))
3096 rc = bnx2x_set_eth_mac(bp, true);
3097
3098 return rc;
3099 }
3100
3101 static void bnx2x_free_fp_mem_at(struct bnx2x *bp, int fp_index)
3102 {
3103 union host_hc_status_block *sb = &bnx2x_fp(bp, fp_index, status_blk);
3104 struct bnx2x_fastpath *fp = &bp->fp[fp_index];
3105 u8 cos;
3106
3107 /* Common */
3108 #ifdef BCM_CNIC
3109 if (IS_FCOE_IDX(fp_index)) {
3110 memset(sb, 0, sizeof(union host_hc_status_block));
3111 fp->status_blk_mapping = 0;
3112
3113 } else {
3114 #endif
3115 /* status blocks */
3116 if (!CHIP_IS_E1x(bp))
3117 BNX2X_PCI_FREE(sb->e2_sb,
3118 bnx2x_fp(bp, fp_index,
3119 status_blk_mapping),
3120 sizeof(struct host_hc_status_block_e2));
3121 else
3122 BNX2X_PCI_FREE(sb->e1x_sb,
3123 bnx2x_fp(bp, fp_index,
3124 status_blk_mapping),
3125 sizeof(struct host_hc_status_block_e1x));
3126 #ifdef BCM_CNIC
3127 }
3128 #endif
3129 /* Rx */
3130 if (!skip_rx_queue(bp, fp_index)) {
3131 bnx2x_free_rx_bds(fp);
3132
3133 /* fastpath rx rings: rx_buf rx_desc rx_comp */
3134 BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_buf_ring));
3135 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_desc_ring),
3136 bnx2x_fp(bp, fp_index, rx_desc_mapping),
3137 sizeof(struct eth_rx_bd) * NUM_RX_BD);
3138
3139 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_comp_ring),
3140 bnx2x_fp(bp, fp_index, rx_comp_mapping),
3141 sizeof(struct eth_fast_path_rx_cqe) *
3142 NUM_RCQ_BD);
3143
3144 /* SGE ring */
3145 BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_page_ring));
3146 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_sge_ring),
3147 bnx2x_fp(bp, fp_index, rx_sge_mapping),
3148 BCM_PAGE_SIZE * NUM_RX_SGE_PAGES);
3149 }
3150
3151 /* Tx */
3152 if (!skip_tx_queue(bp, fp_index)) {
3153 /* fastpath tx rings: tx_buf tx_desc */
3154 for_each_cos_in_tx_queue(fp, cos) {
3155 struct bnx2x_fp_txdata *txdata = &fp->txdata[cos];
3156
3157 DP(NETIF_MSG_IFDOWN,
3158 "freeing tx memory of fp %d cos %d cid %d\n",
3159 fp_index, cos, txdata->cid);
3160
3161 BNX2X_FREE(txdata->tx_buf_ring);
3162 BNX2X_PCI_FREE(txdata->tx_desc_ring,
3163 txdata->tx_desc_mapping,
3164 sizeof(union eth_tx_bd_types) * NUM_TX_BD);
3165 }
3166 }
3167 /* end of fastpath */
3168 }
3169
3170 void bnx2x_free_fp_mem(struct bnx2x *bp)
3171 {
3172 int i;
3173 for_each_queue(bp, i)
3174 bnx2x_free_fp_mem_at(bp, i);
3175 }
3176
3177 static inline void set_sb_shortcuts(struct bnx2x *bp, int index)
3178 {
3179 union host_hc_status_block status_blk = bnx2x_fp(bp, index, status_blk);
3180 if (!CHIP_IS_E1x(bp)) {
3181 bnx2x_fp(bp, index, sb_index_values) =
3182 (__le16 *)status_blk.e2_sb->sb.index_values;
3183 bnx2x_fp(bp, index, sb_running_index) =
3184 (__le16 *)status_blk.e2_sb->sb.running_index;
3185 } else {
3186 bnx2x_fp(bp, index, sb_index_values) =
3187 (__le16 *)status_blk.e1x_sb->sb.index_values;
3188 bnx2x_fp(bp, index, sb_running_index) =
3189 (__le16 *)status_blk.e1x_sb->sb.running_index;
3190 }
3191 }
3192
3193 static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index)
3194 {
3195 union host_hc_status_block *sb;
3196 struct bnx2x_fastpath *fp = &bp->fp[index];
3197 int ring_size = 0;
3198 u8 cos;
3199 int rx_ring_size = 0;
3200
3201 #ifdef BCM_CNIC
3202 if (!bp->rx_ring_size && IS_MF_ISCSI_SD(bp)) {
3203 rx_ring_size = MIN_RX_SIZE_NONTPA;
3204 bp->rx_ring_size = rx_ring_size;
3205 } else
3206 #endif
3207 if (!bp->rx_ring_size) {
3208 u32 cfg = SHMEM_RD(bp,
3209 dev_info.port_hw_config[BP_PORT(bp)].default_cfg);
3210
3211 rx_ring_size = MAX_RX_AVAIL/BNX2X_NUM_RX_QUEUES(bp);
3212
3213 /* Dercease ring size for 1G functions */
3214 if ((cfg & PORT_HW_CFG_NET_SERDES_IF_MASK) ==
3215 PORT_HW_CFG_NET_SERDES_IF_SGMII)
3216 rx_ring_size /= 10;
3217
3218 /* allocate at least number of buffers required by FW */
3219 rx_ring_size = max_t(int, bp->disable_tpa ? MIN_RX_SIZE_NONTPA :
3220 MIN_RX_SIZE_TPA, rx_ring_size);
3221
3222 bp->rx_ring_size = rx_ring_size;
3223 } else /* if rx_ring_size specified - use it */
3224 rx_ring_size = bp->rx_ring_size;
3225
3226 /* Common */
3227 sb = &bnx2x_fp(bp, index, status_blk);
3228 #ifdef BCM_CNIC
3229 if (!IS_FCOE_IDX(index)) {
3230 #endif
3231 /* status blocks */
3232 if (!CHIP_IS_E1x(bp))
3233 BNX2X_PCI_ALLOC(sb->e2_sb,
3234 &bnx2x_fp(bp, index, status_blk_mapping),
3235 sizeof(struct host_hc_status_block_e2));
3236 else
3237 BNX2X_PCI_ALLOC(sb->e1x_sb,
3238 &bnx2x_fp(bp, index, status_blk_mapping),
3239 sizeof(struct host_hc_status_block_e1x));
3240 #ifdef BCM_CNIC
3241 }
3242 #endif
3243
3244 /* FCoE Queue uses Default SB and doesn't ACK the SB, thus no need to
3245 * set shortcuts for it.
3246 */
3247 if (!IS_FCOE_IDX(index))
3248 set_sb_shortcuts(bp, index);
3249
3250 /* Tx */
3251 if (!skip_tx_queue(bp, index)) {
3252 /* fastpath tx rings: tx_buf tx_desc */
3253 for_each_cos_in_tx_queue(fp, cos) {
3254 struct bnx2x_fp_txdata *txdata = &fp->txdata[cos];
3255
3256 DP(NETIF_MSG_IFUP,
3257 "allocating tx memory of fp %d cos %d\n",
3258 index, cos);
3259
3260 BNX2X_ALLOC(txdata->tx_buf_ring,
3261 sizeof(struct sw_tx_bd) * NUM_TX_BD);
3262 BNX2X_PCI_ALLOC(txdata->tx_desc_ring,
3263 &txdata->tx_desc_mapping,
3264 sizeof(union eth_tx_bd_types) * NUM_TX_BD);
3265 }
3266 }
3267
3268 /* Rx */
3269 if (!skip_rx_queue(bp, index)) {
3270 /* fastpath rx rings: rx_buf rx_desc rx_comp */
3271 BNX2X_ALLOC(bnx2x_fp(bp, index, rx_buf_ring),
3272 sizeof(struct sw_rx_bd) * NUM_RX_BD);
3273 BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_desc_ring),
3274 &bnx2x_fp(bp, index, rx_desc_mapping),
3275 sizeof(struct eth_rx_bd) * NUM_RX_BD);
3276
3277 BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_comp_ring),
3278 &bnx2x_fp(bp, index, rx_comp_mapping),
3279 sizeof(struct eth_fast_path_rx_cqe) *
3280 NUM_RCQ_BD);
3281
3282 /* SGE ring */
3283 BNX2X_ALLOC(bnx2x_fp(bp, index, rx_page_ring),
3284 sizeof(struct sw_rx_page) * NUM_RX_SGE);
3285 BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_sge_ring),
3286 &bnx2x_fp(bp, index, rx_sge_mapping),
3287 BCM_PAGE_SIZE * NUM_RX_SGE_PAGES);
3288 /* RX BD ring */
3289 bnx2x_set_next_page_rx_bd(fp);
3290
3291 /* CQ ring */
3292 bnx2x_set_next_page_rx_cq(fp);
3293
3294 /* BDs */
3295 ring_size = bnx2x_alloc_rx_bds(fp, rx_ring_size);
3296 if (ring_size < rx_ring_size)
3297 goto alloc_mem_err;
3298 }
3299
3300 return 0;
3301
3302 /* handles low memory cases */
3303 alloc_mem_err:
3304 BNX2X_ERR("Unable to allocate full memory for queue %d (size %d)\n",
3305 index, ring_size);
3306 /* FW will drop all packets if queue is not big enough,
3307 * In these cases we disable the queue
3308 * Min size is different for OOO, TPA and non-TPA queues
3309 */
3310 if (ring_size < (fp->disable_tpa ?
3311 MIN_RX_SIZE_NONTPA : MIN_RX_SIZE_TPA)) {
3312 /* release memory allocated for this queue */
3313 bnx2x_free_fp_mem_at(bp, index);
3314 return -ENOMEM;
3315 }
3316 return 0;
3317 }
3318
3319 int bnx2x_alloc_fp_mem(struct bnx2x *bp)
3320 {
3321 int i;
3322
3323 /**
3324 * 1. Allocate FP for leading - fatal if error
3325 * 2. {CNIC} Allocate FCoE FP - fatal if error
3326 * 3. {CNIC} Allocate OOO + FWD - disable OOO if error
3327 * 4. Allocate RSS - fix number of queues if error
3328 */
3329
3330 /* leading */
3331 if (bnx2x_alloc_fp_mem_at(bp, 0))
3332 return -ENOMEM;
3333
3334 #ifdef BCM_CNIC
3335 if (!NO_FCOE(bp))
3336 /* FCoE */
3337 if (bnx2x_alloc_fp_mem_at(bp, FCOE_IDX))
3338 /* we will fail load process instead of mark
3339 * NO_FCOE_FLAG
3340 */
3341 return -ENOMEM;
3342 #endif
3343
3344 /* RSS */
3345 for_each_nondefault_eth_queue(bp, i)
3346 if (bnx2x_alloc_fp_mem_at(bp, i))
3347 break;
3348
3349 /* handle memory failures */
3350 if (i != BNX2X_NUM_ETH_QUEUES(bp)) {
3351 int delta = BNX2X_NUM_ETH_QUEUES(bp) - i;
3352
3353 WARN_ON(delta < 0);
3354 #ifdef BCM_CNIC
3355 /**
3356 * move non eth FPs next to last eth FP
3357 * must be done in that order
3358 * FCOE_IDX < FWD_IDX < OOO_IDX
3359 */
3360
3361 /* move FCoE fp even NO_FCOE_FLAG is on */
3362 bnx2x_move_fp(bp, FCOE_IDX, FCOE_IDX - delta);
3363 #endif
3364 bp->num_queues -= delta;
3365 BNX2X_ERR("Adjusted num of queues from %d to %d\n",
3366 bp->num_queues + delta, bp->num_queues);
3367 }
3368
3369 return 0;
3370 }
3371
3372 void bnx2x_free_mem_bp(struct bnx2x *bp)
3373 {
3374 kfree(bp->fp);
3375 kfree(bp->msix_table);
3376 kfree(bp->ilt);
3377 }
3378
3379 int __devinit bnx2x_alloc_mem_bp(struct bnx2x *bp)
3380 {
3381 struct bnx2x_fastpath *fp;
3382 struct msix_entry *tbl;
3383 struct bnx2x_ilt *ilt;
3384 int msix_table_size = 0;
3385
3386 /*
3387 * The biggest MSI-X table we might need is as a maximum number of fast
3388 * path IGU SBs plus default SB (for PF).
3389 */
3390 msix_table_size = bp->igu_sb_cnt + 1;
3391
3392 /* fp array: RSS plus CNIC related L2 queues */
3393 fp = kcalloc(BNX2X_MAX_RSS_COUNT(bp) + NON_ETH_CONTEXT_USE,
3394 sizeof(*fp), GFP_KERNEL);
3395 if (!fp)
3396 goto alloc_err;
3397 bp->fp = fp;
3398
3399 /* msix table */
3400 tbl = kcalloc(msix_table_size, sizeof(*tbl), GFP_KERNEL);
3401 if (!tbl)
3402 goto alloc_err;
3403 bp->msix_table = tbl;
3404
3405 /* ilt */
3406 ilt = kzalloc(sizeof(*ilt), GFP_KERNEL);
3407 if (!ilt)
3408 goto alloc_err;
3409 bp->ilt = ilt;
3410
3411 return 0;
3412 alloc_err:
3413 bnx2x_free_mem_bp(bp);
3414 return -ENOMEM;
3415
3416 }
3417
3418 int bnx2x_reload_if_running(struct net_device *dev)
3419 {
3420 struct bnx2x *bp = netdev_priv(dev);
3421
3422 if (unlikely(!netif_running(dev)))
3423 return 0;
3424
3425 bnx2x_nic_unload(bp, UNLOAD_NORMAL);
3426 return bnx2x_nic_load(bp, LOAD_NORMAL);
3427 }
3428
3429 int bnx2x_get_cur_phy_idx(struct bnx2x *bp)
3430 {
3431 u32 sel_phy_idx = 0;
3432 if (bp->link_params.num_phys <= 1)
3433 return INT_PHY;
3434
3435 if (bp->link_vars.link_up) {
3436 sel_phy_idx = EXT_PHY1;
3437 /* In case link is SERDES, check if the EXT_PHY2 is the one */
3438 if ((bp->link_vars.link_status & LINK_STATUS_SERDES_LINK) &&
3439 (bp->link_params.phy[EXT_PHY2].supported & SUPPORTED_FIBRE))
3440 sel_phy_idx = EXT_PHY2;
3441 } else {
3442
3443 switch (bnx2x_phy_selection(&bp->link_params)) {
3444 case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT:
3445 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY:
3446 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY:
3447 sel_phy_idx = EXT_PHY1;
3448 break;
3449 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY:
3450 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY:
3451 sel_phy_idx = EXT_PHY2;
3452 break;
3453 }
3454 }
3455
3456 return sel_phy_idx;
3457
3458 }
3459 int bnx2x_get_link_cfg_idx(struct bnx2x *bp)
3460 {
3461 u32 sel_phy_idx = bnx2x_get_cur_phy_idx(bp);
3462 /*
3463 * The selected actived PHY is always after swapping (in case PHY
3464 * swapping is enabled). So when swapping is enabled, we need to reverse
3465 * the configuration
3466 */
3467
3468 if (bp->link_params.multi_phy_config &
3469 PORT_HW_CFG_PHY_SWAPPED_ENABLED) {
3470 if (sel_phy_idx == EXT_PHY1)
3471 sel_phy_idx = EXT_PHY2;
3472 else if (sel_phy_idx == EXT_PHY2)
3473 sel_phy_idx = EXT_PHY1;
3474 }
3475 return LINK_CONFIG_IDX(sel_phy_idx);
3476 }
3477
3478 #if defined(NETDEV_FCOE_WWNN) && defined(BCM_CNIC)
3479 int bnx2x_fcoe_get_wwn(struct net_device *dev, u64 *wwn, int type)
3480 {
3481 struct bnx2x *bp = netdev_priv(dev);
3482 struct cnic_eth_dev *cp = &bp->cnic_eth_dev;
3483
3484 switch (type) {
3485 case NETDEV_FCOE_WWNN:
3486 *wwn = HILO_U64(cp->fcoe_wwn_node_name_hi,
3487 cp->fcoe_wwn_node_name_lo);
3488 break;
3489 case NETDEV_FCOE_WWPN:
3490 *wwn = HILO_U64(cp->fcoe_wwn_port_name_hi,
3491 cp->fcoe_wwn_port_name_lo);
3492 break;
3493 default:
3494 BNX2X_ERR("Wrong WWN type requested - %d\n", type);
3495 return -EINVAL;
3496 }
3497
3498 return 0;
3499 }
3500 #endif
3501
3502 /* called with rtnl_lock */
3503 int bnx2x_change_mtu(struct net_device *dev, int new_mtu)
3504 {
3505 struct bnx2x *bp = netdev_priv(dev);
3506
3507 if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
3508 BNX2X_ERR("Can't perform change MTU during parity recovery\n");
3509 return -EAGAIN;
3510 }
3511
3512 if ((new_mtu > ETH_MAX_JUMBO_PACKET_SIZE) ||
3513 ((new_mtu + ETH_HLEN) < ETH_MIN_PACKET_SIZE)) {
3514 BNX2X_ERR("Can't support requested MTU size\n");
3515 return -EINVAL;
3516 }
3517
3518 /* This does not race with packet allocation
3519 * because the actual alloc size is
3520 * only updated as part of load
3521 */
3522 dev->mtu = new_mtu;
3523
3524 bp->gro_check = bnx2x_need_gro_check(new_mtu);
3525
3526 return bnx2x_reload_if_running(dev);
3527 }
3528
3529 netdev_features_t bnx2x_fix_features(struct net_device *dev,
3530 netdev_features_t features)
3531 {
3532 struct bnx2x *bp = netdev_priv(dev);
3533
3534 /* TPA requires Rx CSUM offloading */
3535 if (!(features & NETIF_F_RXCSUM) || bp->disable_tpa) {
3536 features &= ~NETIF_F_LRO;
3537 features &= ~NETIF_F_GRO;
3538 }
3539
3540 return features;
3541 }
3542
3543 int bnx2x_set_features(struct net_device *dev, netdev_features_t features)
3544 {
3545 struct bnx2x *bp = netdev_priv(dev);
3546 u32 flags = bp->flags;
3547 bool bnx2x_reload = false;
3548
3549 if (features & NETIF_F_LRO)
3550 flags |= TPA_ENABLE_FLAG;
3551 else
3552 flags &= ~TPA_ENABLE_FLAG;
3553
3554 if (features & NETIF_F_GRO)
3555 flags |= GRO_ENABLE_FLAG;
3556 else
3557 flags &= ~GRO_ENABLE_FLAG;
3558
3559 if (features & NETIF_F_LOOPBACK) {
3560 if (bp->link_params.loopback_mode != LOOPBACK_BMAC) {
3561 bp->link_params.loopback_mode = LOOPBACK_BMAC;
3562 bnx2x_reload = true;
3563 }
3564 } else {
3565 if (bp->link_params.loopback_mode != LOOPBACK_NONE) {
3566 bp->link_params.loopback_mode = LOOPBACK_NONE;
3567 bnx2x_reload = true;
3568 }
3569 }
3570
3571 if (flags ^ bp->flags) {
3572 bp->flags = flags;
3573 bnx2x_reload = true;
3574 }
3575
3576 if (bnx2x_reload) {
3577 if (bp->recovery_state == BNX2X_RECOVERY_DONE)
3578 return bnx2x_reload_if_running(dev);
3579 /* else: bnx2x_nic_load() will be called at end of recovery */
3580 }
3581
3582 return 0;
3583 }
3584
3585 void bnx2x_tx_timeout(struct net_device *dev)
3586 {
3587 struct bnx2x *bp = netdev_priv(dev);
3588
3589 #ifdef BNX2X_STOP_ON_ERROR
3590 if (!bp->panic)
3591 bnx2x_panic();
3592 #endif
3593
3594 smp_mb__before_clear_bit();
3595 set_bit(BNX2X_SP_RTNL_TX_TIMEOUT, &bp->sp_rtnl_state);
3596 smp_mb__after_clear_bit();
3597
3598 /* This allows the netif to be shutdown gracefully before resetting */
3599 schedule_delayed_work(&bp->sp_rtnl_task, 0);
3600 }
3601
3602 int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state)
3603 {
3604 struct net_device *dev = pci_get_drvdata(pdev);
3605 struct bnx2x *bp;
3606
3607 if (!dev) {
3608 dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n");
3609 return -ENODEV;
3610 }
3611 bp = netdev_priv(dev);
3612
3613 rtnl_lock();
3614
3615 pci_save_state(pdev);
3616
3617 if (!netif_running(dev)) {
3618 rtnl_unlock();
3619 return 0;
3620 }
3621
3622 netif_device_detach(dev);
3623
3624 bnx2x_nic_unload(bp, UNLOAD_CLOSE);
3625
3626 bnx2x_set_power_state(bp, pci_choose_state(pdev, state));
3627
3628 rtnl_unlock();
3629
3630 return 0;
3631 }
3632
3633 int bnx2x_resume(struct pci_dev *pdev)
3634 {
3635 struct net_device *dev = pci_get_drvdata(pdev);
3636 struct bnx2x *bp;
3637 int rc;
3638
3639 if (!dev) {
3640 dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n");
3641 return -ENODEV;
3642 }
3643 bp = netdev_priv(dev);
3644
3645 if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
3646 BNX2X_ERR("Handling parity error recovery. Try again later\n");
3647 return -EAGAIN;
3648 }
3649
3650 rtnl_lock();
3651
3652 pci_restore_state(pdev);
3653
3654 if (!netif_running(dev)) {
3655 rtnl_unlock();
3656 return 0;
3657 }
3658
3659 bnx2x_set_power_state(bp, PCI_D0);
3660 netif_device_attach(dev);
3661
3662 rc = bnx2x_nic_load(bp, LOAD_OPEN);
3663
3664 rtnl_unlock();
3665
3666 return rc;
3667 }
3668
3669
3670 void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt,
3671 u32 cid)
3672 {
3673 /* ustorm cxt validation */
3674 cxt->ustorm_ag_context.cdu_usage =
3675 CDU_RSRVD_VALUE_TYPE_A(HW_CID(bp, cid),
3676 CDU_REGION_NUMBER_UCM_AG, ETH_CONNECTION_TYPE);
3677 /* xcontext validation */
3678 cxt->xstorm_ag_context.cdu_reserved =
3679 CDU_RSRVD_VALUE_TYPE_A(HW_CID(bp, cid),
3680 CDU_REGION_NUMBER_XCM_AG, ETH_CONNECTION_TYPE);
3681 }
3682
3683 static inline void storm_memset_hc_timeout(struct bnx2x *bp, u8 port,
3684 u8 fw_sb_id, u8 sb_index,
3685 u8 ticks)
3686 {
3687
3688 u32 addr = BAR_CSTRORM_INTMEM +
3689 CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(fw_sb_id, sb_index);
3690 REG_WR8(bp, addr, ticks);
3691 DP(NETIF_MSG_IFUP,
3692 "port %x fw_sb_id %d sb_index %d ticks %d\n",
3693 port, fw_sb_id, sb_index, ticks);
3694 }
3695
3696 static inline void storm_memset_hc_disable(struct bnx2x *bp, u8 port,
3697 u16 fw_sb_id, u8 sb_index,
3698 u8 disable)
3699 {
3700 u32 enable_flag = disable ? 0 : (1 << HC_INDEX_DATA_HC_ENABLED_SHIFT);
3701 u32 addr = BAR_CSTRORM_INTMEM +
3702 CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(fw_sb_id, sb_index);
3703 u16 flags = REG_RD16(bp, addr);
3704 /* clear and set */
3705 flags &= ~HC_INDEX_DATA_HC_ENABLED;
3706 flags |= enable_flag;
3707 REG_WR16(bp, addr, flags);
3708 DP(NETIF_MSG_IFUP,
3709 "port %x fw_sb_id %d sb_index %d disable %d\n",
3710 port, fw_sb_id, sb_index, disable);
3711 }
3712
3713 void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u8 fw_sb_id,
3714 u8 sb_index, u8 disable, u16 usec)
3715 {
3716 int port = BP_PORT(bp);
3717 u8 ticks = usec / BNX2X_BTR;
3718
3719 storm_memset_hc_timeout(bp, port, fw_sb_id, sb_index, ticks);
3720
3721 disable = disable ? 1 : (usec ? 0 : 1);
3722 storm_memset_hc_disable(bp, port, fw_sb_id, sb_index, disable);
3723 }
Linus' kernel tree