drivers/net/phy/cicada.c

   1 /*
   2  * drivers/net/phy/cicada.c
   3  *
   4  * Driver for Cicada PHYs
   5  *
   6  * Author: Andy Fleming
   7  *
   8  * Copyright (c) 2004 Freescale Semiconductor, Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  *
  15  */
  16 #include <linux/kernel.h>
  17 #include <linux/string.h>
  18 #include <linux/errno.h>
  19 #include <linux/unistd.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/init.h>
  22 #include <linux/delay.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/etherdevice.h>
  25 #include <linux/skbuff.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/mm.h>
  28 #include <linux/module.h>
  29 #include <linux/mii.h>
  30 #include <linux/ethtool.h>
  31 #include <linux/phy.h>
  32
  33 #include <asm/io.h>
  34 #include <asm/irq.h>
  35 #include <asm/uaccess.h>
  36
  37 /* Cicada Extended Control Register 1 */
  38 #define MII_CIS8201_EXT_CON1           0x17
  39 #define MII_CIS8201_EXTCON1_INIT       0x0000
  40
  41 /* Cicada Interrupt Mask Register */
  42 #define MII_CIS8201_IMASK               0x19
  43 #define MII_CIS8201_IMASK_IEN           0x8000
  44 #define MII_CIS8201_IMASK_SPEED 0x4000
  45 #define MII_CIS8201_IMASK_LINK          0x2000
  46 #define MII_CIS8201_IMASK_DUPLEX        0x1000
  47 #define MII_CIS8201_IMASK_MASK          0xf000
  48
  49 /* Cicada Interrupt Status Register */
  50 #define MII_CIS8201_ISTAT               0x1a
  51 #define MII_CIS8201_ISTAT_STATUS        0x8000
  52 #define MII_CIS8201_ISTAT_SPEED 0x4000
  53 #define MII_CIS8201_ISTAT_LINK          0x2000
  54 #define MII_CIS8201_ISTAT_DUPLEX        0x1000
  55
  56 /* Cicada Auxiliary Control/Status Register */
  57 #define MII_CIS8201_AUX_CONSTAT        0x1c
  58 #define MII_CIS8201_AUXCONSTAT_INIT    0x0004
  59 #define MII_CIS8201_AUXCONSTAT_DUPLEX  0x0020
  60 #define MII_CIS8201_AUXCONSTAT_SPEED   0x0018
  61 #define MII_CIS8201_AUXCONSTAT_GBIT    0x0010
  62 #define MII_CIS8201_AUXCONSTAT_100     0x0008
  63
  64 MODULE_DESCRIPTION("Cicadia PHY driver");
  65 MODULE_AUTHOR("Andy Fleming");
  66 MODULE_LICENSE("GPL");
  67
  68 static int cis820x_config_init(struct phy_device *phydev)
  69 {
  70         int err;
  71
  72         err = phy_write(phydev, MII_CIS8201_AUX_CONSTAT,
  73                         MII_CIS8201_AUXCONSTAT_INIT);
  74
  75         if (err < 0)
  76                 return err;
  77
  78         err = phy_write(phydev, MII_CIS8201_EXT_CON1,
  79                         MII_CIS8201_EXTCON1_INIT);
  80
  81         return err;
  82 }
  83
  84 static int cis820x_ack_interrupt(struct phy_device *phydev)
  85 {
  86         int err = phy_read(phydev, MII_CIS8201_ISTAT);
  87
  88         return (err < 0) ? err : 0;
  89 }
  90
  91 static int cis820x_config_intr(struct phy_device *phydev)
  92 {
  93         int err;
  94
  95         if(phydev->interrupts == PHY_INTERRUPT_ENABLED)
  96                 err = phy_write(phydev, MII_CIS8201_IMASK,
  97                                 MII_CIS8201_IMASK_MASK);
  98         else
  99                 err = phy_write(phydev, MII_CIS8201_IMASK, 0);
 100
 101         return err;
 102 }
 103
 104 /* Cicada 8201, a.k.a Vitesse VSC8201 */
 105 static struct phy_driver cis820x_driver[] = {
 106 {
 107         .phy_id         = 0x000fc410,
 108         .name           = "Cicada Cis8201",
 109         .phy_id_mask    = 0x000ffff0,
 110         .features       = PHY_GBIT_FEATURES,
 111         .flags          = PHY_HAS_INTERRUPT,
 112         .config_init    = &cis820x_config_init,
 113         .config_aneg    = &genphy_config_aneg,
 114         .read_status    = &genphy_read_status,
 115         .ack_interrupt  = &cis820x_ack_interrupt,
 116         .config_intr    = &cis820x_config_intr,
 117         .driver         = { .owner = THIS_MODULE,},
 118 }, {
 119         .phy_id         = 0x000fc440,
 120         .name           = "Cicada Cis8204",
 121         .phy_id_mask    = 0x000fffc0,
 122         .features       = PHY_GBIT_FEATURES,
 123         .flags          = PHY_HAS_INTERRUPT,
 124         .config_init    = &cis820x_config_init,
 125         .config_aneg    = &genphy_config_aneg,
 126         .read_status    = &genphy_read_status,
 127         .ack_interrupt  = &cis820x_ack_interrupt,
 128         .config_intr    = &cis820x_config_intr,
 129         .driver         = { .owner = THIS_MODULE,},
 130 } };
 131
 132 static int __init cicada_init(void)
 133 {
 134         return phy_drivers_register(cis820x_driver,
 135                 ARRAY_SIZE(cis820x_driver));
 136 }
 137
 138 static void __exit cicada_exit(void)
 139 {
 140         phy_drivers_unregister(cis820x_driver,
 141                 ARRAY_SIZE(cis820x_driver));
 142 }
 143
 144 module_init(cicada_init);
 145 module_exit(cicada_exit);
 146
 147 static struct mdio_device_id __maybe_unused cicada_tbl[] = {
 148         { 0x000fc410, 0x000ffff0 },
 149         { 0x000fc440, 0x000fffc0 },
 150         { }
 151 };
 152
 153 MODULE_DEVICE_TABLE(mdio, cicada_tbl);