drivers/video/cg14.c

   1 /* cg14.c: CGFOURTEEN frame buffer driver
   2  *
   3  * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
   4  * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
   5  * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
   6  *
   7  * Driver layout based loosely on tgafb.c, see that file for credits.
   8  */
   9
  10 #include <linux/module.h>
  11 #include <linux/kernel.h>
  12 #include <linux/errno.h>
  13 #include <linux/string.h>
  14 #include <linux/delay.h>
  15 #include <linux/init.h>
  16 #include <linux/fb.h>
  17 #include <linux/mm.h>
  18 #include <linux/uaccess.h>
  19 #include <linux/of_device.h>
  20
  21 #include <asm/io.h>
  22 #include <asm/fbio.h>
  23
  24 #include "sbuslib.h"
  25
  26 /*
  27  * Local functions.
  28  */
  29
  30 static int cg14_setcolreg(unsigned, unsigned, unsigned, unsigned,
  31                          unsigned, struct fb_info *);
  32
  33 static int cg14_mmap(struct fb_info *, struct vm_area_struct *);
  34 static int cg14_ioctl(struct fb_info *, unsigned int, unsigned long);
  35 static int cg14_pan_display(struct fb_var_screeninfo *, struct fb_info *);
  36
  37 /*
  38  *  Frame buffer operations
  39  */
  40
  41 static struct fb_ops cg14_ops = {
  42         .owner                  = THIS_MODULE,
  43         .fb_setcolreg           = cg14_setcolreg,
  44         .fb_pan_display         = cg14_pan_display,
  45         .fb_fillrect            = cfb_fillrect,
  46         .fb_copyarea            = cfb_copyarea,
  47         .fb_imageblit           = cfb_imageblit,
  48         .fb_mmap                = cg14_mmap,
  49         .fb_ioctl               = cg14_ioctl,
  50 #ifdef CONFIG_COMPAT
  51         .fb_compat_ioctl        = sbusfb_compat_ioctl,
  52 #endif
  53 };
  54
  55 #define CG14_MCR_INTENABLE_SHIFT        7
  56 #define CG14_MCR_INTENABLE_MASK         0x80
  57 #define CG14_MCR_VIDENABLE_SHIFT        6
  58 #define CG14_MCR_VIDENABLE_MASK         0x40
  59 #define CG14_MCR_PIXMODE_SHIFT          4
  60 #define CG14_MCR_PIXMODE_MASK           0x30
  61 #define CG14_MCR_TMR_SHIFT              2
  62 #define CG14_MCR_TMR_MASK               0x0c
  63 #define CG14_MCR_TMENABLE_SHIFT         1
  64 #define CG14_MCR_TMENABLE_MASK          0x02
  65 #define CG14_MCR_RESET_SHIFT            0
  66 #define CG14_MCR_RESET_MASK             0x01
  67 #define CG14_REV_REVISION_SHIFT         4
  68 #define CG14_REV_REVISION_MASK          0xf0
  69 #define CG14_REV_IMPL_SHIFT             0
  70 #define CG14_REV_IMPL_MASK              0x0f
  71 #define CG14_VBR_FRAMEBASE_SHIFT        12
  72 #define CG14_VBR_FRAMEBASE_MASK         0x00fff000
  73 #define CG14_VMCR1_SETUP_SHIFT          0
  74 #define CG14_VMCR1_SETUP_MASK           0x000001ff
  75 #define CG14_VMCR1_VCONFIG_SHIFT        9
  76 #define CG14_VMCR1_VCONFIG_MASK         0x00000e00
  77 #define CG14_VMCR2_REFRESH_SHIFT        0
  78 #define CG14_VMCR2_REFRESH_MASK         0x00000001
  79 #define CG14_VMCR2_TESTROWCNT_SHIFT     1
  80 #define CG14_VMCR2_TESTROWCNT_MASK      0x00000002
  81 #define CG14_VMCR2_FBCONFIG_SHIFT       2
  82 #define CG14_VMCR2_FBCONFIG_MASK        0x0000000c
  83 #define CG14_VCR_REFRESHREQ_SHIFT       0
  84 #define CG14_VCR_REFRESHREQ_MASK        0x000003ff
  85 #define CG14_VCR1_REFRESHENA_SHIFT      10
  86 #define CG14_VCR1_REFRESHENA_MASK       0x00000400
  87 #define CG14_VCA_CAD_SHIFT              0
  88 #define CG14_VCA_CAD_MASK               0x000003ff
  89 #define CG14_VCA_VERS_SHIFT             10
  90 #define CG14_VCA_VERS_MASK              0x00000c00
  91 #define CG14_VCA_RAMSPEED_SHIFT         12
  92 #define CG14_VCA_RAMSPEED_MASK          0x00001000
  93 #define CG14_VCA_8MB_SHIFT              13
  94 #define CG14_VCA_8MB_MASK               0x00002000
  95
  96 #define CG14_MCR_PIXMODE_8              0
  97 #define CG14_MCR_PIXMODE_16             2
  98 #define CG14_MCR_PIXMODE_32             3
  99
 100 struct cg14_regs{
 101         u8 mcr; /* Master Control Reg */
 102         u8 ppr; /* Packed Pixel Reg */
 103         u8 tms[2];      /* Test Mode Status Regs */
 104         u8 msr; /* Master Status Reg */
 105         u8 fsr; /* Fault Status Reg */
 106         u8 rev; /* Revision & Impl */
 107         u8 ccr; /* Clock Control Reg */
 108         u32 tmr;        /* Test Mode Read Back */
 109         u8 mod; /* Monitor Operation Data Reg */
 110         u8 acr; /* Aux Control */
 111         u8 xxx0[6];
 112         u16 hct;        /* Hor Counter */
 113         u16 vct;        /* Vert Counter */
 114         u16 hbs;        /* Hor Blank Start */
 115         u16 hbc;        /* Hor Blank Clear */
 116         u16 hss;        /* Hor Sync Start */
 117         u16 hsc;        /* Hor Sync Clear */
 118         u16 csc;        /* Composite Sync Clear */
 119         u16 vbs;        /* Vert Blank Start */
 120         u16 vbc;        /* Vert Blank Clear */
 121         u16 vss;        /* Vert Sync Start */
 122         u16 vsc;        /* Vert Sync Clear */
 123         u16 xcs;
 124         u16 xcc;
 125         u16 fsa;        /* Fault Status Address */
 126         u16 adr;        /* Address Registers */
 127         u8 xxx1[0xce];
 128         u8 pcg[0x100]; /* Pixel Clock Generator */
 129         u32 vbr;        /* Frame Base Row */
 130         u32 vmcr;       /* VBC Master Control */
 131         u32 vcr;        /* VBC refresh */
 132         u32 vca;        /* VBC Config */
 133 };
 134
 135 #define CG14_CCR_ENABLE 0x04
 136 #define CG14_CCR_SELECT 0x02    /* HW/Full screen */
 137
 138 struct cg14_cursor {
 139         u32 cpl0[32];   /* Enable plane 0 */
 140         u32 cpl1[32];  /* Color selection plane */
 141         u8 ccr; /* Cursor Control Reg */
 142         u8 xxx0[3];
 143         u16 cursx;      /* Cursor x,y position */
 144         u16 cursy;      /* Cursor x,y position */
 145         u32 color0;
 146         u32 color1;
 147         u32 xxx1[0x1bc];
 148         u32 cpl0i[32];  /* Enable plane 0 autoinc */
 149         u32 cpl1i[32]; /* Color selection autoinc */
 150 };
 151
 152 struct cg14_dac {
 153         u8 addr;        /* Address Register */
 154         u8 xxx0[255];
 155         u8 glut;        /* Gamma table */
 156         u8 xxx1[255];
 157         u8 select;      /* Register Select */
 158         u8 xxx2[255];
 159         u8 mode;        /* Mode Register */
 160 };
 161
 162 struct cg14_xlut{
 163         u8 x_xlut [256];
 164         u8 x_xlutd [256];
 165         u8 xxx0[0x600];
 166         u8 x_xlut_inc [256];
 167         u8 x_xlutd_inc [256];
 168 };
 169
 170 /* Color look up table (clut) */
 171 /* Each one of these arrays hold the color lookup table (for 256
 172  * colors) for each MDI page (I assume then there should be 4 MDI
 173  * pages, I still wonder what they are.  I have seen NeXTStep split
 174  * the screen in four parts, while operating in 24 bits mode.  Each
 175  * integer holds 4 values: alpha value (transparency channel, thanks
 176  * go to John Stone (johns@umr.edu) from OpenBSD), red, green and blue
 177  *
 178  * I currently use the clut instead of the Xlut
 179  */
 180 struct cg14_clut {
 181         u32 c_clut [256];
 182         u32 c_clutd [256];    /* i wonder what the 'd' is for */
 183         u32 c_clut_inc [256];
 184         u32 c_clutd_inc [256];
 185 };
 186
 187 #define CG14_MMAP_ENTRIES       16
 188
 189 struct cg14_par {
 190         spinlock_t              lock;
 191         struct cg14_regs        __iomem *regs;
 192         struct cg14_clut        __iomem *clut;
 193         struct cg14_cursor      __iomem *cursor;
 194
 195         u32                     flags;
 196 #define CG14_FLAG_BLANKED       0x00000001
 197
 198         unsigned long           iospace;
 199
 200         struct sbus_mmap_map    mmap_map[CG14_MMAP_ENTRIES];
 201
 202         int                     mode;
 203         int                     ramsize;
 204 };
 205
 206 static void __cg14_reset(struct cg14_par *par)
 207 {
 208         struct cg14_regs __iomem *regs = par->regs;
 209         u8 val;
 210
 211         val = sbus_readb(&regs->mcr);
 212         val &= ~(CG14_MCR_PIXMODE_MASK);
 213         sbus_writeb(val, &regs->mcr);
 214 }
 215
 216 static int cg14_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
 217 {
 218         struct cg14_par *par = (struct cg14_par *) info->par;
 219         unsigned long flags;
 220
 221         /* We just use this to catch switches out of
 222          * graphics mode.
 223          */
 224         spin_lock_irqsave(&par->lock, flags);
 225         __cg14_reset(par);
 226         spin_unlock_irqrestore(&par->lock, flags);
 227
 228         if (var->xoffset || var->yoffset || var->vmode)
 229                 return -EINVAL;
 230         return 0;
 231 }
 232
 233 /**
 234  *      cg14_setcolreg - Optional function. Sets a color register.
 235  *      @regno: boolean, 0 copy local, 1 get_user() function
 236  *      @red: frame buffer colormap structure
 237  *      @green: The green value which can be up to 16 bits wide
 238  *      @blue:  The blue value which can be up to 16 bits wide.
 239  *      @transp: If supported the alpha value which can be up to 16 bits wide.
 240  *      @info: frame buffer info structure
 241  */
 242 static int cg14_setcolreg(unsigned regno,
 243                           unsigned red, unsigned green, unsigned blue,
 244                           unsigned transp, struct fb_info *info)
 245 {
 246         struct cg14_par *par = (struct cg14_par *) info->par;
 247         struct cg14_clut __iomem *clut = par->clut;
 248         unsigned long flags;
 249         u32 val;
 250
 251         if (regno >= 256)
 252                 return 1;
 253
 254         red >>= 8;
 255         green >>= 8;
 256         blue >>= 8;
 257         val = (red | (green << 8) | (blue << 16));
 258
 259         spin_lock_irqsave(&par->lock, flags);
 260         sbus_writel(val, &clut->c_clut[regno]);
 261         spin_unlock_irqrestore(&par->lock, flags);
 262
 263         return 0;
 264 }
 265
 266 static int cg14_mmap(struct fb_info *info, struct vm_area_struct *vma)
 267 {
 268         struct cg14_par *par = (struct cg14_par *) info->par;
 269
 270         return sbusfb_mmap_helper(par->mmap_map,
 271                                   info->fix.smem_start, info->fix.smem_len,
 272                                   par->iospace, vma);
 273 }
 274
 275 static int cg14_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
 276 {
 277         struct cg14_par *par = (struct cg14_par *) info->par;
 278         struct cg14_regs __iomem *regs = par->regs;
 279         struct mdi_cfginfo kmdi, __user *mdii;
 280         unsigned long flags;
 281         int cur_mode, mode, ret = 0;
 282
 283         switch (cmd) {
 284         case MDI_RESET:
 285                 spin_lock_irqsave(&par->lock, flags);
 286                 __cg14_reset(par);
 287                 spin_unlock_irqrestore(&par->lock, flags);
 288                 break;
 289
 290         case MDI_GET_CFGINFO:
 291                 memset(&kmdi, 0, sizeof(kmdi));
 292
 293                 spin_lock_irqsave(&par->lock, flags);
 294                 kmdi.mdi_type = FBTYPE_MDICOLOR;
 295                 kmdi.mdi_height = info->var.yres;
 296                 kmdi.mdi_width = info->var.xres;
 297                 kmdi.mdi_mode = par->mode;
 298                 kmdi.mdi_pixfreq = 72; /* FIXME */
 299                 kmdi.mdi_size = par->ramsize;
 300                 spin_unlock_irqrestore(&par->lock, flags);
 301
 302                 mdii = (struct mdi_cfginfo __user *) arg;
 303                 if (copy_to_user(mdii, &kmdi, sizeof(kmdi)))
 304                         ret = -EFAULT;
 305                 break;
 306
 307         case MDI_SET_PIXELMODE:
 308                 if (get_user(mode, (int __user *) arg)) {
 309                         ret = -EFAULT;
 310                         break;
 311                 }
 312
 313                 spin_lock_irqsave(&par->lock, flags);
 314                 cur_mode = sbus_readb(&regs->mcr);
 315                 cur_mode &= ~CG14_MCR_PIXMODE_MASK;
 316                 switch(mode) {
 317                 case MDI_32_PIX:
 318                         cur_mode |= (CG14_MCR_PIXMODE_32 <<
 319                                      CG14_MCR_PIXMODE_SHIFT);
 320                         break;
 321
 322                 case MDI_16_PIX:
 323                         cur_mode |= (CG14_MCR_PIXMODE_16 <<
 324                                      CG14_MCR_PIXMODE_SHIFT);
 325                         break;
 326
 327                 case MDI_8_PIX:
 328                         break;
 329
 330                 default:
 331                         ret = -ENOSYS;
 332                         break;
 333                 };
 334                 if (!ret) {
 335                         sbus_writeb(cur_mode, &regs->mcr);
 336                         par->mode = mode;
 337                 }
 338                 spin_unlock_irqrestore(&par->lock, flags);
 339                 break;
 340
 341         default:
 342                 ret = sbusfb_ioctl_helper(cmd, arg, info,
 343                                           FBTYPE_MDICOLOR, 8,
 344                                           info->fix.smem_len);
 345                 break;
 346         };
 347
 348         return ret;
 349 }
 350
 351 /*
 352  *  Initialisation
 353  */
 354
 355 static void __devinit cg14_init_fix(struct fb_info *info, int linebytes,
 356                                     struct device_node *dp)
 357 {
 358         const char *name = dp->name;
 359
 360         strlcpy(info->fix.id, name, sizeof(info->fix.id));
 361
 362         info->fix.type = FB_TYPE_PACKED_PIXELS;
 363         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 364
 365         info->fix.line_length = linebytes;
 366
 367         info->fix.accel = FB_ACCEL_SUN_CG14;
 368 }
 369
 370 static struct sbus_mmap_map __cg14_mmap_map[CG14_MMAP_ENTRIES] __devinitdata = {
 371         {
 372                 .voff   = CG14_REGS,
 373                 .poff   = 0x80000000,
 374                 .size   = 0x1000
 375         },
 376         {
 377                 .voff   = CG14_XLUT,
 378                 .poff   = 0x80003000,
 379                 .size   = 0x1000
 380         },
 381         {
 382                 .voff   = CG14_CLUT1,
 383                 .poff   = 0x80004000,
 384                 .size   = 0x1000
 385         },
 386         {
 387                 .voff   = CG14_CLUT2,
 388                 .poff   = 0x80005000,
 389                 .size   = 0x1000
 390         },
 391         {
 392                 .voff   = CG14_CLUT3,
 393                 .poff   = 0x80006000,
 394                 .size   = 0x1000
 395         },
 396         {
 397                 .voff   = CG3_MMAP_OFFSET - 0x7000,
 398                 .poff   = 0x80000000,
 399                 .size   = 0x7000
 400         },
 401         {
 402                 .voff   = CG3_MMAP_OFFSET,
 403                 .poff   = 0x00000000,
 404                 .size   = SBUS_MMAP_FBSIZE(1)
 405         },
 406         {
 407                 .voff   = MDI_CURSOR_MAP,
 408                 .poff   = 0x80001000,
 409                 .size   = 0x1000
 410         },
 411         {
 412                 .voff   = MDI_CHUNKY_BGR_MAP,
 413                 .poff   = 0x01000000,
 414                 .size   = 0x400000
 415         },
 416         {
 417                 .voff   = MDI_PLANAR_X16_MAP,
 418                 .poff   = 0x02000000,
 419                 .size   = 0x200000
 420         },
 421         {
 422                 .voff   = MDI_PLANAR_C16_MAP,
 423                 .poff   = 0x02800000,
 424                 .size   = 0x200000
 425         },
 426         {
 427                 .voff   = MDI_PLANAR_X32_MAP,
 428                 .poff   = 0x03000000,
 429                 .size   = 0x100000
 430         },
 431         {
 432                 .voff   = MDI_PLANAR_B32_MAP,
 433                 .poff   = 0x03400000,
 434                 .size   = 0x100000
 435         },
 436         {
 437                 .voff   = MDI_PLANAR_G32_MAP,
 438                 .poff   = 0x03800000,
 439                 .size   = 0x100000
 440         },
 441         {
 442                 .voff   = MDI_PLANAR_R32_MAP,
 443                 .poff   = 0x03c00000,
 444                 .size   = 0x100000
 445         },
 446         { .size = 0 }
 447 };
 448
 449 static void cg14_unmap_regs(struct platform_device *op, struct fb_info *info,
 450                             struct cg14_par *par)
 451 {
 452         if (par->regs)
 453                 of_iounmap(&op->resource[0],
 454                            par->regs, sizeof(struct cg14_regs));
 455         if (par->clut)
 456                 of_iounmap(&op->resource[0],
 457                            par->clut, sizeof(struct cg14_clut));
 458         if (par->cursor)
 459                 of_iounmap(&op->resource[0],
 460                            par->cursor, sizeof(struct cg14_cursor));
 461         if (info->screen_base)
 462                 of_iounmap(&op->resource[1],
 463                            info->screen_base, info->fix.smem_len);
 464 }
 465
 466 static int __devinit cg14_probe(struct platform_device *op)
 467 {
 468         struct device_node *dp = op->dev.of_node;
 469         struct fb_info *info;
 470         struct cg14_par *par;
 471         int is_8mb, linebytes, i, err;
 472
 473         info = framebuffer_alloc(sizeof(struct cg14_par), &op->dev);
 474
 475         err = -ENOMEM;
 476         if (!info)
 477                 goto out_err;
 478         par = info->par;
 479
 480         spin_lock_init(&par->lock);
 481
 482         sbusfb_fill_var(&info->var, dp, 8);
 483         info->var.red.length = 8;
 484         info->var.green.length = 8;
 485         info->var.blue.length = 8;
 486
 487         linebytes = of_getintprop_default(dp, "linebytes",
 488                                           info->var.xres);
 489         info->fix.smem_len = PAGE_ALIGN(linebytes * info->var.yres);
 490
 491         if (!strcmp(dp->parent->name, "sbus") ||
 492             !strcmp(dp->parent->name, "sbi")) {
 493                 info->fix.smem_start = op->resource[0].start;
 494                 par->iospace = op->resource[0].flags & IORESOURCE_BITS;
 495         } else {
 496                 info->fix.smem_start = op->resource[1].start;
 497                 par->iospace = op->resource[0].flags & IORESOURCE_BITS;
 498         }
 499
 500         par->regs = of_ioremap(&op->resource[0], 0,
 501                                sizeof(struct cg14_regs), "cg14 regs");
 502         par->clut = of_ioremap(&op->resource[0], CG14_CLUT1,
 503                                sizeof(struct cg14_clut), "cg14 clut");
 504         par->cursor = of_ioremap(&op->resource[0], CG14_CURSORREGS,
 505                                  sizeof(struct cg14_cursor), "cg14 cursor");
 506
 507         info->screen_base = of_ioremap(&op->resource[1], 0,
 508                                        info->fix.smem_len, "cg14 ram");
 509
 510         if (!par->regs || !par->clut || !par->cursor || !info->screen_base)
 511                 goto out_unmap_regs;
 512
 513         is_8mb = (((op->resource[1].end - op->resource[1].start) + 1) ==
 514                   (8 * 1024 * 1024));
 515
 516         BUILD_BUG_ON(sizeof(par->mmap_map) != sizeof(__cg14_mmap_map));
 517
 518         memcpy(&par->mmap_map, &__cg14_mmap_map, sizeof(par->mmap_map));
 519
 520         for (i = 0; i < CG14_MMAP_ENTRIES; i++) {
 521                 struct sbus_mmap_map *map = &par->mmap_map[i];
 522
 523                 if (!map->size)
 524                         break;
 525                 if (map->poff & 0x80000000)
 526                         map->poff = (map->poff & 0x7fffffff) +
 527                                 (op->resource[0].start -
 528                                  op->resource[1].start);
 529                 if (is_8mb &&
 530                     map->size >= 0x100000 &&
 531                     map->size <= 0x400000)
 532                         map->size *= 2;
 533         }
 534
 535         par->mode = MDI_8_PIX;
 536         par->ramsize = (is_8mb ? 0x800000 : 0x400000);
 537
 538         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
 539         info->fbops = &cg14_ops;
 540
 541         __cg14_reset(par);
 542
 543         if (fb_alloc_cmap(&info->cmap, 256, 0))
 544                 goto out_unmap_regs;
 545
 546         fb_set_cmap(&info->cmap, info);
 547
 548         cg14_init_fix(info, linebytes, dp);
 549
 550         err = register_framebuffer(info);
 551         if (err < 0)
 552                 goto out_dealloc_cmap;
 553
 554         dev_set_drvdata(&op->dev, info);
 555
 556         printk(KERN_INFO "%s: cgfourteen at %lx:%lx, %dMB\n",
 557                dp->full_name,
 558                par->iospace, info->fix.smem_start,
 559                par->ramsize >> 20);
 560
 561         return 0;
 562
 563 out_dealloc_cmap:
 564         fb_dealloc_cmap(&info->cmap);
 565
 566 out_unmap_regs:
 567         cg14_unmap_regs(op, info, par);
 568         framebuffer_release(info);
 569
 570 out_err:
 571         return err;
 572 }
 573
 574 static int __devexit cg14_remove(struct platform_device *op)
 575 {
 576         struct fb_info *info = dev_get_drvdata(&op->dev);
 577         struct cg14_par *par = info->par;
 578
 579         unregister_framebuffer(info);
 580         fb_dealloc_cmap(&info->cmap);
 581
 582         cg14_unmap_regs(op, info, par);
 583
 584         framebuffer_release(info);
 585
 586         dev_set_drvdata(&op->dev, NULL);
 587
 588         return 0;
 589 }
 590
 591 static const struct of_device_id cg14_match[] = {
 592         {
 593                 .name = "cgfourteen",
 594         },
 595         {},
 596 };
 597 MODULE_DEVICE_TABLE(of, cg14_match);
 598
 599 static struct platform_driver cg14_driver = {
 600         .driver = {
 601                 .name = "cg14",
 602                 .owner = THIS_MODULE,
 603                 .of_match_table = cg14_match,
 604         },
 605         .probe          = cg14_probe,
 606         .remove         = __devexit_p(cg14_remove),
 607 };
 608
 609 static int __init cg14_init(void)
 610 {
 611         if (fb_get_options("cg14fb", NULL))
 612                 return -ENODEV;
 613
 614         return platform_driver_register(&cg14_driver);
 615 }
 616
 617 static void __exit cg14_exit(void)
 618 {
 619         platform_driver_unregister(&cg14_driver);
 620 }
 621
 622 module_init(cg14_init);
 623 module_exit(cg14_exit);
 624
 625 MODULE_DESCRIPTION("framebuffer driver for CGfourteen chipsets");
 626 MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
 627 MODULE_VERSION("2.0");
 628 MODULE_LICENSE("GPL");