ARM: u300: add the COH 901 318 DMAC to device tree
[linux-2.6.git] / arch / arm / mach-u300 / core.c
blob7866f54a4eaa927e1b2c3787e21048802c3e2e6b
1 /*
3 * arch/arm/mach-u300/core.c
6 * Copyright (C) 2007-2012 ST-Ericsson SA
7 * License terms: GNU General Public License (GPL) version 2
8 * Core platform support, IRQ handling and device definitions.
9 * Author: Linus Walleij <linus.walleij@stericsson.com>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
14 #include <linux/interrupt.h>
15 #include <linux/bitops.h>
16 #include <linux/device.h>
17 #include <linux/mm.h>
18 #include <linux/termios.h>
19 #include <linux/dmaengine.h>
20 #include <linux/amba/bus.h>
21 #include <linux/amba/mmci.h>
22 #include <linux/amba/serial.h>
23 #include <linux/platform_device.h>
24 #include <linux/gpio.h>
25 #include <linux/clk.h>
26 #include <linux/err.h>
27 #include <linux/mtd/nand.h>
28 #include <linux/mtd/fsmc.h>
29 #include <linux/pinctrl/machine.h>
30 #include <linux/pinctrl/pinconf-generic.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/platform_data/clk-u300.h>
33 #include <linux/platform_data/pinctrl-coh901.h>
34 #include <linux/platform_data/dma-coh901318.h>
35 #include <linux/irqchip/arm-vic.h>
36 #include <linux/irqchip.h>
37 #include <linux/of_platform.h>
38 #include <linux/clocksource.h>
40 #include <asm/types.h>
41 #include <asm/setup.h>
42 #include <asm/memory.h>
43 #include <asm/mach/map.h>
44 #include <asm/mach-types.h>
45 #include <asm/mach/arch.h>
47 #include <mach/hardware.h>
48 #include <mach/syscon.h>
49 #include <mach/irqs.h>
51 #include "timer.h"
52 #include "spi.h"
53 #include "i2c.h"
54 #include "u300-gpio.h"
57 * Static I/O mappings that are needed for booting the U300 platforms. The
58 * only things we need are the areas where we find the timer, syscon and
59 * intcon, since the remaining device drivers will map their own memory
60 * physical to virtual as the need arise.
62 static struct map_desc u300_io_desc[] __initdata = {
64 .virtual = U300_SLOW_PER_VIRT_BASE,
65 .pfn = __phys_to_pfn(U300_SLOW_PER_PHYS_BASE),
66 .length = SZ_64K,
67 .type = MT_DEVICE,
70 .virtual = U300_AHB_PER_VIRT_BASE,
71 .pfn = __phys_to_pfn(U300_AHB_PER_PHYS_BASE),
72 .length = SZ_32K,
73 .type = MT_DEVICE,
76 .virtual = U300_FAST_PER_VIRT_BASE,
77 .pfn = __phys_to_pfn(U300_FAST_PER_PHYS_BASE),
78 .length = SZ_32K,
79 .type = MT_DEVICE,
83 static void __init u300_map_io(void)
85 iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc));
89 * Declaration of devices found on the U300 board and
90 * their respective memory locations.
93 static struct amba_pl011_data uart0_plat_data = {
94 #ifdef CONFIG_COH901318
95 .dma_filter = coh901318_filter_id,
96 .dma_rx_param = (void *) U300_DMA_UART0_RX,
97 .dma_tx_param = (void *) U300_DMA_UART0_TX,
98 #endif
101 /* Slow device at 0x3000 offset */
102 static AMBA_APB_DEVICE(uart0, "uart0", 0, U300_UART0_BASE,
103 { IRQ_U300_UART0 }, &uart0_plat_data);
105 /* The U335 have an additional UART1 on the APP CPU */
106 static struct amba_pl011_data uart1_plat_data = {
107 #ifdef CONFIG_COH901318
108 .dma_filter = coh901318_filter_id,
109 .dma_rx_param = (void *) U300_DMA_UART1_RX,
110 .dma_tx_param = (void *) U300_DMA_UART1_TX,
111 #endif
114 /* Fast device at 0x7000 offset */
115 static AMBA_APB_DEVICE(uart1, "uart1", 0, U300_UART1_BASE,
116 { IRQ_U300_UART1 }, &uart1_plat_data);
118 /* AHB device at 0x4000 offset */
119 static AMBA_APB_DEVICE(pl172, "pl172", 0, U300_EMIF_CFG_BASE, { }, NULL);
121 /* Fast device at 0x6000 offset */
122 static AMBA_APB_DEVICE(pl022, "pl022", 0, U300_SPI_BASE,
123 { IRQ_U300_SPI }, NULL);
125 /* Fast device at 0x1000 offset */
126 #define U300_MMCSD_IRQS { IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 }
128 static struct mmci_platform_data mmcsd_platform_data = {
130 * Do not set ocr_mask or voltage translation function,
131 * we have a regulator we can control instead.
133 .f_max = 24000000,
134 .gpio_wp = -1,
135 .gpio_cd = U300_GPIO_PIN_MMC_CD,
136 .cd_invert = true,
137 .capabilities = MMC_CAP_MMC_HIGHSPEED |
138 MMC_CAP_SD_HIGHSPEED | MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
139 #ifdef CONFIG_COH901318
140 .dma_filter = coh901318_filter_id,
141 .dma_rx_param = (void *) U300_DMA_MMCSD_RX_TX,
142 /* Don't specify a TX channel, this RX channel is bidirectional */
143 #endif
146 static AMBA_APB_DEVICE(mmcsd, "mmci", 0, U300_MMCSD_BASE,
147 U300_MMCSD_IRQS, &mmcsd_platform_data);
150 * The order of device declaration may be important, since some devices
151 * have dependencies on other devices being initialized first.
153 static struct amba_device *amba_devs[] __initdata = {
154 &uart0_device,
155 &uart1_device,
156 &pl022_device,
157 &pl172_device,
158 &mmcsd_device,
161 /* Here follows a list of all hw resources that the platform devices
162 * allocate. Note, clock dependencies are not included
165 static struct resource gpio_resources[] = {
167 .start = U300_GPIO_BASE,
168 .end = (U300_GPIO_BASE + SZ_4K - 1),
169 .flags = IORESOURCE_MEM,
172 .name = "gpio0",
173 .start = IRQ_U300_GPIO_PORT0,
174 .end = IRQ_U300_GPIO_PORT0,
175 .flags = IORESOURCE_IRQ,
178 .name = "gpio1",
179 .start = IRQ_U300_GPIO_PORT1,
180 .end = IRQ_U300_GPIO_PORT1,
181 .flags = IORESOURCE_IRQ,
184 .name = "gpio2",
185 .start = IRQ_U300_GPIO_PORT2,
186 .end = IRQ_U300_GPIO_PORT2,
187 .flags = IORESOURCE_IRQ,
190 .name = "gpio3",
191 .start = IRQ_U300_GPIO_PORT3,
192 .end = IRQ_U300_GPIO_PORT3,
193 .flags = IORESOURCE_IRQ,
196 .name = "gpio4",
197 .start = IRQ_U300_GPIO_PORT4,
198 .end = IRQ_U300_GPIO_PORT4,
199 .flags = IORESOURCE_IRQ,
202 .name = "gpio5",
203 .start = IRQ_U300_GPIO_PORT5,
204 .end = IRQ_U300_GPIO_PORT5,
205 .flags = IORESOURCE_IRQ,
208 .name = "gpio6",
209 .start = IRQ_U300_GPIO_PORT6,
210 .end = IRQ_U300_GPIO_PORT6,
211 .flags = IORESOURCE_IRQ,
215 static struct resource keypad_resources[] = {
217 .start = U300_KEYPAD_BASE,
218 .end = U300_KEYPAD_BASE + SZ_4K - 1,
219 .flags = IORESOURCE_MEM,
222 .name = "coh901461-press",
223 .start = IRQ_U300_KEYPAD_KEYBF,
224 .end = IRQ_U300_KEYPAD_KEYBF,
225 .flags = IORESOURCE_IRQ,
228 .name = "coh901461-release",
229 .start = IRQ_U300_KEYPAD_KEYBR,
230 .end = IRQ_U300_KEYPAD_KEYBR,
231 .flags = IORESOURCE_IRQ,
235 static struct resource rtc_resources[] = {
237 .start = U300_RTC_BASE,
238 .end = U300_RTC_BASE + SZ_4K - 1,
239 .flags = IORESOURCE_MEM,
242 .start = IRQ_U300_RTC,
243 .end = IRQ_U300_RTC,
244 .flags = IORESOURCE_IRQ,
249 * Fsmc does have IRQs: #43 and #44 (NFIF and NFIF2)
250 * but these are not yet used by the driver.
252 static struct resource fsmc_resources[] = {
254 .name = "nand_addr",
255 .start = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_ALE,
256 .end = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_ALE + SZ_16K - 1,
257 .flags = IORESOURCE_MEM,
260 .name = "nand_cmd",
261 .start = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_CLE,
262 .end = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_CLE + SZ_16K - 1,
263 .flags = IORESOURCE_MEM,
266 .name = "nand_data",
267 .start = U300_NAND_CS0_PHYS_BASE,
268 .end = U300_NAND_CS0_PHYS_BASE + SZ_16K - 1,
269 .flags = IORESOURCE_MEM,
272 .name = "fsmc_regs",
273 .start = U300_NAND_IF_PHYS_BASE,
274 .end = U300_NAND_IF_PHYS_BASE + SZ_4K - 1,
275 .flags = IORESOURCE_MEM,
279 static struct resource i2c0_resources[] = {
281 .start = U300_I2C0_BASE,
282 .end = U300_I2C0_BASE + SZ_4K - 1,
283 .flags = IORESOURCE_MEM,
286 .start = IRQ_U300_I2C0,
287 .end = IRQ_U300_I2C0,
288 .flags = IORESOURCE_IRQ,
292 static struct resource i2c1_resources[] = {
294 .start = U300_I2C1_BASE,
295 .end = U300_I2C1_BASE + SZ_4K - 1,
296 .flags = IORESOURCE_MEM,
299 .start = IRQ_U300_I2C1,
300 .end = IRQ_U300_I2C1,
301 .flags = IORESOURCE_IRQ,
306 static struct resource wdog_resources[] = {
308 .start = U300_WDOG_BASE,
309 .end = U300_WDOG_BASE + SZ_4K - 1,
310 .flags = IORESOURCE_MEM,
313 .start = IRQ_U300_WDOG,
314 .end = IRQ_U300_WDOG,
315 .flags = IORESOURCE_IRQ,
319 static struct resource dma_resource[] = {
321 .start = U300_DMAC_BASE,
322 .end = U300_DMAC_BASE + PAGE_SIZE - 1,
323 .flags = IORESOURCE_MEM,
326 .start = IRQ_U300_DMA,
327 .end = IRQ_U300_DMA,
328 .flags = IORESOURCE_IRQ,
333 static struct resource pinctrl_resources[] = {
335 .start = U300_SYSCON_BASE,
336 .end = U300_SYSCON_BASE + SZ_4K - 1,
337 .flags = IORESOURCE_MEM,
341 static struct platform_device wdog_device = {
342 .name = "coh901327_wdog",
343 .id = -1,
344 .num_resources = ARRAY_SIZE(wdog_resources),
345 .resource = wdog_resources,
348 static struct platform_device i2c0_device = {
349 .name = "stu300",
350 .id = 0,
351 .num_resources = ARRAY_SIZE(i2c0_resources),
352 .resource = i2c0_resources,
355 static struct platform_device i2c1_device = {
356 .name = "stu300",
357 .id = 1,
358 .num_resources = ARRAY_SIZE(i2c1_resources),
359 .resource = i2c1_resources,
362 static struct platform_device pinctrl_device = {
363 .name = "pinctrl-u300",
364 .id = -1,
365 .num_resources = ARRAY_SIZE(pinctrl_resources),
366 .resource = pinctrl_resources,
370 * The different variants have a few different versions of the
371 * GPIO block, with different number of ports.
373 static struct u300_gpio_platform u300_gpio_plat = {
374 .ports = 7,
375 .gpio_base = 0,
378 static struct platform_device gpio_device = {
379 .name = "u300-gpio",
380 .id = -1,
381 .num_resources = ARRAY_SIZE(gpio_resources),
382 .resource = gpio_resources,
383 .dev = {
384 .platform_data = &u300_gpio_plat,
388 static struct platform_device keypad_device = {
389 .name = "keypad",
390 .id = -1,
391 .num_resources = ARRAY_SIZE(keypad_resources),
392 .resource = keypad_resources,
395 static struct platform_device rtc_device = {
396 .name = "rtc-coh901331",
397 .id = -1,
398 .num_resources = ARRAY_SIZE(rtc_resources),
399 .resource = rtc_resources,
402 static struct mtd_partition u300_partitions[] = {
404 .name = "bootrecords",
405 .offset = 0,
406 .size = SZ_128K,
409 .name = "free",
410 .offset = SZ_128K,
411 .size = 8064 * SZ_1K,
414 .name = "platform",
415 .offset = 8192 * SZ_1K,
416 .size = 253952 * SZ_1K,
420 static struct fsmc_nand_platform_data nand_platform_data = {
421 .partitions = u300_partitions,
422 .nr_partitions = ARRAY_SIZE(u300_partitions),
423 .options = NAND_SKIP_BBTSCAN,
424 .width = FSMC_NAND_BW8,
427 static struct platform_device nand_device = {
428 .name = "fsmc-nand",
429 .id = -1,
430 .resource = fsmc_resources,
431 .num_resources = ARRAY_SIZE(fsmc_resources),
432 .dev = {
433 .platform_data = &nand_platform_data,
437 static struct platform_device dma_device = {
438 .name = "coh901318",
439 .id = -1,
440 .resource = dma_resource,
441 .num_resources = ARRAY_SIZE(dma_resource),
442 .dev = {
443 .coherent_dma_mask = ~0,
447 static unsigned long pin_pullup_conf[] = {
448 PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 1),
451 static unsigned long pin_highz_conf[] = {
452 PIN_CONF_PACKED(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, 0),
455 /* Pin control settings */
456 static struct pinctrl_map __initdata u300_pinmux_map[] = {
457 /* anonymous maps for chip power and EMIFs */
458 PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-u300", NULL, "power"),
459 PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-u300", NULL, "emif0"),
460 PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-u300", NULL, "emif1"),
461 /* per-device maps for MMC/SD, SPI and UART */
462 PIN_MAP_MUX_GROUP_DEFAULT("mmci", "pinctrl-u300", NULL, "mmc0"),
463 PIN_MAP_MUX_GROUP_DEFAULT("pl022", "pinctrl-u300", NULL, "spi0"),
464 PIN_MAP_MUX_GROUP_DEFAULT("uart0", "pinctrl-u300", NULL, "uart0"),
465 /* This pin is used for clock return rather than GPIO */
466 PIN_MAP_CONFIGS_PIN_DEFAULT("mmci", "pinctrl-u300", "PIO APP GPIO 11",
467 pin_pullup_conf),
468 /* This pin is used for card detect */
469 PIN_MAP_CONFIGS_PIN_DEFAULT("mmci", "pinctrl-u300", "PIO MS INS",
470 pin_highz_conf),
474 * Notice that AMBA devices are initialized before platform devices.
477 static struct platform_device *platform_devs[] __initdata = {
478 &dma_device,
479 &i2c0_device,
480 &i2c1_device,
481 &keypad_device,
482 &rtc_device,
483 &pinctrl_device,
484 &gpio_device,
485 &nand_device,
486 &wdog_device,
490 * Interrupts: the U300 platforms have two pl190 ARM PrimeCells connected
491 * together so some interrupts are connected to the first one and some
492 * to the second one.
494 static void __init u300_init_irq(void)
496 u32 mask[2] = {0, 0};
497 struct clk *clk;
498 int i;
500 /* initialize clocking early, we want to clock the INTCON */
501 u300_clk_init(U300_SYSCON_VBASE);
503 /* Bootstrap EMIF and SEMI clocks */
504 clk = clk_get_sys("pl172", NULL);
505 BUG_ON(IS_ERR(clk));
506 clk_prepare_enable(clk);
507 clk = clk_get_sys("semi", NULL);
508 BUG_ON(IS_ERR(clk));
509 clk_prepare_enable(clk);
511 /* Clock the interrupt controller */
512 clk = clk_get_sys("intcon", NULL);
513 BUG_ON(IS_ERR(clk));
514 clk_prepare_enable(clk);
516 for (i = 0; i < U300_VIC_IRQS_END; i++)
517 set_bit(i, (unsigned long *) &mask[0]);
518 vic_init((void __iomem *) U300_INTCON0_VBASE, IRQ_U300_INTCON0_START,
519 mask[0], mask[0]);
520 vic_init((void __iomem *) U300_INTCON1_VBASE, IRQ_U300_INTCON1_START,
521 mask[1], mask[1]);
526 * U300 platforms peripheral handling
528 struct db_chip {
529 u16 chipid;
530 const char *name;
534 * This is a list of the Digital Baseband chips used in the U300 platform.
536 static struct db_chip db_chips[] __initdata = {
538 .chipid = 0xb800,
539 .name = "DB3000",
542 .chipid = 0xc000,
543 .name = "DB3100",
546 .chipid = 0xc800,
547 .name = "DB3150",
550 .chipid = 0xd800,
551 .name = "DB3200",
554 .chipid = 0xe000,
555 .name = "DB3250",
558 .chipid = 0xe800,
559 .name = "DB3210",
562 .chipid = 0xf000,
563 .name = "DB3350 P1x",
566 .chipid = 0xf100,
567 .name = "DB3350 P2x",
570 .chipid = 0x0000, /* List terminator */
571 .name = NULL,
575 static void __init u300_init_check_chip(void)
578 u16 val;
579 struct db_chip *chip;
580 const char *chipname;
581 const char unknown[] = "UNKNOWN";
583 /* Read out and print chip ID */
584 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CIDR);
585 /* This is in funky bigendian order... */
586 val = (val & 0xFFU) << 8 | (val >> 8);
587 chip = db_chips;
588 chipname = unknown;
590 for ( ; chip->chipid; chip++) {
591 if (chip->chipid == (val & 0xFF00U)) {
592 chipname = chip->name;
593 break;
596 printk(KERN_INFO "Initializing U300 system on %s baseband chip " \
597 "(chip ID 0x%04x)\n", chipname, val);
599 if ((val & 0xFF00U) != 0xf000 && (val & 0xFF00U) != 0xf100) {
600 printk(KERN_ERR "Platform configured for BS335 " \
601 " with DB3350 but %s detected, expect problems!",
602 chipname);
607 * Some devices and their resources require reserved physical memory from
608 * the end of the available RAM. This function traverses the list of devices
609 * and assigns actual addresses to these.
611 static void __init u300_assign_physmem(void)
613 unsigned long curr_start = __pa(high_memory);
614 int i, j;
616 for (i = 0; i < ARRAY_SIZE(platform_devs); i++) {
617 for (j = 0; j < platform_devs[i]->num_resources; j++) {
618 struct resource *const res =
619 &platform_devs[i]->resource[j];
621 if (IORESOURCE_MEM == res->flags &&
622 0 == res->start) {
623 res->start = curr_start;
624 res->end += curr_start;
625 curr_start += resource_size(res);
627 printk(KERN_INFO "core.c: Mapping RAM " \
628 "%#x-%#x to device %s:%s\n",
629 res->start, res->end,
630 platform_devs[i]->name, res->name);
636 static void __init u300_init_machine(void)
638 int i;
639 u16 val;
641 /* Check what platform we run and print some status information */
642 u300_init_check_chip();
644 /* Initialize SPI device with some board specifics */
645 u300_spi_init(&pl022_device);
647 /* Register the AMBA devices in the AMBA bus abstraction layer */
648 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
649 struct amba_device *d = amba_devs[i];
650 amba_device_register(d, &iomem_resource);
653 u300_assign_physmem();
655 /* Initialize pinmuxing */
656 pinctrl_register_mappings(u300_pinmux_map,
657 ARRAY_SIZE(u300_pinmux_map));
659 /* Register subdevices on the I2C buses */
660 u300_i2c_register_board_devices();
662 /* Register the platform devices */
663 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
665 /* Register subdevices on the SPI bus */
666 u300_spi_register_board_devices();
668 /* Enable SEMI self refresh */
669 val = readw(U300_SYSCON_VBASE + U300_SYSCON_SMCR) |
670 U300_SYSCON_SMCR_SEMI_SREFREQ_ENABLE;
671 writew(val, U300_SYSCON_VBASE + U300_SYSCON_SMCR);
674 /* Forward declare this function from the watchdog */
675 void coh901327_watchdog_reset(void);
677 static void u300_restart(char mode, const char *cmd)
679 switch (mode) {
680 case 's':
681 case 'h':
682 #ifdef CONFIG_COH901327_WATCHDOG
683 coh901327_watchdog_reset();
684 #endif
685 break;
686 default:
687 /* Do nothing */
688 break;
690 /* Wait for system do die/reset. */
691 while (1);
694 MACHINE_START(U300, "Ericsson AB U335 S335/B335 Prototype Board")
695 /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */
696 .atag_offset = 0x100,
697 .map_io = u300_map_io,
698 .nr_irqs = 0,
699 .init_irq = u300_init_irq,
700 .init_time = u300_timer_init,
701 .init_machine = u300_init_machine,
702 .restart = u300_restart,
703 MACHINE_END
705 #ifdef CONFIG_OF
707 /* These are mostly to get the right device names for the clock lookups */
708 static struct of_dev_auxdata u300_auxdata_lookup[] __initdata = {
709 OF_DEV_AUXDATA("stericsson,pinctrl-u300", U300_SYSCON_BASE,
710 "pinctrl-u300", NULL),
711 OF_DEV_AUXDATA("stericsson,gpio-coh901", U300_GPIO_BASE,
712 "u300-gpio", &u300_gpio_plat),
713 OF_DEV_AUXDATA("stericsson,coh901327", U300_WDOG_BASE,
714 "coh901327_wdog", NULL),
715 OF_DEV_AUXDATA("stericsson,coh901331", U300_RTC_BASE,
716 "rtc-coh901331", NULL),
717 OF_DEV_AUXDATA("stericsson,coh901318", U300_DMAC_BASE,
718 "coh901318", NULL),
719 OF_DEV_AUXDATA("arm,primecell", U300_UART0_BASE,
720 "uart0", &uart0_plat_data),
721 OF_DEV_AUXDATA("arm,primecell", U300_UART1_BASE,
722 "uart1", &uart1_plat_data),
723 OF_DEV_AUXDATA("st,ddci2c", U300_I2C0_BASE,
724 "stu300.0", NULL),
725 OF_DEV_AUXDATA("st,ddci2c", U300_I2C1_BASE,
726 "stu300.1", NULL),
727 OF_DEV_AUXDATA("arm,primecell", U300_MMCSD_BASE,
728 "mmci", &mmcsd_platform_data),
729 { /* sentinel */ },
732 static void __init u300_init_irq_dt(void)
734 struct clk *clk;
736 /* initialize clocking early, we want to clock the INTCON */
737 u300_clk_init(U300_SYSCON_VBASE);
739 /* Bootstrap EMIF and SEMI clocks */
740 clk = clk_get_sys("pl172", NULL);
741 BUG_ON(IS_ERR(clk));
742 clk_prepare_enable(clk);
743 clk = clk_get_sys("semi", NULL);
744 BUG_ON(IS_ERR(clk));
745 clk_prepare_enable(clk);
747 /* Clock the interrupt controller */
748 clk = clk_get_sys("intcon", NULL);
749 BUG_ON(IS_ERR(clk));
750 clk_prepare_enable(clk);
752 irqchip_init();
755 static void __init u300_init_machine_dt(void)
757 u16 val;
759 /* Check what platform we run and print some status information */
760 u300_init_check_chip();
762 u300_assign_physmem();
764 /* Initialize pinmuxing */
765 pinctrl_register_mappings(u300_pinmux_map,
766 ARRAY_SIZE(u300_pinmux_map));
768 of_platform_populate(NULL, of_default_bus_match_table,
769 u300_auxdata_lookup, NULL);
771 /* Enable SEMI self refresh */
772 val = readw(U300_SYSCON_VBASE + U300_SYSCON_SMCR) |
773 U300_SYSCON_SMCR_SEMI_SREFREQ_ENABLE;
774 writew(val, U300_SYSCON_VBASE + U300_SYSCON_SMCR);
777 static const char * u300_board_compat[] = {
778 "stericsson,u300",
779 NULL,
782 DT_MACHINE_START(U300_DT, "U300 S335/B335 (Device Tree)")
783 .map_io = u300_map_io,
784 .init_irq = u300_init_irq_dt,
785 .init_time = clocksource_of_init,
786 .init_machine = u300_init_machine_dt,
787 .restart = u300_restart,
788 .dt_compat = u300_board_compat,
789 MACHINE_END
791 #endif /* CONFIG_OF */