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KVM: MMU: fix writable sync sp mapping
[linux-2.6.git] / arch / x86 / kvm / mmu.c
blobca07ed083b59a4d1cc8d436215528dbcf9b3a384
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affilates.
11 *
12 * Authors:
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 #include "mmu.h"
22 #include "x86.h"
23 #include "kvm_cache_regs.h"
24
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
28 #include <linux/mm.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
37
38 #include <asm/page.h>
39 #include <asm/cmpxchg.h>
40 #include <asm/io.h>
41 #include <asm/vmx.h>
42
43 /*
44 * When setting this variable to true it enables Two-Dimensional-Paging
45 * where the hardware walks 2 page tables:
46 * 1. the guest-virtual to guest-physical
47 * 2. while doing 1. it walks guest-physical to host-physical
48 * If the hardware supports that we don't need to do shadow paging.
49 */
50 bool tdp_enabled = false;
51
52 #undef MMU_DEBUG
53
54 #undef AUDIT
55
56 #ifdef AUDIT
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
58 #else
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
60 #endif
61
62 #ifdef MMU_DEBUG
63
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
66
67 #else
68
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
71
72 #endif
73
74 #if defined(MMU_DEBUG) || defined(AUDIT)
75 static int dbg = 0;
76 module_param(dbg, bool, 0644);
77 #endif
78
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
81
82 #ifndef MMU_DEBUG
83 #define ASSERT(x) do { } while (0)
84 #else
85 #define ASSERT(x) \
86 if (!(x)) { \
87 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
88 __FILE__, __LINE__, #x); \
89 }
90 #endif
91
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
94
95 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
96
97 #define PT64_LEVEL_BITS 9
98
99 #define PT64_LEVEL_SHIFT(level) \
100 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
101
102 #define PT64_LEVEL_MASK(level) \
103 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
104
105 #define PT64_INDEX(address, level)\
106 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
107
108
109 #define PT32_LEVEL_BITS 10
110
111 #define PT32_LEVEL_SHIFT(level) \
112 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
113
114 #define PT32_LEVEL_MASK(level) \
115 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
116 #define PT32_LVL_OFFSET_MASK(level) \
117 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
118 * PT32_LEVEL_BITS))) - 1))
119
120 #define PT32_INDEX(address, level)\
121 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
122
123
124 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
125 #define PT64_DIR_BASE_ADDR_MASK \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
127 #define PT64_LVL_ADDR_MASK(level) \
128 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
129 * PT64_LEVEL_BITS))) - 1))
130 #define PT64_LVL_OFFSET_MASK(level) \
131 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
132 * PT64_LEVEL_BITS))) - 1))
133
134 #define PT32_BASE_ADDR_MASK PAGE_MASK
135 #define PT32_DIR_BASE_ADDR_MASK \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
137 #define PT32_LVL_ADDR_MASK(level) \
138 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
139 * PT32_LEVEL_BITS))) - 1))
140
141 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
142 | PT64_NX_MASK)
143
144 #define RMAP_EXT 4
145
146 #define ACC_EXEC_MASK 1
147 #define ACC_WRITE_MASK PT_WRITABLE_MASK
148 #define ACC_USER_MASK PT_USER_MASK
149 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
150
151 #include <trace/events/kvm.h>
152
153 #define CREATE_TRACE_POINTS
154 #include "mmutrace.h"
155
156 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
157
158 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
159
160 struct kvm_rmap_desc {
161 u64 *sptes[RMAP_EXT];
162 struct kvm_rmap_desc *more;
163 };
164
165 struct kvm_shadow_walk_iterator {
166 u64 addr;
167 hpa_t shadow_addr;
168 int level;
169 u64 *sptep;
170 unsigned index;
171 };
172
173 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
174 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
175 shadow_walk_okay(&(_walker)); \
176 shadow_walk_next(&(_walker)))
177
178 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
179
180 static struct kmem_cache *pte_chain_cache;
181 static struct kmem_cache *rmap_desc_cache;
182 static struct kmem_cache *mmu_page_header_cache;
183
184 static u64 __read_mostly shadow_trap_nonpresent_pte;
185 static u64 __read_mostly shadow_notrap_nonpresent_pte;
186 static u64 __read_mostly shadow_base_present_pte;
187 static u64 __read_mostly shadow_nx_mask;
188 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
189 static u64 __read_mostly shadow_user_mask;
190 static u64 __read_mostly shadow_accessed_mask;
191 static u64 __read_mostly shadow_dirty_mask;
192
193 static inline u64 rsvd_bits(int s, int e)
194 {
195 return ((1ULL << (e - s + 1)) - 1) << s;
196 }
197
198 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
199 {
200 shadow_trap_nonpresent_pte = trap_pte;
201 shadow_notrap_nonpresent_pte = notrap_pte;
202 }
203 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
204
205 void kvm_mmu_set_base_ptes(u64 base_pte)
206 {
207 shadow_base_present_pte = base_pte;
208 }
209 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
210
211 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
212 u64 dirty_mask, u64 nx_mask, u64 x_mask)
213 {
214 shadow_user_mask = user_mask;
215 shadow_accessed_mask = accessed_mask;
216 shadow_dirty_mask = dirty_mask;
217 shadow_nx_mask = nx_mask;
218 shadow_x_mask = x_mask;
219 }
220 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
221
222 static bool is_write_protection(struct kvm_vcpu *vcpu)
223 {
224 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
225 }
226
227 static int is_cpuid_PSE36(void)
228 {
229 return 1;
230 }
231
232 static int is_nx(struct kvm_vcpu *vcpu)
233 {
234 return vcpu->arch.efer & EFER_NX;
235 }
236
237 static int is_shadow_present_pte(u64 pte)
238 {
239 return pte != shadow_trap_nonpresent_pte
240 && pte != shadow_notrap_nonpresent_pte;
241 }
242
243 static int is_large_pte(u64 pte)
244 {
245 return pte & PT_PAGE_SIZE_MASK;
246 }
247
248 static int is_writable_pte(unsigned long pte)
249 {
250 return pte & PT_WRITABLE_MASK;
251 }
252
253 static int is_dirty_gpte(unsigned long pte)
254 {
255 return pte & PT_DIRTY_MASK;
256 }
257
258 static int is_rmap_spte(u64 pte)
259 {
260 return is_shadow_present_pte(pte);
261 }
262
263 static int is_last_spte(u64 pte, int level)
264 {
265 if (level == PT_PAGE_TABLE_LEVEL)
266 return 1;
267 if (is_large_pte(pte))
268 return 1;
269 return 0;
270 }
271
272 static pfn_t spte_to_pfn(u64 pte)
273 {
274 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
275 }
276
277 static gfn_t pse36_gfn_delta(u32 gpte)
278 {
279 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
280
281 return (gpte & PT32_DIR_PSE36_MASK) << shift;
282 }
283
284 static void __set_spte(u64 *sptep, u64 spte)
285 {
286 #ifdef CONFIG_X86_64
287 set_64bit((unsigned long *)sptep, spte);
288 #else
289 set_64bit((unsigned long long *)sptep, spte);
290 #endif
291 }
292
293 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
294 struct kmem_cache *base_cache, int min)
295 {
296 void *obj;
297
298 if (cache->nobjs >= min)
299 return 0;
300 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
301 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
302 if (!obj)
303 return -ENOMEM;
304 cache->objects[cache->nobjs++] = obj;
305 }
306 return 0;
307 }
308
309 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
310 struct kmem_cache *cache)
311 {
312 while (mc->nobjs)
313 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
314 }
315
316 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
317 int min)
318 {
319 struct page *page;
320
321 if (cache->nobjs >= min)
322 return 0;
323 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
324 page = alloc_page(GFP_KERNEL);
325 if (!page)
326 return -ENOMEM;
327 cache->objects[cache->nobjs++] = page_address(page);
328 }
329 return 0;
330 }
331
332 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
333 {
334 while (mc->nobjs)
335 free_page((unsigned long)mc->objects[--mc->nobjs]);
336 }
337
338 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
339 {
340 int r;
341
342 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
343 pte_chain_cache, 4);
344 if (r)
345 goto out;
346 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
347 rmap_desc_cache, 4);
348 if (r)
349 goto out;
350 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
351 if (r)
352 goto out;
353 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
354 mmu_page_header_cache, 4);
355 out:
356 return r;
357 }
358
359 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
360 {
361 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
362 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
363 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
364 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
365 mmu_page_header_cache);
366 }
367
368 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
369 size_t size)
370 {
371 void *p;
372
373 BUG_ON(!mc->nobjs);
374 p = mc->objects[--mc->nobjs];
375 return p;
376 }
377
378 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
379 {
380 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
381 sizeof(struct kvm_pte_chain));
382 }
383
384 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
385 {
386 kmem_cache_free(pte_chain_cache, pc);
387 }
388
389 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
390 {
391 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
392 sizeof(struct kvm_rmap_desc));
393 }
394
395 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
396 {
397 kmem_cache_free(rmap_desc_cache, rd);
398 }
399
400 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
401 {
402 if (!sp->role.direct)
403 return sp->gfns[index];
404
405 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
406 }
407
408 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
409 {
410 if (sp->role.direct)
411 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
412 else
413 sp->gfns[index] = gfn;
414 }
415
416 /*
417 * Return the pointer to the largepage write count for a given
418 * gfn, handling slots that are not large page aligned.
419 */
420 static int *slot_largepage_idx(gfn_t gfn,
421 struct kvm_memory_slot *slot,
422 int level)
423 {
424 unsigned long idx;
425
426 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
427 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
428 return &slot->lpage_info[level - 2][idx].write_count;
429 }
430
431 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
432 {
433 struct kvm_memory_slot *slot;
434 int *write_count;
435 int i;
436
437 slot = gfn_to_memslot(kvm, gfn);
438 for (i = PT_DIRECTORY_LEVEL;
439 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
440 write_count = slot_largepage_idx(gfn, slot, i);
441 *write_count += 1;
442 }
443 }
444
445 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
446 {
447 struct kvm_memory_slot *slot;
448 int *write_count;
449 int i;
450
451 slot = gfn_to_memslot(kvm, gfn);
452 for (i = PT_DIRECTORY_LEVEL;
453 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
454 write_count = slot_largepage_idx(gfn, slot, i);
455 *write_count -= 1;
456 WARN_ON(*write_count < 0);
457 }
458 }
459
460 static int has_wrprotected_page(struct kvm *kvm,
461 gfn_t gfn,
462 int level)
463 {
464 struct kvm_memory_slot *slot;
465 int *largepage_idx;
466
467 slot = gfn_to_memslot(kvm, gfn);
468 if (slot) {
469 largepage_idx = slot_largepage_idx(gfn, slot, level);
470 return *largepage_idx;
471 }
472
473 return 1;
474 }
475
476 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
477 {
478 unsigned long page_size;
479 int i, ret = 0;
480
481 page_size = kvm_host_page_size(kvm, gfn);
482
483 for (i = PT_PAGE_TABLE_LEVEL;
484 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
485 if (page_size >= KVM_HPAGE_SIZE(i))
486 ret = i;
487 else
488 break;
489 }
490
491 return ret;
492 }
493
494 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
495 {
496 struct kvm_memory_slot *slot;
497 int host_level, level, max_level;
498
499 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
500 if (slot && slot->dirty_bitmap)
501 return PT_PAGE_TABLE_LEVEL;
502
503 host_level = host_mapping_level(vcpu->kvm, large_gfn);
504
505 if (host_level == PT_PAGE_TABLE_LEVEL)
506 return host_level;
507
508 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
509 kvm_x86_ops->get_lpage_level() : host_level;
510
511 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
512 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
513 break;
514
515 return level - 1;
516 }
517
518 /*
519 * Take gfn and return the reverse mapping to it.
520 */
521
522 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
523 {
524 struct kvm_memory_slot *slot;
525 unsigned long idx;
526
527 slot = gfn_to_memslot(kvm, gfn);
528 if (likely(level == PT_PAGE_TABLE_LEVEL))
529 return &slot->rmap[gfn - slot->base_gfn];
530
531 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
532 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
533
534 return &slot->lpage_info[level - 2][idx].rmap_pde;
535 }
536
537 /*
538 * Reverse mapping data structures:
539 *
540 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
541 * that points to page_address(page).
542 *
543 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
544 * containing more mappings.
545 *
546 * Returns the number of rmap entries before the spte was added or zero if
547 * the spte was not added.
548 *
549 */
550 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
551 {
552 struct kvm_mmu_page *sp;
553 struct kvm_rmap_desc *desc;
554 unsigned long *rmapp;
555 int i, count = 0;
556
557 if (!is_rmap_spte(*spte))
558 return count;
559 sp = page_header(__pa(spte));
560 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
561 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
562 if (!*rmapp) {
563 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
564 *rmapp = (unsigned long)spte;
565 } else if (!(*rmapp & 1)) {
566 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
567 desc = mmu_alloc_rmap_desc(vcpu);
568 desc->sptes[0] = (u64 *)*rmapp;
569 desc->sptes[1] = spte;
570 *rmapp = (unsigned long)desc | 1;
571 } else {
572 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
573 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
574 while (desc->sptes[RMAP_EXT-1] && desc->more) {
575 desc = desc->more;
576 count += RMAP_EXT;
577 }
578 if (desc->sptes[RMAP_EXT-1]) {
579 desc->more = mmu_alloc_rmap_desc(vcpu);
580 desc = desc->more;
581 }
582 for (i = 0; desc->sptes[i]; ++i)
583 ;
584 desc->sptes[i] = spte;
585 }
586 return count;
587 }
588
589 static void rmap_desc_remove_entry(unsigned long *rmapp,
590 struct kvm_rmap_desc *desc,
591 int i,
592 struct kvm_rmap_desc *prev_desc)
593 {
594 int j;
595
596 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
597 ;
598 desc->sptes[i] = desc->sptes[j];
599 desc->sptes[j] = NULL;
600 if (j != 0)
601 return;
602 if (!prev_desc && !desc->more)
603 *rmapp = (unsigned long)desc->sptes[0];
604 else
605 if (prev_desc)
606 prev_desc->more = desc->more;
607 else
608 *rmapp = (unsigned long)desc->more | 1;
609 mmu_free_rmap_desc(desc);
610 }
611
612 static void rmap_remove(struct kvm *kvm, u64 *spte)
613 {
614 struct kvm_rmap_desc *desc;
615 struct kvm_rmap_desc *prev_desc;
616 struct kvm_mmu_page *sp;
617 pfn_t pfn;
618 gfn_t gfn;
619 unsigned long *rmapp;
620 int i;
621
622 if (!is_rmap_spte(*spte))
623 return;
624 sp = page_header(__pa(spte));
625 pfn = spte_to_pfn(*spte);
626 if (*spte & shadow_accessed_mask)
627 kvm_set_pfn_accessed(pfn);
628 if (is_writable_pte(*spte))
629 kvm_set_pfn_dirty(pfn);
630 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
631 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
632 if (!*rmapp) {
633 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
634 BUG();
635 } else if (!(*rmapp & 1)) {
636 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
637 if ((u64 *)*rmapp != spte) {
638 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
639 spte, *spte);
640 BUG();
641 }
642 *rmapp = 0;
643 } else {
644 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
645 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
646 prev_desc = NULL;
647 while (desc) {
648 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
649 if (desc->sptes[i] == spte) {
650 rmap_desc_remove_entry(rmapp,
651 desc, i,
652 prev_desc);
653 return;
654 }
655 prev_desc = desc;
656 desc = desc->more;
657 }
658 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
659 BUG();
660 }
661 }
662
663 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
664 {
665 struct kvm_rmap_desc *desc;
666 u64 *prev_spte;
667 int i;
668
669 if (!*rmapp)
670 return NULL;
671 else if (!(*rmapp & 1)) {
672 if (!spte)
673 return (u64 *)*rmapp;
674 return NULL;
675 }
676 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
677 prev_spte = NULL;
678 while (desc) {
679 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
680 if (prev_spte == spte)
681 return desc->sptes[i];
682 prev_spte = desc->sptes[i];
683 }
684 desc = desc->more;
685 }
686 return NULL;
687 }
688
689 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
690 {
691 unsigned long *rmapp;
692 u64 *spte;
693 int i, write_protected = 0;
694
695 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
696
697 spte = rmap_next(kvm, rmapp, NULL);
698 while (spte) {
699 BUG_ON(!spte);
700 BUG_ON(!(*spte & PT_PRESENT_MASK));
701 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
702 if (is_writable_pte(*spte)) {
703 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
704 write_protected = 1;
705 }
706 spte = rmap_next(kvm, rmapp, spte);
707 }
708 if (write_protected) {
709 pfn_t pfn;
710
711 spte = rmap_next(kvm, rmapp, NULL);
712 pfn = spte_to_pfn(*spte);
713 kvm_set_pfn_dirty(pfn);
714 }
715
716 /* check for huge page mappings */
717 for (i = PT_DIRECTORY_LEVEL;
718 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
719 rmapp = gfn_to_rmap(kvm, gfn, i);
720 spte = rmap_next(kvm, rmapp, NULL);
721 while (spte) {
722 BUG_ON(!spte);
723 BUG_ON(!(*spte & PT_PRESENT_MASK));
724 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
725 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
726 if (is_writable_pte(*spte)) {
727 rmap_remove(kvm, spte);
728 --kvm->stat.lpages;
729 __set_spte(spte, shadow_trap_nonpresent_pte);
730 spte = NULL;
731 write_protected = 1;
732 }
733 spte = rmap_next(kvm, rmapp, spte);
734 }
735 }
736
737 return write_protected;
738 }
739
740 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
741 unsigned long data)
742 {
743 u64 *spte;
744 int need_tlb_flush = 0;
745
746 while ((spte = rmap_next(kvm, rmapp, NULL))) {
747 BUG_ON(!(*spte & PT_PRESENT_MASK));
748 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
749 rmap_remove(kvm, spte);
750 __set_spte(spte, shadow_trap_nonpresent_pte);
751 need_tlb_flush = 1;
752 }
753 return need_tlb_flush;
754 }
755
756 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
757 unsigned long data)
758 {
759 int need_flush = 0;
760 u64 *spte, new_spte;
761 pte_t *ptep = (pte_t *)data;
762 pfn_t new_pfn;
763
764 WARN_ON(pte_huge(*ptep));
765 new_pfn = pte_pfn(*ptep);
766 spte = rmap_next(kvm, rmapp, NULL);
767 while (spte) {
768 BUG_ON(!is_shadow_present_pte(*spte));
769 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
770 need_flush = 1;
771 if (pte_write(*ptep)) {
772 rmap_remove(kvm, spte);
773 __set_spte(spte, shadow_trap_nonpresent_pte);
774 spte = rmap_next(kvm, rmapp, NULL);
775 } else {
776 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
777 new_spte |= (u64)new_pfn << PAGE_SHIFT;
778
779 new_spte &= ~PT_WRITABLE_MASK;
780 new_spte &= ~SPTE_HOST_WRITEABLE;
781 if (is_writable_pte(*spte))
782 kvm_set_pfn_dirty(spte_to_pfn(*spte));
783 __set_spte(spte, new_spte);
784 spte = rmap_next(kvm, rmapp, spte);
785 }
786 }
787 if (need_flush)
788 kvm_flush_remote_tlbs(kvm);
789
790 return 0;
791 }
792
793 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
794 unsigned long data,
795 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
796 unsigned long data))
797 {
798 int i, j;
799 int ret;
800 int retval = 0;
801 struct kvm_memslots *slots;
802
803 slots = kvm_memslots(kvm);
804
805 for (i = 0; i < slots->nmemslots; i++) {
806 struct kvm_memory_slot *memslot = &slots->memslots[i];
807 unsigned long start = memslot->userspace_addr;
808 unsigned long end;
809
810 end = start + (memslot->npages << PAGE_SHIFT);
811 if (hva >= start && hva < end) {
812 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
813
814 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
815
816 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
817 int idx = gfn_offset;
818 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
819 ret |= handler(kvm,
820 &memslot->lpage_info[j][idx].rmap_pde,
821 data);
822 }
823 trace_kvm_age_page(hva, memslot, ret);
824 retval |= ret;
825 }
826 }
827
828 return retval;
829 }
830
831 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
832 {
833 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
834 }
835
836 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
837 {
838 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
839 }
840
841 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
842 unsigned long data)
843 {
844 u64 *spte;
845 int young = 0;
846
847 /*
848 * Emulate the accessed bit for EPT, by checking if this page has
849 * an EPT mapping, and clearing it if it does. On the next access,
850 * a new EPT mapping will be established.
851 * This has some overhead, but not as much as the cost of swapping
852 * out actively used pages or breaking up actively used hugepages.
853 */
854 if (!shadow_accessed_mask)
855 return kvm_unmap_rmapp(kvm, rmapp, data);
856
857 spte = rmap_next(kvm, rmapp, NULL);
858 while (spte) {
859 int _young;
860 u64 _spte = *spte;
861 BUG_ON(!(_spte & PT_PRESENT_MASK));
862 _young = _spte & PT_ACCESSED_MASK;
863 if (_young) {
864 young = 1;
865 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
866 }
867 spte = rmap_next(kvm, rmapp, spte);
868 }
869 return young;
870 }
871
872 #define RMAP_RECYCLE_THRESHOLD 1000
873
874 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
875 {
876 unsigned long *rmapp;
877 struct kvm_mmu_page *sp;
878
879 sp = page_header(__pa(spte));
880
881 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
882
883 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
884 kvm_flush_remote_tlbs(vcpu->kvm);
885 }
886
887 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
888 {
889 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
890 }
891
892 #ifdef MMU_DEBUG
893 static int is_empty_shadow_page(u64 *spt)
894 {
895 u64 *pos;
896 u64 *end;
897
898 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
899 if (is_shadow_present_pte(*pos)) {
900 printk(KERN_ERR "%s: %p %llx\n", __func__,
901 pos, *pos);
902 return 0;
903 }
904 return 1;
905 }
906 #endif
907
908 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
909 {
910 ASSERT(is_empty_shadow_page(sp->spt));
911 hlist_del(&sp->hash_link);
912 list_del(&sp->link);
913 __free_page(virt_to_page(sp->spt));
914 if (!sp->role.direct)
915 __free_page(virt_to_page(sp->gfns));
916 kmem_cache_free(mmu_page_header_cache, sp);
917 ++kvm->arch.n_free_mmu_pages;
918 }
919
920 static unsigned kvm_page_table_hashfn(gfn_t gfn)
921 {
922 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
923 }
924
925 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
926 u64 *parent_pte, int direct)
927 {
928 struct kvm_mmu_page *sp;
929
930 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
931 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
932 if (!direct)
933 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
934 PAGE_SIZE);
935 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
936 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
937 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
938 sp->multimapped = 0;
939 sp->parent_pte = parent_pte;
940 --vcpu->kvm->arch.n_free_mmu_pages;
941 return sp;
942 }
943
944 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
945 struct kvm_mmu_page *sp, u64 *parent_pte)
946 {
947 struct kvm_pte_chain *pte_chain;
948 struct hlist_node *node;
949 int i;
950
951 if (!parent_pte)
952 return;
953 if (!sp->multimapped) {
954 u64 *old = sp->parent_pte;
955
956 if (!old) {
957 sp->parent_pte = parent_pte;
958 return;
959 }
960 sp->multimapped = 1;
961 pte_chain = mmu_alloc_pte_chain(vcpu);
962 INIT_HLIST_HEAD(&sp->parent_ptes);
963 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
964 pte_chain->parent_ptes[0] = old;
965 }
966 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
967 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
968 continue;
969 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
970 if (!pte_chain->parent_ptes[i]) {
971 pte_chain->parent_ptes[i] = parent_pte;
972 return;
973 }
974 }
975 pte_chain = mmu_alloc_pte_chain(vcpu);
976 BUG_ON(!pte_chain);
977 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
978 pte_chain->parent_ptes[0] = parent_pte;
979 }
980
981 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
982 u64 *parent_pte)
983 {
984 struct kvm_pte_chain *pte_chain;
985 struct hlist_node *node;
986 int i;
987
988 if (!sp->multimapped) {
989 BUG_ON(sp->parent_pte != parent_pte);
990 sp->parent_pte = NULL;
991 return;
992 }
993 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
994 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
995 if (!pte_chain->parent_ptes[i])
996 break;
997 if (pte_chain->parent_ptes[i] != parent_pte)
998 continue;
999 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1000 && pte_chain->parent_ptes[i + 1]) {
1001 pte_chain->parent_ptes[i]
1002 = pte_chain->parent_ptes[i + 1];
1003 ++i;
1004 }
1005 pte_chain->parent_ptes[i] = NULL;
1006 if (i == 0) {
1007 hlist_del(&pte_chain->link);
1008 mmu_free_pte_chain(pte_chain);
1009 if (hlist_empty(&sp->parent_ptes)) {
1010 sp->multimapped = 0;
1011 sp->parent_pte = NULL;
1012 }
1013 }
1014 return;
1015 }
1016 BUG();
1017 }
1018
1019 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1020 {
1021 struct kvm_pte_chain *pte_chain;
1022 struct hlist_node *node;
1023 struct kvm_mmu_page *parent_sp;
1024 int i;
1025
1026 if (!sp->multimapped && sp->parent_pte) {
1027 parent_sp = page_header(__pa(sp->parent_pte));
1028 fn(parent_sp, sp->parent_pte);
1029 return;
1030 }
1031
1032 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1033 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1034 u64 *spte = pte_chain->parent_ptes[i];
1035
1036 if (!spte)
1037 break;
1038 parent_sp = page_header(__pa(spte));
1039 fn(parent_sp, spte);
1040 }
1041 }
1042
1043 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1044 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1045 {
1046 mmu_parent_walk(sp, mark_unsync);
1047 }
1048
1049 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1050 {
1051 unsigned int index;
1052
1053 index = spte - sp->spt;
1054 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1055 return;
1056 if (sp->unsync_children++)
1057 return;
1058 kvm_mmu_mark_parents_unsync(sp);
1059 }
1060
1061 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1062 struct kvm_mmu_page *sp)
1063 {
1064 int i;
1065
1066 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1067 sp->spt[i] = shadow_trap_nonpresent_pte;
1068 }
1069
1070 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1071 struct kvm_mmu_page *sp, bool clear_unsync)
1072 {
1073 return 1;
1074 }
1075
1076 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1077 {
1078 }
1079
1080 #define KVM_PAGE_ARRAY_NR 16
1081
1082 struct kvm_mmu_pages {
1083 struct mmu_page_and_offset {
1084 struct kvm_mmu_page *sp;
1085 unsigned int idx;
1086 } page[KVM_PAGE_ARRAY_NR];
1087 unsigned int nr;
1088 };
1089
1090 #define for_each_unsync_children(bitmap, idx) \
1091 for (idx = find_first_bit(bitmap, 512); \
1092 idx < 512; \
1093 idx = find_next_bit(bitmap, 512, idx+1))
1094
1095 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1096 int idx)
1097 {
1098 int i;
1099
1100 if (sp->unsync)
1101 for (i=0; i < pvec->nr; i++)
1102 if (pvec->page[i].sp == sp)
1103 return 0;
1104
1105 pvec->page[pvec->nr].sp = sp;
1106 pvec->page[pvec->nr].idx = idx;
1107 pvec->nr++;
1108 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1109 }
1110
1111 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1112 struct kvm_mmu_pages *pvec)
1113 {
1114 int i, ret, nr_unsync_leaf = 0;
1115
1116 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1117 struct kvm_mmu_page *child;
1118 u64 ent = sp->spt[i];
1119
1120 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1121 goto clear_child_bitmap;
1122
1123 child = page_header(ent & PT64_BASE_ADDR_MASK);
1124
1125 if (child->unsync_children) {
1126 if (mmu_pages_add(pvec, child, i))
1127 return -ENOSPC;
1128
1129 ret = __mmu_unsync_walk(child, pvec);
1130 if (!ret)
1131 goto clear_child_bitmap;
1132 else if (ret > 0)
1133 nr_unsync_leaf += ret;
1134 else
1135 return ret;
1136 } else if (child->unsync) {
1137 nr_unsync_leaf++;
1138 if (mmu_pages_add(pvec, child, i))
1139 return -ENOSPC;
1140 } else
1141 goto clear_child_bitmap;
1142
1143 continue;
1144
1145 clear_child_bitmap:
1146 __clear_bit(i, sp->unsync_child_bitmap);
1147 sp->unsync_children--;
1148 WARN_ON((int)sp->unsync_children < 0);
1149 }
1150
1151
1152 return nr_unsync_leaf;
1153 }
1154
1155 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1156 struct kvm_mmu_pages *pvec)
1157 {
1158 if (!sp->unsync_children)
1159 return 0;
1160
1161 mmu_pages_add(pvec, sp, 0);
1162 return __mmu_unsync_walk(sp, pvec);
1163 }
1164
1165 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1166 {
1167 WARN_ON(!sp->unsync);
1168 trace_kvm_mmu_sync_page(sp);
1169 sp->unsync = 0;
1170 --kvm->stat.mmu_unsync;
1171 }
1172
1173 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1174 struct list_head *invalid_list);
1175 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1176 struct list_head *invalid_list);
1177
1178 #define for_each_gfn_sp(kvm, sp, gfn, pos) \
1179 hlist_for_each_entry(sp, pos, \
1180 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1181 if ((sp)->gfn != (gfn)) {} else
1182
1183 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos) \
1184 hlist_for_each_entry(sp, pos, \
1185 &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link) \
1186 if ((sp)->gfn != (gfn) || (sp)->role.direct || \
1187 (sp)->role.invalid) {} else
1188
1189 /* @sp->gfn should be write-protected at the call site */
1190 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1191 struct list_head *invalid_list, bool clear_unsync)
1192 {
1193 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1194 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1195 return 1;
1196 }
1197
1198 if (clear_unsync)
1199 kvm_unlink_unsync_page(vcpu->kvm, sp);
1200
1201 if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1202 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1203 return 1;
1204 }
1205
1206 kvm_mmu_flush_tlb(vcpu);
1207 return 0;
1208 }
1209
1210 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1211 struct kvm_mmu_page *sp)
1212 {
1213 LIST_HEAD(invalid_list);
1214 int ret;
1215
1216 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1217 if (ret)
1218 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1219
1220 return ret;
1221 }
1222
1223 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1224 struct list_head *invalid_list)
1225 {
1226 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1227 }
1228
1229 /* @gfn should be write-protected at the call site */
1230 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1231 {
1232 struct kvm_mmu_page *s;
1233 struct hlist_node *node;
1234 LIST_HEAD(invalid_list);
1235 bool flush = false;
1236
1237 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1238 if (!s->unsync)
1239 continue;
1240
1241 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1242 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1243 (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1244 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1245 continue;
1246 }
1247 kvm_unlink_unsync_page(vcpu->kvm, s);
1248 flush = true;
1249 }
1250
1251 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1252 if (flush)
1253 kvm_mmu_flush_tlb(vcpu);
1254 }
1255
1256 struct mmu_page_path {
1257 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1258 unsigned int idx[PT64_ROOT_LEVEL-1];
1259 };
1260
1261 #define for_each_sp(pvec, sp, parents, i) \
1262 for (i = mmu_pages_next(&pvec, &parents, -1), \
1263 sp = pvec.page[i].sp; \
1264 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1265 i = mmu_pages_next(&pvec, &parents, i))
1266
1267 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1268 struct mmu_page_path *parents,
1269 int i)
1270 {
1271 int n;
1272
1273 for (n = i+1; n < pvec->nr; n++) {
1274 struct kvm_mmu_page *sp = pvec->page[n].sp;
1275
1276 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1277 parents->idx[0] = pvec->page[n].idx;
1278 return n;
1279 }
1280
1281 parents->parent[sp->role.level-2] = sp;
1282 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1283 }
1284
1285 return n;
1286 }
1287
1288 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1289 {
1290 struct kvm_mmu_page *sp;
1291 unsigned int level = 0;
1292
1293 do {
1294 unsigned int idx = parents->idx[level];
1295
1296 sp = parents->parent[level];
1297 if (!sp)
1298 return;
1299
1300 --sp->unsync_children;
1301 WARN_ON((int)sp->unsync_children < 0);
1302 __clear_bit(idx, sp->unsync_child_bitmap);
1303 level++;
1304 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1305 }
1306
1307 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1308 struct mmu_page_path *parents,
1309 struct kvm_mmu_pages *pvec)
1310 {
1311 parents->parent[parent->role.level-1] = NULL;
1312 pvec->nr = 0;
1313 }
1314
1315 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1316 struct kvm_mmu_page *parent)
1317 {
1318 int i;
1319 struct kvm_mmu_page *sp;
1320 struct mmu_page_path parents;
1321 struct kvm_mmu_pages pages;
1322 LIST_HEAD(invalid_list);
1323
1324 kvm_mmu_pages_init(parent, &parents, &pages);
1325 while (mmu_unsync_walk(parent, &pages)) {
1326 int protected = 0;
1327
1328 for_each_sp(pages, sp, parents, i)
1329 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1330
1331 if (protected)
1332 kvm_flush_remote_tlbs(vcpu->kvm);
1333
1334 for_each_sp(pages, sp, parents, i) {
1335 kvm_sync_page(vcpu, sp, &invalid_list);
1336 mmu_pages_clear_parents(&parents);
1337 }
1338 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1339 cond_resched_lock(&vcpu->kvm->mmu_lock);
1340 kvm_mmu_pages_init(parent, &parents, &pages);
1341 }
1342 }
1343
1344 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1345 gfn_t gfn,
1346 gva_t gaddr,
1347 unsigned level,
1348 int direct,
1349 unsigned access,
1350 u64 *parent_pte)
1351 {
1352 union kvm_mmu_page_role role;
1353 unsigned quadrant;
1354 struct kvm_mmu_page *sp;
1355 struct hlist_node *node;
1356 bool need_sync = false;
1357
1358 role = vcpu->arch.mmu.base_role;
1359 role.level = level;
1360 role.direct = direct;
1361 if (role.direct)
1362 role.cr4_pae = 0;
1363 role.access = access;
1364 if (!tdp_enabled && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1365 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1366 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1367 role.quadrant = quadrant;
1368 }
1369 for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1370 if (!need_sync && sp->unsync)
1371 need_sync = true;
1372
1373 if (sp->role.word != role.word)
1374 continue;
1375
1376 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1377 break;
1378
1379 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1380 if (sp->unsync_children) {
1381 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1382 kvm_mmu_mark_parents_unsync(sp);
1383 } else if (sp->unsync)
1384 kvm_mmu_mark_parents_unsync(sp);
1385
1386 trace_kvm_mmu_get_page(sp, false);
1387 return sp;
1388 }
1389 ++vcpu->kvm->stat.mmu_cache_miss;
1390 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1391 if (!sp)
1392 return sp;
1393 sp->gfn = gfn;
1394 sp->role = role;
1395 hlist_add_head(&sp->hash_link,
1396 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1397 if (!direct) {
1398 if (rmap_write_protect(vcpu->kvm, gfn))
1399 kvm_flush_remote_tlbs(vcpu->kvm);
1400 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1401 kvm_sync_pages(vcpu, gfn);
1402
1403 account_shadowed(vcpu->kvm, gfn);
1404 }
1405 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1406 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1407 else
1408 nonpaging_prefetch_page(vcpu, sp);
1409 trace_kvm_mmu_get_page(sp, true);
1410 return sp;
1411 }
1412
1413 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1414 struct kvm_vcpu *vcpu, u64 addr)
1415 {
1416 iterator->addr = addr;
1417 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1418 iterator->level = vcpu->arch.mmu.shadow_root_level;
1419 if (iterator->level == PT32E_ROOT_LEVEL) {
1420 iterator->shadow_addr
1421 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1422 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1423 --iterator->level;
1424 if (!iterator->shadow_addr)
1425 iterator->level = 0;
1426 }
1427 }
1428
1429 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1430 {
1431 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1432 return false;
1433
1434 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1435 if (is_large_pte(*iterator->sptep))
1436 return false;
1437
1438 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1439 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1440 return true;
1441 }
1442
1443 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1444 {
1445 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1446 --iterator->level;
1447 }
1448
1449 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1450 struct kvm_mmu_page *sp)
1451 {
1452 unsigned i;
1453 u64 *pt;
1454 u64 ent;
1455
1456 pt = sp->spt;
1457
1458 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1459 ent = pt[i];
1460
1461 if (is_shadow_present_pte(ent)) {
1462 if (!is_last_spte(ent, sp->role.level)) {
1463 ent &= PT64_BASE_ADDR_MASK;
1464 mmu_page_remove_parent_pte(page_header(ent),
1465 &pt[i]);
1466 } else {
1467 if (is_large_pte(ent))
1468 --kvm->stat.lpages;
1469 rmap_remove(kvm, &pt[i]);
1470 }
1471 }
1472 pt[i] = shadow_trap_nonpresent_pte;
1473 }
1474 }
1475
1476 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1477 {
1478 mmu_page_remove_parent_pte(sp, parent_pte);
1479 }
1480
1481 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1482 {
1483 int i;
1484 struct kvm_vcpu *vcpu;
1485
1486 kvm_for_each_vcpu(i, vcpu, kvm)
1487 vcpu->arch.last_pte_updated = NULL;
1488 }
1489
1490 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1491 {
1492 u64 *parent_pte;
1493
1494 while (sp->multimapped || sp->parent_pte) {
1495 if (!sp->multimapped)
1496 parent_pte = sp->parent_pte;
1497 else {
1498 struct kvm_pte_chain *chain;
1499
1500 chain = container_of(sp->parent_ptes.first,
1501 struct kvm_pte_chain, link);
1502 parent_pte = chain->parent_ptes[0];
1503 }
1504 BUG_ON(!parent_pte);
1505 kvm_mmu_put_page(sp, parent_pte);
1506 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1507 }
1508 }
1509
1510 static int mmu_zap_unsync_children(struct kvm *kvm,
1511 struct kvm_mmu_page *parent,
1512 struct list_head *invalid_list)
1513 {
1514 int i, zapped = 0;
1515 struct mmu_page_path parents;
1516 struct kvm_mmu_pages pages;
1517
1518 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1519 return 0;
1520
1521 kvm_mmu_pages_init(parent, &parents, &pages);
1522 while (mmu_unsync_walk(parent, &pages)) {
1523 struct kvm_mmu_page *sp;
1524
1525 for_each_sp(pages, sp, parents, i) {
1526 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1527 mmu_pages_clear_parents(&parents);
1528 zapped++;
1529 }
1530 kvm_mmu_pages_init(parent, &parents, &pages);
1531 }
1532
1533 return zapped;
1534 }
1535
1536 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1537 struct list_head *invalid_list)
1538 {
1539 int ret;
1540
1541 trace_kvm_mmu_prepare_zap_page(sp);
1542 ++kvm->stat.mmu_shadow_zapped;
1543 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1544 kvm_mmu_page_unlink_children(kvm, sp);
1545 kvm_mmu_unlink_parents(kvm, sp);
1546 if (!sp->role.invalid && !sp->role.direct)
1547 unaccount_shadowed(kvm, sp->gfn);
1548 if (sp->unsync)
1549 kvm_unlink_unsync_page(kvm, sp);
1550 if (!sp->root_count) {
1551 /* Count self */
1552 ret++;
1553 list_move(&sp->link, invalid_list);
1554 } else {
1555 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1556 kvm_reload_remote_mmus(kvm);
1557 }
1558
1559 sp->role.invalid = 1;
1560 kvm_mmu_reset_last_pte_updated(kvm);
1561 return ret;
1562 }
1563
1564 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1565 struct list_head *invalid_list)
1566 {
1567 struct kvm_mmu_page *sp;
1568
1569 if (list_empty(invalid_list))
1570 return;
1571
1572 kvm_flush_remote_tlbs(kvm);
1573
1574 do {
1575 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1576 WARN_ON(!sp->role.invalid || sp->root_count);
1577 kvm_mmu_free_page(kvm, sp);
1578 } while (!list_empty(invalid_list));
1579
1580 }
1581
1582 /*
1583 * Changing the number of mmu pages allocated to the vm
1584 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1585 */
1586 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1587 {
1588 int used_pages;
1589 LIST_HEAD(invalid_list);
1590
1591 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1592 used_pages = max(0, used_pages);
1593
1594 /*
1595 * If we set the number of mmu pages to be smaller be than the
1596 * number of actived pages , we must to free some mmu pages before we
1597 * change the value
1598 */
1599
1600 if (used_pages > kvm_nr_mmu_pages) {
1601 while (used_pages > kvm_nr_mmu_pages &&
1602 !list_empty(&kvm->arch.active_mmu_pages)) {
1603 struct kvm_mmu_page *page;
1604
1605 page = container_of(kvm->arch.active_mmu_pages.prev,
1606 struct kvm_mmu_page, link);
1607 used_pages -= kvm_mmu_prepare_zap_page(kvm, page,
1608 &invalid_list);
1609 }
1610 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1611 kvm_nr_mmu_pages = used_pages;
1612 kvm->arch.n_free_mmu_pages = 0;
1613 }
1614 else
1615 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1616 - kvm->arch.n_alloc_mmu_pages;
1617
1618 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1619 }
1620
1621 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1622 {
1623 struct kvm_mmu_page *sp;
1624 struct hlist_node *node;
1625 LIST_HEAD(invalid_list);
1626 int r;
1627
1628 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1629 r = 0;
1630
1631 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1632 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1633 sp->role.word);
1634 r = 1;
1635 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1636 }
1637 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1638 return r;
1639 }
1640
1641 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1642 {
1643 struct kvm_mmu_page *sp;
1644 struct hlist_node *node;
1645 LIST_HEAD(invalid_list);
1646
1647 for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1648 pgprintk("%s: zap %lx %x\n",
1649 __func__, gfn, sp->role.word);
1650 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1651 }
1652 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1653 }
1654
1655 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1656 {
1657 int slot = memslot_id(kvm, gfn);
1658 struct kvm_mmu_page *sp = page_header(__pa(pte));
1659
1660 __set_bit(slot, sp->slot_bitmap);
1661 }
1662
1663 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1664 {
1665 int i;
1666 u64 *pt = sp->spt;
1667
1668 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1669 return;
1670
1671 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1672 if (pt[i] == shadow_notrap_nonpresent_pte)
1673 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1674 }
1675 }
1676
1677 /*
1678 * The function is based on mtrr_type_lookup() in
1679 * arch/x86/kernel/cpu/mtrr/generic.c
1680 */
1681 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1682 u64 start, u64 end)
1683 {
1684 int i;
1685 u64 base, mask;
1686 u8 prev_match, curr_match;
1687 int num_var_ranges = KVM_NR_VAR_MTRR;
1688
1689 if (!mtrr_state->enabled)
1690 return 0xFF;
1691
1692 /* Make end inclusive end, instead of exclusive */
1693 end--;
1694
1695 /* Look in fixed ranges. Just return the type as per start */
1696 if (mtrr_state->have_fixed && (start < 0x100000)) {
1697 int idx;
1698
1699 if (start < 0x80000) {
1700 idx = 0;
1701 idx += (start >> 16);
1702 return mtrr_state->fixed_ranges[idx];
1703 } else if (start < 0xC0000) {
1704 idx = 1 * 8;
1705 idx += ((start - 0x80000) >> 14);
1706 return mtrr_state->fixed_ranges[idx];
1707 } else if (start < 0x1000000) {
1708 idx = 3 * 8;
1709 idx += ((start - 0xC0000) >> 12);
1710 return mtrr_state->fixed_ranges[idx];
1711 }
1712 }
1713
1714 /*
1715 * Look in variable ranges
1716 * Look of multiple ranges matching this address and pick type
1717 * as per MTRR precedence
1718 */
1719 if (!(mtrr_state->enabled & 2))
1720 return mtrr_state->def_type;
1721
1722 prev_match = 0xFF;
1723 for (i = 0; i < num_var_ranges; ++i) {
1724 unsigned short start_state, end_state;
1725
1726 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1727 continue;
1728
1729 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1730 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1731 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1732 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1733
1734 start_state = ((start & mask) == (base & mask));
1735 end_state = ((end & mask) == (base & mask));
1736 if (start_state != end_state)
1737 return 0xFE;
1738
1739 if ((start & mask) != (base & mask))
1740 continue;
1741
1742 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1743 if (prev_match == 0xFF) {
1744 prev_match = curr_match;
1745 continue;
1746 }
1747
1748 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1749 curr_match == MTRR_TYPE_UNCACHABLE)
1750 return MTRR_TYPE_UNCACHABLE;
1751
1752 if ((prev_match == MTRR_TYPE_WRBACK &&
1753 curr_match == MTRR_TYPE_WRTHROUGH) ||
1754 (prev_match == MTRR_TYPE_WRTHROUGH &&
1755 curr_match == MTRR_TYPE_WRBACK)) {
1756 prev_match = MTRR_TYPE_WRTHROUGH;
1757 curr_match = MTRR_TYPE_WRTHROUGH;
1758 }
1759
1760 if (prev_match != curr_match)
1761 return MTRR_TYPE_UNCACHABLE;
1762 }
1763
1764 if (prev_match != 0xFF)
1765 return prev_match;
1766
1767 return mtrr_state->def_type;
1768 }
1769
1770 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1771 {
1772 u8 mtrr;
1773
1774 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1775 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1776 if (mtrr == 0xfe || mtrr == 0xff)
1777 mtrr = MTRR_TYPE_WRBACK;
1778 return mtrr;
1779 }
1780 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1781
1782 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1783 {
1784 trace_kvm_mmu_unsync_page(sp);
1785 ++vcpu->kvm->stat.mmu_unsync;
1786 sp->unsync = 1;
1787
1788 kvm_mmu_mark_parents_unsync(sp);
1789 mmu_convert_notrap(sp);
1790 }
1791
1792 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1793 {
1794 struct kvm_mmu_page *s;
1795 struct hlist_node *node;
1796
1797 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1798 if (s->unsync)
1799 continue;
1800 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1801 __kvm_unsync_page(vcpu, s);
1802 }
1803 }
1804
1805 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1806 bool can_unsync)
1807 {
1808 struct kvm_mmu_page *s;
1809 struct hlist_node *node;
1810 bool need_unsync = false;
1811
1812 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1813 if (!can_unsync)
1814 return 1;
1815
1816 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1817 return 1;
1818
1819 if (!need_unsync && !s->unsync) {
1820 if (!oos_shadow)
1821 return 1;
1822 need_unsync = true;
1823 }
1824 }
1825 if (need_unsync)
1826 kvm_unsync_pages(vcpu, gfn);
1827 return 0;
1828 }
1829
1830 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1831 unsigned pte_access, int user_fault,
1832 int write_fault, int dirty, int level,
1833 gfn_t gfn, pfn_t pfn, bool speculative,
1834 bool can_unsync, bool reset_host_protection)
1835 {
1836 u64 spte;
1837 int ret = 0;
1838
1839 /*
1840 * We don't set the accessed bit, since we sometimes want to see
1841 * whether the guest actually used the pte (in order to detect
1842 * demand paging).
1843 */
1844 spte = shadow_base_present_pte | shadow_dirty_mask;
1845 if (!speculative)
1846 spte |= shadow_accessed_mask;
1847 if (!dirty)
1848 pte_access &= ~ACC_WRITE_MASK;
1849 if (pte_access & ACC_EXEC_MASK)
1850 spte |= shadow_x_mask;
1851 else
1852 spte |= shadow_nx_mask;
1853 if (pte_access & ACC_USER_MASK)
1854 spte |= shadow_user_mask;
1855 if (level > PT_PAGE_TABLE_LEVEL)
1856 spte |= PT_PAGE_SIZE_MASK;
1857 if (tdp_enabled)
1858 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1859 kvm_is_mmio_pfn(pfn));
1860
1861 if (reset_host_protection)
1862 spte |= SPTE_HOST_WRITEABLE;
1863
1864 spte |= (u64)pfn << PAGE_SHIFT;
1865
1866 if ((pte_access & ACC_WRITE_MASK)
1867 || (!tdp_enabled && write_fault && !is_write_protection(vcpu)
1868 && !user_fault)) {
1869
1870 if (level > PT_PAGE_TABLE_LEVEL &&
1871 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1872 ret = 1;
1873 rmap_remove(vcpu->kvm, sptep);
1874 spte = shadow_trap_nonpresent_pte;
1875 goto set_pte;
1876 }
1877
1878 spte |= PT_WRITABLE_MASK;
1879
1880 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1881 spte &= ~PT_USER_MASK;
1882
1883 /*
1884 * Optimization: for pte sync, if spte was writable the hash
1885 * lookup is unnecessary (and expensive). Write protection
1886 * is responsibility of mmu_get_page / kvm_sync_page.
1887 * Same reasoning can be applied to dirty page accounting.
1888 */
1889 if (!can_unsync && is_writable_pte(*sptep))
1890 goto set_pte;
1891
1892 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1893 pgprintk("%s: found shadow page for %lx, marking ro\n",
1894 __func__, gfn);
1895 ret = 1;
1896 pte_access &= ~ACC_WRITE_MASK;
1897 if (is_writable_pte(spte))
1898 spte &= ~PT_WRITABLE_MASK;
1899 }
1900 }
1901
1902 if (pte_access & ACC_WRITE_MASK)
1903 mark_page_dirty(vcpu->kvm, gfn);
1904
1905 set_pte:
1906 __set_spte(sptep, spte);
1907 return ret;
1908 }
1909
1910 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1911 unsigned pt_access, unsigned pte_access,
1912 int user_fault, int write_fault, int dirty,
1913 int *ptwrite, int level, gfn_t gfn,
1914 pfn_t pfn, bool speculative,
1915 bool reset_host_protection)
1916 {
1917 int was_rmapped = 0;
1918 int was_writable = is_writable_pte(*sptep);
1919 int rmap_count;
1920
1921 pgprintk("%s: spte %llx access %x write_fault %d"
1922 " user_fault %d gfn %lx\n",
1923 __func__, *sptep, pt_access,
1924 write_fault, user_fault, gfn);
1925
1926 if (is_rmap_spte(*sptep)) {
1927 /*
1928 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1929 * the parent of the now unreachable PTE.
1930 */
1931 if (level > PT_PAGE_TABLE_LEVEL &&
1932 !is_large_pte(*sptep)) {
1933 struct kvm_mmu_page *child;
1934 u64 pte = *sptep;
1935
1936 child = page_header(pte & PT64_BASE_ADDR_MASK);
1937 mmu_page_remove_parent_pte(child, sptep);
1938 __set_spte(sptep, shadow_trap_nonpresent_pte);
1939 kvm_flush_remote_tlbs(vcpu->kvm);
1940 } else if (pfn != spte_to_pfn(*sptep)) {
1941 pgprintk("hfn old %lx new %lx\n",
1942 spte_to_pfn(*sptep), pfn);
1943 rmap_remove(vcpu->kvm, sptep);
1944 __set_spte(sptep, shadow_trap_nonpresent_pte);
1945 kvm_flush_remote_tlbs(vcpu->kvm);
1946 } else
1947 was_rmapped = 1;
1948 }
1949
1950 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1951 dirty, level, gfn, pfn, speculative, true,
1952 reset_host_protection)) {
1953 if (write_fault)
1954 *ptwrite = 1;
1955 kvm_mmu_flush_tlb(vcpu);
1956 }
1957
1958 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1959 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1960 is_large_pte(*sptep)? "2MB" : "4kB",
1961 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1962 *sptep, sptep);
1963 if (!was_rmapped && is_large_pte(*sptep))
1964 ++vcpu->kvm->stat.lpages;
1965
1966 page_header_update_slot(vcpu->kvm, sptep, gfn);
1967 if (!was_rmapped) {
1968 rmap_count = rmap_add(vcpu, sptep, gfn);
1969 kvm_release_pfn_clean(pfn);
1970 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1971 rmap_recycle(vcpu, sptep, gfn);
1972 } else {
1973 if (was_writable)
1974 kvm_release_pfn_dirty(pfn);
1975 else
1976 kvm_release_pfn_clean(pfn);
1977 }
1978 if (speculative) {
1979 vcpu->arch.last_pte_updated = sptep;
1980 vcpu->arch.last_pte_gfn = gfn;
1981 }
1982 }
1983
1984 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1985 {
1986 }
1987
1988 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1989 int level, gfn_t gfn, pfn_t pfn)
1990 {
1991 struct kvm_shadow_walk_iterator iterator;
1992 struct kvm_mmu_page *sp;
1993 int pt_write = 0;
1994 gfn_t pseudo_gfn;
1995
1996 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1997 if (iterator.level == level) {
1998 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1999 0, write, 1, &pt_write,
2000 level, gfn, pfn, false, true);
2001 ++vcpu->stat.pf_fixed;
2002 break;
2003 }
2004
2005 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2006 u64 base_addr = iterator.addr;
2007
2008 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2009 pseudo_gfn = base_addr >> PAGE_SHIFT;
2010 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2011 iterator.level - 1,
2012 1, ACC_ALL, iterator.sptep);
2013 if (!sp) {
2014 pgprintk("nonpaging_map: ENOMEM\n");
2015 kvm_release_pfn_clean(pfn);
2016 return -ENOMEM;
2017 }
2018
2019 __set_spte(iterator.sptep,
2020 __pa(sp->spt)
2021 | PT_PRESENT_MASK | PT_WRITABLE_MASK
2022 | shadow_user_mask | shadow_x_mask);
2023 }
2024 }
2025 return pt_write;
2026 }
2027
2028 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2029 {
2030 char buf[1];
2031 void __user *hva;
2032 int r;
2033
2034 /* Touch the page, so send SIGBUS */
2035 hva = (void __user *)gfn_to_hva(kvm, gfn);
2036 r = copy_from_user(buf, hva, 1);
2037 }
2038
2039 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2040 {
2041 kvm_release_pfn_clean(pfn);
2042 if (is_hwpoison_pfn(pfn)) {
2043 kvm_send_hwpoison_signal(kvm, gfn);
2044 return 0;
2045 }
2046 return 1;
2047 }
2048
2049 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2050 {
2051 int r;
2052 int level;
2053 pfn_t pfn;
2054 unsigned long mmu_seq;
2055
2056 level = mapping_level(vcpu, gfn);
2057
2058 /*
2059 * This path builds a PAE pagetable - so we can map 2mb pages at
2060 * maximum. Therefore check if the level is larger than that.
2061 */
2062 if (level > PT_DIRECTORY_LEVEL)
2063 level = PT_DIRECTORY_LEVEL;
2064
2065 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2066
2067 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2068 smp_rmb();
2069 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2070
2071 /* mmio */
2072 if (is_error_pfn(pfn))
2073 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2074
2075 spin_lock(&vcpu->kvm->mmu_lock);
2076 if (mmu_notifier_retry(vcpu, mmu_seq))
2077 goto out_unlock;
2078 kvm_mmu_free_some_pages(vcpu);
2079 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2080 spin_unlock(&vcpu->kvm->mmu_lock);
2081
2082
2083 return r;
2084
2085 out_unlock:
2086 spin_unlock(&vcpu->kvm->mmu_lock);
2087 kvm_release_pfn_clean(pfn);
2088 return 0;
2089 }
2090
2091
2092 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2093 {
2094 int i;
2095 struct kvm_mmu_page *sp;
2096 LIST_HEAD(invalid_list);
2097
2098 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2099 return;
2100 spin_lock(&vcpu->kvm->mmu_lock);
2101 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2102 hpa_t root = vcpu->arch.mmu.root_hpa;
2103
2104 sp = page_header(root);
2105 --sp->root_count;
2106 if (!sp->root_count && sp->role.invalid) {
2107 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2108 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2109 }
2110 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2111 spin_unlock(&vcpu->kvm->mmu_lock);
2112 return;
2113 }
2114 for (i = 0; i < 4; ++i) {
2115 hpa_t root = vcpu->arch.mmu.pae_root[i];
2116
2117 if (root) {
2118 root &= PT64_BASE_ADDR_MASK;
2119 sp = page_header(root);
2120 --sp->root_count;
2121 if (!sp->root_count && sp->role.invalid)
2122 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2123 &invalid_list);
2124 }
2125 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2126 }
2127 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2128 spin_unlock(&vcpu->kvm->mmu_lock);
2129 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2130 }
2131
2132 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2133 {
2134 int ret = 0;
2135
2136 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2137 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2138 ret = 1;
2139 }
2140
2141 return ret;
2142 }
2143
2144 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2145 {
2146 int i;
2147 gfn_t root_gfn;
2148 struct kvm_mmu_page *sp;
2149 int direct = 0;
2150 u64 pdptr;
2151
2152 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2153
2154 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2155 hpa_t root = vcpu->arch.mmu.root_hpa;
2156
2157 ASSERT(!VALID_PAGE(root));
2158 if (mmu_check_root(vcpu, root_gfn))
2159 return 1;
2160 if (tdp_enabled) {
2161 direct = 1;
2162 root_gfn = 0;
2163 }
2164 spin_lock(&vcpu->kvm->mmu_lock);
2165 kvm_mmu_free_some_pages(vcpu);
2166 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2167 PT64_ROOT_LEVEL, direct,
2168 ACC_ALL, NULL);
2169 root = __pa(sp->spt);
2170 ++sp->root_count;
2171 spin_unlock(&vcpu->kvm->mmu_lock);
2172 vcpu->arch.mmu.root_hpa = root;
2173 return 0;
2174 }
2175 direct = !is_paging(vcpu);
2176 for (i = 0; i < 4; ++i) {
2177 hpa_t root = vcpu->arch.mmu.pae_root[i];
2178
2179 ASSERT(!VALID_PAGE(root));
2180 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2181 pdptr = kvm_pdptr_read(vcpu, i);
2182 if (!is_present_gpte(pdptr)) {
2183 vcpu->arch.mmu.pae_root[i] = 0;
2184 continue;
2185 }
2186 root_gfn = pdptr >> PAGE_SHIFT;
2187 } else if (vcpu->arch.mmu.root_level == 0)
2188 root_gfn = 0;
2189 if (mmu_check_root(vcpu, root_gfn))
2190 return 1;
2191 if (tdp_enabled) {
2192 direct = 1;
2193 root_gfn = i << 30;
2194 }
2195 spin_lock(&vcpu->kvm->mmu_lock);
2196 kvm_mmu_free_some_pages(vcpu);
2197 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2198 PT32_ROOT_LEVEL, direct,
2199 ACC_ALL, NULL);
2200 root = __pa(sp->spt);
2201 ++sp->root_count;
2202 spin_unlock(&vcpu->kvm->mmu_lock);
2203
2204 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2205 }
2206 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2207 return 0;
2208 }
2209
2210 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2211 {
2212 int i;
2213 struct kvm_mmu_page *sp;
2214
2215 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2216 return;
2217 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2218 hpa_t root = vcpu->arch.mmu.root_hpa;
2219 sp = page_header(root);
2220 mmu_sync_children(vcpu, sp);
2221 return;
2222 }
2223 for (i = 0; i < 4; ++i) {
2224 hpa_t root = vcpu->arch.mmu.pae_root[i];
2225
2226 if (root && VALID_PAGE(root)) {
2227 root &= PT64_BASE_ADDR_MASK;
2228 sp = page_header(root);
2229 mmu_sync_children(vcpu, sp);
2230 }
2231 }
2232 }
2233
2234 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2235 {
2236 spin_lock(&vcpu->kvm->mmu_lock);
2237 mmu_sync_roots(vcpu);
2238 spin_unlock(&vcpu->kvm->mmu_lock);
2239 }
2240
2241 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2242 u32 access, u32 *error)
2243 {
2244 if (error)
2245 *error = 0;
2246 return vaddr;
2247 }
2248
2249 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2250 u32 error_code)
2251 {
2252 gfn_t gfn;
2253 int r;
2254
2255 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2256 r = mmu_topup_memory_caches(vcpu);
2257 if (r)
2258 return r;
2259
2260 ASSERT(vcpu);
2261 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2262
2263 gfn = gva >> PAGE_SHIFT;
2264
2265 return nonpaging_map(vcpu, gva & PAGE_MASK,
2266 error_code & PFERR_WRITE_MASK, gfn);
2267 }
2268
2269 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2270 u32 error_code)
2271 {
2272 pfn_t pfn;
2273 int r;
2274 int level;
2275 gfn_t gfn = gpa >> PAGE_SHIFT;
2276 unsigned long mmu_seq;
2277
2278 ASSERT(vcpu);
2279 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2280
2281 r = mmu_topup_memory_caches(vcpu);
2282 if (r)
2283 return r;
2284
2285 level = mapping_level(vcpu, gfn);
2286
2287 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2288
2289 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2290 smp_rmb();
2291 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2292 if (is_error_pfn(pfn))
2293 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2294 spin_lock(&vcpu->kvm->mmu_lock);
2295 if (mmu_notifier_retry(vcpu, mmu_seq))
2296 goto out_unlock;
2297 kvm_mmu_free_some_pages(vcpu);
2298 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2299 level, gfn, pfn);
2300 spin_unlock(&vcpu->kvm->mmu_lock);
2301
2302 return r;
2303
2304 out_unlock:
2305 spin_unlock(&vcpu->kvm->mmu_lock);
2306 kvm_release_pfn_clean(pfn);
2307 return 0;
2308 }
2309
2310 static void nonpaging_free(struct kvm_vcpu *vcpu)
2311 {
2312 mmu_free_roots(vcpu);
2313 }
2314
2315 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2316 {
2317 struct kvm_mmu *context = &vcpu->arch.mmu;
2318
2319 context->new_cr3 = nonpaging_new_cr3;
2320 context->page_fault = nonpaging_page_fault;
2321 context->gva_to_gpa = nonpaging_gva_to_gpa;
2322 context->free = nonpaging_free;
2323 context->prefetch_page = nonpaging_prefetch_page;
2324 context->sync_page = nonpaging_sync_page;
2325 context->invlpg = nonpaging_invlpg;
2326 context->root_level = 0;
2327 context->shadow_root_level = PT32E_ROOT_LEVEL;
2328 context->root_hpa = INVALID_PAGE;
2329 return 0;
2330 }
2331
2332 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2333 {
2334 ++vcpu->stat.tlb_flush;
2335 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2336 }
2337
2338 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2339 {
2340 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2341 mmu_free_roots(vcpu);
2342 }
2343
2344 static void inject_page_fault(struct kvm_vcpu *vcpu,
2345 u64 addr,
2346 u32 err_code)
2347 {
2348 kvm_inject_page_fault(vcpu, addr, err_code);
2349 }
2350
2351 static void paging_free(struct kvm_vcpu *vcpu)
2352 {
2353 nonpaging_free(vcpu);
2354 }
2355
2356 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2357 {
2358 int bit7;
2359
2360 bit7 = (gpte >> 7) & 1;
2361 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2362 }
2363
2364 #define PTTYPE 64
2365 #include "paging_tmpl.h"
2366 #undef PTTYPE
2367
2368 #define PTTYPE 32
2369 #include "paging_tmpl.h"
2370 #undef PTTYPE
2371
2372 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2373 {
2374 struct kvm_mmu *context = &vcpu->arch.mmu;
2375 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2376 u64 exb_bit_rsvd = 0;
2377
2378 if (!is_nx(vcpu))
2379 exb_bit_rsvd = rsvd_bits(63, 63);
2380 switch (level) {
2381 case PT32_ROOT_LEVEL:
2382 /* no rsvd bits for 2 level 4K page table entries */
2383 context->rsvd_bits_mask[0][1] = 0;
2384 context->rsvd_bits_mask[0][0] = 0;
2385 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2386
2387 if (!is_pse(vcpu)) {
2388 context->rsvd_bits_mask[1][1] = 0;
2389 break;
2390 }
2391
2392 if (is_cpuid_PSE36())
2393 /* 36bits PSE 4MB page */
2394 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2395 else
2396 /* 32 bits PSE 4MB page */
2397 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2398 break;
2399 case PT32E_ROOT_LEVEL:
2400 context->rsvd_bits_mask[0][2] =
2401 rsvd_bits(maxphyaddr, 63) |
2402 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2403 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2404 rsvd_bits(maxphyaddr, 62); /* PDE */
2405 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2406 rsvd_bits(maxphyaddr, 62); /* PTE */
2407 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2408 rsvd_bits(maxphyaddr, 62) |
2409 rsvd_bits(13, 20); /* large page */
2410 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2411 break;
2412 case PT64_ROOT_LEVEL:
2413 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2414 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2415 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2416 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2417 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2418 rsvd_bits(maxphyaddr, 51);
2419 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2420 rsvd_bits(maxphyaddr, 51);
2421 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2422 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2423 rsvd_bits(maxphyaddr, 51) |
2424 rsvd_bits(13, 29);
2425 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2426 rsvd_bits(maxphyaddr, 51) |
2427 rsvd_bits(13, 20); /* large page */
2428 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2429 break;
2430 }
2431 }
2432
2433 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2434 {
2435 struct kvm_mmu *context = &vcpu->arch.mmu;
2436
2437 ASSERT(is_pae(vcpu));
2438 context->new_cr3 = paging_new_cr3;
2439 context->page_fault = paging64_page_fault;
2440 context->gva_to_gpa = paging64_gva_to_gpa;
2441 context->prefetch_page = paging64_prefetch_page;
2442 context->sync_page = paging64_sync_page;
2443 context->invlpg = paging64_invlpg;
2444 context->free = paging_free;
2445 context->root_level = level;
2446 context->shadow_root_level = level;
2447 context->root_hpa = INVALID_PAGE;
2448 return 0;
2449 }
2450
2451 static int paging64_init_context(struct kvm_vcpu *vcpu)
2452 {
2453 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2454 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2455 }
2456
2457 static int paging32_init_context(struct kvm_vcpu *vcpu)
2458 {
2459 struct kvm_mmu *context = &vcpu->arch.mmu;
2460
2461 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2462 context->new_cr3 = paging_new_cr3;
2463 context->page_fault = paging32_page_fault;
2464 context->gva_to_gpa = paging32_gva_to_gpa;
2465 context->free = paging_free;
2466 context->prefetch_page = paging32_prefetch_page;
2467 context->sync_page = paging32_sync_page;
2468 context->invlpg = paging32_invlpg;
2469 context->root_level = PT32_ROOT_LEVEL;
2470 context->shadow_root_level = PT32E_ROOT_LEVEL;
2471 context->root_hpa = INVALID_PAGE;
2472 return 0;
2473 }
2474
2475 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2476 {
2477 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2478 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2479 }
2480
2481 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2482 {
2483 struct kvm_mmu *context = &vcpu->arch.mmu;
2484
2485 context->new_cr3 = nonpaging_new_cr3;
2486 context->page_fault = tdp_page_fault;
2487 context->free = nonpaging_free;
2488 context->prefetch_page = nonpaging_prefetch_page;
2489 context->sync_page = nonpaging_sync_page;
2490 context->invlpg = nonpaging_invlpg;
2491 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2492 context->root_hpa = INVALID_PAGE;
2493
2494 if (!is_paging(vcpu)) {
2495 context->gva_to_gpa = nonpaging_gva_to_gpa;
2496 context->root_level = 0;
2497 } else if (is_long_mode(vcpu)) {
2498 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2499 context->gva_to_gpa = paging64_gva_to_gpa;
2500 context->root_level = PT64_ROOT_LEVEL;
2501 } else if (is_pae(vcpu)) {
2502 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2503 context->gva_to_gpa = paging64_gva_to_gpa;
2504 context->root_level = PT32E_ROOT_LEVEL;
2505 } else {
2506 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2507 context->gva_to_gpa = paging32_gva_to_gpa;
2508 context->root_level = PT32_ROOT_LEVEL;
2509 }
2510
2511 return 0;
2512 }
2513
2514 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2515 {
2516 int r;
2517
2518 ASSERT(vcpu);
2519 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2520
2521 if (!is_paging(vcpu))
2522 r = nonpaging_init_context(vcpu);
2523 else if (is_long_mode(vcpu))
2524 r = paging64_init_context(vcpu);
2525 else if (is_pae(vcpu))
2526 r = paging32E_init_context(vcpu);
2527 else
2528 r = paging32_init_context(vcpu);
2529
2530 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2531 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2532
2533 return r;
2534 }
2535
2536 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2537 {
2538 vcpu->arch.update_pte.pfn = bad_pfn;
2539
2540 if (tdp_enabled)
2541 return init_kvm_tdp_mmu(vcpu);
2542 else
2543 return init_kvm_softmmu(vcpu);
2544 }
2545
2546 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2547 {
2548 ASSERT(vcpu);
2549 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2550 /* mmu.free() should set root_hpa = INVALID_PAGE */
2551 vcpu->arch.mmu.free(vcpu);
2552 }
2553
2554 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2555 {
2556 destroy_kvm_mmu(vcpu);
2557 return init_kvm_mmu(vcpu);
2558 }
2559 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2560
2561 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2562 {
2563 int r;
2564
2565 r = mmu_topup_memory_caches(vcpu);
2566 if (r)
2567 goto out;
2568 r = mmu_alloc_roots(vcpu);
2569 spin_lock(&vcpu->kvm->mmu_lock);
2570 mmu_sync_roots(vcpu);
2571 spin_unlock(&vcpu->kvm->mmu_lock);
2572 if (r)
2573 goto out;
2574 /* set_cr3() should ensure TLB has been flushed */
2575 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2576 out:
2577 return r;
2578 }
2579 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2580
2581 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2582 {
2583 mmu_free_roots(vcpu);
2584 }
2585
2586 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2587 struct kvm_mmu_page *sp,
2588 u64 *spte)
2589 {
2590 u64 pte;
2591 struct kvm_mmu_page *child;
2592
2593 pte = *spte;
2594 if (is_shadow_present_pte(pte)) {
2595 if (is_last_spte(pte, sp->role.level))
2596 rmap_remove(vcpu->kvm, spte);
2597 else {
2598 child = page_header(pte & PT64_BASE_ADDR_MASK);
2599 mmu_page_remove_parent_pte(child, spte);
2600 }
2601 }
2602 __set_spte(spte, shadow_trap_nonpresent_pte);
2603 if (is_large_pte(pte))
2604 --vcpu->kvm->stat.lpages;
2605 }
2606
2607 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2608 struct kvm_mmu_page *sp,
2609 u64 *spte,
2610 const void *new)
2611 {
2612 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2613 ++vcpu->kvm->stat.mmu_pde_zapped;
2614 return;
2615 }
2616
2617 ++vcpu->kvm->stat.mmu_pte_updated;
2618 if (!sp->role.cr4_pae)
2619 paging32_update_pte(vcpu, sp, spte, new);
2620 else
2621 paging64_update_pte(vcpu, sp, spte, new);
2622 }
2623
2624 static bool need_remote_flush(u64 old, u64 new)
2625 {
2626 if (!is_shadow_present_pte(old))
2627 return false;
2628 if (!is_shadow_present_pte(new))
2629 return true;
2630 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2631 return true;
2632 old ^= PT64_NX_MASK;
2633 new ^= PT64_NX_MASK;
2634 return (old & ~new & PT64_PERM_MASK) != 0;
2635 }
2636
2637 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
2638 bool remote_flush, bool local_flush)
2639 {
2640 if (zap_page)
2641 return;
2642
2643 if (remote_flush)
2644 kvm_flush_remote_tlbs(vcpu->kvm);
2645 else if (local_flush)
2646 kvm_mmu_flush_tlb(vcpu);
2647 }
2648
2649 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2650 {
2651 u64 *spte = vcpu->arch.last_pte_updated;
2652
2653 return !!(spte && (*spte & shadow_accessed_mask));
2654 }
2655
2656 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2657 u64 gpte)
2658 {
2659 gfn_t gfn;
2660 pfn_t pfn;
2661
2662 if (!is_present_gpte(gpte))
2663 return;
2664 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2665
2666 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2667 smp_rmb();
2668 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2669
2670 if (is_error_pfn(pfn)) {
2671 kvm_release_pfn_clean(pfn);
2672 return;
2673 }
2674 vcpu->arch.update_pte.gfn = gfn;
2675 vcpu->arch.update_pte.pfn = pfn;
2676 }
2677
2678 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2679 {
2680 u64 *spte = vcpu->arch.last_pte_updated;
2681
2682 if (spte
2683 && vcpu->arch.last_pte_gfn == gfn
2684 && shadow_accessed_mask
2685 && !(*spte & shadow_accessed_mask)
2686 && is_shadow_present_pte(*spte))
2687 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2688 }
2689
2690 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2691 const u8 *new, int bytes,
2692 bool guest_initiated)
2693 {
2694 gfn_t gfn = gpa >> PAGE_SHIFT;
2695 struct kvm_mmu_page *sp;
2696 struct hlist_node *node;
2697 LIST_HEAD(invalid_list);
2698 u64 entry, gentry;
2699 u64 *spte;
2700 unsigned offset = offset_in_page(gpa);
2701 unsigned pte_size;
2702 unsigned page_offset;
2703 unsigned misaligned;
2704 unsigned quadrant;
2705 int level;
2706 int flooded = 0;
2707 int npte;
2708 int r;
2709 int invlpg_counter;
2710 bool remote_flush, local_flush, zap_page;
2711
2712 zap_page = remote_flush = local_flush = false;
2713
2714 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2715
2716 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2717
2718 /*
2719 * Assume that the pte write on a page table of the same type
2720 * as the current vcpu paging mode. This is nearly always true
2721 * (might be false while changing modes). Note it is verified later
2722 * by update_pte().
2723 */
2724 if ((is_pae(vcpu) && bytes == 4) || !new) {
2725 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2726 if (is_pae(vcpu)) {
2727 gpa &= ~(gpa_t)7;
2728 bytes = 8;
2729 }
2730 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2731 if (r)
2732 gentry = 0;
2733 new = (const u8 *)&gentry;
2734 }
2735
2736 switch (bytes) {
2737 case 4:
2738 gentry = *(const u32 *)new;
2739 break;
2740 case 8:
2741 gentry = *(const u64 *)new;
2742 break;
2743 default:
2744 gentry = 0;
2745 break;
2746 }
2747
2748 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2749 spin_lock(&vcpu->kvm->mmu_lock);
2750 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2751 gentry = 0;
2752 kvm_mmu_access_page(vcpu, gfn);
2753 kvm_mmu_free_some_pages(vcpu);
2754 ++vcpu->kvm->stat.mmu_pte_write;
2755 kvm_mmu_audit(vcpu, "pre pte write");
2756 if (guest_initiated) {
2757 if (gfn == vcpu->arch.last_pt_write_gfn
2758 && !last_updated_pte_accessed(vcpu)) {
2759 ++vcpu->arch.last_pt_write_count;
2760 if (vcpu->arch.last_pt_write_count >= 3)
2761 flooded = 1;
2762 } else {
2763 vcpu->arch.last_pt_write_gfn = gfn;
2764 vcpu->arch.last_pt_write_count = 1;
2765 vcpu->arch.last_pte_updated = NULL;
2766 }
2767 }
2768
2769 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
2770 pte_size = sp->role.cr4_pae ? 8 : 4;
2771 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2772 misaligned |= bytes < 4;
2773 if (misaligned || flooded) {
2774 /*
2775 * Misaligned accesses are too much trouble to fix
2776 * up; also, they usually indicate a page is not used
2777 * as a page table.
2778 *
2779 * If we're seeing too many writes to a page,
2780 * it may no longer be a page table, or we may be
2781 * forking, in which case it is better to unmap the
2782 * page.
2783 */
2784 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2785 gpa, bytes, sp->role.word);
2786 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2787 &invalid_list);
2788 ++vcpu->kvm->stat.mmu_flooded;
2789 continue;
2790 }
2791 page_offset = offset;
2792 level = sp->role.level;
2793 npte = 1;
2794 if (!sp->role.cr4_pae) {
2795 page_offset <<= 1; /* 32->64 */
2796 /*
2797 * A 32-bit pde maps 4MB while the shadow pdes map
2798 * only 2MB. So we need to double the offset again
2799 * and zap two pdes instead of one.
2800 */
2801 if (level == PT32_ROOT_LEVEL) {
2802 page_offset &= ~7; /* kill rounding error */
2803 page_offset <<= 1;
2804 npte = 2;
2805 }
2806 quadrant = page_offset >> PAGE_SHIFT;
2807 page_offset &= ~PAGE_MASK;
2808 if (quadrant != sp->role.quadrant)
2809 continue;
2810 }
2811 local_flush = true;
2812 spte = &sp->spt[page_offset / sizeof(*spte)];
2813 while (npte--) {
2814 entry = *spte;
2815 mmu_pte_write_zap_pte(vcpu, sp, spte);
2816 if (gentry)
2817 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2818 if (!remote_flush && need_remote_flush(entry, *spte))
2819 remote_flush = true;
2820 ++spte;
2821 }
2822 }
2823 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
2824 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2825 kvm_mmu_audit(vcpu, "post pte write");
2826 spin_unlock(&vcpu->kvm->mmu_lock);
2827 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2828 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2829 vcpu->arch.update_pte.pfn = bad_pfn;
2830 }
2831 }
2832
2833 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2834 {
2835 gpa_t gpa;
2836 int r;
2837
2838 if (tdp_enabled)
2839 return 0;
2840
2841 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2842
2843 spin_lock(&vcpu->kvm->mmu_lock);
2844 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2845 spin_unlock(&vcpu->kvm->mmu_lock);
2846 return r;
2847 }
2848 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2849
2850 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2851 {
2852 int free_pages;
2853 LIST_HEAD(invalid_list);
2854
2855 free_pages = vcpu->kvm->arch.n_free_mmu_pages;
2856 while (free_pages < KVM_REFILL_PAGES &&
2857 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2858 struct kvm_mmu_page *sp;
2859
2860 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2861 struct kvm_mmu_page, link);
2862 free_pages += kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2863 &invalid_list);
2864 ++vcpu->kvm->stat.mmu_recycled;
2865 }
2866 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2867 }
2868
2869 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2870 {
2871 int r;
2872 enum emulation_result er;
2873
2874 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2875 if (r < 0)
2876 goto out;
2877
2878 if (!r) {
2879 r = 1;
2880 goto out;
2881 }
2882
2883 r = mmu_topup_memory_caches(vcpu);
2884 if (r)
2885 goto out;
2886
2887 er = emulate_instruction(vcpu, cr2, error_code, 0);
2888
2889 switch (er) {
2890 case EMULATE_DONE:
2891 return 1;
2892 case EMULATE_DO_MMIO:
2893 ++vcpu->stat.mmio_exits;
2894 /* fall through */
2895 case EMULATE_FAIL:
2896 return 0;
2897 default:
2898 BUG();
2899 }
2900 out:
2901 return r;
2902 }
2903 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2904
2905 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2906 {
2907 vcpu->arch.mmu.invlpg(vcpu, gva);
2908 kvm_mmu_flush_tlb(vcpu);
2909 ++vcpu->stat.invlpg;
2910 }
2911 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2912
2913 void kvm_enable_tdp(void)
2914 {
2915 tdp_enabled = true;
2916 }
2917 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2918
2919 void kvm_disable_tdp(void)
2920 {
2921 tdp_enabled = false;
2922 }
2923 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2924
2925 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2926 {
2927 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2928 }
2929
2930 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2931 {
2932 struct page *page;
2933 int i;
2934
2935 ASSERT(vcpu);
2936
2937 /*
2938 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2939 * Therefore we need to allocate shadow page tables in the first
2940 * 4GB of memory, which happens to fit the DMA32 zone.
2941 */
2942 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2943 if (!page)
2944 return -ENOMEM;
2945
2946 vcpu->arch.mmu.pae_root = page_address(page);
2947 for (i = 0; i < 4; ++i)
2948 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2949
2950 return 0;
2951 }
2952
2953 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2954 {
2955 ASSERT(vcpu);
2956 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2957
2958 return alloc_mmu_pages(vcpu);
2959 }
2960
2961 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2962 {
2963 ASSERT(vcpu);
2964 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2965
2966 return init_kvm_mmu(vcpu);
2967 }
2968
2969 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2970 {
2971 ASSERT(vcpu);
2972
2973 destroy_kvm_mmu(vcpu);
2974 free_mmu_pages(vcpu);
2975 mmu_free_memory_caches(vcpu);
2976 }
2977
2978 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2979 {
2980 struct kvm_mmu_page *sp;
2981
2982 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2983 int i;
2984 u64 *pt;
2985
2986 if (!test_bit(slot, sp->slot_bitmap))
2987 continue;
2988
2989 pt = sp->spt;
2990 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2991 /* avoid RMW */
2992 if (is_writable_pte(pt[i]))
2993 pt[i] &= ~PT_WRITABLE_MASK;
2994 }
2995 kvm_flush_remote_tlbs(kvm);
2996 }
2997
2998 void kvm_mmu_zap_all(struct kvm *kvm)
2999 {
3000 struct kvm_mmu_page *sp, *node;
3001 LIST_HEAD(invalid_list);
3002
3003 spin_lock(&kvm->mmu_lock);
3004 restart:
3005 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3006 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3007 goto restart;
3008
3009 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3010 spin_unlock(&kvm->mmu_lock);
3011 }
3012
3013 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3014 struct list_head *invalid_list)
3015 {
3016 struct kvm_mmu_page *page;
3017
3018 page = container_of(kvm->arch.active_mmu_pages.prev,
3019 struct kvm_mmu_page, link);
3020 return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3021 }
3022
3023 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3024 {
3025 struct kvm *kvm;
3026 struct kvm *kvm_freed = NULL;
3027 int cache_count = 0;
3028
3029 spin_lock(&kvm_lock);
3030
3031 list_for_each_entry(kvm, &vm_list, vm_list) {
3032 int npages, idx, freed_pages;
3033 LIST_HEAD(invalid_list);
3034
3035 idx = srcu_read_lock(&kvm->srcu);
3036 spin_lock(&kvm->mmu_lock);
3037 npages = kvm->arch.n_alloc_mmu_pages -
3038 kvm->arch.n_free_mmu_pages;
3039 cache_count += npages;
3040 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3041 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3042 &invalid_list);
3043 cache_count -= freed_pages;
3044 kvm_freed = kvm;
3045 }
3046 nr_to_scan--;
3047
3048 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3049 spin_unlock(&kvm->mmu_lock);
3050 srcu_read_unlock(&kvm->srcu, idx);
3051 }
3052 if (kvm_freed)
3053 list_move_tail(&kvm_freed->vm_list, &vm_list);
3054
3055 spin_unlock(&kvm_lock);
3056
3057 return cache_count;
3058 }
3059
3060 static struct shrinker mmu_shrinker = {
3061 .shrink = mmu_shrink,
3062 .seeks = DEFAULT_SEEKS * 10,
3063 };
3064
3065 static void mmu_destroy_caches(void)
3066 {
3067 if (pte_chain_cache)
3068 kmem_cache_destroy(pte_chain_cache);
3069 if (rmap_desc_cache)
3070 kmem_cache_destroy(rmap_desc_cache);
3071 if (mmu_page_header_cache)
3072 kmem_cache_destroy(mmu_page_header_cache);
3073 }
3074
3075 void kvm_mmu_module_exit(void)
3076 {
3077 mmu_destroy_caches();
3078 unregister_shrinker(&mmu_shrinker);
3079 }
3080
3081 int kvm_mmu_module_init(void)
3082 {
3083 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3084 sizeof(struct kvm_pte_chain),
3085 0, 0, NULL);
3086 if (!pte_chain_cache)
3087 goto nomem;
3088 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3089 sizeof(struct kvm_rmap_desc),
3090 0, 0, NULL);
3091 if (!rmap_desc_cache)
3092 goto nomem;
3093
3094 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3095 sizeof(struct kvm_mmu_page),
3096 0, 0, NULL);
3097 if (!mmu_page_header_cache)
3098 goto nomem;
3099
3100 register_shrinker(&mmu_shrinker);
3101
3102 return 0;
3103
3104 nomem:
3105 mmu_destroy_caches();
3106 return -ENOMEM;
3107 }
3108
3109 /*
3110 * Caculate mmu pages needed for kvm.
3111 */
3112 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3113 {
3114 int i;
3115 unsigned int nr_mmu_pages;
3116 unsigned int nr_pages = 0;
3117 struct kvm_memslots *slots;
3118
3119 slots = kvm_memslots(kvm);
3120
3121 for (i = 0; i < slots->nmemslots; i++)
3122 nr_pages += slots->memslots[i].npages;
3123
3124 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3125 nr_mmu_pages = max(nr_mmu_pages,
3126 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3127
3128 return nr_mmu_pages;
3129 }
3130
3131 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3132 unsigned len)
3133 {
3134 if (len > buffer->len)
3135 return NULL;
3136 return buffer->ptr;
3137 }
3138
3139 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3140 unsigned len)
3141 {
3142 void *ret;
3143
3144 ret = pv_mmu_peek_buffer(buffer, len);
3145 if (!ret)
3146 return ret;
3147 buffer->ptr += len;
3148 buffer->len -= len;
3149 buffer->processed += len;
3150 return ret;
3151 }
3152
3153 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3154 gpa_t addr, gpa_t value)
3155 {
3156 int bytes = 8;
3157 int r;
3158
3159 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3160 bytes = 4;
3161
3162 r = mmu_topup_memory_caches(vcpu);
3163 if (r)
3164 return r;
3165
3166 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3167 return -EFAULT;
3168
3169 return 1;
3170 }
3171
3172 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3173 {
3174 (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3175 return 1;
3176 }
3177
3178 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3179 {
3180 spin_lock(&vcpu->kvm->mmu_lock);
3181 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3182 spin_unlock(&vcpu->kvm->mmu_lock);
3183 return 1;
3184 }
3185
3186 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3187 struct kvm_pv_mmu_op_buffer *buffer)
3188 {
3189 struct kvm_mmu_op_header *header;
3190
3191 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3192 if (!header)
3193 return 0;
3194 switch (header->op) {
3195 case KVM_MMU_OP_WRITE_PTE: {
3196 struct kvm_mmu_op_write_pte *wpte;
3197
3198 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3199 if (!wpte)
3200 return 0;
3201 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3202 wpte->pte_val);
3203 }
3204 case KVM_MMU_OP_FLUSH_TLB: {
3205 struct kvm_mmu_op_flush_tlb *ftlb;
3206
3207 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3208 if (!ftlb)
3209 return 0;
3210 return kvm_pv_mmu_flush_tlb(vcpu);
3211 }
3212 case KVM_MMU_OP_RELEASE_PT: {
3213 struct kvm_mmu_op_release_pt *rpt;
3214
3215 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3216 if (!rpt)
3217 return 0;
3218 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3219 }
3220 default: return 0;
3221 }
3222 }
3223
3224 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3225 gpa_t addr, unsigned long *ret)
3226 {
3227 int r;
3228 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3229
3230 buffer->ptr = buffer->buf;
3231 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3232 buffer->processed = 0;
3233
3234 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3235 if (r)
3236 goto out;
3237
3238 while (buffer->len) {
3239 r = kvm_pv_mmu_op_one(vcpu, buffer);
3240 if (r < 0)
3241 goto out;
3242 if (r == 0)
3243 break;
3244 }
3245
3246 r = 1;
3247 out:
3248 *ret = buffer->processed;
3249 return r;
3250 }
3251
3252 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3253 {
3254 struct kvm_shadow_walk_iterator iterator;
3255 int nr_sptes = 0;
3256
3257 spin_lock(&vcpu->kvm->mmu_lock);
3258 for_each_shadow_entry(vcpu, addr, iterator) {
3259 sptes[iterator.level-1] = *iterator.sptep;
3260 nr_sptes++;
3261 if (!is_shadow_present_pte(*iterator.sptep))
3262 break;
3263 }
3264 spin_unlock(&vcpu->kvm->mmu_lock);
3265
3266 return nr_sptes;
3267 }
3268 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3269
3270 #ifdef AUDIT
3271
3272 static const char *audit_msg;
3273
3274 static gva_t canonicalize(gva_t gva)
3275 {
3276 #ifdef CONFIG_X86_64
3277 gva = (long long)(gva << 16) >> 16;
3278 #endif
3279 return gva;
3280 }
3281
3282
3283 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3284
3285 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3286 inspect_spte_fn fn)
3287 {
3288 int i;
3289
3290 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3291 u64 ent = sp->spt[i];
3292
3293 if (is_shadow_present_pte(ent)) {
3294 if (!is_last_spte(ent, sp->role.level)) {
3295 struct kvm_mmu_page *child;
3296 child = page_header(ent & PT64_BASE_ADDR_MASK);
3297 __mmu_spte_walk(kvm, child, fn);
3298 } else
3299 fn(kvm, &sp->spt[i]);
3300 }
3301 }
3302 }
3303
3304 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3305 {
3306 int i;
3307 struct kvm_mmu_page *sp;
3308
3309 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3310 return;
3311 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3312 hpa_t root = vcpu->arch.mmu.root_hpa;
3313 sp = page_header(root);
3314 __mmu_spte_walk(vcpu->kvm, sp, fn);
3315 return;
3316 }
3317 for (i = 0; i < 4; ++i) {
3318 hpa_t root = vcpu->arch.mmu.pae_root[i];
3319
3320 if (root && VALID_PAGE(root)) {
3321 root &= PT64_BASE_ADDR_MASK;
3322 sp = page_header(root);
3323 __mmu_spte_walk(vcpu->kvm, sp, fn);
3324 }
3325 }
3326 return;
3327 }
3328
3329 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3330 gva_t va, int level)
3331 {
3332 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3333 int i;
3334 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3335
3336 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3337 u64 ent = pt[i];
3338
3339 if (ent == shadow_trap_nonpresent_pte)
3340 continue;
3341
3342 va = canonicalize(va);
3343 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3344 audit_mappings_page(vcpu, ent, va, level - 1);
3345 else {
3346 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3347 gfn_t gfn = gpa >> PAGE_SHIFT;
3348 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3349 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3350
3351 if (is_error_pfn(pfn)) {
3352 kvm_release_pfn_clean(pfn);
3353 continue;
3354 }
3355
3356 if (is_shadow_present_pte(ent)
3357 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3358 printk(KERN_ERR "xx audit error: (%s) levels %d"
3359 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3360 audit_msg, vcpu->arch.mmu.root_level,
3361 va, gpa, hpa, ent,
3362 is_shadow_present_pte(ent));
3363 else if (ent == shadow_notrap_nonpresent_pte
3364 && !is_error_hpa(hpa))
3365 printk(KERN_ERR "audit: (%s) notrap shadow,"
3366 " valid guest gva %lx\n", audit_msg, va);
3367 kvm_release_pfn_clean(pfn);
3368
3369 }
3370 }
3371 }
3372
3373 static void audit_mappings(struct kvm_vcpu *vcpu)
3374 {
3375 unsigned i;
3376
3377 if (vcpu->arch.mmu.root_level == 4)
3378 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3379 else
3380 for (i = 0; i < 4; ++i)
3381 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3382 audit_mappings_page(vcpu,
3383 vcpu->arch.mmu.pae_root[i],
3384 i << 30,
3385 2);
3386 }
3387
3388 static int count_rmaps(struct kvm_vcpu *vcpu)
3389 {
3390 struct kvm *kvm = vcpu->kvm;
3391 struct kvm_memslots *slots;
3392 int nmaps = 0;
3393 int i, j, k, idx;
3394
3395 idx = srcu_read_lock(&kvm->srcu);
3396 slots = kvm_memslots(kvm);
3397 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3398 struct kvm_memory_slot *m = &slots->memslots[i];
3399 struct kvm_rmap_desc *d;
3400
3401 for (j = 0; j < m->npages; ++j) {
3402 unsigned long *rmapp = &m->rmap[j];
3403
3404 if (!*rmapp)
3405 continue;
3406 if (!(*rmapp & 1)) {
3407 ++nmaps;
3408 continue;
3409 }
3410 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3411 while (d) {
3412 for (k = 0; k < RMAP_EXT; ++k)
3413 if (d->sptes[k])
3414 ++nmaps;
3415 else
3416 break;
3417 d = d->more;
3418 }
3419 }
3420 }
3421 srcu_read_unlock(&kvm->srcu, idx);
3422 return nmaps;
3423 }
3424
3425 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3426 {
3427 unsigned long *rmapp;
3428 struct kvm_mmu_page *rev_sp;
3429 gfn_t gfn;
3430
3431 if (is_writable_pte(*sptep)) {
3432 rev_sp = page_header(__pa(sptep));
3433 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3434
3435 if (!gfn_to_memslot(kvm, gfn)) {
3436 if (!printk_ratelimit())
3437 return;
3438 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3439 audit_msg, gfn);
3440 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3441 audit_msg, (long int)(sptep - rev_sp->spt),
3442 rev_sp->gfn);
3443 dump_stack();
3444 return;
3445 }
3446
3447 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3448 if (!*rmapp) {
3449 if (!printk_ratelimit())
3450 return;
3451 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3452 audit_msg, *sptep);
3453 dump_stack();
3454 }
3455 }
3456
3457 }
3458
3459 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3460 {
3461 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3462 }
3463
3464 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3465 {
3466 struct kvm_mmu_page *sp;
3467 int i;
3468
3469 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3470 u64 *pt = sp->spt;
3471
3472 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3473 continue;
3474
3475 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3476 u64 ent = pt[i];
3477
3478 if (!(ent & PT_PRESENT_MASK))
3479 continue;
3480 if (!is_writable_pte(ent))
3481 continue;
3482 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3483 }
3484 }
3485 return;
3486 }
3487
3488 static void audit_rmap(struct kvm_vcpu *vcpu)
3489 {
3490 check_writable_mappings_rmap(vcpu);
3491 count_rmaps(vcpu);
3492 }
3493
3494 static void audit_write_protection(struct kvm_vcpu *vcpu)
3495 {
3496 struct kvm_mmu_page *sp;
3497 struct kvm_memory_slot *slot;
3498 unsigned long *rmapp;
3499 u64 *spte;
3500 gfn_t gfn;
3501
3502 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3503 if (sp->role.direct)
3504 continue;
3505 if (sp->unsync)
3506 continue;
3507
3508 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
3509 rmapp = &slot->rmap[gfn - slot->base_gfn];
3510
3511 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3512 while (spte) {
3513 if (is_writable_pte(*spte))
3514 printk(KERN_ERR "%s: (%s) shadow page has "
3515 "writable mappings: gfn %lx role %x\n",
3516 __func__, audit_msg, sp->gfn,
3517 sp->role.word);
3518 spte = rmap_next(vcpu->kvm, rmapp, spte);
3519 }
3520 }
3521 }
3522
3523 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3524 {
3525 int olddbg = dbg;
3526
3527 dbg = 0;
3528 audit_msg = msg;
3529 audit_rmap(vcpu);
3530 audit_write_protection(vcpu);
3531 if (strcmp("pre pte write", audit_msg) != 0)
3532 audit_mappings(vcpu);
3533 audit_writable_sptes_have_rmaps(vcpu);
3534 dbg = olddbg;
3535 }
3536
3537 #endif
Linus' kernel tree