1 /* Driver for Realtek PCI-Express card reader
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 * Wei WANG <wei_wang@realsil.com.cn>
20 * No. 128, West Shenhu Road, Suzhou Industry Park, Suzhou, China
23 #include <linux/module.h>
24 #include <linux/delay.h>
25 #include <linux/mfd/rtsx_pci.h>
29 static u8
rts5249_get_ic_version(struct rtsx_pcr
*pcr
)
33 rtsx_pci_read_register(pcr
, DUMMY_REG_RESET_0
, &val
);
37 static int rts5249_extra_init_hw(struct rtsx_pcr
*pcr
)
39 rtsx_pci_init_cmd(pcr
);
41 /* Configure GPIO as output */
42 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, GPIO_CTL
, 0x02, 0x02);
43 /* Switch LDO3318 source from DV33 to card_3v3 */
44 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, LDO_PWR_SEL
, 0x03, 0x00);
45 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, LDO_PWR_SEL
, 0x03, 0x01);
46 /* LED shine disabled, set initial shine cycle period */
47 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, OLT_LED_CTL
, 0x0F, 0x02);
49 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
,
50 SD30_CLK_DRIVE_SEL
, 0xFF, 0x99);
51 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
,
52 SD30_CMD_DRIVE_SEL
, 0xFF, 0x99);
53 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
,
54 SD30_DAT_DRIVE_SEL
, 0xFF, 0x92);
56 return rtsx_pci_send_cmd(pcr
, 100);
59 static int rts5249_optimize_phy(struct rtsx_pcr
*pcr
)
63 err
= rtsx_pci_write_phy_register(pcr
, PHY_REG_REV
, 0xFE46);
69 return rtsx_pci_write_phy_register(pcr
, PHY_BPCR
, 0x05C0);
72 static int rts5249_turn_on_led(struct rtsx_pcr
*pcr
)
74 return rtsx_pci_write_register(pcr
, GPIO_CTL
, 0x02, 0x02);
77 static int rts5249_turn_off_led(struct rtsx_pcr
*pcr
)
79 return rtsx_pci_write_register(pcr
, GPIO_CTL
, 0x02, 0x00);
82 static int rts5249_enable_auto_blink(struct rtsx_pcr
*pcr
)
84 return rtsx_pci_write_register(pcr
, OLT_LED_CTL
, 0x08, 0x08);
87 static int rts5249_disable_auto_blink(struct rtsx_pcr
*pcr
)
89 return rtsx_pci_write_register(pcr
, OLT_LED_CTL
, 0x08, 0x00);
92 static int rts5249_card_power_on(struct rtsx_pcr
*pcr
, int card
)
96 rtsx_pci_init_cmd(pcr
);
97 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_PWR_CTL
,
98 SD_POWER_MASK
, SD_VCC_PARTIAL_POWER_ON
);
99 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, PWR_GATE_CTRL
,
100 LDO3318_PWR_MASK
, 0x02);
101 err
= rtsx_pci_send_cmd(pcr
, 100);
107 rtsx_pci_init_cmd(pcr
);
108 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_PWR_CTL
,
109 SD_POWER_MASK
, SD_VCC_POWER_ON
);
110 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, PWR_GATE_CTRL
,
111 LDO3318_PWR_MASK
, 0x06);
112 err
= rtsx_pci_send_cmd(pcr
, 100);
119 static int rts5249_card_power_off(struct rtsx_pcr
*pcr
, int card
)
121 rtsx_pci_init_cmd(pcr
);
122 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_PWR_CTL
,
123 SD_POWER_MASK
, SD_POWER_OFF
);
124 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, PWR_GATE_CTRL
,
125 LDO3318_PWR_MASK
, 0x00);
126 return rtsx_pci_send_cmd(pcr
, 100);
129 static int rts5249_switch_output_voltage(struct rtsx_pcr
*pcr
, u8 voltage
)
132 u8 clk_drive
, cmd_drive
, dat_drive
;
134 if (voltage
== OUTPUT_3V3
) {
135 err
= rtsx_pci_write_phy_register(pcr
, PHY_TUNE
, 0x4FC0 | 0x24);
141 } else if (voltage
== OUTPUT_1V8
) {
142 err
= rtsx_pci_write_phy_register(pcr
, PHY_BACR
, 0x3C02);
145 err
= rtsx_pci_write_phy_register(pcr
, PHY_TUNE
, 0x4C40 | 0x24);
156 rtsx_pci_init_cmd(pcr
);
157 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, SD30_CLK_DRIVE_SEL
,
159 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, SD30_CMD_DRIVE_SEL
,
161 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, SD30_DAT_DRIVE_SEL
,
163 return rtsx_pci_send_cmd(pcr
, 100);
166 static const struct pcr_ops rts5249_pcr_ops
= {
167 .extra_init_hw
= rts5249_extra_init_hw
,
168 .optimize_phy
= rts5249_optimize_phy
,
169 .turn_on_led
= rts5249_turn_on_led
,
170 .turn_off_led
= rts5249_turn_off_led
,
171 .enable_auto_blink
= rts5249_enable_auto_blink
,
172 .disable_auto_blink
= rts5249_disable_auto_blink
,
173 .card_power_on
= rts5249_card_power_on
,
174 .card_power_off
= rts5249_card_power_off
,
175 .switch_output_voltage
= rts5249_switch_output_voltage
,
178 /* SD Pull Control Enable:
179 * SD_DAT[3:0] ==> pull up
183 * SD_CLK ==> pull down
185 static const u32 rts5249_sd_pull_ctl_enable_tbl
[] = {
186 RTSX_REG_PAIR(CARD_PULL_CTL1
, 0x66),
187 RTSX_REG_PAIR(CARD_PULL_CTL2
, 0xAA),
188 RTSX_REG_PAIR(CARD_PULL_CTL3
, 0xE9),
189 RTSX_REG_PAIR(CARD_PULL_CTL4
, 0xAA),
193 /* SD Pull Control Disable:
194 * SD_DAT[3:0] ==> pull down
196 * SD_WP ==> pull down
197 * SD_CMD ==> pull down
198 * SD_CLK ==> pull down
200 static const u32 rts5249_sd_pull_ctl_disable_tbl
[] = {
201 RTSX_REG_PAIR(CARD_PULL_CTL1
, 0x66),
202 RTSX_REG_PAIR(CARD_PULL_CTL2
, 0x55),
203 RTSX_REG_PAIR(CARD_PULL_CTL3
, 0xD5),
204 RTSX_REG_PAIR(CARD_PULL_CTL4
, 0x55),
208 /* MS Pull Control Enable:
210 * others ==> pull down
212 static const u32 rts5249_ms_pull_ctl_enable_tbl
[] = {
213 RTSX_REG_PAIR(CARD_PULL_CTL4
, 0x55),
214 RTSX_REG_PAIR(CARD_PULL_CTL5
, 0x55),
215 RTSX_REG_PAIR(CARD_PULL_CTL6
, 0x15),
219 /* MS Pull Control Disable:
221 * others ==> pull down
223 static const u32 rts5249_ms_pull_ctl_disable_tbl
[] = {
224 RTSX_REG_PAIR(CARD_PULL_CTL4
, 0x55),
225 RTSX_REG_PAIR(CARD_PULL_CTL5
, 0x55),
226 RTSX_REG_PAIR(CARD_PULL_CTL6
, 0x15),
230 void rts5249_init_params(struct rtsx_pcr
*pcr
)
232 pcr
->extra_caps
= EXTRA_CAPS_SD_SDR50
| EXTRA_CAPS_SD_SDR104
;
234 pcr
->ops
= &rts5249_pcr_ops
;
236 pcr
->ic_version
= rts5249_get_ic_version(pcr
);
237 pcr
->sd_pull_ctl_enable_tbl
= rts5249_sd_pull_ctl_enable_tbl
;
238 pcr
->sd_pull_ctl_disable_tbl
= rts5249_sd_pull_ctl_disable_tbl
;
239 pcr
->ms_pull_ctl_enable_tbl
= rts5249_ms_pull_ctl_enable_tbl
;
240 pcr
->ms_pull_ctl_disable_tbl
= rts5249_ms_pull_ctl_disable_tbl
;