2 * Texas Instruments DSPS platforms "glue layer"
4 * Copyright (C) 2012, by Texas Instruments
6 * Based on the am35x "glue layer" code.
8 * This file is part of the Inventra Controller Driver for Linux.
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
32 #include <linux/init.h>
34 #include <linux/err.h>
35 #include <linux/platform_device.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/pm_runtime.h>
38 #include <linux/module.h>
39 #include <linux/usb/usb_phy_gen_xceiv.h>
40 #include <linux/platform_data/usb-omap.h>
41 #include <linux/sizes.h>
44 #include <linux/of_device.h>
45 #include <linux/of_address.h>
46 #include <linux/of_irq.h>
47 #include <linux/usb/of.h>
49 #include "musb_core.h"
51 static const struct of_device_id musb_dsps_of_match
[];
54 * avoid using musb_readx()/musb_writex() as glue layer should not be
55 * dependent on musb core layer symbols.
57 static inline u8
dsps_readb(const void __iomem
*addr
, unsigned offset
)
58 { return __raw_readb(addr
+ offset
); }
60 static inline u32
dsps_readl(const void __iomem
*addr
, unsigned offset
)
61 { return __raw_readl(addr
+ offset
); }
63 static inline void dsps_writeb(void __iomem
*addr
, unsigned offset
, u8 data
)
64 { __raw_writeb(data
, addr
+ offset
); }
66 static inline void dsps_writel(void __iomem
*addr
, unsigned offset
, u32 data
)
67 { __raw_writel(data
, addr
+ offset
); }
70 * DSPS musb wrapper register offset.
71 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
74 struct dsps_musb_wrapper
{
87 /* bit positions for control */
90 /* bit positions for interrupt */
96 unsigned txep_shift
:5;
100 unsigned rxep_shift
:5;
104 /* bit positions for phy_utmi */
105 unsigned otg_disable
:5;
107 /* bit positions for mode */
109 /* miscellaneous stuff */
114 * DSPS glue structure.
118 struct platform_device
*musb
; /* child musb pdev */
119 const struct dsps_musb_wrapper
*wrp
; /* wrapper register offsets */
120 struct timer_list timer
; /* otg_workaround timer */
121 unsigned long last_timer
; /* last timer data for each instance */
124 static void dsps_musb_try_idle(struct musb
*musb
, unsigned long timeout
)
126 struct device
*dev
= musb
->controller
;
127 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
130 timeout
= jiffies
+ msecs_to_jiffies(3);
132 /* Never idle if active, or when VBUS timeout is not set as host */
133 if (musb
->is_active
|| (musb
->a_wait_bcon
== 0 &&
134 musb
->xceiv
->state
== OTG_STATE_A_WAIT_BCON
)) {
135 dev_dbg(musb
->controller
, "%s active, deleting timer\n",
136 usb_otg_state_string(musb
->xceiv
->state
));
137 del_timer(&glue
->timer
);
138 glue
->last_timer
= jiffies
;
141 if (musb
->port_mode
!= MUSB_PORT_MODE_DUAL_ROLE
)
144 if (!musb
->g
.dev
.driver
)
147 if (time_after(glue
->last_timer
, timeout
) &&
148 timer_pending(&glue
->timer
)) {
149 dev_dbg(musb
->controller
,
150 "Longer idle timer already pending, ignoring...\n");
153 glue
->last_timer
= timeout
;
155 dev_dbg(musb
->controller
, "%s inactive, starting idle timer for %u ms\n",
156 usb_otg_state_string(musb
->xceiv
->state
),
157 jiffies_to_msecs(timeout
- jiffies
));
158 mod_timer(&glue
->timer
, timeout
);
162 * dsps_musb_enable - enable interrupts
164 static void dsps_musb_enable(struct musb
*musb
)
166 struct device
*dev
= musb
->controller
;
167 struct platform_device
*pdev
= to_platform_device(dev
->parent
);
168 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
169 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
170 void __iomem
*reg_base
= musb
->ctrl_base
;
171 u32 epmask
, coremask
;
173 /* Workaround: setup IRQs through both register sets. */
174 epmask
= ((musb
->epmask
& wrp
->txep_mask
) << wrp
->txep_shift
) |
175 ((musb
->epmask
& wrp
->rxep_mask
) << wrp
->rxep_shift
);
176 coremask
= (wrp
->usb_bitmap
& ~MUSB_INTR_SOF
);
178 dsps_writel(reg_base
, wrp
->epintr_set
, epmask
);
179 dsps_writel(reg_base
, wrp
->coreintr_set
, coremask
);
180 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
181 dsps_writel(reg_base
, wrp
->coreintr_set
,
182 (1 << wrp
->drvvbus
) << wrp
->usb_shift
);
183 dsps_musb_try_idle(musb
, 0);
187 * dsps_musb_disable - disable HDRC and flush interrupts
189 static void dsps_musb_disable(struct musb
*musb
)
191 struct device
*dev
= musb
->controller
;
192 struct platform_device
*pdev
= to_platform_device(dev
->parent
);
193 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
194 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
195 void __iomem
*reg_base
= musb
->ctrl_base
;
197 dsps_writel(reg_base
, wrp
->coreintr_clear
, wrp
->usb_bitmap
);
198 dsps_writel(reg_base
, wrp
->epintr_clear
,
199 wrp
->txep_bitmap
| wrp
->rxep_bitmap
);
200 dsps_writeb(musb
->mregs
, MUSB_DEVCTL
, 0);
203 static void otg_timer(unsigned long _musb
)
205 struct musb
*musb
= (void *)_musb
;
206 void __iomem
*mregs
= musb
->mregs
;
207 struct device
*dev
= musb
->controller
;
208 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
209 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
212 int skip_session
= 0;
215 * We poll because DSPS IP's won't expose several OTG-critical
216 * status change events (from the transceiver) otherwise.
218 devctl
= dsps_readb(mregs
, MUSB_DEVCTL
);
219 dev_dbg(musb
->controller
, "Poll devctl %02x (%s)\n", devctl
,
220 usb_otg_state_string(musb
->xceiv
->state
));
222 spin_lock_irqsave(&musb
->lock
, flags
);
223 switch (musb
->xceiv
->state
) {
224 case OTG_STATE_A_WAIT_BCON
:
225 dsps_writeb(musb
->mregs
, MUSB_DEVCTL
, 0);
229 case OTG_STATE_A_IDLE
:
230 case OTG_STATE_B_IDLE
:
231 if (devctl
& MUSB_DEVCTL_BDEVICE
) {
232 musb
->xceiv
->state
= OTG_STATE_B_IDLE
;
235 musb
->xceiv
->state
= OTG_STATE_A_IDLE
;
238 if (!(devctl
& MUSB_DEVCTL_SESSION
) && !skip_session
)
239 dsps_writeb(mregs
, MUSB_DEVCTL
, MUSB_DEVCTL_SESSION
);
240 mod_timer(&glue
->timer
, jiffies
+ wrp
->poll_seconds
* HZ
);
242 case OTG_STATE_A_WAIT_VFALL
:
243 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VRISE
;
244 dsps_writel(musb
->ctrl_base
, wrp
->coreintr_set
,
245 MUSB_INTR_VBUSERROR
<< wrp
->usb_shift
);
250 spin_unlock_irqrestore(&musb
->lock
, flags
);
253 static irqreturn_t
dsps_interrupt(int irq
, void *hci
)
255 struct musb
*musb
= hci
;
256 void __iomem
*reg_base
= musb
->ctrl_base
;
257 struct device
*dev
= musb
->controller
;
258 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
259 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
261 irqreturn_t ret
= IRQ_NONE
;
264 spin_lock_irqsave(&musb
->lock
, flags
);
266 /* Get endpoint interrupts */
267 epintr
= dsps_readl(reg_base
, wrp
->epintr_status
);
268 musb
->int_rx
= (epintr
& wrp
->rxep_bitmap
) >> wrp
->rxep_shift
;
269 musb
->int_tx
= (epintr
& wrp
->txep_bitmap
) >> wrp
->txep_shift
;
272 dsps_writel(reg_base
, wrp
->epintr_status
, epintr
);
274 /* Get usb core interrupts */
275 usbintr
= dsps_readl(reg_base
, wrp
->coreintr_status
);
276 if (!usbintr
&& !epintr
)
279 musb
->int_usb
= (usbintr
& wrp
->usb_bitmap
) >> wrp
->usb_shift
;
281 dsps_writel(reg_base
, wrp
->coreintr_status
, usbintr
);
283 dev_dbg(musb
->controller
, "usbintr (%x) epintr(%x)\n",
286 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
287 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
288 * switch appropriately between halves of the OTG state machine.
289 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
290 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
291 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
293 if (is_host_active(musb
) && usbintr
& MUSB_INTR_BABBLE
)
294 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
296 if (usbintr
& ((1 << wrp
->drvvbus
) << wrp
->usb_shift
)) {
297 int drvvbus
= dsps_readl(reg_base
, wrp
->status
);
298 void __iomem
*mregs
= musb
->mregs
;
299 u8 devctl
= dsps_readb(mregs
, MUSB_DEVCTL
);
302 err
= musb
->int_usb
& MUSB_INTR_VBUSERROR
;
305 * The Mentor core doesn't debounce VBUS as needed
306 * to cope with device connect current spikes. This
307 * means it's not uncommon for bus-powered devices
308 * to get VBUS errors during enumeration.
310 * This is a workaround, but newer RTL from Mentor
311 * seems to allow a better one: "re"-starting sessions
312 * without waiting for VBUS to stop registering in
315 musb
->int_usb
&= ~MUSB_INTR_VBUSERROR
;
316 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VFALL
;
317 mod_timer(&glue
->timer
,
318 jiffies
+ wrp
->poll_seconds
* HZ
);
319 WARNING("VBUS error workaround (delay coming)\n");
320 } else if (drvvbus
) {
322 musb
->xceiv
->otg
->default_a
= 1;
323 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VRISE
;
324 del_timer(&glue
->timer
);
328 musb
->xceiv
->otg
->default_a
= 0;
329 musb
->xceiv
->state
= OTG_STATE_B_IDLE
;
332 /* NOTE: this must complete power-on within 100 ms. */
333 dev_dbg(musb
->controller
, "VBUS %s (%s)%s, devctl %02x\n",
334 drvvbus
? "on" : "off",
335 usb_otg_state_string(musb
->xceiv
->state
),
341 if (musb
->int_tx
|| musb
->int_rx
|| musb
->int_usb
)
342 ret
|= musb_interrupt(musb
);
344 /* Poll for ID change */
345 if (musb
->xceiv
->state
== OTG_STATE_B_IDLE
)
346 mod_timer(&glue
->timer
, jiffies
+ wrp
->poll_seconds
* HZ
);
348 spin_unlock_irqrestore(&musb
->lock
, flags
);
353 static int dsps_musb_init(struct musb
*musb
)
355 struct device
*dev
= musb
->controller
;
356 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
357 struct platform_device
*parent
= to_platform_device(dev
->parent
);
358 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
359 void __iomem
*reg_base
;
363 r
= platform_get_resource_byname(parent
, IORESOURCE_MEM
, "control");
367 reg_base
= devm_ioremap_resource(dev
, r
);
368 if (IS_ERR(reg_base
))
369 return PTR_ERR(reg_base
);
370 musb
->ctrl_base
= reg_base
;
372 /* NOP driver needs change if supporting dual instance */
373 musb
->xceiv
= devm_usb_get_phy_by_phandle(dev
, "phys", 0);
374 if (IS_ERR(musb
->xceiv
))
375 return PTR_ERR(musb
->xceiv
);
377 /* Returns zero if e.g. not clocked */
378 rev
= dsps_readl(reg_base
, wrp
->revision
);
382 usb_phy_init(musb
->xceiv
);
383 setup_timer(&glue
->timer
, otg_timer
, (unsigned long) musb
);
386 dsps_writel(reg_base
, wrp
->control
, (1 << wrp
->reset
));
388 musb
->isr
= dsps_interrupt
;
390 /* reset the otgdisable bit, needed for host mode to work */
391 val
= dsps_readl(reg_base
, wrp
->phy_utmi
);
392 val
&= ~(1 << wrp
->otg_disable
);
393 dsps_writel(musb
->ctrl_base
, wrp
->phy_utmi
, val
);
398 static int dsps_musb_exit(struct musb
*musb
)
400 struct device
*dev
= musb
->controller
;
401 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
403 del_timer_sync(&glue
->timer
);
405 usb_phy_shutdown(musb
->xceiv
);
409 static struct musb_platform_ops dsps_ops
= {
410 .init
= dsps_musb_init
,
411 .exit
= dsps_musb_exit
,
413 .enable
= dsps_musb_enable
,
414 .disable
= dsps_musb_disable
,
416 .try_idle
= dsps_musb_try_idle
,
419 static u64 musb_dmamask
= DMA_BIT_MASK(32);
421 static int get_int_prop(struct device_node
*dn
, const char *s
)
426 ret
= of_property_read_u32(dn
, s
, &val
);
432 static int get_musb_port_mode(struct device
*dev
)
434 enum usb_dr_mode mode
;
436 mode
= of_usb_get_dr_mode(dev
->of_node
);
438 case USB_DR_MODE_HOST
:
439 return MUSB_PORT_MODE_HOST
;
441 case USB_DR_MODE_PERIPHERAL
:
442 return MUSB_PORT_MODE_GADGET
;
444 case USB_DR_MODE_UNKNOWN
:
445 case USB_DR_MODE_OTG
:
447 return MUSB_PORT_MODE_DUAL_ROLE
;
451 static int dsps_create_musb_pdev(struct dsps_glue
*glue
,
452 struct platform_device
*parent
)
454 struct musb_hdrc_platform_data pdata
;
455 struct resource resources
[2];
456 struct resource
*res
;
457 struct device
*dev
= &parent
->dev
;
458 struct musb_hdrc_config
*config
;
459 struct platform_device
*musb
;
460 struct device_node
*dn
= parent
->dev
.of_node
;
463 memset(resources
, 0, sizeof(resources
));
464 res
= platform_get_resource_byname(parent
, IORESOURCE_MEM
, "mc");
466 dev_err(dev
, "failed to get memory.\n");
471 res
= platform_get_resource_byname(parent
, IORESOURCE_IRQ
, "mc");
473 dev_err(dev
, "failed to get irq.\n");
478 /* allocate the child platform device */
479 musb
= platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO
);
481 dev_err(dev
, "failed to allocate musb device\n");
485 musb
->dev
.parent
= dev
;
486 musb
->dev
.dma_mask
= &musb_dmamask
;
487 musb
->dev
.coherent_dma_mask
= musb_dmamask
;
488 musb
->dev
.of_node
= of_node_get(dn
);
492 ret
= platform_device_add_resources(musb
, resources
,
493 ARRAY_SIZE(resources
));
495 dev_err(dev
, "failed to add resources\n");
499 config
= devm_kzalloc(&parent
->dev
, sizeof(*config
), GFP_KERNEL
);
501 dev_err(dev
, "failed to allocate musb hdrc config\n");
505 pdata
.config
= config
;
506 pdata
.platform_ops
= &dsps_ops
;
508 config
->num_eps
= get_int_prop(dn
, "mentor,num-eps");
509 config
->ram_bits
= get_int_prop(dn
, "mentor,ram-bits");
510 pdata
.mode
= get_musb_port_mode(dev
);
511 /* DT keeps this entry in mA, musb expects it as per USB spec */
512 pdata
.power
= get_int_prop(dn
, "mentor,power") / 2;
513 config
->multipoint
= of_property_read_bool(dn
, "mentor,multipoint");
515 ret
= platform_device_add_data(musb
, &pdata
, sizeof(pdata
));
517 dev_err(dev
, "failed to add platform_data\n");
521 ret
= platform_device_add(musb
);
523 dev_err(dev
, "failed to register musb device\n");
529 platform_device_put(musb
);
533 static int dsps_probe(struct platform_device
*pdev
)
535 const struct of_device_id
*match
;
536 const struct dsps_musb_wrapper
*wrp
;
537 struct dsps_glue
*glue
;
540 if (!strcmp(pdev
->name
, "musb-hdrc"))
543 match
= of_match_node(musb_dsps_of_match
, pdev
->dev
.of_node
);
545 dev_err(&pdev
->dev
, "fail to get matching of_match struct\n");
551 glue
= kzalloc(sizeof(*glue
), GFP_KERNEL
);
553 dev_err(&pdev
->dev
, "unable to allocate glue memory\n");
557 glue
->dev
= &pdev
->dev
;
560 platform_set_drvdata(pdev
, glue
);
561 pm_runtime_enable(&pdev
->dev
);
563 ret
= pm_runtime_get_sync(&pdev
->dev
);
565 dev_err(&pdev
->dev
, "pm_runtime_get_sync FAILED");
569 ret
= dsps_create_musb_pdev(glue
, pdev
);
576 pm_runtime_put(&pdev
->dev
);
578 pm_runtime_disable(&pdev
->dev
);
583 static int dsps_remove(struct platform_device
*pdev
)
585 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
587 platform_device_unregister(glue
->musb
);
589 /* disable usbss clocks */
590 pm_runtime_put(&pdev
->dev
);
591 pm_runtime_disable(&pdev
->dev
);
596 static const struct dsps_musb_wrapper am33xx_driver_data
= {
601 .epintr_clear
= 0x40,
602 .epintr_status
= 0x30,
603 .coreintr_set
= 0x3c,
604 .coreintr_clear
= 0x44,
605 .coreintr_status
= 0x34,
613 .usb_bitmap
= (0x1ff << 0),
617 .txep_bitmap
= (0xffff << 0),
620 .rxep_bitmap
= (0xfffe << 16),
624 static const struct of_device_id musb_dsps_of_match
[] = {
625 { .compatible
= "ti,musb-am33xx",
626 .data
= (void *) &am33xx_driver_data
, },
629 MODULE_DEVICE_TABLE(of
, musb_dsps_of_match
);
631 static struct platform_driver dsps_usbss_driver
= {
633 .remove
= dsps_remove
,
636 .of_match_table
= musb_dsps_of_match
,
640 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
641 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
642 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
643 MODULE_LICENSE("GPL v2");
645 module_platform_driver(dsps_usbss_driver
);