2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
39 static int link_quirk
;
40 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
41 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
43 /* TODO: copied from ehci-hcd.c - can this be refactored? */
45 * xhci_handshake - spin reading hc until handshake completes or fails
46 * @ptr: address of hc register to be read
47 * @mask: bits to look at in result of read
48 * @done: value of those bits when handshake succeeds
49 * @usec: timeout in microseconds
51 * Returns negative errno, or zero on success
53 * Success happens when the "mask" bits have the specified value (hardware
54 * handshake done). There are two failure modes: "usec" have passed (major
55 * hardware flakeout), or the register reads as all-ones (hardware removed).
57 int xhci_handshake(struct xhci_hcd
*xhci
, void __iomem
*ptr
,
58 u32 mask
, u32 done
, int usec
)
63 result
= xhci_readl(xhci
, ptr
);
64 if (result
== ~(u32
)0) /* card removed */
76 * Disable interrupts and begin the xHCI halting process.
78 void xhci_quiesce(struct xhci_hcd
*xhci
)
85 halted
= xhci_readl(xhci
, &xhci
->op_regs
->status
) & STS_HALT
;
89 cmd
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
91 xhci_writel(xhci
, cmd
, &xhci
->op_regs
->command
);
95 * Force HC into halt state.
97 * Disable any IRQs and clear the run/stop bit.
98 * HC will complete any current and actively pipelined transactions, and
99 * should halt within 16 ms of the run/stop bit being cleared.
100 * Read HC Halted bit in the status register to see when the HC is finished.
102 int xhci_halt(struct xhci_hcd
*xhci
)
105 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Halt the HC");
108 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
109 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
111 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
112 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
114 xhci_warn(xhci
, "Host not halted after %u microseconds.\n",
120 * Set the run bit and wait for the host to be running.
122 static int xhci_start(struct xhci_hcd
*xhci
)
127 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
129 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Turn on HC, cmd = 0x%x.",
131 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
134 * Wait for the HCHalted Status bit to be 0 to indicate the host is
137 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
138 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
139 if (ret
== -ETIMEDOUT
)
140 xhci_err(xhci
, "Host took too long to start, "
141 "waited %u microseconds.\n",
144 xhci
->xhc_state
&= ~XHCI_STATE_HALTED
;
151 * This resets pipelines, timers, counters, state machines, etc.
152 * Transactions will be terminated immediately, and operational registers
153 * will be set to their defaults.
155 int xhci_reset(struct xhci_hcd
*xhci
)
161 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
162 if ((state
& STS_HALT
) == 0) {
163 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
167 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Reset the HC");
168 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
169 command
|= CMD_RESET
;
170 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
172 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->command
,
173 CMD_RESET
, 0, 10 * 1000 * 1000);
177 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
178 "Wait for controller to be ready for doorbell rings");
180 * xHCI cannot write to any doorbells or operational registers other
181 * than status until the "Controller Not Ready" flag is cleared.
183 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
184 STS_CNR
, 0, 10 * 1000 * 1000);
186 for (i
= 0; i
< 2; ++i
) {
187 xhci
->bus_state
[i
].port_c_suspend
= 0;
188 xhci
->bus_state
[i
].suspended_ports
= 0;
189 xhci
->bus_state
[i
].resuming_ports
= 0;
196 static int xhci_free_msi(struct xhci_hcd
*xhci
)
200 if (!xhci
->msix_entries
)
203 for (i
= 0; i
< xhci
->msix_count
; i
++)
204 if (xhci
->msix_entries
[i
].vector
)
205 free_irq(xhci
->msix_entries
[i
].vector
,
213 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
216 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
218 ret
= pci_enable_msi(pdev
);
220 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
221 "failed to allocate MSI entry");
225 ret
= request_irq(pdev
->irq
, xhci_msi_irq
,
226 0, "xhci_hcd", xhci_to_hcd(xhci
));
228 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
229 "disable MSI interrupt");
230 pci_disable_msi(pdev
);
238 * free all IRQs request
240 static void xhci_free_irq(struct xhci_hcd
*xhci
)
242 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
245 /* return if using legacy interrupt */
246 if (xhci_to_hcd(xhci
)->irq
> 0)
249 ret
= xhci_free_msi(xhci
);
253 free_irq(pdev
->irq
, xhci_to_hcd(xhci
));
261 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
264 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
265 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
268 * calculate number of msi-x vectors supported.
269 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
270 * with max number of interrupters based on the xhci HCSPARAMS1.
271 * - num_online_cpus: maximum msi-x vectors per CPUs core.
272 * Add additional 1 vector to ensure always available interrupt.
274 xhci
->msix_count
= min(num_online_cpus() + 1,
275 HCS_MAX_INTRS(xhci
->hcs_params1
));
278 kmalloc((sizeof(struct msix_entry
))*xhci
->msix_count
,
280 if (!xhci
->msix_entries
) {
281 xhci_err(xhci
, "Failed to allocate MSI-X entries\n");
285 for (i
= 0; i
< xhci
->msix_count
; i
++) {
286 xhci
->msix_entries
[i
].entry
= i
;
287 xhci
->msix_entries
[i
].vector
= 0;
290 ret
= pci_enable_msix(pdev
, xhci
->msix_entries
, xhci
->msix_count
);
292 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
293 "Failed to enable MSI-X");
297 for (i
= 0; i
< xhci
->msix_count
; i
++) {
298 ret
= request_irq(xhci
->msix_entries
[i
].vector
,
300 0, "xhci_hcd", xhci_to_hcd(xhci
));
305 hcd
->msix_enabled
= 1;
309 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "disable MSI-X interrupt");
311 pci_disable_msix(pdev
);
313 kfree(xhci
->msix_entries
);
314 xhci
->msix_entries
= NULL
;
318 /* Free any IRQs and disable MSI-X */
319 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
321 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
322 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
326 if (xhci
->msix_entries
) {
327 pci_disable_msix(pdev
);
328 kfree(xhci
->msix_entries
);
329 xhci
->msix_entries
= NULL
;
331 pci_disable_msi(pdev
);
334 hcd
->msix_enabled
= 0;
338 static void __maybe_unused
xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
342 if (xhci
->msix_entries
) {
343 for (i
= 0; i
< xhci
->msix_count
; i
++)
344 synchronize_irq(xhci
->msix_entries
[i
].vector
);
348 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
350 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
351 struct pci_dev
*pdev
;
354 /* The xhci platform device has set up IRQs through usb_add_hcd. */
355 if (xhci
->quirks
& XHCI_PLAT
)
358 pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
360 * Some Fresco Logic host controllers advertise MSI, but fail to
361 * generate interrupts. Don't even try to enable MSI.
363 if (xhci
->quirks
& XHCI_BROKEN_MSI
)
366 /* unregister the legacy interrupt */
368 free_irq(hcd
->irq
, hcd
);
371 ret
= xhci_setup_msix(xhci
);
373 /* fall back to msi*/
374 ret
= xhci_setup_msi(xhci
);
377 /* hcd->irq is 0, we have MSI */
381 xhci_err(xhci
, "No msi-x/msi found and no IRQ in BIOS\n");
386 /* fall back to legacy interrupt*/
387 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
388 hcd
->irq_descr
, hcd
);
390 xhci_err(xhci
, "request interrupt %d failed\n",
394 hcd
->irq
= pdev
->irq
;
400 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
405 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
409 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
415 static void compliance_mode_recovery(unsigned long arg
)
417 struct xhci_hcd
*xhci
;
422 xhci
= (struct xhci_hcd
*)arg
;
424 for (i
= 0; i
< xhci
->num_usb3_ports
; i
++) {
425 temp
= xhci_readl(xhci
, xhci
->usb3_ports
[i
]);
426 if ((temp
& PORT_PLS_MASK
) == USB_SS_PORT_LS_COMP_MOD
) {
428 * Compliance Mode Detected. Letting USB Core
429 * handle the Warm Reset
431 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
432 "Compliance mode detected->port %d",
434 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
435 "Attempting compliance mode recovery");
436 hcd
= xhci
->shared_hcd
;
438 if (hcd
->state
== HC_STATE_SUSPENDED
)
439 usb_hcd_resume_root_hub(hcd
);
441 usb_hcd_poll_rh_status(hcd
);
445 if (xhci
->port_status_u0
!= ((1 << xhci
->num_usb3_ports
)-1))
446 mod_timer(&xhci
->comp_mode_recovery_timer
,
447 jiffies
+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
451 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
452 * that causes ports behind that hardware to enter compliance mode sometimes.
453 * The quirk creates a timer that polls every 2 seconds the link state of
454 * each host controller's port and recovers it by issuing a Warm reset
455 * if Compliance mode is detected, otherwise the port will become "dead" (no
456 * device connections or disconnections will be detected anymore). Becasue no
457 * status event is generated when entering compliance mode (per xhci spec),
458 * this quirk is needed on systems that have the failing hardware installed.
460 static void compliance_mode_recovery_timer_init(struct xhci_hcd
*xhci
)
462 xhci
->port_status_u0
= 0;
463 init_timer(&xhci
->comp_mode_recovery_timer
);
465 xhci
->comp_mode_recovery_timer
.data
= (unsigned long) xhci
;
466 xhci
->comp_mode_recovery_timer
.function
= compliance_mode_recovery
;
467 xhci
->comp_mode_recovery_timer
.expires
= jiffies
+
468 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
);
470 set_timer_slack(&xhci
->comp_mode_recovery_timer
,
471 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
472 add_timer(&xhci
->comp_mode_recovery_timer
);
473 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
474 "Compliance mode recovery timer initialized");
478 * This function identifies the systems that have installed the SN65LVPE502CP
479 * USB3.0 re-driver and that need the Compliance Mode Quirk.
481 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
483 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
485 const char *dmi_product_name
, *dmi_sys_vendor
;
487 dmi_product_name
= dmi_get_system_info(DMI_PRODUCT_NAME
);
488 dmi_sys_vendor
= dmi_get_system_info(DMI_SYS_VENDOR
);
489 if (!dmi_product_name
|| !dmi_sys_vendor
)
492 if (!(strstr(dmi_sys_vendor
, "Hewlett-Packard")))
495 if (strstr(dmi_product_name
, "Z420") ||
496 strstr(dmi_product_name
, "Z620") ||
497 strstr(dmi_product_name
, "Z820") ||
498 strstr(dmi_product_name
, "Z1 Workstation"))
504 static int xhci_all_ports_seen_u0(struct xhci_hcd
*xhci
)
506 return (xhci
->port_status_u0
== ((1 << xhci
->num_usb3_ports
)-1));
511 * Initialize memory for HCD and xHC (one-time init).
513 * Program the PAGESIZE register, initialize the device context array, create
514 * device contexts (?), set up a command ring segment (or two?), create event
515 * ring (one for now).
517 int xhci_init(struct usb_hcd
*hcd
)
519 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
522 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "xhci_init");
523 spin_lock_init(&xhci
->lock
);
524 if (xhci
->hci_version
== 0x95 && link_quirk
) {
525 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
526 "QUIRK: Not clearing Link TRB chain bits.");
527 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
529 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
530 "xHCI doesn't need link TRB QUIRK");
532 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
533 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "Finished xhci_init");
535 /* Initializing Compliance Mode Recovery Data If Needed */
536 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
537 xhci
->quirks
|= XHCI_COMP_MODE_QUIRK
;
538 compliance_mode_recovery_timer_init(xhci
);
544 /*-------------------------------------------------------------------------*/
547 static int xhci_run_finished(struct xhci_hcd
*xhci
)
549 if (xhci_start(xhci
)) {
553 xhci
->shared_hcd
->state
= HC_STATE_RUNNING
;
554 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
556 if (xhci
->quirks
& XHCI_NEC_HOST
)
557 xhci_ring_cmd_db(xhci
);
559 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
560 "Finished xhci_run for USB3 roothub");
565 * Start the HC after it was halted.
567 * This function is called by the USB core when the HC driver is added.
568 * Its opposite is xhci_stop().
570 * xhci_init() must be called once before this function can be called.
571 * Reset the HC, enable device slot contexts, program DCBAAP, and
572 * set command ring pointer and event ring pointer.
574 * Setup MSI-X vectors and enable interrupts.
576 int xhci_run(struct usb_hcd
*hcd
)
581 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
583 /* Start the xHCI host controller running only after the USB 2.0 roothub
587 hcd
->uses_new_polling
= 1;
588 if (!usb_hcd_is_primary_hcd(hcd
))
589 return xhci_run_finished(xhci
);
591 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "xhci_run");
593 ret
= xhci_try_enable_msi(hcd
);
597 xhci_dbg(xhci
, "Command ring memory map follows:\n");
598 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
599 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
600 xhci_dbg_cmd_ptrs(xhci
);
602 xhci_dbg(xhci
, "ERST memory map follows:\n");
603 xhci_dbg_erst(xhci
, &xhci
->erst
);
604 xhci_dbg(xhci
, "Event ring:\n");
605 xhci_debug_ring(xhci
, xhci
->event_ring
);
606 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
607 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
608 temp_64
&= ~ERST_PTR_MASK
;
609 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
610 "ERST deq = 64'h%0lx", (long unsigned int) temp_64
);
612 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
613 "// Set the interrupt modulation register");
614 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
615 temp
&= ~ER_IRQ_INTERVAL_MASK
;
617 xhci_writel(xhci
, temp
, &xhci
->ir_set
->irq_control
);
619 /* Set the HCD state before we enable the irqs */
620 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
622 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
623 "// Enable interrupts, cmd = 0x%x.", temp
);
624 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
626 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
627 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
628 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
629 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
630 xhci_writel(xhci
, ER_IRQ_ENABLE(temp
),
631 &xhci
->ir_set
->irq_pending
);
632 xhci_print_ir_set(xhci
, 0);
634 if (xhci
->quirks
& XHCI_NEC_HOST
)
635 xhci_queue_vendor_command(xhci
, 0, 0, 0,
636 TRB_TYPE(TRB_NEC_GET_FW
));
638 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
639 "Finished xhci_run for USB2 roothub");
643 static void xhci_only_stop_hcd(struct usb_hcd
*hcd
)
645 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
647 spin_lock_irq(&xhci
->lock
);
650 /* The shared_hcd is going to be deallocated shortly (the USB core only
651 * calls this function when allocation fails in usb_add_hcd(), or
652 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
654 xhci
->shared_hcd
= NULL
;
655 spin_unlock_irq(&xhci
->lock
);
661 * This function is called by the USB core when the HC driver is removed.
662 * Its opposite is xhci_run().
664 * Disable device contexts, disable IRQs, and quiesce the HC.
665 * Reset the HC, finish any completed transactions, and cleanup memory.
667 void xhci_stop(struct usb_hcd
*hcd
)
670 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
672 if (!usb_hcd_is_primary_hcd(hcd
)) {
673 xhci_only_stop_hcd(xhci
->shared_hcd
);
677 spin_lock_irq(&xhci
->lock
);
678 /* Make sure the xHC is halted for a USB3 roothub
679 * (xhci_stop() could be called as part of failed init).
683 spin_unlock_irq(&xhci
->lock
);
685 xhci_cleanup_msix(xhci
);
687 /* Deleting Compliance Mode Recovery Timer */
688 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
689 (!(xhci_all_ports_seen_u0(xhci
)))) {
690 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
691 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
692 "%s: compliance mode recovery timer deleted",
696 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
699 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
700 "// Disabling event ring interrupts");
701 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
702 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
703 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
704 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
705 &xhci
->ir_set
->irq_pending
);
706 xhci_print_ir_set(xhci
, 0);
708 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "cleaning up memory");
709 xhci_mem_cleanup(xhci
);
710 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
711 "xhci_stop completed - status = %x",
712 xhci_readl(xhci
, &xhci
->op_regs
->status
));
716 * Shutdown HC (not bus-specific)
718 * This is called when the machine is rebooting or halting. We assume that the
719 * machine will be powered off, and the HC's internal state will be reset.
720 * Don't bother to free memory.
722 * This will only ever be called with the main usb_hcd (the USB3 roothub).
724 void xhci_shutdown(struct usb_hcd
*hcd
)
726 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
728 if (xhci
->quirks
& XHCI_SPURIOUS_REBOOT
)
729 usb_disable_xhci_ports(to_pci_dev(hcd
->self
.controller
));
731 spin_lock_irq(&xhci
->lock
);
733 /* Workaround for spurious wakeups at shutdown with HSW */
734 if (xhci
->quirks
& XHCI_SPURIOUS_WAKEUP
)
736 spin_unlock_irq(&xhci
->lock
);
738 xhci_cleanup_msix(xhci
);
740 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
741 "xhci_shutdown completed - status = %x",
742 xhci_readl(xhci
, &xhci
->op_regs
->status
));
744 /* Yet another workaround for spurious wakeups at shutdown with HSW */
745 if (xhci
->quirks
& XHCI_SPURIOUS_WAKEUP
)
746 pci_set_power_state(to_pci_dev(hcd
->self
.controller
), PCI_D3hot
);
750 static void xhci_save_registers(struct xhci_hcd
*xhci
)
752 xhci
->s3
.command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
753 xhci
->s3
.dev_nt
= xhci_readl(xhci
, &xhci
->op_regs
->dev_notification
);
754 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
755 xhci
->s3
.config_reg
= xhci_readl(xhci
, &xhci
->op_regs
->config_reg
);
756 xhci
->s3
.erst_size
= xhci_readl(xhci
, &xhci
->ir_set
->erst_size
);
757 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
758 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
759 xhci
->s3
.irq_pending
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
760 xhci
->s3
.irq_control
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
763 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
765 xhci_writel(xhci
, xhci
->s3
.command
, &xhci
->op_regs
->command
);
766 xhci_writel(xhci
, xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
767 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
768 xhci_writel(xhci
, xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
769 xhci_writel(xhci
, xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
770 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
771 xhci_write_64(xhci
, xhci
->s3
.erst_dequeue
, &xhci
->ir_set
->erst_dequeue
);
772 xhci_writel(xhci
, xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
773 xhci_writel(xhci
, xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
776 static void xhci_set_cmd_ring_deq(struct xhci_hcd
*xhci
)
780 /* step 2: initialize command ring buffer */
781 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
782 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
783 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
784 xhci
->cmd_ring
->dequeue
) &
785 (u64
) ~CMD_RING_RSVD_BITS
) |
786 xhci
->cmd_ring
->cycle_state
;
787 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
788 "// Setting command ring address to 0x%llx",
789 (long unsigned long) val_64
);
790 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
794 * The whole command ring must be cleared to zero when we suspend the host.
796 * The host doesn't save the command ring pointer in the suspend well, so we
797 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
798 * aligned, because of the reserved bits in the command ring dequeue pointer
799 * register. Therefore, we can't just set the dequeue pointer back in the
800 * middle of the ring (TRBs are 16-byte aligned).
802 static void xhci_clear_command_ring(struct xhci_hcd
*xhci
)
804 struct xhci_ring
*ring
;
805 struct xhci_segment
*seg
;
807 ring
= xhci
->cmd_ring
;
811 sizeof(union xhci_trb
) * (TRBS_PER_SEGMENT
- 1));
812 seg
->trbs
[TRBS_PER_SEGMENT
- 1].link
.control
&=
813 cpu_to_le32(~TRB_CYCLE
);
815 } while (seg
!= ring
->deq_seg
);
817 /* Reset the software enqueue and dequeue pointers */
818 ring
->deq_seg
= ring
->first_seg
;
819 ring
->dequeue
= ring
->first_seg
->trbs
;
820 ring
->enq_seg
= ring
->deq_seg
;
821 ring
->enqueue
= ring
->dequeue
;
823 ring
->num_trbs_free
= ring
->num_segs
* (TRBS_PER_SEGMENT
- 1) - 1;
825 * Ring is now zeroed, so the HW should look for change of ownership
826 * when the cycle bit is set to 1.
828 ring
->cycle_state
= 1;
831 * Reset the hardware dequeue pointer.
832 * Yes, this will need to be re-written after resume, but we're paranoid
833 * and want to make sure the hardware doesn't access bogus memory
834 * because, say, the BIOS or an SMI started the host without changing
835 * the command ring pointers.
837 xhci_set_cmd_ring_deq(xhci
);
841 * Stop HC (not bus-specific)
843 * This is called when the machine transition into S3/S4 mode.
846 int xhci_suspend(struct xhci_hcd
*xhci
)
849 unsigned int delay
= XHCI_MAX_HALT_USEC
;
850 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
853 if (hcd
->state
!= HC_STATE_SUSPENDED
||
854 xhci
->shared_hcd
->state
!= HC_STATE_SUSPENDED
)
857 /* Don't poll the roothubs on bus suspend. */
858 xhci_dbg(xhci
, "%s: stopping port polling.\n", __func__
);
859 clear_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
860 del_timer_sync(&hcd
->rh_timer
);
862 spin_lock_irq(&xhci
->lock
);
863 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
864 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
865 /* step 1: stop endpoint */
866 /* skipped assuming that port suspend has done */
868 /* step 2: clear Run/Stop bit */
869 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
871 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
873 /* Some chips from Fresco Logic need an extraordinary delay */
874 delay
*= (xhci
->quirks
& XHCI_SLOW_SUSPEND
) ? 10 : 1;
876 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
877 STS_HALT
, STS_HALT
, delay
)) {
878 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
879 spin_unlock_irq(&xhci
->lock
);
882 xhci_clear_command_ring(xhci
);
884 /* step 3: save registers */
885 xhci_save_registers(xhci
);
887 /* step 4: set CSS flag */
888 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
890 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
891 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
892 STS_SAVE
, 0, 10 * 1000)) {
893 xhci_warn(xhci
, "WARN: xHC save state timeout\n");
894 spin_unlock_irq(&xhci
->lock
);
897 spin_unlock_irq(&xhci
->lock
);
900 * Deleting Compliance Mode Recovery Timer because the xHCI Host
901 * is about to be suspended.
903 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
904 (!(xhci_all_ports_seen_u0(xhci
)))) {
905 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
906 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
907 "%s: compliance mode recovery timer deleted",
911 /* step 5: remove core well power */
912 /* synchronize irq when using MSI-X */
913 xhci_msix_sync_irqs(xhci
);
919 * start xHC (not bus-specific)
921 * This is called when the machine transition from S3/S4 mode.
924 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
926 u32 command
, temp
= 0;
927 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
928 struct usb_hcd
*secondary_hcd
;
930 bool comp_timer_running
= false;
932 /* Wait a bit if either of the roothubs need to settle from the
933 * transition into bus suspend.
935 if (time_before(jiffies
, xhci
->bus_state
[0].next_statechange
) ||
937 xhci
->bus_state
[1].next_statechange
))
940 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
941 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
943 spin_lock_irq(&xhci
->lock
);
944 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
948 /* step 1: restore register */
949 xhci_restore_registers(xhci
);
950 /* step 2: initialize command ring buffer */
951 xhci_set_cmd_ring_deq(xhci
);
952 /* step 3: restore state and start state*/
953 /* step 3: set CRS flag */
954 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
956 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
957 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
958 STS_RESTORE
, 0, 10 * 1000)) {
959 xhci_warn(xhci
, "WARN: xHC restore state timeout\n");
960 spin_unlock_irq(&xhci
->lock
);
963 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
966 /* If restore operation fails, re-initialize the HC during resume */
967 if ((temp
& STS_SRE
) || hibernated
) {
969 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
970 !(xhci_all_ports_seen_u0(xhci
))) {
971 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
972 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
973 "Compliance Mode Recovery Timer deleted!");
976 /* Let the USB core know _both_ roothubs lost power. */
977 usb_root_hub_lost_power(xhci
->main_hcd
->self
.root_hub
);
978 usb_root_hub_lost_power(xhci
->shared_hcd
->self
.root_hub
);
980 xhci_dbg(xhci
, "Stop HCD\n");
983 spin_unlock_irq(&xhci
->lock
);
984 xhci_cleanup_msix(xhci
);
986 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
987 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
988 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
989 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
990 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
991 &xhci
->ir_set
->irq_pending
);
992 xhci_print_ir_set(xhci
, 0);
994 xhci_dbg(xhci
, "cleaning up memory\n");
995 xhci_mem_cleanup(xhci
);
996 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
997 xhci_readl(xhci
, &xhci
->op_regs
->status
));
999 /* USB core calls the PCI reinit and start functions twice:
1000 * first with the primary HCD, and then with the secondary HCD.
1001 * If we don't do the same, the host will never be started.
1003 if (!usb_hcd_is_primary_hcd(hcd
))
1004 secondary_hcd
= hcd
;
1006 secondary_hcd
= xhci
->shared_hcd
;
1008 xhci_dbg(xhci
, "Initialize the xhci_hcd\n");
1009 retval
= xhci_init(hcd
->primary_hcd
);
1012 comp_timer_running
= true;
1014 xhci_dbg(xhci
, "Start the primary HCD\n");
1015 retval
= xhci_run(hcd
->primary_hcd
);
1017 xhci_dbg(xhci
, "Start the secondary HCD\n");
1018 retval
= xhci_run(secondary_hcd
);
1020 hcd
->state
= HC_STATE_SUSPENDED
;
1021 xhci
->shared_hcd
->state
= HC_STATE_SUSPENDED
;
1025 /* step 4: set Run/Stop bit */
1026 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1028 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
1029 xhci_handshake(xhci
, &xhci
->op_regs
->status
, STS_HALT
,
1032 /* step 5: walk topology and initialize portsc,
1033 * portpmsc and portli
1035 /* this is done in bus_resume */
1037 /* step 6: restart each of the previously
1038 * Running endpoints by ringing their doorbells
1041 spin_unlock_irq(&xhci
->lock
);
1045 usb_hcd_resume_root_hub(hcd
);
1046 usb_hcd_resume_root_hub(xhci
->shared_hcd
);
1050 * If system is subject to the Quirk, Compliance Mode Timer needs to
1051 * be re-initialized Always after a system resume. Ports are subject
1052 * to suffer the Compliance Mode issue again. It doesn't matter if
1053 * ports have entered previously to U0 before system's suspension.
1055 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) && !comp_timer_running
)
1056 compliance_mode_recovery_timer_init(xhci
);
1058 /* Re-enable port polling. */
1059 xhci_dbg(xhci
, "%s: starting port polling.\n", __func__
);
1060 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
1061 usb_hcd_poll_rh_status(hcd
);
1065 #endif /* CONFIG_PM */
1067 /*-------------------------------------------------------------------------*/
1070 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1071 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1072 * value to right shift 1 for the bitmask.
1074 * Index = (epnum * 2) + direction - 1,
1075 * where direction = 0 for OUT, 1 for IN.
1076 * For control endpoints, the IN index is used (OUT index is unused), so
1077 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1079 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
1082 if (usb_endpoint_xfer_control(desc
))
1083 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
1085 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
1086 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
1090 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1091 * address from the XHCI endpoint index.
1093 unsigned int xhci_get_endpoint_address(unsigned int ep_index
)
1095 unsigned int number
= DIV_ROUND_UP(ep_index
, 2);
1096 unsigned int direction
= ep_index
% 2 ? USB_DIR_OUT
: USB_DIR_IN
;
1097 return direction
| number
;
1100 /* Find the flag for this endpoint (for use in the control context). Use the
1101 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1104 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
1106 return 1 << (xhci_get_endpoint_index(desc
) + 1);
1109 /* Find the flag for this endpoint (for use in the control context). Use the
1110 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1113 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
1115 return 1 << (ep_index
+ 1);
1118 /* Compute the last valid endpoint context index. Basically, this is the
1119 * endpoint index plus one. For slot contexts with more than valid endpoint,
1120 * we find the most significant bit set in the added contexts flags.
1121 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1122 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1124 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
1126 return fls(added_ctxs
) - 1;
1129 /* Returns 1 if the arguments are OK;
1130 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1132 static int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1133 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
1135 struct xhci_hcd
*xhci
;
1136 struct xhci_virt_device
*virt_dev
;
1138 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
1139 pr_debug("xHCI %s called with invalid args\n", func
);
1142 if (!udev
->parent
) {
1143 pr_debug("xHCI %s called for root hub\n", func
);
1147 xhci
= hcd_to_xhci(hcd
);
1148 if (check_virt_dev
) {
1149 if (!udev
->slot_id
|| !xhci
->devs
[udev
->slot_id
]) {
1150 xhci_dbg(xhci
, "xHCI %s called with unaddressed device\n",
1155 virt_dev
= xhci
->devs
[udev
->slot_id
];
1156 if (virt_dev
->udev
!= udev
) {
1157 xhci_dbg(xhci
, "xHCI %s called with udev and "
1158 "virt_dev does not match\n", func
);
1163 if (xhci
->xhc_state
& XHCI_STATE_HALTED
)
1169 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1170 struct usb_device
*udev
, struct xhci_command
*command
,
1171 bool ctx_change
, bool must_succeed
);
1174 * Full speed devices may have a max packet size greater than 8 bytes, but the
1175 * USB core doesn't know that until it reads the first 8 bytes of the
1176 * descriptor. If the usb_device's max packet size changes after that point,
1177 * we need to issue an evaluate context command and wait on it.
1179 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
1180 unsigned int ep_index
, struct urb
*urb
)
1182 struct xhci_container_ctx
*in_ctx
;
1183 struct xhci_container_ctx
*out_ctx
;
1184 struct xhci_input_control_ctx
*ctrl_ctx
;
1185 struct xhci_ep_ctx
*ep_ctx
;
1186 int max_packet_size
;
1187 int hw_max_packet_size
;
1190 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
1191 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1192 hw_max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
1193 max_packet_size
= usb_endpoint_maxp(&urb
->dev
->ep0
.desc
);
1194 if (hw_max_packet_size
!= max_packet_size
) {
1195 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1196 "Max Packet Size for ep 0 changed.");
1197 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1198 "Max packet size in usb_device = %d",
1200 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1201 "Max packet size in xHCI HW = %d",
1202 hw_max_packet_size
);
1203 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1204 "Issuing evaluate context command.");
1206 /* Set up the input context flags for the command */
1207 /* FIXME: This won't work if a non-default control endpoint
1208 * changes max packet sizes.
1210 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1211 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1213 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1217 /* Set up the modified control endpoint 0 */
1218 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1219 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1221 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1222 ep_ctx
->ep_info2
&= cpu_to_le32(~MAX_PACKET_MASK
);
1223 ep_ctx
->ep_info2
|= cpu_to_le32(MAX_PACKET(max_packet_size
));
1225 ctrl_ctx
->add_flags
= cpu_to_le32(EP0_FLAG
);
1226 ctrl_ctx
->drop_flags
= 0;
1228 xhci_dbg(xhci
, "Slot %d input context\n", slot_id
);
1229 xhci_dbg_ctx(xhci
, in_ctx
, ep_index
);
1230 xhci_dbg(xhci
, "Slot %d output context\n", slot_id
);
1231 xhci_dbg_ctx(xhci
, out_ctx
, ep_index
);
1233 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, NULL
,
1236 /* Clean up the input context for later use by bandwidth
1239 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
);
1245 * non-error returns are a promise to giveback() the urb later
1246 * we drop ownership so next owner (or urb unlink) can get it
1248 int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
1250 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1251 struct xhci_td
*buffer
;
1252 unsigned long flags
;
1254 unsigned int slot_id
, ep_index
;
1255 struct urb_priv
*urb_priv
;
1258 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
1259 true, true, __func__
) <= 0)
1262 slot_id
= urb
->dev
->slot_id
;
1263 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1265 if (!HCD_HW_ACCESSIBLE(hcd
)) {
1266 if (!in_interrupt())
1267 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
1272 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
1273 size
= urb
->number_of_packets
;
1277 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
1278 size
* sizeof(struct xhci_td
*), mem_flags
);
1282 buffer
= kzalloc(size
* sizeof(struct xhci_td
), mem_flags
);
1288 for (i
= 0; i
< size
; i
++) {
1289 urb_priv
->td
[i
] = buffer
;
1293 urb_priv
->length
= size
;
1294 urb_priv
->td_cnt
= 0;
1295 urb
->hcpriv
= urb_priv
;
1297 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
1298 /* Check to see if the max packet size for the default control
1299 * endpoint changed during FS device enumeration
1301 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
1302 ret
= xhci_check_maxpacket(xhci
, slot_id
,
1305 xhci_urb_free_priv(xhci
, urb_priv
);
1311 /* We have a spinlock and interrupts disabled, so we must pass
1312 * atomic context to this function, which may allocate memory.
1314 spin_lock_irqsave(&xhci
->lock
, flags
);
1315 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1317 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
1321 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1322 } else if (usb_endpoint_xfer_bulk(&urb
->ep
->desc
)) {
1323 spin_lock_irqsave(&xhci
->lock
, flags
);
1324 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1326 if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1327 EP_GETTING_STREAMS
) {
1328 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1329 "is transitioning to using streams.\n");
1331 } else if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1332 EP_GETTING_NO_STREAMS
) {
1333 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1334 "is transitioning to "
1335 "not having streams.\n");
1338 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1343 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1344 } else if (usb_endpoint_xfer_int(&urb
->ep
->desc
)) {
1345 spin_lock_irqsave(&xhci
->lock
, flags
);
1346 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1348 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1352 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1354 spin_lock_irqsave(&xhci
->lock
, flags
);
1355 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1357 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1361 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1366 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for "
1367 "non-responsive xHCI host.\n",
1368 urb
->ep
->desc
.bEndpointAddress
, urb
);
1371 xhci_urb_free_priv(xhci
, urb_priv
);
1373 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1377 /* Get the right ring for the given URB.
1378 * If the endpoint supports streams, boundary check the URB's stream ID.
1379 * If the endpoint doesn't support streams, return the singular endpoint ring.
1381 static struct xhci_ring
*xhci_urb_to_transfer_ring(struct xhci_hcd
*xhci
,
1384 unsigned int slot_id
;
1385 unsigned int ep_index
;
1386 unsigned int stream_id
;
1387 struct xhci_virt_ep
*ep
;
1389 slot_id
= urb
->dev
->slot_id
;
1390 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1391 stream_id
= urb
->stream_id
;
1392 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1393 /* Common case: no streams */
1394 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
1397 if (stream_id
== 0) {
1399 "WARN: Slot ID %u, ep index %u has streams, "
1400 "but URB has no stream ID.\n",
1405 if (stream_id
< ep
->stream_info
->num_streams
)
1406 return ep
->stream_info
->stream_rings
[stream_id
];
1409 "WARN: Slot ID %u, ep index %u has "
1410 "stream IDs 1 to %u allocated, "
1411 "but stream ID %u is requested.\n",
1413 ep
->stream_info
->num_streams
- 1,
1419 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1420 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1421 * should pick up where it left off in the TD, unless a Set Transfer Ring
1422 * Dequeue Pointer is issued.
1424 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1425 * the ring. Since the ring is a contiguous structure, they can't be physically
1426 * removed. Instead, there are two options:
1428 * 1) If the HC is in the middle of processing the URB to be canceled, we
1429 * simply move the ring's dequeue pointer past those TRBs using the Set
1430 * Transfer Ring Dequeue Pointer command. This will be the common case,
1431 * when drivers timeout on the last submitted URB and attempt to cancel.
1433 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1434 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1435 * HC will need to invalidate the any TRBs it has cached after the stop
1436 * endpoint command, as noted in the xHCI 0.95 errata.
1438 * 3) The TD may have completed by the time the Stop Endpoint Command
1439 * completes, so software needs to handle that case too.
1441 * This function should protect against the TD enqueueing code ringing the
1442 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1443 * It also needs to account for multiple cancellations on happening at the same
1444 * time for the same endpoint.
1446 * Note that this function can be called in any context, or so says
1447 * usb_hcd_unlink_urb()
1449 int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1451 unsigned long flags
;
1454 struct xhci_hcd
*xhci
;
1455 struct urb_priv
*urb_priv
;
1457 unsigned int ep_index
;
1458 struct xhci_ring
*ep_ring
;
1459 struct xhci_virt_ep
*ep
;
1461 xhci
= hcd_to_xhci(hcd
);
1462 spin_lock_irqsave(&xhci
->lock
, flags
);
1463 /* Make sure the URB hasn't completed or been unlinked already */
1464 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1465 if (ret
|| !urb
->hcpriv
)
1467 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1468 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1469 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1470 "HW died, freeing TD.");
1471 urb_priv
= urb
->hcpriv
;
1472 for (i
= urb_priv
->td_cnt
; i
< urb_priv
->length
; i
++) {
1473 td
= urb_priv
->td
[i
];
1474 if (!list_empty(&td
->td_list
))
1475 list_del_init(&td
->td_list
);
1476 if (!list_empty(&td
->cancelled_td_list
))
1477 list_del_init(&td
->cancelled_td_list
);
1480 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1481 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1482 usb_hcd_giveback_urb(hcd
, urb
, -ESHUTDOWN
);
1483 xhci_urb_free_priv(xhci
, urb_priv
);
1486 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
1487 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1488 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1489 "Ep 0x%x: URB %p to be canceled on "
1490 "non-responsive xHCI host.",
1491 urb
->ep
->desc
.bEndpointAddress
, urb
);
1492 /* Let the stop endpoint command watchdog timer (which set this
1493 * state) finish cleaning up the endpoint TD lists. We must
1494 * have caught it in the middle of dropping a lock and giving
1500 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1501 ep
= &xhci
->devs
[urb
->dev
->slot_id
]->eps
[ep_index
];
1502 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1508 urb_priv
= urb
->hcpriv
;
1509 i
= urb_priv
->td_cnt
;
1510 if (i
< urb_priv
->length
)
1511 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1512 "Cancel URB %p, dev %s, ep 0x%x, "
1513 "starting at offset 0x%llx",
1514 urb
, urb
->dev
->devpath
,
1515 urb
->ep
->desc
.bEndpointAddress
,
1516 (unsigned long long) xhci_trb_virt_to_dma(
1517 urb_priv
->td
[i
]->start_seg
,
1518 urb_priv
->td
[i
]->first_trb
));
1520 for (; i
< urb_priv
->length
; i
++) {
1521 td
= urb_priv
->td
[i
];
1522 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1525 /* Queue a stop endpoint command, but only if this is
1526 * the first cancellation to be handled.
1528 if (!(ep
->ep_state
& EP_HALT_PENDING
)) {
1529 ep
->ep_state
|= EP_HALT_PENDING
;
1530 ep
->stop_cmds_pending
++;
1531 ep
->stop_cmd_timer
.expires
= jiffies
+
1532 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1533 add_timer(&ep
->stop_cmd_timer
);
1534 xhci_queue_stop_endpoint(xhci
, urb
->dev
->slot_id
, ep_index
, 0);
1535 xhci_ring_cmd_db(xhci
);
1538 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1542 /* Drop an endpoint from a new bandwidth configuration for this device.
1543 * Only one call to this function is allowed per endpoint before
1544 * check_bandwidth() or reset_bandwidth() must be called.
1545 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1546 * add the endpoint to the schedule with possibly new parameters denoted by a
1547 * different endpoint descriptor in usb_host_endpoint.
1548 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1551 * The USB core will not allow URBs to be queued to an endpoint that is being
1552 * disabled, so there's no need for mutual exclusion to protect
1553 * the xhci->devs[slot_id] structure.
1555 int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1556 struct usb_host_endpoint
*ep
)
1558 struct xhci_hcd
*xhci
;
1559 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1560 struct xhci_input_control_ctx
*ctrl_ctx
;
1561 struct xhci_slot_ctx
*slot_ctx
;
1562 unsigned int last_ctx
;
1563 unsigned int ep_index
;
1564 struct xhci_ep_ctx
*ep_ctx
;
1566 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1569 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1572 xhci
= hcd_to_xhci(hcd
);
1573 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1576 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1577 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1578 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1579 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1580 __func__
, drop_flag
);
1584 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1585 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1586 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1588 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1593 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1594 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1595 /* If the HC already knows the endpoint is disabled,
1596 * or the HCD has noted it is disabled, ignore this request
1598 if (((ep_ctx
->ep_info
& cpu_to_le32(EP_STATE_MASK
)) ==
1599 cpu_to_le32(EP_STATE_DISABLED
)) ||
1600 le32_to_cpu(ctrl_ctx
->drop_flags
) &
1601 xhci_get_endpoint_flag(&ep
->desc
)) {
1602 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1607 ctrl_ctx
->drop_flags
|= cpu_to_le32(drop_flag
);
1608 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1610 ctrl_ctx
->add_flags
&= cpu_to_le32(~drop_flag
);
1611 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1613 last_ctx
= xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx
->add_flags
));
1614 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1615 /* Update the last valid endpoint context, if we deleted the last one */
1616 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) >
1617 LAST_CTX(last_ctx
)) {
1618 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1619 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1621 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1623 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1625 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1626 (unsigned int) ep
->desc
.bEndpointAddress
,
1628 (unsigned int) new_drop_flags
,
1629 (unsigned int) new_add_flags
,
1630 (unsigned int) new_slot_info
);
1634 /* Add an endpoint to a new possible bandwidth configuration for this device.
1635 * Only one call to this function is allowed per endpoint before
1636 * check_bandwidth() or reset_bandwidth() must be called.
1637 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1638 * add the endpoint to the schedule with possibly new parameters denoted by a
1639 * different endpoint descriptor in usb_host_endpoint.
1640 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1643 * The USB core will not allow URBs to be queued to an endpoint until the
1644 * configuration or alt setting is installed in the device, so there's no need
1645 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1647 int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1648 struct usb_host_endpoint
*ep
)
1650 struct xhci_hcd
*xhci
;
1651 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1652 unsigned int ep_index
;
1653 struct xhci_slot_ctx
*slot_ctx
;
1654 struct xhci_input_control_ctx
*ctrl_ctx
;
1656 unsigned int last_ctx
;
1657 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1658 struct xhci_virt_device
*virt_dev
;
1661 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1663 /* So we won't queue a reset ep command for a root hub */
1667 xhci
= hcd_to_xhci(hcd
);
1668 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1671 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1672 last_ctx
= xhci_last_valid_endpoint(added_ctxs
);
1673 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1674 /* FIXME when we have to issue an evaluate endpoint command to
1675 * deal with ep0 max packet size changing once we get the
1678 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1679 __func__
, added_ctxs
);
1683 virt_dev
= xhci
->devs
[udev
->slot_id
];
1684 in_ctx
= virt_dev
->in_ctx
;
1685 out_ctx
= virt_dev
->out_ctx
;
1686 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1688 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1693 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1694 /* If this endpoint is already in use, and the upper layers are trying
1695 * to add it again without dropping it, reject the addition.
1697 if (virt_dev
->eps
[ep_index
].ring
&&
1698 !(le32_to_cpu(ctrl_ctx
->drop_flags
) &
1699 xhci_get_endpoint_flag(&ep
->desc
))) {
1700 xhci_warn(xhci
, "Trying to add endpoint 0x%x "
1701 "without dropping it.\n",
1702 (unsigned int) ep
->desc
.bEndpointAddress
);
1706 /* If the HCD has already noted the endpoint is enabled,
1707 * ignore this request.
1709 if (le32_to_cpu(ctrl_ctx
->add_flags
) &
1710 xhci_get_endpoint_flag(&ep
->desc
)) {
1711 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1717 * Configuration and alternate setting changes must be done in
1718 * process context, not interrupt context (or so documenation
1719 * for usb_set_interface() and usb_set_configuration() claim).
1721 if (xhci_endpoint_init(xhci
, virt_dev
, udev
, ep
, GFP_NOIO
) < 0) {
1722 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1723 __func__
, ep
->desc
.bEndpointAddress
);
1727 ctrl_ctx
->add_flags
|= cpu_to_le32(added_ctxs
);
1728 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1730 /* If xhci_endpoint_disable() was called for this endpoint, but the
1731 * xHC hasn't been notified yet through the check_bandwidth() call,
1732 * this re-adds a new state for the endpoint from the new endpoint
1733 * descriptors. We must drop and re-add this endpoint, so we leave the
1736 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1738 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1739 /* Update the last valid endpoint context, if we just added one past */
1740 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) <
1741 LAST_CTX(last_ctx
)) {
1742 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1743 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1745 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1747 /* Store the usb_device pointer for later use */
1750 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1751 (unsigned int) ep
->desc
.bEndpointAddress
,
1753 (unsigned int) new_drop_flags
,
1754 (unsigned int) new_add_flags
,
1755 (unsigned int) new_slot_info
);
1759 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1761 struct xhci_input_control_ctx
*ctrl_ctx
;
1762 struct xhci_ep_ctx
*ep_ctx
;
1763 struct xhci_slot_ctx
*slot_ctx
;
1766 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1768 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1773 /* When a device's add flag and drop flag are zero, any subsequent
1774 * configure endpoint command will leave that endpoint's state
1775 * untouched. Make sure we don't leave any old state in the input
1776 * endpoint contexts.
1778 ctrl_ctx
->drop_flags
= 0;
1779 ctrl_ctx
->add_flags
= 0;
1780 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1781 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1782 /* Endpoint 0 is always valid */
1783 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(1));
1784 for (i
= 1; i
< 31; ++i
) {
1785 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1786 ep_ctx
->ep_info
= 0;
1787 ep_ctx
->ep_info2
= 0;
1789 ep_ctx
->tx_info
= 0;
1793 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1794 struct usb_device
*udev
, u32
*cmd_status
)
1798 switch (*cmd_status
) {
1800 dev_warn(&udev
->dev
, "Not enough host controller resources "
1801 "for new device state.\n");
1803 /* FIXME: can we allocate more resources for the HC? */
1806 case COMP_2ND_BW_ERR
:
1807 dev_warn(&udev
->dev
, "Not enough bandwidth "
1808 "for new device state.\n");
1810 /* FIXME: can we go back to the old state? */
1813 /* the HCD set up something wrong */
1814 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1816 "and endpoint is not disabled.\n");
1820 dev_warn(&udev
->dev
, "ERROR: Incompatible device for endpoint "
1821 "configure command.\n");
1825 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1826 "Successful Endpoint Configure command");
1830 xhci_err(xhci
, "ERROR: unexpected command completion "
1831 "code 0x%x.\n", *cmd_status
);
1838 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1839 struct usb_device
*udev
, u32
*cmd_status
)
1842 struct xhci_virt_device
*virt_dev
= xhci
->devs
[udev
->slot_id
];
1844 switch (*cmd_status
) {
1846 dev_warn(&udev
->dev
, "WARN: xHCI driver setup invalid evaluate "
1847 "context command.\n");
1851 dev_warn(&udev
->dev
, "WARN: slot not enabled for"
1852 "evaluate context command.\n");
1855 case COMP_CTX_STATE
:
1856 dev_warn(&udev
->dev
, "WARN: invalid context state for "
1857 "evaluate context command.\n");
1858 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 1);
1862 dev_warn(&udev
->dev
, "ERROR: Incompatible device for evaluate "
1863 "context command.\n");
1867 /* Max Exit Latency too large error */
1868 dev_warn(&udev
->dev
, "WARN: Max Exit Latency too large\n");
1872 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1873 "Successful evaluate context command");
1877 xhci_err(xhci
, "ERROR: unexpected command completion "
1878 "code 0x%x.\n", *cmd_status
);
1885 static u32
xhci_count_num_new_endpoints(struct xhci_hcd
*xhci
,
1886 struct xhci_input_control_ctx
*ctrl_ctx
)
1888 u32 valid_add_flags
;
1889 u32 valid_drop_flags
;
1891 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1892 * (bit 1). The default control endpoint is added during the Address
1893 * Device command and is never removed until the slot is disabled.
1895 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1896 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1898 /* Use hweight32 to count the number of ones in the add flags, or
1899 * number of endpoints added. Don't count endpoints that are changed
1900 * (both added and dropped).
1902 return hweight32(valid_add_flags
) -
1903 hweight32(valid_add_flags
& valid_drop_flags
);
1906 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd
*xhci
,
1907 struct xhci_input_control_ctx
*ctrl_ctx
)
1909 u32 valid_add_flags
;
1910 u32 valid_drop_flags
;
1912 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1913 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1915 return hweight32(valid_drop_flags
) -
1916 hweight32(valid_add_flags
& valid_drop_flags
);
1920 * We need to reserve the new number of endpoints before the configure endpoint
1921 * command completes. We can't subtract the dropped endpoints from the number
1922 * of active endpoints until the command completes because we can oversubscribe
1923 * the host in this case:
1925 * - the first configure endpoint command drops more endpoints than it adds
1926 * - a second configure endpoint command that adds more endpoints is queued
1927 * - the first configure endpoint command fails, so the config is unchanged
1928 * - the second command may succeed, even though there isn't enough resources
1930 * Must be called with xhci->lock held.
1932 static int xhci_reserve_host_resources(struct xhci_hcd
*xhci
,
1933 struct xhci_input_control_ctx
*ctrl_ctx
)
1937 added_eps
= xhci_count_num_new_endpoints(xhci
, ctrl_ctx
);
1938 if (xhci
->num_active_eps
+ added_eps
> xhci
->limit_active_eps
) {
1939 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1940 "Not enough ep ctxs: "
1941 "%u active, need to add %u, limit is %u.",
1942 xhci
->num_active_eps
, added_eps
,
1943 xhci
->limit_active_eps
);
1946 xhci
->num_active_eps
+= added_eps
;
1947 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1948 "Adding %u ep ctxs, %u now active.", added_eps
,
1949 xhci
->num_active_eps
);
1954 * The configure endpoint was failed by the xHC for some other reason, so we
1955 * need to revert the resources that failed configuration would have used.
1957 * Must be called with xhci->lock held.
1959 static void xhci_free_host_resources(struct xhci_hcd
*xhci
,
1960 struct xhci_input_control_ctx
*ctrl_ctx
)
1964 num_failed_eps
= xhci_count_num_new_endpoints(xhci
, ctrl_ctx
);
1965 xhci
->num_active_eps
-= num_failed_eps
;
1966 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1967 "Removing %u failed ep ctxs, %u now active.",
1969 xhci
->num_active_eps
);
1973 * Now that the command has completed, clean up the active endpoint count by
1974 * subtracting out the endpoints that were dropped (but not changed).
1976 * Must be called with xhci->lock held.
1978 static void xhci_finish_resource_reservation(struct xhci_hcd
*xhci
,
1979 struct xhci_input_control_ctx
*ctrl_ctx
)
1981 u32 num_dropped_eps
;
1983 num_dropped_eps
= xhci_count_num_dropped_endpoints(xhci
, ctrl_ctx
);
1984 xhci
->num_active_eps
-= num_dropped_eps
;
1985 if (num_dropped_eps
)
1986 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1987 "Removing %u dropped ep ctxs, %u now active.",
1989 xhci
->num_active_eps
);
1992 static unsigned int xhci_get_block_size(struct usb_device
*udev
)
1994 switch (udev
->speed
) {
1996 case USB_SPEED_FULL
:
1998 case USB_SPEED_HIGH
:
2000 case USB_SPEED_SUPER
:
2002 case USB_SPEED_UNKNOWN
:
2003 case USB_SPEED_WIRELESS
:
2005 /* Should never happen */
2011 xhci_get_largest_overhead(struct xhci_interval_bw
*interval_bw
)
2013 if (interval_bw
->overhead
[LS_OVERHEAD_TYPE
])
2015 if (interval_bw
->overhead
[FS_OVERHEAD_TYPE
])
2020 /* If we are changing a LS/FS device under a HS hub,
2021 * make sure (if we are activating a new TT) that the HS bus has enough
2022 * bandwidth for this new TT.
2024 static int xhci_check_tt_bw_table(struct xhci_hcd
*xhci
,
2025 struct xhci_virt_device
*virt_dev
,
2028 struct xhci_interval_bw_table
*bw_table
;
2029 struct xhci_tt_bw_info
*tt_info
;
2031 /* Find the bandwidth table for the root port this TT is attached to. */
2032 bw_table
= &xhci
->rh_bw
[virt_dev
->real_port
- 1].bw_table
;
2033 tt_info
= virt_dev
->tt_info
;
2034 /* If this TT already had active endpoints, the bandwidth for this TT
2035 * has already been added. Removing all periodic endpoints (and thus
2036 * making the TT enactive) will only decrease the bandwidth used.
2040 if (old_active_eps
== 0 && tt_info
->active_eps
!= 0) {
2041 if (bw_table
->bw_used
+ TT_HS_OVERHEAD
> HS_BW_LIMIT
)
2045 /* Not sure why we would have no new active endpoints...
2047 * Maybe because of an Evaluate Context change for a hub update or a
2048 * control endpoint 0 max packet size change?
2049 * FIXME: skip the bandwidth calculation in that case.
2054 static int xhci_check_ss_bw(struct xhci_hcd
*xhci
,
2055 struct xhci_virt_device
*virt_dev
)
2057 unsigned int bw_reserved
;
2059 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_IN
, 100);
2060 if (virt_dev
->bw_table
->ss_bw_in
> (SS_BW_LIMIT_IN
- bw_reserved
))
2063 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_OUT
, 100);
2064 if (virt_dev
->bw_table
->ss_bw_out
> (SS_BW_LIMIT_OUT
- bw_reserved
))
2071 * This algorithm is a very conservative estimate of the worst-case scheduling
2072 * scenario for any one interval. The hardware dynamically schedules the
2073 * packets, so we can't tell which microframe could be the limiting factor in
2074 * the bandwidth scheduling. This only takes into account periodic endpoints.
2076 * Obviously, we can't solve an NP complete problem to find the minimum worst
2077 * case scenario. Instead, we come up with an estimate that is no less than
2078 * the worst case bandwidth used for any one microframe, but may be an
2081 * We walk the requirements for each endpoint by interval, starting with the
2082 * smallest interval, and place packets in the schedule where there is only one
2083 * possible way to schedule packets for that interval. In order to simplify
2084 * this algorithm, we record the largest max packet size for each interval, and
2085 * assume all packets will be that size.
2087 * For interval 0, we obviously must schedule all packets for each interval.
2088 * The bandwidth for interval 0 is just the amount of data to be transmitted
2089 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2090 * the number of packets).
2092 * For interval 1, we have two possible microframes to schedule those packets
2093 * in. For this algorithm, if we can schedule the same number of packets for
2094 * each possible scheduling opportunity (each microframe), we will do so. The
2095 * remaining number of packets will be saved to be transmitted in the gaps in
2096 * the next interval's scheduling sequence.
2098 * As we move those remaining packets to be scheduled with interval 2 packets,
2099 * we have to double the number of remaining packets to transmit. This is
2100 * because the intervals are actually powers of 2, and we would be transmitting
2101 * the previous interval's packets twice in this interval. We also have to be
2102 * sure that when we look at the largest max packet size for this interval, we
2103 * also look at the largest max packet size for the remaining packets and take
2104 * the greater of the two.
2106 * The algorithm continues to evenly distribute packets in each scheduling
2107 * opportunity, and push the remaining packets out, until we get to the last
2108 * interval. Then those packets and their associated overhead are just added
2109 * to the bandwidth used.
2111 static int xhci_check_bw_table(struct xhci_hcd
*xhci
,
2112 struct xhci_virt_device
*virt_dev
,
2115 unsigned int bw_reserved
;
2116 unsigned int max_bandwidth
;
2117 unsigned int bw_used
;
2118 unsigned int block_size
;
2119 struct xhci_interval_bw_table
*bw_table
;
2120 unsigned int packet_size
= 0;
2121 unsigned int overhead
= 0;
2122 unsigned int packets_transmitted
= 0;
2123 unsigned int packets_remaining
= 0;
2126 if (virt_dev
->udev
->speed
== USB_SPEED_SUPER
)
2127 return xhci_check_ss_bw(xhci
, virt_dev
);
2129 if (virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2130 max_bandwidth
= HS_BW_LIMIT
;
2131 /* Convert percent of bus BW reserved to blocks reserved */
2132 bw_reserved
= DIV_ROUND_UP(HS_BW_RESERVED
* max_bandwidth
, 100);
2134 max_bandwidth
= FS_BW_LIMIT
;
2135 bw_reserved
= DIV_ROUND_UP(FS_BW_RESERVED
* max_bandwidth
, 100);
2138 bw_table
= virt_dev
->bw_table
;
2139 /* We need to translate the max packet size and max ESIT payloads into
2140 * the units the hardware uses.
2142 block_size
= xhci_get_block_size(virt_dev
->udev
);
2144 /* If we are manipulating a LS/FS device under a HS hub, double check
2145 * that the HS bus has enough bandwidth if we are activing a new TT.
2147 if (virt_dev
->tt_info
) {
2148 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2149 "Recalculating BW for rootport %u",
2150 virt_dev
->real_port
);
2151 if (xhci_check_tt_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2152 xhci_warn(xhci
, "Not enough bandwidth on HS bus for "
2153 "newly activated TT.\n");
2156 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2157 "Recalculating BW for TT slot %u port %u",
2158 virt_dev
->tt_info
->slot_id
,
2159 virt_dev
->tt_info
->ttport
);
2161 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2162 "Recalculating BW for rootport %u",
2163 virt_dev
->real_port
);
2166 /* Add in how much bandwidth will be used for interval zero, or the
2167 * rounded max ESIT payload + number of packets * largest overhead.
2169 bw_used
= DIV_ROUND_UP(bw_table
->interval0_esit_payload
, block_size
) +
2170 bw_table
->interval_bw
[0].num_packets
*
2171 xhci_get_largest_overhead(&bw_table
->interval_bw
[0]);
2173 for (i
= 1; i
< XHCI_MAX_INTERVAL
; i
++) {
2174 unsigned int bw_added
;
2175 unsigned int largest_mps
;
2176 unsigned int interval_overhead
;
2179 * How many packets could we transmit in this interval?
2180 * If packets didn't fit in the previous interval, we will need
2181 * to transmit that many packets twice within this interval.
2183 packets_remaining
= 2 * packets_remaining
+
2184 bw_table
->interval_bw
[i
].num_packets
;
2186 /* Find the largest max packet size of this or the previous
2189 if (list_empty(&bw_table
->interval_bw
[i
].endpoints
))
2192 struct xhci_virt_ep
*virt_ep
;
2193 struct list_head
*ep_entry
;
2195 ep_entry
= bw_table
->interval_bw
[i
].endpoints
.next
;
2196 virt_ep
= list_entry(ep_entry
,
2197 struct xhci_virt_ep
, bw_endpoint_list
);
2198 /* Convert to blocks, rounding up */
2199 largest_mps
= DIV_ROUND_UP(
2200 virt_ep
->bw_info
.max_packet_size
,
2203 if (largest_mps
> packet_size
)
2204 packet_size
= largest_mps
;
2206 /* Use the larger overhead of this or the previous interval. */
2207 interval_overhead
= xhci_get_largest_overhead(
2208 &bw_table
->interval_bw
[i
]);
2209 if (interval_overhead
> overhead
)
2210 overhead
= interval_overhead
;
2212 /* How many packets can we evenly distribute across
2213 * (1 << (i + 1)) possible scheduling opportunities?
2215 packets_transmitted
= packets_remaining
>> (i
+ 1);
2217 /* Add in the bandwidth used for those scheduled packets */
2218 bw_added
= packets_transmitted
* (overhead
+ packet_size
);
2220 /* How many packets do we have remaining to transmit? */
2221 packets_remaining
= packets_remaining
% (1 << (i
+ 1));
2223 /* What largest max packet size should those packets have? */
2224 /* If we've transmitted all packets, don't carry over the
2225 * largest packet size.
2227 if (packets_remaining
== 0) {
2230 } else if (packets_transmitted
> 0) {
2231 /* Otherwise if we do have remaining packets, and we've
2232 * scheduled some packets in this interval, take the
2233 * largest max packet size from endpoints with this
2236 packet_size
= largest_mps
;
2237 overhead
= interval_overhead
;
2239 /* Otherwise carry over packet_size and overhead from the last
2240 * time we had a remainder.
2242 bw_used
+= bw_added
;
2243 if (bw_used
> max_bandwidth
) {
2244 xhci_warn(xhci
, "Not enough bandwidth. "
2245 "Proposed: %u, Max: %u\n",
2246 bw_used
, max_bandwidth
);
2251 * Ok, we know we have some packets left over after even-handedly
2252 * scheduling interval 15. We don't know which microframes they will
2253 * fit into, so we over-schedule and say they will be scheduled every
2256 if (packets_remaining
> 0)
2257 bw_used
+= overhead
+ packet_size
;
2259 if (!virt_dev
->tt_info
&& virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2260 unsigned int port_index
= virt_dev
->real_port
- 1;
2262 /* OK, we're manipulating a HS device attached to a
2263 * root port bandwidth domain. Include the number of active TTs
2264 * in the bandwidth used.
2266 bw_used
+= TT_HS_OVERHEAD
*
2267 xhci
->rh_bw
[port_index
].num_active_tts
;
2270 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2271 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2272 "Available: %u " "percent",
2273 bw_used
, max_bandwidth
, bw_reserved
,
2274 (max_bandwidth
- bw_used
- bw_reserved
) * 100 /
2277 bw_used
+= bw_reserved
;
2278 if (bw_used
> max_bandwidth
) {
2279 xhci_warn(xhci
, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2280 bw_used
, max_bandwidth
);
2284 bw_table
->bw_used
= bw_used
;
2288 static bool xhci_is_async_ep(unsigned int ep_type
)
2290 return (ep_type
!= ISOC_OUT_EP
&& ep_type
!= INT_OUT_EP
&&
2291 ep_type
!= ISOC_IN_EP
&&
2292 ep_type
!= INT_IN_EP
);
2295 static bool xhci_is_sync_in_ep(unsigned int ep_type
)
2297 return (ep_type
== ISOC_IN_EP
|| ep_type
== INT_IN_EP
);
2300 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info
*ep_bw
)
2302 unsigned int mps
= DIV_ROUND_UP(ep_bw
->max_packet_size
, SS_BLOCK
);
2304 if (ep_bw
->ep_interval
== 0)
2305 return SS_OVERHEAD_BURST
+
2306 (ep_bw
->mult
* ep_bw
->num_packets
*
2307 (SS_OVERHEAD
+ mps
));
2308 return DIV_ROUND_UP(ep_bw
->mult
* ep_bw
->num_packets
*
2309 (SS_OVERHEAD
+ mps
+ SS_OVERHEAD_BURST
),
2310 1 << ep_bw
->ep_interval
);
2314 void xhci_drop_ep_from_interval_table(struct xhci_hcd
*xhci
,
2315 struct xhci_bw_info
*ep_bw
,
2316 struct xhci_interval_bw_table
*bw_table
,
2317 struct usb_device
*udev
,
2318 struct xhci_virt_ep
*virt_ep
,
2319 struct xhci_tt_bw_info
*tt_info
)
2321 struct xhci_interval_bw
*interval_bw
;
2322 int normalized_interval
;
2324 if (xhci_is_async_ep(ep_bw
->type
))
2327 if (udev
->speed
== USB_SPEED_SUPER
) {
2328 if (xhci_is_sync_in_ep(ep_bw
->type
))
2329 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
-=
2330 xhci_get_ss_bw_consumed(ep_bw
);
2332 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
-=
2333 xhci_get_ss_bw_consumed(ep_bw
);
2337 /* SuperSpeed endpoints never get added to intervals in the table, so
2338 * this check is only valid for HS/FS/LS devices.
2340 if (list_empty(&virt_ep
->bw_endpoint_list
))
2342 /* For LS/FS devices, we need to translate the interval expressed in
2343 * microframes to frames.
2345 if (udev
->speed
== USB_SPEED_HIGH
)
2346 normalized_interval
= ep_bw
->ep_interval
;
2348 normalized_interval
= ep_bw
->ep_interval
- 3;
2350 if (normalized_interval
== 0)
2351 bw_table
->interval0_esit_payload
-= ep_bw
->max_esit_payload
;
2352 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2353 interval_bw
->num_packets
-= ep_bw
->num_packets
;
2354 switch (udev
->speed
) {
2356 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] -= 1;
2358 case USB_SPEED_FULL
:
2359 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] -= 1;
2361 case USB_SPEED_HIGH
:
2362 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] -= 1;
2364 case USB_SPEED_SUPER
:
2365 case USB_SPEED_UNKNOWN
:
2366 case USB_SPEED_WIRELESS
:
2367 /* Should never happen because only LS/FS/HS endpoints will get
2368 * added to the endpoint list.
2373 tt_info
->active_eps
-= 1;
2374 list_del_init(&virt_ep
->bw_endpoint_list
);
2377 static void xhci_add_ep_to_interval_table(struct xhci_hcd
*xhci
,
2378 struct xhci_bw_info
*ep_bw
,
2379 struct xhci_interval_bw_table
*bw_table
,
2380 struct usb_device
*udev
,
2381 struct xhci_virt_ep
*virt_ep
,
2382 struct xhci_tt_bw_info
*tt_info
)
2384 struct xhci_interval_bw
*interval_bw
;
2385 struct xhci_virt_ep
*smaller_ep
;
2386 int normalized_interval
;
2388 if (xhci_is_async_ep(ep_bw
->type
))
2391 if (udev
->speed
== USB_SPEED_SUPER
) {
2392 if (xhci_is_sync_in_ep(ep_bw
->type
))
2393 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
+=
2394 xhci_get_ss_bw_consumed(ep_bw
);
2396 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
+=
2397 xhci_get_ss_bw_consumed(ep_bw
);
2401 /* For LS/FS devices, we need to translate the interval expressed in
2402 * microframes to frames.
2404 if (udev
->speed
== USB_SPEED_HIGH
)
2405 normalized_interval
= ep_bw
->ep_interval
;
2407 normalized_interval
= ep_bw
->ep_interval
- 3;
2409 if (normalized_interval
== 0)
2410 bw_table
->interval0_esit_payload
+= ep_bw
->max_esit_payload
;
2411 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2412 interval_bw
->num_packets
+= ep_bw
->num_packets
;
2413 switch (udev
->speed
) {
2415 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] += 1;
2417 case USB_SPEED_FULL
:
2418 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] += 1;
2420 case USB_SPEED_HIGH
:
2421 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] += 1;
2423 case USB_SPEED_SUPER
:
2424 case USB_SPEED_UNKNOWN
:
2425 case USB_SPEED_WIRELESS
:
2426 /* Should never happen because only LS/FS/HS endpoints will get
2427 * added to the endpoint list.
2433 tt_info
->active_eps
+= 1;
2434 /* Insert the endpoint into the list, largest max packet size first. */
2435 list_for_each_entry(smaller_ep
, &interval_bw
->endpoints
,
2437 if (ep_bw
->max_packet_size
>=
2438 smaller_ep
->bw_info
.max_packet_size
) {
2439 /* Add the new ep before the smaller endpoint */
2440 list_add_tail(&virt_ep
->bw_endpoint_list
,
2441 &smaller_ep
->bw_endpoint_list
);
2445 /* Add the new endpoint at the end of the list. */
2446 list_add_tail(&virt_ep
->bw_endpoint_list
,
2447 &interval_bw
->endpoints
);
2450 void xhci_update_tt_active_eps(struct xhci_hcd
*xhci
,
2451 struct xhci_virt_device
*virt_dev
,
2454 struct xhci_root_port_bw_info
*rh_bw_info
;
2455 if (!virt_dev
->tt_info
)
2458 rh_bw_info
= &xhci
->rh_bw
[virt_dev
->real_port
- 1];
2459 if (old_active_eps
== 0 &&
2460 virt_dev
->tt_info
->active_eps
!= 0) {
2461 rh_bw_info
->num_active_tts
+= 1;
2462 rh_bw_info
->bw_table
.bw_used
+= TT_HS_OVERHEAD
;
2463 } else if (old_active_eps
!= 0 &&
2464 virt_dev
->tt_info
->active_eps
== 0) {
2465 rh_bw_info
->num_active_tts
-= 1;
2466 rh_bw_info
->bw_table
.bw_used
-= TT_HS_OVERHEAD
;
2470 static int xhci_reserve_bandwidth(struct xhci_hcd
*xhci
,
2471 struct xhci_virt_device
*virt_dev
,
2472 struct xhci_container_ctx
*in_ctx
)
2474 struct xhci_bw_info ep_bw_info
[31];
2476 struct xhci_input_control_ctx
*ctrl_ctx
;
2477 int old_active_eps
= 0;
2479 if (virt_dev
->tt_info
)
2480 old_active_eps
= virt_dev
->tt_info
->active_eps
;
2482 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2484 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2489 for (i
= 0; i
< 31; i
++) {
2490 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2493 /* Make a copy of the BW info in case we need to revert this */
2494 memcpy(&ep_bw_info
[i
], &virt_dev
->eps
[i
].bw_info
,
2495 sizeof(ep_bw_info
[i
]));
2496 /* Drop the endpoint from the interval table if the endpoint is
2497 * being dropped or changed.
2499 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2500 xhci_drop_ep_from_interval_table(xhci
,
2501 &virt_dev
->eps
[i
].bw_info
,
2507 /* Overwrite the information stored in the endpoints' bw_info */
2508 xhci_update_bw_info(xhci
, virt_dev
->in_ctx
, ctrl_ctx
, virt_dev
);
2509 for (i
= 0; i
< 31; i
++) {
2510 /* Add any changed or added endpoints to the interval table */
2511 if (EP_IS_ADDED(ctrl_ctx
, i
))
2512 xhci_add_ep_to_interval_table(xhci
,
2513 &virt_dev
->eps
[i
].bw_info
,
2520 if (!xhci_check_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2521 /* Ok, this fits in the bandwidth we have.
2522 * Update the number of active TTs.
2524 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
2528 /* We don't have enough bandwidth for this, revert the stored info. */
2529 for (i
= 0; i
< 31; i
++) {
2530 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2533 /* Drop the new copies of any added or changed endpoints from
2534 * the interval table.
2536 if (EP_IS_ADDED(ctrl_ctx
, i
)) {
2537 xhci_drop_ep_from_interval_table(xhci
,
2538 &virt_dev
->eps
[i
].bw_info
,
2544 /* Revert the endpoint back to its old information */
2545 memcpy(&virt_dev
->eps
[i
].bw_info
, &ep_bw_info
[i
],
2546 sizeof(ep_bw_info
[i
]));
2547 /* Add any changed or dropped endpoints back into the table */
2548 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2549 xhci_add_ep_to_interval_table(xhci
,
2550 &virt_dev
->eps
[i
].bw_info
,
2560 /* Issue a configure endpoint command or evaluate context command
2561 * and wait for it to finish.
2563 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
2564 struct usb_device
*udev
,
2565 struct xhci_command
*command
,
2566 bool ctx_change
, bool must_succeed
)
2570 unsigned long flags
;
2571 struct xhci_container_ctx
*in_ctx
;
2572 struct xhci_input_control_ctx
*ctrl_ctx
;
2573 struct completion
*cmd_completion
;
2575 struct xhci_virt_device
*virt_dev
;
2576 union xhci_trb
*cmd_trb
;
2578 spin_lock_irqsave(&xhci
->lock
, flags
);
2579 virt_dev
= xhci
->devs
[udev
->slot_id
];
2582 in_ctx
= command
->in_ctx
;
2584 in_ctx
= virt_dev
->in_ctx
;
2585 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2587 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2588 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2593 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
) &&
2594 xhci_reserve_host_resources(xhci
, ctrl_ctx
)) {
2595 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2596 xhci_warn(xhci
, "Not enough host resources, "
2597 "active endpoint contexts = %u\n",
2598 xhci
->num_active_eps
);
2601 if ((xhci
->quirks
& XHCI_SW_BW_CHECKING
) &&
2602 xhci_reserve_bandwidth(xhci
, virt_dev
, in_ctx
)) {
2603 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2604 xhci_free_host_resources(xhci
, ctrl_ctx
);
2605 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2606 xhci_warn(xhci
, "Not enough bandwidth\n");
2611 cmd_completion
= command
->completion
;
2612 cmd_status
= &command
->status
;
2613 command
->command_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
2614 list_add_tail(&command
->cmd_list
, &virt_dev
->cmd_list
);
2616 cmd_completion
= &virt_dev
->cmd_completion
;
2617 cmd_status
= &virt_dev
->cmd_status
;
2619 init_completion(cmd_completion
);
2621 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
2623 ret
= xhci_queue_configure_endpoint(xhci
, in_ctx
->dma
,
2624 udev
->slot_id
, must_succeed
);
2626 ret
= xhci_queue_evaluate_context(xhci
, in_ctx
->dma
,
2627 udev
->slot_id
, must_succeed
);
2630 list_del(&command
->cmd_list
);
2631 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2632 xhci_free_host_resources(xhci
, ctrl_ctx
);
2633 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2634 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
2635 "FIXME allocate a new ring segment");
2638 xhci_ring_cmd_db(xhci
);
2639 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2641 /* Wait for the configure endpoint command to complete */
2642 timeleft
= wait_for_completion_interruptible_timeout(
2644 XHCI_CMD_DEFAULT_TIMEOUT
);
2645 if (timeleft
<= 0) {
2646 xhci_warn(xhci
, "%s while waiting for %s command\n",
2647 timeleft
== 0 ? "Timeout" : "Signal",
2649 "configure endpoint" :
2650 "evaluate context");
2651 /* cancel the configure endpoint command */
2652 ret
= xhci_cancel_cmd(xhci
, command
, cmd_trb
);
2659 ret
= xhci_configure_endpoint_result(xhci
, udev
, cmd_status
);
2661 ret
= xhci_evaluate_context_result(xhci
, udev
, cmd_status
);
2663 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
2664 spin_lock_irqsave(&xhci
->lock
, flags
);
2665 /* If the command failed, remove the reserved resources.
2666 * Otherwise, clean up the estimate to include dropped eps.
2669 xhci_free_host_resources(xhci
, ctrl_ctx
);
2671 xhci_finish_resource_reservation(xhci
, ctrl_ctx
);
2672 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2677 /* Called after one or more calls to xhci_add_endpoint() or
2678 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2679 * to call xhci_reset_bandwidth().
2681 * Since we are in the middle of changing either configuration or
2682 * installing a new alt setting, the USB core won't allow URBs to be
2683 * enqueued for any endpoint on the old config or interface. Nothing
2684 * else should be touching the xhci->devs[slot_id] structure, so we
2685 * don't need to take the xhci->lock for manipulating that.
2687 int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2691 struct xhci_hcd
*xhci
;
2692 struct xhci_virt_device
*virt_dev
;
2693 struct xhci_input_control_ctx
*ctrl_ctx
;
2694 struct xhci_slot_ctx
*slot_ctx
;
2696 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2699 xhci
= hcd_to_xhci(hcd
);
2700 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
2703 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2704 virt_dev
= xhci
->devs
[udev
->slot_id
];
2706 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2707 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
2709 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2713 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2714 ctrl_ctx
->add_flags
&= cpu_to_le32(~EP0_FLAG
);
2715 ctrl_ctx
->drop_flags
&= cpu_to_le32(~(SLOT_FLAG
| EP0_FLAG
));
2717 /* Don't issue the command if there's no endpoints to update. */
2718 if (ctrl_ctx
->add_flags
== cpu_to_le32(SLOT_FLAG
) &&
2719 ctrl_ctx
->drop_flags
== 0)
2722 xhci_dbg(xhci
, "New Input Control Context:\n");
2723 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2724 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
,
2725 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2727 ret
= xhci_configure_endpoint(xhci
, udev
, NULL
,
2730 /* Callee should call reset_bandwidth() */
2734 xhci_dbg(xhci
, "Output context after successful config ep cmd:\n");
2735 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
,
2736 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2738 /* Free any rings that were dropped, but not changed. */
2739 for (i
= 1; i
< 31; ++i
) {
2740 if ((le32_to_cpu(ctrl_ctx
->drop_flags
) & (1 << (i
+ 1))) &&
2741 !(le32_to_cpu(ctrl_ctx
->add_flags
) & (1 << (i
+ 1))))
2742 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2744 xhci_zero_in_ctx(xhci
, virt_dev
);
2746 * Install any rings for completely new endpoints or changed endpoints,
2747 * and free or cache any old rings from changed endpoints.
2749 for (i
= 1; i
< 31; ++i
) {
2750 if (!virt_dev
->eps
[i
].new_ring
)
2752 /* Only cache or free the old ring if it exists.
2753 * It may not if this is the first add of an endpoint.
2755 if (virt_dev
->eps
[i
].ring
) {
2756 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2758 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
2759 virt_dev
->eps
[i
].new_ring
= NULL
;
2765 void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2767 struct xhci_hcd
*xhci
;
2768 struct xhci_virt_device
*virt_dev
;
2771 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2774 xhci
= hcd_to_xhci(hcd
);
2776 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2777 virt_dev
= xhci
->devs
[udev
->slot_id
];
2778 /* Free any rings allocated for added endpoints */
2779 for (i
= 0; i
< 31; ++i
) {
2780 if (virt_dev
->eps
[i
].new_ring
) {
2781 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
2782 virt_dev
->eps
[i
].new_ring
= NULL
;
2785 xhci_zero_in_ctx(xhci
, virt_dev
);
2788 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
2789 struct xhci_container_ctx
*in_ctx
,
2790 struct xhci_container_ctx
*out_ctx
,
2791 struct xhci_input_control_ctx
*ctrl_ctx
,
2792 u32 add_flags
, u32 drop_flags
)
2794 ctrl_ctx
->add_flags
= cpu_to_le32(add_flags
);
2795 ctrl_ctx
->drop_flags
= cpu_to_le32(drop_flags
);
2796 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
2797 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2799 xhci_dbg(xhci
, "Input Context:\n");
2800 xhci_dbg_ctx(xhci
, in_ctx
, xhci_last_valid_endpoint(add_flags
));
2803 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
2804 unsigned int slot_id
, unsigned int ep_index
,
2805 struct xhci_dequeue_state
*deq_state
)
2807 struct xhci_input_control_ctx
*ctrl_ctx
;
2808 struct xhci_container_ctx
*in_ctx
;
2809 struct xhci_ep_ctx
*ep_ctx
;
2813 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
2814 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2816 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2821 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2822 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
2823 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
2824 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
2825 deq_state
->new_deq_ptr
);
2827 xhci_warn(xhci
, "WARN Cannot submit config ep after "
2828 "reset ep command\n");
2829 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
2830 deq_state
->new_deq_seg
,
2831 deq_state
->new_deq_ptr
);
2834 ep_ctx
->deq
= cpu_to_le64(addr
| deq_state
->new_cycle_state
);
2836 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
2837 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2838 xhci
->devs
[slot_id
]->out_ctx
, ctrl_ctx
,
2839 added_ctxs
, added_ctxs
);
2842 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
,
2843 struct usb_device
*udev
, unsigned int ep_index
)
2845 struct xhci_dequeue_state deq_state
;
2846 struct xhci_virt_ep
*ep
;
2848 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2849 "Cleaning up stalled endpoint ring");
2850 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2851 /* We need to move the HW's dequeue pointer past this TD,
2852 * or it will attempt to resend it on the next doorbell ring.
2854 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
2855 ep_index
, ep
->stopped_stream
, ep
->stopped_td
,
2858 /* HW with the reset endpoint quirk will use the saved dequeue state to
2859 * issue a configure endpoint command later.
2861 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
2862 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2863 "Queueing new dequeue state");
2864 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
2865 ep_index
, ep
->stopped_stream
, &deq_state
);
2867 /* Better hope no one uses the input context between now and the
2868 * reset endpoint completion!
2869 * XXX: No idea how this hardware will react when stream rings
2872 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2873 "Setting up input context for "
2874 "configure endpoint command");
2875 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
2876 ep_index
, &deq_state
);
2880 /* Deal with stalled endpoints. The core should have sent the control message
2881 * to clear the halt condition. However, we need to make the xHCI hardware
2882 * reset its sequence number, since a device will expect a sequence number of
2883 * zero after the halt condition is cleared.
2884 * Context: in_interrupt
2886 void xhci_endpoint_reset(struct usb_hcd
*hcd
,
2887 struct usb_host_endpoint
*ep
)
2889 struct xhci_hcd
*xhci
;
2890 struct usb_device
*udev
;
2891 unsigned int ep_index
;
2892 unsigned long flags
;
2894 struct xhci_virt_ep
*virt_ep
;
2896 xhci
= hcd_to_xhci(hcd
);
2897 udev
= (struct usb_device
*) ep
->hcpriv
;
2898 /* Called with a root hub endpoint (or an endpoint that wasn't added
2899 * with xhci_add_endpoint()
2903 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2904 virt_ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2905 if (!virt_ep
->stopped_td
) {
2906 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2907 "Endpoint 0x%x not halted, refusing to reset.",
2908 ep
->desc
.bEndpointAddress
);
2911 if (usb_endpoint_xfer_control(&ep
->desc
)) {
2912 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2913 "Control endpoint stall already handled.");
2917 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2918 "Queueing reset endpoint command");
2919 spin_lock_irqsave(&xhci
->lock
, flags
);
2920 ret
= xhci_queue_reset_ep(xhci
, udev
->slot_id
, ep_index
);
2922 * Can't change the ring dequeue pointer until it's transitioned to the
2923 * stopped state, which is only upon a successful reset endpoint
2924 * command. Better hope that last command worked!
2927 xhci_cleanup_stalled_ring(xhci
, udev
, ep_index
);
2928 kfree(virt_ep
->stopped_td
);
2929 xhci_ring_cmd_db(xhci
);
2931 virt_ep
->stopped_td
= NULL
;
2932 virt_ep
->stopped_trb
= NULL
;
2933 virt_ep
->stopped_stream
= 0;
2934 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2937 xhci_warn(xhci
, "FIXME allocate a new ring segment\n");
2940 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
2941 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
2942 unsigned int slot_id
)
2945 unsigned int ep_index
;
2946 unsigned int ep_state
;
2950 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
2953 if (ep
->ss_ep_comp
.bmAttributes
== 0) {
2954 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
2955 " descriptor for ep 0x%x does not support streams\n",
2956 ep
->desc
.bEndpointAddress
);
2960 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2961 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
2962 if (ep_state
& EP_HAS_STREAMS
||
2963 ep_state
& EP_GETTING_STREAMS
) {
2964 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
2965 "already has streams set up.\n",
2966 ep
->desc
.bEndpointAddress
);
2967 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
2968 "dynamic stream context array reallocation.\n");
2971 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
2972 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
2973 "endpoint 0x%x; URBs are pending.\n",
2974 ep
->desc
.bEndpointAddress
);
2980 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
2981 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
2983 unsigned int max_streams
;
2985 /* The stream context array size must be a power of two */
2986 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
2988 * Find out how many primary stream array entries the host controller
2989 * supports. Later we may use secondary stream arrays (similar to 2nd
2990 * level page entries), but that's an optional feature for xHCI host
2991 * controllers. xHCs must support at least 4 stream IDs.
2993 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
2994 if (*num_stream_ctxs
> max_streams
) {
2995 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
2997 *num_stream_ctxs
= max_streams
;
2998 *num_streams
= max_streams
;
3002 /* Returns an error code if one of the endpoint already has streams.
3003 * This does not change any data structures, it only checks and gathers
3006 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
3007 struct usb_device
*udev
,
3008 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3009 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
3011 unsigned int max_streams
;
3012 unsigned int endpoint_flag
;
3016 for (i
= 0; i
< num_eps
; i
++) {
3017 ret
= xhci_check_streams_endpoint(xhci
, udev
,
3018 eps
[i
], udev
->slot_id
);
3022 max_streams
= usb_ss_max_streams(&eps
[i
]->ss_ep_comp
);
3023 if (max_streams
< (*num_streams
- 1)) {
3024 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
3025 eps
[i
]->desc
.bEndpointAddress
,
3027 *num_streams
= max_streams
+1;
3030 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3031 if (*changed_ep_bitmask
& endpoint_flag
)
3033 *changed_ep_bitmask
|= endpoint_flag
;
3038 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
3039 struct usb_device
*udev
,
3040 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
3042 u32 changed_ep_bitmask
= 0;
3043 unsigned int slot_id
;
3044 unsigned int ep_index
;
3045 unsigned int ep_state
;
3048 slot_id
= udev
->slot_id
;
3049 if (!xhci
->devs
[slot_id
])
3052 for (i
= 0; i
< num_eps
; i
++) {
3053 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3054 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
3055 /* Are streams already being freed for the endpoint? */
3056 if (ep_state
& EP_GETTING_NO_STREAMS
) {
3057 xhci_warn(xhci
, "WARN Can't disable streams for "
3059 "streams are being disabled already\n",
3060 eps
[i
]->desc
.bEndpointAddress
);
3063 /* Are there actually any streams to free? */
3064 if (!(ep_state
& EP_HAS_STREAMS
) &&
3065 !(ep_state
& EP_GETTING_STREAMS
)) {
3066 xhci_warn(xhci
, "WARN Can't disable streams for "
3068 "streams are already disabled!\n",
3069 eps
[i
]->desc
.bEndpointAddress
);
3070 xhci_warn(xhci
, "WARN xhci_free_streams() called "
3071 "with non-streams endpoint\n");
3074 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3076 return changed_ep_bitmask
;
3080 * The USB device drivers use this function (though the HCD interface in USB
3081 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3082 * coordinate mass storage command queueing across multiple endpoints (basically
3083 * a stream ID == a task ID).
3085 * Setting up streams involves allocating the same size stream context array
3086 * for each endpoint and issuing a configure endpoint command for all endpoints.
3088 * Don't allow the call to succeed if one endpoint only supports one stream
3089 * (which means it doesn't support streams at all).
3091 * Drivers may get less stream IDs than they asked for, if the host controller
3092 * hardware or endpoints claim they can't support the number of requested
3095 int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3096 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3097 unsigned int num_streams
, gfp_t mem_flags
)
3100 struct xhci_hcd
*xhci
;
3101 struct xhci_virt_device
*vdev
;
3102 struct xhci_command
*config_cmd
;
3103 struct xhci_input_control_ctx
*ctrl_ctx
;
3104 unsigned int ep_index
;
3105 unsigned int num_stream_ctxs
;
3106 unsigned long flags
;
3107 u32 changed_ep_bitmask
= 0;
3112 /* Add one to the number of streams requested to account for
3113 * stream 0 that is reserved for xHCI usage.
3116 xhci
= hcd_to_xhci(hcd
);
3117 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
3120 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
3122 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
3125 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
3127 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3129 xhci_free_command(xhci
, config_cmd
);
3133 /* Check to make sure all endpoints are not already configured for
3134 * streams. While we're at it, find the maximum number of streams that
3135 * all the endpoints will support and check for duplicate endpoints.
3137 spin_lock_irqsave(&xhci
->lock
, flags
);
3138 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
3139 num_eps
, &num_streams
, &changed_ep_bitmask
);
3141 xhci_free_command(xhci
, config_cmd
);
3142 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3145 if (num_streams
<= 1) {
3146 xhci_warn(xhci
, "WARN: endpoints can't handle "
3147 "more than one stream.\n");
3148 xhci_free_command(xhci
, config_cmd
);
3149 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3152 vdev
= xhci
->devs
[udev
->slot_id
];
3153 /* Mark each endpoint as being in transition, so
3154 * xhci_urb_enqueue() will reject all URBs.
3156 for (i
= 0; i
< num_eps
; i
++) {
3157 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3158 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
3160 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3162 /* Setup internal data structures and allocate HW data structures for
3163 * streams (but don't install the HW structures in the input context
3164 * until we're sure all memory allocation succeeded).
3166 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
3167 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
3168 num_stream_ctxs
, num_streams
);
3170 for (i
= 0; i
< num_eps
; i
++) {
3171 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3172 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
3174 num_streams
, mem_flags
);
3175 if (!vdev
->eps
[ep_index
].stream_info
)
3177 /* Set maxPstreams in endpoint context and update deq ptr to
3178 * point to stream context array. FIXME
3182 /* Set up the input context for a configure endpoint command. */
3183 for (i
= 0; i
< num_eps
; i
++) {
3184 struct xhci_ep_ctx
*ep_ctx
;
3186 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3187 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
3189 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
3190 vdev
->out_ctx
, ep_index
);
3191 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
3192 vdev
->eps
[ep_index
].stream_info
);
3194 /* Tell the HW to drop its old copy of the endpoint context info
3195 * and add the updated copy from the input context.
3197 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
3198 vdev
->out_ctx
, ctrl_ctx
,
3199 changed_ep_bitmask
, changed_ep_bitmask
);
3201 /* Issue and wait for the configure endpoint command */
3202 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
3205 /* xHC rejected the configure endpoint command for some reason, so we
3206 * leave the old ring intact and free our internal streams data
3212 spin_lock_irqsave(&xhci
->lock
, flags
);
3213 for (i
= 0; i
< num_eps
; i
++) {
3214 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3215 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3216 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
3217 udev
->slot_id
, ep_index
);
3218 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
3220 xhci_free_command(xhci
, config_cmd
);
3221 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3223 /* Subtract 1 for stream 0, which drivers can't use */
3224 return num_streams
- 1;
3227 /* If it didn't work, free the streams! */
3228 for (i
= 0; i
< num_eps
; i
++) {
3229 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3230 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3231 vdev
->eps
[ep_index
].stream_info
= NULL
;
3232 /* FIXME Unset maxPstreams in endpoint context and
3233 * update deq ptr to point to normal string ring.
3235 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3236 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3237 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
3239 xhci_free_command(xhci
, config_cmd
);
3243 /* Transition the endpoint from using streams to being a "normal" endpoint
3246 * Modify the endpoint context state, submit a configure endpoint command,
3247 * and free all endpoint rings for streams if that completes successfully.
3249 int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3250 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3254 struct xhci_hcd
*xhci
;
3255 struct xhci_virt_device
*vdev
;
3256 struct xhci_command
*command
;
3257 struct xhci_input_control_ctx
*ctrl_ctx
;
3258 unsigned int ep_index
;
3259 unsigned long flags
;
3260 u32 changed_ep_bitmask
;
3262 xhci
= hcd_to_xhci(hcd
);
3263 vdev
= xhci
->devs
[udev
->slot_id
];
3265 /* Set up a configure endpoint command to remove the streams rings */
3266 spin_lock_irqsave(&xhci
->lock
, flags
);
3267 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
3268 udev
, eps
, num_eps
);
3269 if (changed_ep_bitmask
== 0) {
3270 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3274 /* Use the xhci_command structure from the first endpoint. We may have
3275 * allocated too many, but the driver may call xhci_free_streams() for
3276 * each endpoint it grouped into one call to xhci_alloc_streams().
3278 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
3279 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
3280 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, command
->in_ctx
);
3282 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3283 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3288 for (i
= 0; i
< num_eps
; i
++) {
3289 struct xhci_ep_ctx
*ep_ctx
;
3291 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3292 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
3293 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
3294 EP_GETTING_NO_STREAMS
;
3296 xhci_endpoint_copy(xhci
, command
->in_ctx
,
3297 vdev
->out_ctx
, ep_index
);
3298 xhci_setup_no_streams_ep_input_ctx(xhci
, ep_ctx
,
3299 &vdev
->eps
[ep_index
]);
3301 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
3302 vdev
->out_ctx
, ctrl_ctx
,
3303 changed_ep_bitmask
, changed_ep_bitmask
);
3304 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3306 /* Issue and wait for the configure endpoint command,
3307 * which must succeed.
3309 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3312 /* xHC rejected the configure endpoint command for some reason, so we
3313 * leave the streams rings intact.
3318 spin_lock_irqsave(&xhci
->lock
, flags
);
3319 for (i
= 0; i
< num_eps
; i
++) {
3320 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3321 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3322 vdev
->eps
[ep_index
].stream_info
= NULL
;
3323 /* FIXME Unset maxPstreams in endpoint context and
3324 * update deq ptr to point to normal string ring.
3326 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
3327 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3329 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3335 * Deletes endpoint resources for endpoints that were active before a Reset
3336 * Device command, or a Disable Slot command. The Reset Device command leaves
3337 * the control endpoint intact, whereas the Disable Slot command deletes it.
3339 * Must be called with xhci->lock held.
3341 void xhci_free_device_endpoint_resources(struct xhci_hcd
*xhci
,
3342 struct xhci_virt_device
*virt_dev
, bool drop_control_ep
)
3345 unsigned int num_dropped_eps
= 0;
3346 unsigned int drop_flags
= 0;
3348 for (i
= (drop_control_ep
? 0 : 1); i
< 31; i
++) {
3349 if (virt_dev
->eps
[i
].ring
) {
3350 drop_flags
|= 1 << i
;
3354 xhci
->num_active_eps
-= num_dropped_eps
;
3355 if (num_dropped_eps
)
3356 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3357 "Dropped %u ep ctxs, flags = 0x%x, "
3359 num_dropped_eps
, drop_flags
,
3360 xhci
->num_active_eps
);
3364 * This submits a Reset Device Command, which will set the device state to 0,
3365 * set the device address to 0, and disable all the endpoints except the default
3366 * control endpoint. The USB core should come back and call
3367 * xhci_address_device(), and then re-set up the configuration. If this is
3368 * called because of a usb_reset_and_verify_device(), then the old alternate
3369 * settings will be re-installed through the normal bandwidth allocation
3372 * Wait for the Reset Device command to finish. Remove all structures
3373 * associated with the endpoints that were disabled. Clear the input device
3374 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3376 * If the virt_dev to be reset does not exist or does not match the udev,
3377 * it means the device is lost, possibly due to the xHC restore error and
3378 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3379 * re-allocate the device.
3381 int xhci_discover_or_reset_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3384 unsigned long flags
;
3385 struct xhci_hcd
*xhci
;
3386 unsigned int slot_id
;
3387 struct xhci_virt_device
*virt_dev
;
3388 struct xhci_command
*reset_device_cmd
;
3390 int last_freed_endpoint
;
3391 struct xhci_slot_ctx
*slot_ctx
;
3392 int old_active_eps
= 0;
3394 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
3397 xhci
= hcd_to_xhci(hcd
);
3398 slot_id
= udev
->slot_id
;
3399 virt_dev
= xhci
->devs
[slot_id
];
3401 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3402 "not exist. Re-allocate the device\n", slot_id
);
3403 ret
= xhci_alloc_dev(hcd
, udev
);
3410 if (virt_dev
->udev
!= udev
) {
3411 /* If the virt_dev and the udev does not match, this virt_dev
3412 * may belong to another udev.
3413 * Re-allocate the device.
3415 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3416 "not match the udev. Re-allocate the device\n",
3418 ret
= xhci_alloc_dev(hcd
, udev
);
3425 /* If device is not setup, there is no point in resetting it */
3426 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3427 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3428 SLOT_STATE_DISABLED
)
3431 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
3432 /* Allocate the command structure that holds the struct completion.
3433 * Assume we're in process context, since the normal device reset
3434 * process has to wait for the device anyway. Storage devices are
3435 * reset as part of error handling, so use GFP_NOIO instead of
3438 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
3439 if (!reset_device_cmd
) {
3440 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
3444 /* Attempt to submit the Reset Device command to the command ring */
3445 spin_lock_irqsave(&xhci
->lock
, flags
);
3446 reset_device_cmd
->command_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3448 list_add_tail(&reset_device_cmd
->cmd_list
, &virt_dev
->cmd_list
);
3449 ret
= xhci_queue_reset_device(xhci
, slot_id
);
3451 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3452 list_del(&reset_device_cmd
->cmd_list
);
3453 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3454 goto command_cleanup
;
3456 xhci_ring_cmd_db(xhci
);
3457 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3459 /* Wait for the Reset Device command to finish */
3460 timeleft
= wait_for_completion_interruptible_timeout(
3461 reset_device_cmd
->completion
,
3462 XHCI_CMD_DEFAULT_TIMEOUT
);
3463 if (timeleft
<= 0) {
3464 xhci_warn(xhci
, "%s while waiting for reset device command\n",
3465 timeleft
== 0 ? "Timeout" : "Signal");
3466 spin_lock_irqsave(&xhci
->lock
, flags
);
3467 /* The timeout might have raced with the event ring handler, so
3468 * only delete from the list if the item isn't poisoned.
3470 if (reset_device_cmd
->cmd_list
.next
!= LIST_POISON1
)
3471 list_del(&reset_device_cmd
->cmd_list
);
3472 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3474 goto command_cleanup
;
3477 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3478 * unless we tried to reset a slot ID that wasn't enabled,
3479 * or the device wasn't in the addressed or configured state.
3481 ret
= reset_device_cmd
->status
;
3483 case COMP_EBADSLT
: /* 0.95 completion code for bad slot ID */
3484 case COMP_CTX_STATE
: /* 0.96 completion code for same thing */
3485 xhci_dbg(xhci
, "Can't reset device (slot ID %u) in %s state\n",
3487 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
3488 xhci_dbg(xhci
, "Not freeing device rings.\n");
3489 /* Don't treat this as an error. May change my mind later. */
3491 goto command_cleanup
;
3493 xhci_dbg(xhci
, "Successful reset device command.\n");
3496 if (xhci_is_vendor_info_code(xhci
, ret
))
3498 xhci_warn(xhci
, "Unknown completion code %u for "
3499 "reset device command.\n", ret
);
3501 goto command_cleanup
;
3504 /* Free up host controller endpoint resources */
3505 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3506 spin_lock_irqsave(&xhci
->lock
, flags
);
3507 /* Don't delete the default control endpoint resources */
3508 xhci_free_device_endpoint_resources(xhci
, virt_dev
, false);
3509 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3512 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3513 last_freed_endpoint
= 1;
3514 for (i
= 1; i
< 31; ++i
) {
3515 struct xhci_virt_ep
*ep
= &virt_dev
->eps
[i
];
3517 if (ep
->ep_state
& EP_HAS_STREAMS
) {
3518 xhci_free_stream_info(xhci
, ep
->stream_info
);
3519 ep
->stream_info
= NULL
;
3520 ep
->ep_state
&= ~EP_HAS_STREAMS
;
3524 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
3525 last_freed_endpoint
= i
;
3527 if (!list_empty(&virt_dev
->eps
[i
].bw_endpoint_list
))
3528 xhci_drop_ep_from_interval_table(xhci
,
3529 &virt_dev
->eps
[i
].bw_info
,
3534 xhci_clear_endpoint_bw_info(&virt_dev
->eps
[i
].bw_info
);
3536 /* If necessary, update the number of active TTs on this root port */
3537 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
3539 xhci_dbg(xhci
, "Output context after successful reset device cmd:\n");
3540 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, last_freed_endpoint
);
3544 xhci_free_command(xhci
, reset_device_cmd
);
3549 * At this point, the struct usb_device is about to go away, the device has
3550 * disconnected, and all traffic has been stopped and the endpoints have been
3551 * disabled. Free any HC data structures associated with that device.
3553 void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3555 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3556 struct xhci_virt_device
*virt_dev
;
3557 unsigned long flags
;
3561 #ifndef CONFIG_USB_DEFAULT_PERSIST
3563 * We called pm_runtime_get_noresume when the device was attached.
3564 * Decrement the counter here to allow controller to runtime suspend
3565 * if no devices remain.
3567 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3568 pm_runtime_put_noidle(hcd
->self
.controller
);
3571 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
3572 /* If the host is halted due to driver unload, we still need to free the
3575 if (ret
<= 0 && ret
!= -ENODEV
)
3578 virt_dev
= xhci
->devs
[udev
->slot_id
];
3580 /* Stop any wayward timer functions (which may grab the lock) */
3581 for (i
= 0; i
< 31; ++i
) {
3582 virt_dev
->eps
[i
].ep_state
&= ~EP_HALT_PENDING
;
3583 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
3586 spin_lock_irqsave(&xhci
->lock
, flags
);
3587 /* Don't disable the slot if the host controller is dead. */
3588 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
3589 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3590 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3591 xhci_free_virt_device(xhci
, udev
->slot_id
);
3592 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3596 if (xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
)) {
3597 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3598 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3601 xhci_ring_cmd_db(xhci
);
3602 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3604 * Event command completion handler will free any data structures
3605 * associated with the slot. XXX Can free sleep?
3610 * Checks if we have enough host controller resources for the default control
3613 * Must be called with xhci->lock held.
3615 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd
*xhci
)
3617 if (xhci
->num_active_eps
+ 1 > xhci
->limit_active_eps
) {
3618 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3619 "Not enough ep ctxs: "
3620 "%u active, need to add 1, limit is %u.",
3621 xhci
->num_active_eps
, xhci
->limit_active_eps
);
3624 xhci
->num_active_eps
+= 1;
3625 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3626 "Adding 1 ep ctx, %u now active.",
3627 xhci
->num_active_eps
);
3633 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3634 * timed out, or allocating memory failed. Returns 1 on success.
3636 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3638 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3639 unsigned long flags
;
3642 union xhci_trb
*cmd_trb
;
3644 spin_lock_irqsave(&xhci
->lock
, flags
);
3645 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3646 ret
= xhci_queue_slot_control(xhci
, TRB_ENABLE_SLOT
, 0);
3648 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3649 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3652 xhci_ring_cmd_db(xhci
);
3653 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3655 /* XXX: how much time for xHC slot assignment? */
3656 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3657 XHCI_CMD_DEFAULT_TIMEOUT
);
3658 if (timeleft
<= 0) {
3659 xhci_warn(xhci
, "%s while waiting for a slot\n",
3660 timeleft
== 0 ? "Timeout" : "Signal");
3661 /* cancel the enable slot request */
3662 return xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3665 if (!xhci
->slot_id
) {
3666 xhci_err(xhci
, "Error while assigning device slot ID\n");
3670 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3671 spin_lock_irqsave(&xhci
->lock
, flags
);
3672 ret
= xhci_reserve_host_control_ep_resources(xhci
);
3674 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3675 xhci_warn(xhci
, "Not enough host resources, "
3676 "active endpoint contexts = %u\n",
3677 xhci
->num_active_eps
);
3680 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3682 /* Use GFP_NOIO, since this function can be called from
3683 * xhci_discover_or_reset_device(), which may be called as part of
3684 * mass storage driver error handling.
3686 if (!xhci_alloc_virt_device(xhci
, xhci
->slot_id
, udev
, GFP_NOIO
)) {
3687 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
3690 udev
->slot_id
= xhci
->slot_id
;
3692 #ifndef CONFIG_USB_DEFAULT_PERSIST
3694 * If resetting upon resume, we can't put the controller into runtime
3695 * suspend if there is a device attached.
3697 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3698 pm_runtime_get_noresume(hcd
->self
.controller
);
3701 /* Is this a LS or FS device under a HS hub? */
3702 /* Hub or peripherial? */
3706 /* Disable slot, if we can do it without mem alloc */
3707 spin_lock_irqsave(&xhci
->lock
, flags
);
3708 if (!xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
))
3709 xhci_ring_cmd_db(xhci
);
3710 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3715 * Issue an Address Device command (which will issue a SetAddress request to
3717 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3718 * we should only issue and wait on one address command at the same time.
3720 int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3722 unsigned long flags
;
3724 struct xhci_virt_device
*virt_dev
;
3726 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3727 struct xhci_slot_ctx
*slot_ctx
;
3728 struct xhci_input_control_ctx
*ctrl_ctx
;
3730 union xhci_trb
*cmd_trb
;
3732 if (!udev
->slot_id
) {
3733 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3734 "Bad Slot ID %d", udev
->slot_id
);
3738 virt_dev
= xhci
->devs
[udev
->slot_id
];
3740 if (WARN_ON(!virt_dev
)) {
3742 * In plug/unplug torture test with an NEC controller,
3743 * a zero-dereference was observed once due to virt_dev = 0.
3744 * Print useful debug rather than crash if it is observed again!
3746 xhci_warn(xhci
, "Virt dev invalid for slot_id 0x%x!\n",
3751 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
3752 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
3754 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3759 * If this is the first Set Address since device plug-in or
3760 * virt_device realloaction after a resume with an xHCI power loss,
3761 * then set up the slot context.
3763 if (!slot_ctx
->dev_info
)
3764 xhci_setup_addressable_virt_dev(xhci
, udev
);
3765 /* Otherwise, update the control endpoint ring enqueue pointer. */
3767 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
3768 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
| EP0_FLAG
);
3769 ctrl_ctx
->drop_flags
= 0;
3771 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3772 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3773 trace_xhci_address_ctx(xhci
, virt_dev
->in_ctx
,
3774 slot_ctx
->dev_info
>> 27);
3776 spin_lock_irqsave(&xhci
->lock
, flags
);
3777 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3778 ret
= xhci_queue_address_device(xhci
, virt_dev
->in_ctx
->dma
,
3781 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3782 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3783 "FIXME: allocate a command ring segment");
3786 xhci_ring_cmd_db(xhci
);
3787 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3789 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3790 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3791 XHCI_CMD_DEFAULT_TIMEOUT
);
3792 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3793 * the SetAddress() "recovery interval" required by USB and aborting the
3794 * command on a timeout.
3796 if (timeleft
<= 0) {
3797 xhci_warn(xhci
, "%s while waiting for address device command\n",
3798 timeleft
== 0 ? "Timeout" : "Signal");
3799 /* cancel the address device command */
3800 ret
= xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3806 switch (virt_dev
->cmd_status
) {
3807 case COMP_CTX_STATE
:
3809 xhci_err(xhci
, "Setup ERROR: address device command for slot %d.\n",
3814 dev_warn(&udev
->dev
, "Device not responding to set address.\n");
3818 dev_warn(&udev
->dev
, "ERROR: Incompatible device for address "
3819 "device command.\n");
3823 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3824 "Successful Address Device command");
3827 xhci_err(xhci
, "ERROR: unexpected command completion "
3828 "code 0x%x.\n", virt_dev
->cmd_status
);
3829 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3830 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3831 trace_xhci_address_ctx(xhci
, virt_dev
->out_ctx
, 1);
3838 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
3839 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3840 "Op regs DCBAA ptr = %#016llx", temp_64
);
3841 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3842 "Slot ID %d dcbaa entry @%p = %#016llx",
3844 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
3845 (unsigned long long)
3846 le64_to_cpu(xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]));
3847 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3848 "Output Context DMA address = %#08llx",
3849 (unsigned long long)virt_dev
->out_ctx
->dma
);
3850 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3851 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3852 trace_xhci_address_ctx(xhci
, virt_dev
->in_ctx
,
3853 slot_ctx
->dev_info
>> 27);
3854 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3855 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3857 * USB core uses address 1 for the roothubs, so we add one to the
3858 * address given back to us by the HC.
3860 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3861 trace_xhci_address_ctx(xhci
, virt_dev
->out_ctx
,
3862 slot_ctx
->dev_info
>> 27);
3863 /* Zero the input context control for later use */
3864 ctrl_ctx
->add_flags
= 0;
3865 ctrl_ctx
->drop_flags
= 0;
3867 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3868 "Internal device address = %d",
3869 le32_to_cpu(slot_ctx
->dev_state
) & DEV_ADDR_MASK
);
3875 * Transfer the port index into real index in the HW port status
3876 * registers. Caculate offset between the port's PORTSC register
3877 * and port status base. Divide the number of per port register
3878 * to get the real index. The raw port number bases 1.
3880 int xhci_find_raw_port_number(struct usb_hcd
*hcd
, int port1
)
3882 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3883 __le32 __iomem
*base_addr
= &xhci
->op_regs
->port_status_base
;
3884 __le32 __iomem
*addr
;
3887 if (hcd
->speed
!= HCD_USB3
)
3888 addr
= xhci
->usb2_ports
[port1
- 1];
3890 addr
= xhci
->usb3_ports
[port1
- 1];
3892 raw_port
= (addr
- base_addr
)/NUM_PORT_REGS
+ 1;
3897 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3898 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3900 static int __maybe_unused
xhci_change_max_exit_latency(struct xhci_hcd
*xhci
,
3901 struct usb_device
*udev
, u16 max_exit_latency
)
3903 struct xhci_virt_device
*virt_dev
;
3904 struct xhci_command
*command
;
3905 struct xhci_input_control_ctx
*ctrl_ctx
;
3906 struct xhci_slot_ctx
*slot_ctx
;
3907 unsigned long flags
;
3910 spin_lock_irqsave(&xhci
->lock
, flags
);
3911 if (max_exit_latency
== xhci
->devs
[udev
->slot_id
]->current_mel
) {
3912 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3916 /* Attempt to issue an Evaluate Context command to change the MEL. */
3917 virt_dev
= xhci
->devs
[udev
->slot_id
];
3918 command
= xhci
->lpm_command
;
3919 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, command
->in_ctx
);
3921 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3922 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3927 xhci_slot_copy(xhci
, command
->in_ctx
, virt_dev
->out_ctx
);
3928 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3930 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
3931 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
3932 slot_ctx
->dev_info2
&= cpu_to_le32(~((u32
) MAX_EXIT
));
3933 slot_ctx
->dev_info2
|= cpu_to_le32(max_exit_latency
);
3935 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
3936 "Set up evaluate context for LPM MEL change.");
3937 xhci_dbg(xhci
, "Slot %u Input Context:\n", udev
->slot_id
);
3938 xhci_dbg_ctx(xhci
, command
->in_ctx
, 0);
3940 /* Issue and wait for the evaluate context command. */
3941 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3943 xhci_dbg(xhci
, "Slot %u Output Context:\n", udev
->slot_id
);
3944 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 0);
3947 spin_lock_irqsave(&xhci
->lock
, flags
);
3948 virt_dev
->current_mel
= max_exit_latency
;
3949 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3954 #ifdef CONFIG_PM_RUNTIME
3956 /* BESL to HIRD Encoding array for USB2 LPM */
3957 static int xhci_besl_encoding
[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3958 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3960 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3961 static int xhci_calculate_hird_besl(struct xhci_hcd
*xhci
,
3962 struct usb_device
*udev
)
3964 int u2del
, besl
, besl_host
;
3965 int besl_device
= 0;
3968 u2del
= HCS_U2_LATENCY(xhci
->hcs_params3
);
3969 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
3971 if (field
& USB_BESL_SUPPORT
) {
3972 for (besl_host
= 0; besl_host
< 16; besl_host
++) {
3973 if (xhci_besl_encoding
[besl_host
] >= u2del
)
3976 /* Use baseline BESL value as default */
3977 if (field
& USB_BESL_BASELINE_VALID
)
3978 besl_device
= USB_GET_BESL_BASELINE(field
);
3979 else if (field
& USB_BESL_DEEP_VALID
)
3980 besl_device
= USB_GET_BESL_DEEP(field
);
3985 besl_host
= (u2del
- 51) / 75 + 1;
3988 besl
= besl_host
+ besl_device
;
3995 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
3996 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device
*udev
)
4003 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4005 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4006 l1
= udev
->l1_params
.timeout
/ 256;
4008 /* device has preferred BESLD */
4009 if (field
& USB_BESL_DEEP_VALID
) {
4010 besld
= USB_GET_BESL_DEEP(field
);
4014 return PORT_BESLD(besld
) | PORT_L1_TIMEOUT(l1
) | PORT_HIRDM(hirdm
);
4017 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4018 struct usb_device
*udev
, int enable
)
4020 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4021 __le32 __iomem
**port_array
;
4022 __le32 __iomem
*pm_addr
, *hlpm_addr
;
4023 u32 pm_val
, hlpm_val
, field
;
4024 unsigned int port_num
;
4025 unsigned long flags
;
4026 int hird
, exit_latency
;
4029 if (hcd
->speed
== HCD_USB3
|| !xhci
->hw_lpm_support
||
4033 if (!udev
->parent
|| udev
->parent
->parent
||
4034 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4037 if (udev
->usb2_hw_lpm_capable
!= 1)
4040 spin_lock_irqsave(&xhci
->lock
, flags
);
4042 port_array
= xhci
->usb2_ports
;
4043 port_num
= udev
->portnum
- 1;
4044 pm_addr
= port_array
[port_num
] + PORTPMSC
;
4045 pm_val
= xhci_readl(xhci
, pm_addr
);
4046 hlpm_addr
= port_array
[port_num
] + PORTHLPMC
;
4047 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4049 xhci_dbg(xhci
, "%s port %d USB2 hardware LPM\n",
4050 enable
? "enable" : "disable", port_num
);
4053 /* Host supports BESL timeout instead of HIRD */
4054 if (udev
->usb2_hw_lpm_besl_capable
) {
4055 /* if device doesn't have a preferred BESL value use a
4056 * default one which works with mixed HIRD and BESL
4057 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4059 if ((field
& USB_BESL_SUPPORT
) &&
4060 (field
& USB_BESL_BASELINE_VALID
))
4061 hird
= USB_GET_BESL_BASELINE(field
);
4063 hird
= udev
->l1_params
.besl
;
4065 exit_latency
= xhci_besl_encoding
[hird
];
4066 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4068 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4069 * input context for link powermanagement evaluate
4070 * context commands. It is protected by hcd->bandwidth
4071 * mutex and is shared by all devices. We need to set
4072 * the max ext latency in USB 2 BESL LPM as well, so
4073 * use the same mutex and xhci_change_max_exit_latency()
4075 mutex_lock(hcd
->bandwidth_mutex
);
4076 ret
= xhci_change_max_exit_latency(xhci
, udev
,
4078 mutex_unlock(hcd
->bandwidth_mutex
);
4082 spin_lock_irqsave(&xhci
->lock
, flags
);
4084 hlpm_val
= xhci_calculate_usb2_hw_lpm_params(udev
);
4085 xhci_writel(xhci
, hlpm_val
, hlpm_addr
);
4087 xhci_readl(xhci
, hlpm_addr
);
4089 hird
= xhci_calculate_hird_besl(xhci
, udev
);
4092 pm_val
&= ~PORT_HIRD_MASK
;
4093 pm_val
|= PORT_HIRD(hird
) | PORT_RWE
| PORT_L1DS(udev
->slot_id
);
4094 xhci_writel(xhci
, pm_val
, pm_addr
);
4095 pm_val
= xhci_readl(xhci
, pm_addr
);
4097 xhci_writel(xhci
, pm_val
, pm_addr
);
4099 xhci_readl(xhci
, pm_addr
);
4101 pm_val
&= ~(PORT_HLE
| PORT_RWE
| PORT_HIRD_MASK
| PORT_L1DS_MASK
);
4102 xhci_writel(xhci
, pm_val
, pm_addr
);
4104 xhci_readl(xhci
, pm_addr
);
4105 if (udev
->usb2_hw_lpm_besl_capable
) {
4106 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4107 mutex_lock(hcd
->bandwidth_mutex
);
4108 xhci_change_max_exit_latency(xhci
, udev
, 0);
4109 mutex_unlock(hcd
->bandwidth_mutex
);
4114 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4118 /* check if a usb2 port supports a given extened capability protocol
4119 * only USB2 ports extended protocol capability values are cached.
4120 * Return 1 if capability is supported
4122 static int xhci_check_usb2_port_capability(struct xhci_hcd
*xhci
, int port
,
4123 unsigned capability
)
4125 u32 port_offset
, port_count
;
4128 for (i
= 0; i
< xhci
->num_ext_caps
; i
++) {
4129 if (xhci
->ext_caps
[i
] & capability
) {
4130 /* port offsets starts at 1 */
4131 port_offset
= XHCI_EXT_PORT_OFF(xhci
->ext_caps
[i
]) - 1;
4132 port_count
= XHCI_EXT_PORT_COUNT(xhci
->ext_caps
[i
]);
4133 if (port
>= port_offset
&&
4134 port
< port_offset
+ port_count
)
4141 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4143 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4144 int portnum
= udev
->portnum
- 1;
4146 if (hcd
->speed
== HCD_USB3
|| !xhci
->sw_lpm_support
||
4150 /* we only support lpm for non-hub device connected to root hub yet */
4151 if (!udev
->parent
|| udev
->parent
->parent
||
4152 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4155 if (xhci
->hw_lpm_support
== 1 &&
4156 xhci_check_usb2_port_capability(
4157 xhci
, portnum
, XHCI_HLC
)) {
4158 udev
->usb2_hw_lpm_capable
= 1;
4159 udev
->l1_params
.timeout
= XHCI_L1_TIMEOUT
;
4160 udev
->l1_params
.besl
= XHCI_DEFAULT_BESL
;
4161 if (xhci_check_usb2_port_capability(xhci
, portnum
,
4163 udev
->usb2_hw_lpm_besl_capable
= 1;
4171 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4172 struct usb_device
*udev
, int enable
)
4177 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4182 #endif /* CONFIG_PM_RUNTIME */
4184 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4187 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4188 static unsigned long long xhci_service_interval_to_ns(
4189 struct usb_endpoint_descriptor
*desc
)
4191 return (1ULL << (desc
->bInterval
- 1)) * 125 * 1000;
4194 static u16
xhci_get_timeout_no_hub_lpm(struct usb_device
*udev
,
4195 enum usb3_link_state state
)
4197 unsigned long long sel
;
4198 unsigned long long pel
;
4199 unsigned int max_sel_pel
;
4204 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4205 sel
= DIV_ROUND_UP(udev
->u1_params
.sel
, 1000);
4206 pel
= DIV_ROUND_UP(udev
->u1_params
.pel
, 1000);
4207 max_sel_pel
= USB3_LPM_MAX_U1_SEL_PEL
;
4211 sel
= DIV_ROUND_UP(udev
->u2_params
.sel
, 1000);
4212 pel
= DIV_ROUND_UP(udev
->u2_params
.pel
, 1000);
4213 max_sel_pel
= USB3_LPM_MAX_U2_SEL_PEL
;
4217 dev_warn(&udev
->dev
, "%s: Can't get timeout for non-U1 or U2 state.\n",
4219 return USB3_LPM_DISABLED
;
4222 if (sel
<= max_sel_pel
&& pel
<= max_sel_pel
)
4223 return USB3_LPM_DEVICE_INITIATED
;
4225 if (sel
> max_sel_pel
)
4226 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4227 "due to long SEL %llu ms\n",
4230 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4231 "due to long PEL %llu ms\n",
4233 return USB3_LPM_DISABLED
;
4236 /* Returns the hub-encoded U1 timeout value.
4237 * The U1 timeout should be the maximum of the following values:
4238 * - For control endpoints, U1 system exit latency (SEL) * 3
4239 * - For bulk endpoints, U1 SEL * 5
4240 * - For interrupt endpoints:
4241 * - Notification EPs, U1 SEL * 3
4242 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4243 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4245 static u16
xhci_calculate_intel_u1_timeout(struct usb_device
*udev
,
4246 struct usb_endpoint_descriptor
*desc
)
4248 unsigned long long timeout_ns
;
4252 ep_type
= usb_endpoint_type(desc
);
4254 case USB_ENDPOINT_XFER_CONTROL
:
4255 timeout_ns
= udev
->u1_params
.sel
* 3;
4257 case USB_ENDPOINT_XFER_BULK
:
4258 timeout_ns
= udev
->u1_params
.sel
* 5;
4260 case USB_ENDPOINT_XFER_INT
:
4261 intr_type
= usb_endpoint_interrupt_type(desc
);
4262 if (intr_type
== USB_ENDPOINT_INTR_NOTIFICATION
) {
4263 timeout_ns
= udev
->u1_params
.sel
* 3;
4266 /* Otherwise the calculation is the same as isoc eps */
4267 case USB_ENDPOINT_XFER_ISOC
:
4268 timeout_ns
= xhci_service_interval_to_ns(desc
);
4269 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
* 105, 100);
4270 if (timeout_ns
< udev
->u1_params
.sel
* 2)
4271 timeout_ns
= udev
->u1_params
.sel
* 2;
4277 /* The U1 timeout is encoded in 1us intervals. */
4278 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 1000);
4279 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4280 if (timeout_ns
== USB3_LPM_DISABLED
)
4283 /* If the necessary timeout value is bigger than what we can set in the
4284 * USB 3.0 hub, we have to disable hub-initiated U1.
4286 if (timeout_ns
<= USB3_LPM_U1_MAX_TIMEOUT
)
4288 dev_dbg(&udev
->dev
, "Hub-initiated U1 disabled "
4289 "due to long timeout %llu ms\n", timeout_ns
);
4290 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U1
);
4293 /* Returns the hub-encoded U2 timeout value.
4294 * The U2 timeout should be the maximum of:
4295 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4296 * - largest bInterval of any active periodic endpoint (to avoid going
4297 * into lower power link states between intervals).
4298 * - the U2 Exit Latency of the device
4300 static u16
xhci_calculate_intel_u2_timeout(struct usb_device
*udev
,
4301 struct usb_endpoint_descriptor
*desc
)
4303 unsigned long long timeout_ns
;
4304 unsigned long long u2_del_ns
;
4306 timeout_ns
= 10 * 1000 * 1000;
4308 if ((usb_endpoint_xfer_int(desc
) || usb_endpoint_xfer_isoc(desc
)) &&
4309 (xhci_service_interval_to_ns(desc
) > timeout_ns
))
4310 timeout_ns
= xhci_service_interval_to_ns(desc
);
4312 u2_del_ns
= le16_to_cpu(udev
->bos
->ss_cap
->bU2DevExitLat
) * 1000ULL;
4313 if (u2_del_ns
> timeout_ns
)
4314 timeout_ns
= u2_del_ns
;
4316 /* The U2 timeout is encoded in 256us intervals */
4317 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 256 * 1000);
4318 /* If the necessary timeout value is bigger than what we can set in the
4319 * USB 3.0 hub, we have to disable hub-initiated U2.
4321 if (timeout_ns
<= USB3_LPM_U2_MAX_TIMEOUT
)
4323 dev_dbg(&udev
->dev
, "Hub-initiated U2 disabled "
4324 "due to long timeout %llu ms\n", timeout_ns
);
4325 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U2
);
4328 static u16
xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4329 struct usb_device
*udev
,
4330 struct usb_endpoint_descriptor
*desc
,
4331 enum usb3_link_state state
,
4334 if (state
== USB3_LPM_U1
) {
4335 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4336 return xhci_calculate_intel_u1_timeout(udev
, desc
);
4338 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4339 return xhci_calculate_intel_u2_timeout(udev
, desc
);
4342 return USB3_LPM_DISABLED
;
4345 static int xhci_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4346 struct usb_device
*udev
,
4347 struct usb_endpoint_descriptor
*desc
,
4348 enum usb3_link_state state
,
4353 alt_timeout
= xhci_call_host_update_timeout_for_endpoint(xhci
, udev
,
4354 desc
, state
, timeout
);
4356 /* If we found we can't enable hub-initiated LPM, or
4357 * the U1 or U2 exit latency was too high to allow
4358 * device-initiated LPM as well, just stop searching.
4360 if (alt_timeout
== USB3_LPM_DISABLED
||
4361 alt_timeout
== USB3_LPM_DEVICE_INITIATED
) {
4362 *timeout
= alt_timeout
;
4365 if (alt_timeout
> *timeout
)
4366 *timeout
= alt_timeout
;
4370 static int xhci_update_timeout_for_interface(struct xhci_hcd
*xhci
,
4371 struct usb_device
*udev
,
4372 struct usb_host_interface
*alt
,
4373 enum usb3_link_state state
,
4378 for (j
= 0; j
< alt
->desc
.bNumEndpoints
; j
++) {
4379 if (xhci_update_timeout_for_endpoint(xhci
, udev
,
4380 &alt
->endpoint
[j
].desc
, state
, timeout
))
4387 static int xhci_check_intel_tier_policy(struct usb_device
*udev
,
4388 enum usb3_link_state state
)
4390 struct usb_device
*parent
;
4391 unsigned int num_hubs
;
4393 if (state
== USB3_LPM_U2
)
4396 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4397 for (parent
= udev
->parent
, num_hubs
= 0; parent
->parent
;
4398 parent
= parent
->parent
)
4404 dev_dbg(&udev
->dev
, "Disabling U1 link state for device"
4405 " below second-tier hub.\n");
4406 dev_dbg(&udev
->dev
, "Plug device into first-tier hub "
4407 "to decrease power consumption.\n");
4411 static int xhci_check_tier_policy(struct xhci_hcd
*xhci
,
4412 struct usb_device
*udev
,
4413 enum usb3_link_state state
)
4415 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4416 return xhci_check_intel_tier_policy(udev
, state
);
4420 /* Returns the U1 or U2 timeout that should be enabled.
4421 * If the tier check or timeout setting functions return with a non-zero exit
4422 * code, that means the timeout value has been finalized and we shouldn't look
4423 * at any more endpoints.
4425 static u16
xhci_calculate_lpm_timeout(struct usb_hcd
*hcd
,
4426 struct usb_device
*udev
, enum usb3_link_state state
)
4428 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4429 struct usb_host_config
*config
;
4432 u16 timeout
= USB3_LPM_DISABLED
;
4434 if (state
== USB3_LPM_U1
)
4436 else if (state
== USB3_LPM_U2
)
4439 dev_warn(&udev
->dev
, "Can't enable unknown link state %i\n",
4444 if (xhci_check_tier_policy(xhci
, udev
, state
) < 0)
4447 /* Gather some information about the currently installed configuration
4448 * and alternate interface settings.
4450 if (xhci_update_timeout_for_endpoint(xhci
, udev
, &udev
->ep0
.desc
,
4454 config
= udev
->actconfig
;
4458 for (i
= 0; i
< USB_MAXINTERFACES
; i
++) {
4459 struct usb_driver
*driver
;
4460 struct usb_interface
*intf
= config
->interface
[i
];
4465 /* Check if any currently bound drivers want hub-initiated LPM
4468 if (intf
->dev
.driver
) {
4469 driver
= to_usb_driver(intf
->dev
.driver
);
4470 if (driver
&& driver
->disable_hub_initiated_lpm
) {
4471 dev_dbg(&udev
->dev
, "Hub-initiated %s disabled "
4472 "at request of driver %s\n",
4473 state_name
, driver
->name
);
4474 return xhci_get_timeout_no_hub_lpm(udev
, state
);
4478 /* Not sure how this could happen... */
4479 if (!intf
->cur_altsetting
)
4482 if (xhci_update_timeout_for_interface(xhci
, udev
,
4483 intf
->cur_altsetting
,
4490 static int calculate_max_exit_latency(struct usb_device
*udev
,
4491 enum usb3_link_state state_changed
,
4492 u16 hub_encoded_timeout
)
4494 unsigned long long u1_mel_us
= 0;
4495 unsigned long long u2_mel_us
= 0;
4496 unsigned long long mel_us
= 0;
4502 disabling_u1
= (state_changed
== USB3_LPM_U1
&&
4503 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4504 disabling_u2
= (state_changed
== USB3_LPM_U2
&&
4505 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4507 enabling_u1
= (state_changed
== USB3_LPM_U1
&&
4508 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4509 enabling_u2
= (state_changed
== USB3_LPM_U2
&&
4510 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4512 /* If U1 was already enabled and we're not disabling it,
4513 * or we're going to enable U1, account for the U1 max exit latency.
4515 if ((udev
->u1_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u1
) ||
4517 u1_mel_us
= DIV_ROUND_UP(udev
->u1_params
.mel
, 1000);
4518 if ((udev
->u2_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u2
) ||
4520 u2_mel_us
= DIV_ROUND_UP(udev
->u2_params
.mel
, 1000);
4522 if (u1_mel_us
> u2_mel_us
)
4526 /* xHCI host controller max exit latency field is only 16 bits wide. */
4527 if (mel_us
> MAX_EXIT
) {
4528 dev_warn(&udev
->dev
, "Link PM max exit latency of %lluus "
4529 "is too big.\n", mel_us
);
4535 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4536 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4537 struct usb_device
*udev
, enum usb3_link_state state
)
4539 struct xhci_hcd
*xhci
;
4540 u16 hub_encoded_timeout
;
4544 xhci
= hcd_to_xhci(hcd
);
4545 /* The LPM timeout values are pretty host-controller specific, so don't
4546 * enable hub-initiated timeouts unless the vendor has provided
4547 * information about their timeout algorithm.
4549 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4550 !xhci
->devs
[udev
->slot_id
])
4551 return USB3_LPM_DISABLED
;
4553 hub_encoded_timeout
= xhci_calculate_lpm_timeout(hcd
, udev
, state
);
4554 mel
= calculate_max_exit_latency(udev
, state
, hub_encoded_timeout
);
4556 /* Max Exit Latency is too big, disable LPM. */
4557 hub_encoded_timeout
= USB3_LPM_DISABLED
;
4561 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4564 return hub_encoded_timeout
;
4567 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4568 struct usb_device
*udev
, enum usb3_link_state state
)
4570 struct xhci_hcd
*xhci
;
4574 xhci
= hcd_to_xhci(hcd
);
4575 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4576 !xhci
->devs
[udev
->slot_id
])
4579 mel
= calculate_max_exit_latency(udev
, state
, USB3_LPM_DISABLED
);
4580 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4585 #else /* CONFIG_PM */
4587 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4588 struct usb_device
*udev
, enum usb3_link_state state
)
4590 return USB3_LPM_DISABLED
;
4593 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4594 struct usb_device
*udev
, enum usb3_link_state state
)
4598 #endif /* CONFIG_PM */
4600 /*-------------------------------------------------------------------------*/
4602 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4603 * internal data structures for the device.
4605 int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
4606 struct usb_tt
*tt
, gfp_t mem_flags
)
4608 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4609 struct xhci_virt_device
*vdev
;
4610 struct xhci_command
*config_cmd
;
4611 struct xhci_input_control_ctx
*ctrl_ctx
;
4612 struct xhci_slot_ctx
*slot_ctx
;
4613 unsigned long flags
;
4614 unsigned think_time
;
4617 /* Ignore root hubs */
4621 vdev
= xhci
->devs
[hdev
->slot_id
];
4623 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
4626 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
4628 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
4631 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
4633 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
4635 xhci_free_command(xhci
, config_cmd
);
4639 spin_lock_irqsave(&xhci
->lock
, flags
);
4640 if (hdev
->speed
== USB_SPEED_HIGH
&&
4641 xhci_alloc_tt_info(xhci
, vdev
, hdev
, tt
, GFP_ATOMIC
)) {
4642 xhci_dbg(xhci
, "Could not allocate xHCI TT structure.\n");
4643 xhci_free_command(xhci
, config_cmd
);
4644 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4648 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
4649 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4650 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
4651 slot_ctx
->dev_info
|= cpu_to_le32(DEV_HUB
);
4653 slot_ctx
->dev_info
|= cpu_to_le32(DEV_MTT
);
4654 if (xhci
->hci_version
> 0x95) {
4655 xhci_dbg(xhci
, "xHCI version %x needs hub "
4656 "TT think time and number of ports\n",
4657 (unsigned int) xhci
->hci_version
);
4658 slot_ctx
->dev_info2
|= cpu_to_le32(XHCI_MAX_PORTS(hdev
->maxchild
));
4659 /* Set TT think time - convert from ns to FS bit times.
4660 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4661 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4663 * xHCI 1.0: this field shall be 0 if the device is not a
4666 think_time
= tt
->think_time
;
4667 if (think_time
!= 0)
4668 think_time
= (think_time
/ 666) - 1;
4669 if (xhci
->hci_version
< 0x100 || hdev
->speed
== USB_SPEED_HIGH
)
4670 slot_ctx
->tt_info
|=
4671 cpu_to_le32(TT_THINK_TIME(think_time
));
4673 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
4674 "TT think time or number of ports\n",
4675 (unsigned int) xhci
->hci_version
);
4677 slot_ctx
->dev_state
= 0;
4678 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4680 xhci_dbg(xhci
, "Set up %s for hub device.\n",
4681 (xhci
->hci_version
> 0x95) ?
4682 "configure endpoint" : "evaluate context");
4683 xhci_dbg(xhci
, "Slot %u Input Context:\n", hdev
->slot_id
);
4684 xhci_dbg_ctx(xhci
, config_cmd
->in_ctx
, 0);
4686 /* Issue and wait for the configure endpoint or
4687 * evaluate context command.
4689 if (xhci
->hci_version
> 0x95)
4690 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4693 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4696 xhci_dbg(xhci
, "Slot %u Output Context:\n", hdev
->slot_id
);
4697 xhci_dbg_ctx(xhci
, vdev
->out_ctx
, 0);
4699 xhci_free_command(xhci
, config_cmd
);
4703 int xhci_get_frame(struct usb_hcd
*hcd
)
4705 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4706 /* EHCI mods by the periodic size. Why? */
4707 return xhci_readl(xhci
, &xhci
->run_regs
->microframe_index
) >> 3;
4710 int xhci_gen_setup(struct usb_hcd
*hcd
, xhci_get_quirks_t get_quirks
)
4712 struct xhci_hcd
*xhci
;
4713 struct device
*dev
= hcd
->self
.controller
;
4716 /* Accept arbitrarily long scatter-gather lists */
4717 hcd
->self
.sg_tablesize
= ~0;
4719 /* support to build packet from discontinuous buffers */
4720 hcd
->self
.no_sg_constraint
= 1;
4722 /* XHCI controllers don't stop the ep queue on short packets :| */
4723 hcd
->self
.no_stop_on_short
= 1;
4725 if (usb_hcd_is_primary_hcd(hcd
)) {
4726 xhci
= kzalloc(sizeof(struct xhci_hcd
), GFP_KERNEL
);
4729 *((struct xhci_hcd
**) hcd
->hcd_priv
) = xhci
;
4730 xhci
->main_hcd
= hcd
;
4731 /* Mark the first roothub as being USB 2.0.
4732 * The xHCI driver will register the USB 3.0 roothub.
4734 hcd
->speed
= HCD_USB2
;
4735 hcd
->self
.root_hub
->speed
= USB_SPEED_HIGH
;
4737 * USB 2.0 roothub under xHCI has an integrated TT,
4738 * (rate matching hub) as opposed to having an OHCI/UHCI
4739 * companion controller.
4743 /* xHCI private pointer was set in xhci_pci_probe for the second
4744 * registered roothub.
4749 xhci
->cap_regs
= hcd
->regs
;
4750 xhci
->op_regs
= hcd
->regs
+
4751 HC_LENGTH(xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
));
4752 xhci
->run_regs
= hcd
->regs
+
4753 (xhci_readl(xhci
, &xhci
->cap_regs
->run_regs_off
) & RTSOFF_MASK
);
4754 /* Cache read-only capability registers */
4755 xhci
->hcs_params1
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params1
);
4756 xhci
->hcs_params2
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params2
);
4757 xhci
->hcs_params3
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params3
);
4758 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
);
4759 xhci
->hci_version
= HC_VERSION(xhci
->hcc_params
);
4760 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4761 xhci_print_registers(xhci
);
4763 get_quirks(dev
, xhci
);
4765 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4766 * success event after a short transfer. This quirk will ignore such
4769 if (xhci
->hci_version
> 0x96)
4770 xhci
->quirks
|= XHCI_SPURIOUS_SUCCESS
;
4772 /* Make sure the HC is halted. */
4773 retval
= xhci_halt(xhci
);
4777 xhci_dbg(xhci
, "Resetting HCD\n");
4778 /* Reset the internal HC memory state and registers. */
4779 retval
= xhci_reset(xhci
);
4782 xhci_dbg(xhci
, "Reset complete\n");
4784 /* Set dma_mask and coherent_dma_mask to 64-bits,
4785 * if xHC supports 64-bit addressing */
4786 if (HCC_64BIT_ADDR(xhci
->hcc_params
) &&
4787 !dma_set_mask(dev
, DMA_BIT_MASK(64))) {
4788 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4789 dma_set_coherent_mask(dev
, DMA_BIT_MASK(64));
4792 xhci_dbg(xhci
, "Calling HCD init\n");
4793 /* Initialize HCD and host controller data structures. */
4794 retval
= xhci_init(hcd
);
4797 xhci_dbg(xhci
, "Called HCD init\n");
4804 MODULE_DESCRIPTION(DRIVER_DESC
);
4805 MODULE_AUTHOR(DRIVER_AUTHOR
);
4806 MODULE_LICENSE("GPL");
4808 static int __init
xhci_hcd_init(void)
4812 retval
= xhci_register_pci();
4814 pr_debug("Problem registering PCI driver.\n");
4817 retval
= xhci_register_plat();
4819 pr_debug("Problem registering platform driver.\n");
4823 * Check the compiler generated sizes of structures that must be laid
4824 * out in specific ways for hardware access.
4826 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
4827 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
4828 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
4829 /* xhci_device_control has eight fields, and also
4830 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4832 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
4833 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
4834 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
4835 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
4836 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
4837 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4838 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
4841 xhci_unregister_pci();
4844 module_init(xhci_hcd_init
);
4846 static void __exit
xhci_hcd_cleanup(void)
4848 xhci_unregister_pci();
4849 xhci_unregister_plat();
4851 module_exit(xhci_hcd_cleanup
);