Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm...
[linux-2.6.git] / drivers / iio / dac / ad5764.c
bloba8ff5b2ed13ef396440b93cddc74d5f0a2397303
1 /*
2 * Analog devices AD5764, AD5764R, AD5744, AD5744R quad-channel
3 * Digital to Analog Converters driver
5 * Copyright 2011 Analog Devices Inc.
7 * Licensed under the GPL-2.
8 */
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/regulator/consumer.h>
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
22 #define AD5764_REG_SF_NOP 0x0
23 #define AD5764_REG_SF_CONFIG 0x1
24 #define AD5764_REG_SF_CLEAR 0x4
25 #define AD5764_REG_SF_LOAD 0x5
26 #define AD5764_REG_DATA(x) ((2 << 3) | (x))
27 #define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x))
28 #define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x))
29 #define AD5764_REG_OFFSET(x) ((5 << 3) | (x))
31 #define AD5764_NUM_CHANNELS 4
33 /**
34 * struct ad5764_chip_info - chip specific information
35 * @int_vref: Value of the internal reference voltage in uV - 0 if external
36 * reference voltage is used
37 * @channel channel specification
40 struct ad5764_chip_info {
41 unsigned long int_vref;
42 const struct iio_chan_spec *channels;
45 /**
46 * struct ad5764_state - driver instance specific data
47 * @spi: spi_device
48 * @chip_info: chip info
49 * @vref_reg: vref supply regulators
50 * @data: spi transfer buffers
53 struct ad5764_state {
54 struct spi_device *spi;
55 const struct ad5764_chip_info *chip_info;
56 struct regulator_bulk_data vref_reg[2];
59 * DMA (thus cache coherency maintenance) requires the
60 * transfer buffers to live in their own cache lines.
62 union {
63 __be32 d32;
64 u8 d8[4];
65 } data[2] ____cacheline_aligned;
68 enum ad5764_type {
69 ID_AD5744,
70 ID_AD5744R,
71 ID_AD5764,
72 ID_AD5764R,
75 #define AD5764_CHANNEL(_chan, _bits) { \
76 .type = IIO_VOLTAGE, \
77 .indexed = 1, \
78 .output = 1, \
79 .channel = (_chan), \
80 .address = (_chan), \
81 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
82 BIT(IIO_CHAN_INFO_SCALE) | \
83 BIT(IIO_CHAN_INFO_CALIBSCALE) | \
84 BIT(IIO_CHAN_INFO_CALIBBIAS), \
85 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET), \
86 .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)) \
89 #define DECLARE_AD5764_CHANNELS(_name, _bits) \
90 const struct iio_chan_spec _name##_channels[] = { \
91 AD5764_CHANNEL(0, (_bits)), \
92 AD5764_CHANNEL(1, (_bits)), \
93 AD5764_CHANNEL(2, (_bits)), \
94 AD5764_CHANNEL(3, (_bits)), \
97 static DECLARE_AD5764_CHANNELS(ad5764, 16);
98 static DECLARE_AD5764_CHANNELS(ad5744, 14);
100 static const struct ad5764_chip_info ad5764_chip_infos[] = {
101 [ID_AD5744] = {
102 .int_vref = 0,
103 .channels = ad5744_channels,
105 [ID_AD5744R] = {
106 .int_vref = 5000000,
107 .channels = ad5744_channels,
109 [ID_AD5764] = {
110 .int_vref = 0,
111 .channels = ad5764_channels,
113 [ID_AD5764R] = {
114 .int_vref = 5000000,
115 .channels = ad5764_channels,
119 static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg,
120 unsigned int val)
122 struct ad5764_state *st = iio_priv(indio_dev);
123 int ret;
125 mutex_lock(&indio_dev->mlock);
126 st->data[0].d32 = cpu_to_be32((reg << 16) | val);
128 ret = spi_write(st->spi, &st->data[0].d8[1], 3);
129 mutex_unlock(&indio_dev->mlock);
131 return ret;
134 static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg,
135 unsigned int *val)
137 struct ad5764_state *st = iio_priv(indio_dev);
138 int ret;
139 struct spi_transfer t[] = {
141 .tx_buf = &st->data[0].d8[1],
142 .len = 3,
143 .cs_change = 1,
144 }, {
145 .rx_buf = &st->data[1].d8[1],
146 .len = 3,
150 mutex_lock(&indio_dev->mlock);
152 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
154 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
155 if (ret >= 0)
156 *val = be32_to_cpu(st->data[1].d32) & 0xffff;
158 mutex_unlock(&indio_dev->mlock);
160 return ret;
163 static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info)
165 switch (info) {
166 case 0:
167 return AD5764_REG_DATA(chan->address);
168 case IIO_CHAN_INFO_CALIBBIAS:
169 return AD5764_REG_OFFSET(chan->address);
170 case IIO_CHAN_INFO_CALIBSCALE:
171 return AD5764_REG_FINE_GAIN(chan->address);
172 default:
173 break;
176 return 0;
179 static int ad5764_write_raw(struct iio_dev *indio_dev,
180 struct iio_chan_spec const *chan, int val, int val2, long info)
182 const int max_val = (1 << chan->scan_type.realbits);
183 unsigned int reg;
185 switch (info) {
186 case IIO_CHAN_INFO_RAW:
187 if (val >= max_val || val < 0)
188 return -EINVAL;
189 val <<= chan->scan_type.shift;
190 break;
191 case IIO_CHAN_INFO_CALIBBIAS:
192 if (val >= 128 || val < -128)
193 return -EINVAL;
194 break;
195 case IIO_CHAN_INFO_CALIBSCALE:
196 if (val >= 32 || val < -32)
197 return -EINVAL;
198 break;
199 default:
200 return -EINVAL;
203 reg = ad5764_chan_info_to_reg(chan, info);
204 return ad5764_write(indio_dev, reg, (u16)val);
207 static int ad5764_get_channel_vref(struct ad5764_state *st,
208 unsigned int channel)
210 if (st->chip_info->int_vref)
211 return st->chip_info->int_vref;
212 else
213 return regulator_get_voltage(st->vref_reg[channel / 2].consumer);
216 static int ad5764_read_raw(struct iio_dev *indio_dev,
217 struct iio_chan_spec const *chan, int *val, int *val2, long info)
219 struct ad5764_state *st = iio_priv(indio_dev);
220 unsigned int reg;
221 int vref;
222 int ret;
224 switch (info) {
225 case IIO_CHAN_INFO_RAW:
226 reg = AD5764_REG_DATA(chan->address);
227 ret = ad5764_read(indio_dev, reg, val);
228 if (ret < 0)
229 return ret;
230 *val >>= chan->scan_type.shift;
231 return IIO_VAL_INT;
232 case IIO_CHAN_INFO_CALIBBIAS:
233 reg = AD5764_REG_OFFSET(chan->address);
234 ret = ad5764_read(indio_dev, reg, val);
235 if (ret < 0)
236 return ret;
237 *val = sign_extend32(*val, 7);
238 return IIO_VAL_INT;
239 case IIO_CHAN_INFO_CALIBSCALE:
240 reg = AD5764_REG_FINE_GAIN(chan->address);
241 ret = ad5764_read(indio_dev, reg, val);
242 if (ret < 0)
243 return ret;
244 *val = sign_extend32(*val, 5);
245 return IIO_VAL_INT;
246 case IIO_CHAN_INFO_SCALE:
247 /* vout = 4 * vref + ((dac_code / 65536) - 0.5) */
248 vref = ad5764_get_channel_vref(st, chan->channel);
249 if (vref < 0)
250 return vref;
252 *val = vref * 4 / 1000;
253 *val2 = chan->scan_type.realbits;
254 return IIO_VAL_FRACTIONAL_LOG2;
255 case IIO_CHAN_INFO_OFFSET:
256 *val = -(1 << chan->scan_type.realbits) / 2;
257 return IIO_VAL_INT;
260 return -EINVAL;
263 static const struct iio_info ad5764_info = {
264 .read_raw = ad5764_read_raw,
265 .write_raw = ad5764_write_raw,
266 .driver_module = THIS_MODULE,
269 static int ad5764_probe(struct spi_device *spi)
271 enum ad5764_type type = spi_get_device_id(spi)->driver_data;
272 struct iio_dev *indio_dev;
273 struct ad5764_state *st;
274 int ret;
276 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
277 if (indio_dev == NULL) {
278 dev_err(&spi->dev, "Failed to allocate iio device\n");
279 return -ENOMEM;
282 st = iio_priv(indio_dev);
283 spi_set_drvdata(spi, indio_dev);
285 st->spi = spi;
286 st->chip_info = &ad5764_chip_infos[type];
288 indio_dev->dev.parent = &spi->dev;
289 indio_dev->name = spi_get_device_id(spi)->name;
290 indio_dev->info = &ad5764_info;
291 indio_dev->modes = INDIO_DIRECT_MODE;
292 indio_dev->num_channels = AD5764_NUM_CHANNELS;
293 indio_dev->channels = st->chip_info->channels;
295 if (st->chip_info->int_vref == 0) {
296 st->vref_reg[0].supply = "vrefAB";
297 st->vref_reg[1].supply = "vrefCD";
299 ret = devm_regulator_bulk_get(&st->spi->dev,
300 ARRAY_SIZE(st->vref_reg), st->vref_reg);
301 if (ret) {
302 dev_err(&spi->dev, "Failed to request vref regulators: %d\n",
303 ret);
304 return ret;
307 ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg),
308 st->vref_reg);
309 if (ret) {
310 dev_err(&spi->dev, "Failed to enable vref regulators: %d\n",
311 ret);
312 return ret;
316 ret = iio_device_register(indio_dev);
317 if (ret) {
318 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
319 goto error_disable_reg;
322 return 0;
324 error_disable_reg:
325 if (st->chip_info->int_vref == 0)
326 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
327 return ret;
330 static int ad5764_remove(struct spi_device *spi)
332 struct iio_dev *indio_dev = spi_get_drvdata(spi);
333 struct ad5764_state *st = iio_priv(indio_dev);
335 iio_device_unregister(indio_dev);
337 if (st->chip_info->int_vref == 0)
338 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
340 return 0;
343 static const struct spi_device_id ad5764_ids[] = {
344 { "ad5744", ID_AD5744 },
345 { "ad5744r", ID_AD5744R },
346 { "ad5764", ID_AD5764 },
347 { "ad5764r", ID_AD5764R },
350 MODULE_DEVICE_TABLE(spi, ad5764_ids);
352 static struct spi_driver ad5764_driver = {
353 .driver = {
354 .name = "ad5764",
355 .owner = THIS_MODULE,
357 .probe = ad5764_probe,
358 .remove = ad5764_remove,
359 .id_table = ad5764_ids,
361 module_spi_driver(ad5764_driver);
363 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
364 MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC");
365 MODULE_LICENSE("GPL v2");