Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm...
[linux-2.6.git] / drivers / iio / dac / ad5449.c
blob82e208f6cde2021f8707e1f45d9a3e3c8a528664
1 /*
2 * AD5415, AD5426, AD5429, AD5432, AD5439, AD5443, AD5449 Digital to Analog
3 * Converter driver.
5 * Copyright 2012 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
8 * Licensed under the GPL-2.
9 */
11 #include <linux/device.h>
12 #include <linux/err.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/spi/spi.h>
16 #include <linux/slab.h>
17 #include <linux/sysfs.h>
18 #include <linux/regulator/consumer.h>
19 #include <asm/unaligned.h>
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
24 #include <linux/platform_data/ad5449.h>
26 #define AD5449_MAX_CHANNELS 2
27 #define AD5449_MAX_VREFS 2
29 #define AD5449_CMD_NOOP 0x0
30 #define AD5449_CMD_LOAD_AND_UPDATE(x) (0x1 + (x) * 3)
31 #define AD5449_CMD_READ(x) (0x2 + (x) * 3)
32 #define AD5449_CMD_LOAD(x) (0x3 + (x) * 3)
33 #define AD5449_CMD_CTRL 13
35 #define AD5449_CTRL_SDO_OFFSET 10
36 #define AD5449_CTRL_DAISY_CHAIN BIT(9)
37 #define AD5449_CTRL_HCLR_TO_MIDSCALE BIT(8)
38 #define AD5449_CTRL_SAMPLE_RISING BIT(7)
40 /**
41 * struct ad5449_chip_info - chip specific information
42 * @channels: Channel specification
43 * @num_channels: Number of channels
44 * @has_ctrl: Chip has a control register
46 struct ad5449_chip_info {
47 const struct iio_chan_spec *channels;
48 unsigned int num_channels;
49 bool has_ctrl;
52 /**
53 * struct ad5449 - driver instance specific data
54 * @spi: the SPI device for this driver instance
55 * @chip_info: chip model specific constants, available modes etc
56 * @vref_reg: vref supply regulators
57 * @has_sdo: whether the SDO line is connected
58 * @dac_cache: Cache for the DAC values
59 * @data: spi transfer buffers
61 struct ad5449 {
62 struct spi_device *spi;
63 const struct ad5449_chip_info *chip_info;
64 struct regulator_bulk_data vref_reg[AD5449_MAX_VREFS];
66 bool has_sdo;
67 uint16_t dac_cache[AD5449_MAX_CHANNELS];
70 * DMA (thus cache coherency maintenance) requires the
71 * transfer buffers to live in their own cache lines.
73 __be16 data[2] ____cacheline_aligned;
76 enum ad5449_type {
77 ID_AD5426,
78 ID_AD5429,
79 ID_AD5432,
80 ID_AD5439,
81 ID_AD5443,
82 ID_AD5449,
85 static int ad5449_write(struct iio_dev *indio_dev, unsigned int addr,
86 unsigned int val)
88 struct ad5449 *st = iio_priv(indio_dev);
89 int ret;
91 mutex_lock(&indio_dev->mlock);
92 st->data[0] = cpu_to_be16((addr << 12) | val);
93 ret = spi_write(st->spi, st->data, 2);
94 mutex_unlock(&indio_dev->mlock);
96 return ret;
99 static int ad5449_read(struct iio_dev *indio_dev, unsigned int addr,
100 unsigned int *val)
102 struct ad5449 *st = iio_priv(indio_dev);
103 int ret;
104 struct spi_transfer t[] = {
106 .tx_buf = &st->data[0],
107 .len = 2,
108 .cs_change = 1,
109 }, {
110 .tx_buf = &st->data[1],
111 .rx_buf = &st->data[1],
112 .len = 2,
116 mutex_lock(&indio_dev->mlock);
117 st->data[0] = cpu_to_be16(addr << 12);
118 st->data[1] = cpu_to_be16(AD5449_CMD_NOOP);
120 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
121 if (ret < 0)
122 goto out_unlock;
124 *val = be16_to_cpu(st->data[1]);
126 out_unlock:
127 mutex_unlock(&indio_dev->mlock);
128 return ret;
131 static int ad5449_read_raw(struct iio_dev *indio_dev,
132 struct iio_chan_spec const *chan, int *val, int *val2, long info)
134 struct ad5449 *st = iio_priv(indio_dev);
135 struct regulator_bulk_data *reg;
136 int scale_uv;
137 int ret;
139 switch (info) {
140 case IIO_CHAN_INFO_RAW:
141 if (st->has_sdo) {
142 ret = ad5449_read(indio_dev,
143 AD5449_CMD_READ(chan->address), val);
144 if (ret)
145 return ret;
146 *val &= 0xfff;
147 } else {
148 *val = st->dac_cache[chan->address];
151 return IIO_VAL_INT;
152 case IIO_CHAN_INFO_SCALE:
153 reg = &st->vref_reg[chan->channel];
154 scale_uv = regulator_get_voltage(reg->consumer);
155 if (scale_uv < 0)
156 return scale_uv;
158 *val = scale_uv / 1000;
159 *val2 = chan->scan_type.realbits;
161 return IIO_VAL_FRACTIONAL_LOG2;
162 default:
163 break;
166 return -EINVAL;
169 static int ad5449_write_raw(struct iio_dev *indio_dev,
170 struct iio_chan_spec const *chan, int val, int val2, long info)
172 struct ad5449 *st = iio_priv(indio_dev);
173 int ret;
175 switch (info) {
176 case IIO_CHAN_INFO_RAW:
177 if (val < 0 || val >= (1 << chan->scan_type.realbits))
178 return -EINVAL;
180 ret = ad5449_write(indio_dev,
181 AD5449_CMD_LOAD_AND_UPDATE(chan->address),
182 val << chan->scan_type.shift);
183 if (ret == 0)
184 st->dac_cache[chan->address] = val;
185 break;
186 default:
187 ret = -EINVAL;
190 return ret;
193 static const struct iio_info ad5449_info = {
194 .read_raw = ad5449_read_raw,
195 .write_raw = ad5449_write_raw,
196 .driver_module = THIS_MODULE,
199 #define AD5449_CHANNEL(chan, bits) { \
200 .type = IIO_VOLTAGE, \
201 .indexed = 1, \
202 .output = 1, \
203 .channel = (chan), \
204 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
205 BIT(IIO_CHAN_INFO_SCALE), \
206 .address = (chan), \
207 .scan_type = IIO_ST('u', (bits), 16, 12 - (bits)), \
210 #define DECLARE_AD5449_CHANNELS(name, bits) \
211 const struct iio_chan_spec name[] = { \
212 AD5449_CHANNEL(0, bits), \
213 AD5449_CHANNEL(1, bits), \
216 static DECLARE_AD5449_CHANNELS(ad5429_channels, 8);
217 static DECLARE_AD5449_CHANNELS(ad5439_channels, 10);
218 static DECLARE_AD5449_CHANNELS(ad5449_channels, 12);
220 static const struct ad5449_chip_info ad5449_chip_info[] = {
221 [ID_AD5426] = {
222 .channels = ad5429_channels,
223 .num_channels = 1,
224 .has_ctrl = false,
226 [ID_AD5429] = {
227 .channels = ad5429_channels,
228 .num_channels = 2,
229 .has_ctrl = true,
231 [ID_AD5432] = {
232 .channels = ad5439_channels,
233 .num_channels = 1,
234 .has_ctrl = false,
236 [ID_AD5439] = {
237 .channels = ad5439_channels,
238 .num_channels = 2,
239 .has_ctrl = true,
241 [ID_AD5443] = {
242 .channels = ad5449_channels,
243 .num_channels = 1,
244 .has_ctrl = false,
246 [ID_AD5449] = {
247 .channels = ad5449_channels,
248 .num_channels = 2,
249 .has_ctrl = true,
253 static const char *ad5449_vref_name(struct ad5449 *st, int n)
255 if (st->chip_info->num_channels == 1)
256 return "VREF";
258 if (n == 0)
259 return "VREFA";
260 else
261 return "VREFB";
264 static int ad5449_spi_probe(struct spi_device *spi)
266 struct ad5449_platform_data *pdata = spi->dev.platform_data;
267 const struct spi_device_id *id = spi_get_device_id(spi);
268 struct iio_dev *indio_dev;
269 struct ad5449 *st;
270 unsigned int i;
271 int ret;
273 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
274 if (indio_dev == NULL)
275 return -ENOMEM;
277 st = iio_priv(indio_dev);
278 spi_set_drvdata(spi, indio_dev);
280 st->chip_info = &ad5449_chip_info[id->driver_data];
281 st->spi = spi;
283 for (i = 0; i < st->chip_info->num_channels; ++i)
284 st->vref_reg[i].supply = ad5449_vref_name(st, i);
286 ret = devm_regulator_bulk_get(&spi->dev, st->chip_info->num_channels,
287 st->vref_reg);
288 if (ret)
289 return ret;
291 ret = regulator_bulk_enable(st->chip_info->num_channels, st->vref_reg);
292 if (ret)
293 return ret;
295 indio_dev->dev.parent = &spi->dev;
296 indio_dev->name = id->name;
297 indio_dev->info = &ad5449_info;
298 indio_dev->modes = INDIO_DIRECT_MODE;
299 indio_dev->channels = st->chip_info->channels;
300 indio_dev->num_channels = st->chip_info->num_channels;
302 if (st->chip_info->has_ctrl) {
303 unsigned int ctrl = 0x00;
304 if (pdata) {
305 if (pdata->hardware_clear_to_midscale)
306 ctrl |= AD5449_CTRL_HCLR_TO_MIDSCALE;
307 ctrl |= pdata->sdo_mode << AD5449_CTRL_SDO_OFFSET;
308 st->has_sdo = pdata->sdo_mode != AD5449_SDO_DISABLED;
309 } else {
310 st->has_sdo = true;
312 ad5449_write(indio_dev, AD5449_CMD_CTRL, ctrl);
315 ret = iio_device_register(indio_dev);
316 if (ret)
317 goto error_disable_reg;
319 return 0;
321 error_disable_reg:
322 regulator_bulk_disable(st->chip_info->num_channels, st->vref_reg);
324 return ret;
327 static int ad5449_spi_remove(struct spi_device *spi)
329 struct iio_dev *indio_dev = spi_get_drvdata(spi);
330 struct ad5449 *st = iio_priv(indio_dev);
332 iio_device_unregister(indio_dev);
334 regulator_bulk_disable(st->chip_info->num_channels, st->vref_reg);
336 return 0;
339 static const struct spi_device_id ad5449_spi_ids[] = {
340 { "ad5415", ID_AD5449 },
341 { "ad5426", ID_AD5426 },
342 { "ad5429", ID_AD5429 },
343 { "ad5432", ID_AD5432 },
344 { "ad5439", ID_AD5439 },
345 { "ad5443", ID_AD5443 },
346 { "ad5449", ID_AD5449 },
349 MODULE_DEVICE_TABLE(spi, ad5449_spi_ids);
351 static struct spi_driver ad5449_spi_driver = {
352 .driver = {
353 .name = "ad5449",
354 .owner = THIS_MODULE,
356 .probe = ad5449_spi_probe,
357 .remove = ad5449_spi_remove,
358 .id_table = ad5449_spi_ids,
360 module_spi_driver(ad5449_spi_driver);
362 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
363 MODULE_DESCRIPTION("Analog Devices AD5449 and similar DACs");
364 MODULE_LICENSE("GPL v2");