Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm...
[linux-2.6.git] / drivers / iio / adc / ad7266.c
blob58e945594c7bb7e484588820517c1b067b5c2521
1 /*
2 * AD7266/65 SPI ADC driver
4 * Copyright 2012 Analog Devices Inc.
6 * Licensed under the GPL-2.
7 */
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/spi/spi.h>
13 #include <linux/regulator/consumer.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/module.h>
18 #include <linux/interrupt.h>
20 #include <linux/iio/iio.h>
21 #include <linux/iio/buffer.h>
22 #include <linux/iio/trigger_consumer.h>
23 #include <linux/iio/triggered_buffer.h>
25 #include <linux/platform_data/ad7266.h>
27 struct ad7266_state {
28 struct spi_device *spi;
29 struct regulator *reg;
30 unsigned long vref_mv;
32 struct spi_transfer single_xfer[3];
33 struct spi_message single_msg;
35 enum ad7266_range range;
36 enum ad7266_mode mode;
37 bool fixed_addr;
38 struct gpio gpios[3];
41 * DMA (thus cache coherency maintenance) requires the
42 * transfer buffers to live in their own cache lines.
43 * The buffer needs to be large enough to hold two samples (4 bytes) and
44 * the naturally aligned timestamp (8 bytes).
46 uint8_t data[ALIGN(4, sizeof(s64)) + sizeof(s64)] ____cacheline_aligned;
49 static int ad7266_wakeup(struct ad7266_state *st)
51 /* Any read with >= 2 bytes will wake the device */
52 return spi_read(st->spi, st->data, 2);
55 static int ad7266_powerdown(struct ad7266_state *st)
57 /* Any read with < 2 bytes will powerdown the device */
58 return spi_read(st->spi, st->data, 1);
61 static int ad7266_preenable(struct iio_dev *indio_dev)
63 struct ad7266_state *st = iio_priv(indio_dev);
64 return ad7266_wakeup(st);
67 static int ad7266_postdisable(struct iio_dev *indio_dev)
69 struct ad7266_state *st = iio_priv(indio_dev);
70 return ad7266_powerdown(st);
73 static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
74 .preenable = &ad7266_preenable,
75 .postenable = &iio_triggered_buffer_postenable,
76 .predisable = &iio_triggered_buffer_predisable,
77 .postdisable = &ad7266_postdisable,
80 static irqreturn_t ad7266_trigger_handler(int irq, void *p)
82 struct iio_poll_func *pf = p;
83 struct iio_dev *indio_dev = pf->indio_dev;
84 struct ad7266_state *st = iio_priv(indio_dev);
85 int ret;
87 ret = spi_read(st->spi, st->data, 4);
88 if (ret == 0) {
89 iio_push_to_buffers_with_timestamp(indio_dev, st->data,
90 pf->timestamp);
93 iio_trigger_notify_done(indio_dev->trig);
95 return IRQ_HANDLED;
98 static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
100 unsigned int i;
102 if (st->fixed_addr)
103 return;
105 switch (st->mode) {
106 case AD7266_MODE_SINGLE_ENDED:
107 nr >>= 1;
108 break;
109 case AD7266_MODE_PSEUDO_DIFF:
110 nr |= 1;
111 break;
112 case AD7266_MODE_DIFF:
113 nr &= ~1;
114 break;
117 for (i = 0; i < 3; ++i)
118 gpio_set_value(st->gpios[i].gpio, (bool)(nr & BIT(i)));
121 static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
122 const unsigned long *scan_mask)
124 struct ad7266_state *st = iio_priv(indio_dev);
125 unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);
127 ad7266_select_input(st, nr);
129 return 0;
132 static int ad7266_read_single(struct ad7266_state *st, int *val,
133 unsigned int address)
135 int ret;
137 ad7266_select_input(st, address);
139 ret = spi_sync(st->spi, &st->single_msg);
140 *val = be16_to_cpu(st->data[address % 2]);
142 return ret;
145 static int ad7266_read_raw(struct iio_dev *indio_dev,
146 struct iio_chan_spec const *chan, int *val, int *val2, long m)
148 struct ad7266_state *st = iio_priv(indio_dev);
149 unsigned long scale_mv;
150 int ret;
152 switch (m) {
153 case IIO_CHAN_INFO_RAW:
154 if (iio_buffer_enabled(indio_dev))
155 return -EBUSY;
157 ret = ad7266_read_single(st, val, chan->address);
158 if (ret)
159 return ret;
161 *val = (*val >> 2) & 0xfff;
162 if (chan->scan_type.sign == 's')
163 *val = sign_extend32(*val, 11);
165 return IIO_VAL_INT;
166 case IIO_CHAN_INFO_SCALE:
167 scale_mv = st->vref_mv;
168 if (st->mode == AD7266_MODE_DIFF)
169 scale_mv *= 2;
170 if (st->range == AD7266_RANGE_2VREF)
171 scale_mv *= 2;
173 *val = scale_mv;
174 *val2 = chan->scan_type.realbits;
175 return IIO_VAL_FRACTIONAL_LOG2;
176 case IIO_CHAN_INFO_OFFSET:
177 if (st->range == AD7266_RANGE_2VREF &&
178 st->mode != AD7266_MODE_DIFF)
179 *val = 2048;
180 else
181 *val = 0;
182 return IIO_VAL_INT;
184 return -EINVAL;
187 #define AD7266_CHAN(_chan, _sign) { \
188 .type = IIO_VOLTAGE, \
189 .indexed = 1, \
190 .channel = (_chan), \
191 .address = (_chan), \
192 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
193 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
194 | BIT(IIO_CHAN_INFO_OFFSET), \
195 .scan_index = (_chan), \
196 .scan_type = { \
197 .sign = (_sign), \
198 .realbits = 12, \
199 .storagebits = 16, \
200 .shift = 2, \
201 .endianness = IIO_BE, \
202 }, \
205 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
206 const struct iio_chan_spec ad7266_channels_##_name[] = { \
207 AD7266_CHAN(0, (_sign)), \
208 AD7266_CHAN(1, (_sign)), \
209 AD7266_CHAN(2, (_sign)), \
210 AD7266_CHAN(3, (_sign)), \
211 AD7266_CHAN(4, (_sign)), \
212 AD7266_CHAN(5, (_sign)), \
213 AD7266_CHAN(6, (_sign)), \
214 AD7266_CHAN(7, (_sign)), \
215 AD7266_CHAN(8, (_sign)), \
216 AD7266_CHAN(9, (_sign)), \
217 AD7266_CHAN(10, (_sign)), \
218 AD7266_CHAN(11, (_sign)), \
219 IIO_CHAN_SOFT_TIMESTAMP(13), \
222 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
223 const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
224 AD7266_CHAN(0, (_sign)), \
225 AD7266_CHAN(1, (_sign)), \
226 IIO_CHAN_SOFT_TIMESTAMP(2), \
229 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
230 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
231 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
232 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
234 #define AD7266_CHAN_DIFF(_chan, _sign) { \
235 .type = IIO_VOLTAGE, \
236 .indexed = 1, \
237 .channel = (_chan) * 2, \
238 .channel2 = (_chan) * 2 + 1, \
239 .address = (_chan), \
240 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
241 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
242 | BIT(IIO_CHAN_INFO_OFFSET), \
243 .scan_index = (_chan), \
244 .scan_type = { \
245 .sign = _sign, \
246 .realbits = 12, \
247 .storagebits = 16, \
248 .shift = 2, \
249 .endianness = IIO_BE, \
250 }, \
251 .differential = 1, \
254 #define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
255 const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
256 AD7266_CHAN_DIFF(0, (_sign)), \
257 AD7266_CHAN_DIFF(1, (_sign)), \
258 AD7266_CHAN_DIFF(2, (_sign)), \
259 AD7266_CHAN_DIFF(3, (_sign)), \
260 AD7266_CHAN_DIFF(4, (_sign)), \
261 AD7266_CHAN_DIFF(5, (_sign)), \
262 IIO_CHAN_SOFT_TIMESTAMP(6), \
265 static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
266 static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
268 #define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
269 const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
270 AD7266_CHAN_DIFF(0, (_sign)), \
271 AD7266_CHAN_DIFF(1, (_sign)), \
272 IIO_CHAN_SOFT_TIMESTAMP(2), \
275 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
276 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
278 static const struct iio_info ad7266_info = {
279 .read_raw = &ad7266_read_raw,
280 .update_scan_mode = &ad7266_update_scan_mode,
281 .driver_module = THIS_MODULE,
284 static const unsigned long ad7266_available_scan_masks[] = {
285 0x003,
286 0x00c,
287 0x030,
288 0x0c0,
289 0x300,
290 0xc00,
291 0x000,
294 static const unsigned long ad7266_available_scan_masks_diff[] = {
295 0x003,
296 0x00c,
297 0x030,
298 0x000,
301 static const unsigned long ad7266_available_scan_masks_fixed[] = {
302 0x003,
303 0x000,
306 struct ad7266_chan_info {
307 const struct iio_chan_spec *channels;
308 unsigned int num_channels;
309 const unsigned long *scan_masks;
312 #define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
313 (((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))
315 static const struct ad7266_chan_info ad7266_chan_infos[] = {
316 [AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
317 .channels = ad7266_channels_u,
318 .num_channels = ARRAY_SIZE(ad7266_channels_u),
319 .scan_masks = ad7266_available_scan_masks,
321 [AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
322 .channels = ad7266_channels_u_fixed,
323 .num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
324 .scan_masks = ad7266_available_scan_masks_fixed,
326 [AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
327 .channels = ad7266_channels_s,
328 .num_channels = ARRAY_SIZE(ad7266_channels_s),
329 .scan_masks = ad7266_available_scan_masks,
331 [AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
332 .channels = ad7266_channels_s_fixed,
333 .num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
334 .scan_masks = ad7266_available_scan_masks_fixed,
336 [AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
337 .channels = ad7266_channels_diff_u,
338 .num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
339 .scan_masks = ad7266_available_scan_masks_diff,
341 [AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
342 .channels = ad7266_channels_diff_fixed_u,
343 .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
344 .scan_masks = ad7266_available_scan_masks_fixed,
346 [AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
347 .channels = ad7266_channels_diff_s,
348 .num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
349 .scan_masks = ad7266_available_scan_masks_diff,
351 [AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
352 .channels = ad7266_channels_diff_fixed_s,
353 .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
354 .scan_masks = ad7266_available_scan_masks_fixed,
358 static void ad7266_init_channels(struct iio_dev *indio_dev)
360 struct ad7266_state *st = iio_priv(indio_dev);
361 bool is_differential, is_signed;
362 const struct ad7266_chan_info *chan_info;
363 int i;
365 is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
366 is_signed = (st->range == AD7266_RANGE_2VREF) |
367 (st->mode == AD7266_MODE_DIFF);
369 i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
370 chan_info = &ad7266_chan_infos[i];
372 indio_dev->channels = chan_info->channels;
373 indio_dev->num_channels = chan_info->num_channels;
374 indio_dev->available_scan_masks = chan_info->scan_masks;
375 indio_dev->masklength = chan_info->num_channels - 1;
378 static const char * const ad7266_gpio_labels[] = {
379 "AD0", "AD1", "AD2",
382 static int ad7266_probe(struct spi_device *spi)
384 struct ad7266_platform_data *pdata = spi->dev.platform_data;
385 struct iio_dev *indio_dev;
386 struct ad7266_state *st;
387 unsigned int i;
388 int ret;
390 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
391 if (indio_dev == NULL)
392 return -ENOMEM;
394 st = iio_priv(indio_dev);
396 st->reg = devm_regulator_get(&spi->dev, "vref");
397 if (!IS_ERR_OR_NULL(st->reg)) {
398 ret = regulator_enable(st->reg);
399 if (ret)
400 return ret;
402 ret = regulator_get_voltage(st->reg);
403 if (ret < 0)
404 goto error_disable_reg;
406 st->vref_mv = ret / 1000;
407 } else {
408 /* Use internal reference */
409 st->vref_mv = 2500;
412 if (pdata) {
413 st->fixed_addr = pdata->fixed_addr;
414 st->mode = pdata->mode;
415 st->range = pdata->range;
417 if (!st->fixed_addr) {
418 for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
419 st->gpios[i].gpio = pdata->addr_gpios[i];
420 st->gpios[i].flags = GPIOF_OUT_INIT_LOW;
421 st->gpios[i].label = ad7266_gpio_labels[i];
423 ret = gpio_request_array(st->gpios,
424 ARRAY_SIZE(st->gpios));
425 if (ret)
426 goto error_disable_reg;
428 } else {
429 st->fixed_addr = true;
430 st->range = AD7266_RANGE_VREF;
431 st->mode = AD7266_MODE_DIFF;
434 spi_set_drvdata(spi, indio_dev);
435 st->spi = spi;
437 indio_dev->dev.parent = &spi->dev;
438 indio_dev->name = spi_get_device_id(spi)->name;
439 indio_dev->modes = INDIO_DIRECT_MODE;
440 indio_dev->info = &ad7266_info;
442 ad7266_init_channels(indio_dev);
444 /* wakeup */
445 st->single_xfer[0].rx_buf = &st->data;
446 st->single_xfer[0].len = 2;
447 st->single_xfer[0].cs_change = 1;
448 /* conversion */
449 st->single_xfer[1].rx_buf = &st->data;
450 st->single_xfer[1].len = 4;
451 st->single_xfer[1].cs_change = 1;
452 /* powerdown */
453 st->single_xfer[2].tx_buf = &st->data;
454 st->single_xfer[2].len = 1;
456 spi_message_init(&st->single_msg);
457 spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
458 spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
459 spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
461 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
462 &ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
463 if (ret)
464 goto error_free_gpios;
466 ret = iio_device_register(indio_dev);
467 if (ret)
468 goto error_buffer_cleanup;
470 return 0;
472 error_buffer_cleanup:
473 iio_triggered_buffer_cleanup(indio_dev);
474 error_free_gpios:
475 if (!st->fixed_addr)
476 gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
477 error_disable_reg:
478 if (!IS_ERR_OR_NULL(st->reg))
479 regulator_disable(st->reg);
481 return ret;
484 static int ad7266_remove(struct spi_device *spi)
486 struct iio_dev *indio_dev = spi_get_drvdata(spi);
487 struct ad7266_state *st = iio_priv(indio_dev);
489 iio_device_unregister(indio_dev);
490 iio_triggered_buffer_cleanup(indio_dev);
491 if (!st->fixed_addr)
492 gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
493 if (!IS_ERR_OR_NULL(st->reg))
494 regulator_disable(st->reg);
496 return 0;
499 static const struct spi_device_id ad7266_id[] = {
500 {"ad7265", 0},
501 {"ad7266", 0},
504 MODULE_DEVICE_TABLE(spi, ad7266_id);
506 static struct spi_driver ad7266_driver = {
507 .driver = {
508 .name = "ad7266",
509 .owner = THIS_MODULE,
511 .probe = ad7266_probe,
512 .remove = ad7266_remove,
513 .id_table = ad7266_id,
515 module_spi_driver(ad7266_driver);
517 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
518 MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
519 MODULE_LICENSE("GPL v2");